CURRENT_REGS may change during assert handling, so pass
in the 'regs' parameter at the entry point of _assert.
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
This reverts commit 37104bf185dbf1665fc57f4ad039672e5c97c1dd.
Reason for revert: <This patch will cause specific product's a7 to fail to execute up_clean_dcache_all()>
When executing up_fbinitialize, the driver may turn on the vsync interrupt. If the vsync interrupt calls fb_pollnotify before executing fb->vtable->priv = fb it will cause null pointer access and crash.
Signed-off-by: pengyiqiang <pengyiqiang@xiaomi.com>
- Fix DMA addressing issues within litex_sendsetup/litex_recvsetup
- Extend with handling specific to eMMC commands during init & use.
- Cleanup of 4-bit BUS handling for SD and eMMC
- For eMMC, Send CMD0 during init as per JEDEC v4.41 for pre-idle
The current implementation requires the use of enter_critical_section, so the source code needs to be moved to kernel space
Signed-off-by: hujun5 <hujun5@xiaomi.com>
Instead of using a volatile storage for the address environment in the
binfmt / loadinfo structures, always allocate the address environment
from kheap.
This serves two purposes:
- If the task creation fails, any kernel thread that depends on the
address environment created during task creation will not lose their
mappings (because they hold a reference to it)
- The current address environment variable (g_addrenv) will NEVER contain
a stale / incorrect value
- Releasing the address environment is simplified as any pointer given
to addrenv_drop() can be assumed to be heap memory
- Makes the kludge function addrenv_clear_current irrelevant, as the
system will NEVER have invalid mappings any more
It seems that over-drive is not required for ULPI but it can be a workaround solution for boards with poor signal integration.
Higher core voltage means faster clock signal edges, which may be sufficient to synchronize the high-speed clock and data on poorly designed boards.
Over-drive can be forced to a given state by adding define to the
board.h configuration file:
#define STM32_VOS_OVERDRIVE 1 - force over-drive enabled,
#define STM32_VOS_OVERDRIVE 0 - force over-drive disabled,
#undef STM32_VOS_OVERDRIVE - autoselect over-drive by the default RCC logic
dependson:partner_17584
CURRENT_REGS may change during assert handling, so pass
in the 'regs' parameter at the entry point of _assert.
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
This is a workaround commit to temporarily reduce the flash usage of
esp32c6 to avoid ci failure, Since I am not familiar with esptool,
and this issue cannot be reproduced in the local environment,
so I temporarily turn off related optimizations to save flash size.
esptool error log:
-----------------------------------------
| MKIMAGE: ESP32-C6 binary
| esptool.py --chip esp32c6 elf2image --flash_mode dio --flash_size "4MB" -o nuttx.bin nuttx
| esptool.py v4.5.1
| Creating esp32c6 image...
| Merged 1 ELF section
|
| A fatal error occurred: Segment loaded at 0x42010c08 lands in same 64KB flash mapping as segment loaded at 0x42010020. Can't generate binary. Suggest changing linker script or ELF to merge sections.
| make: *** [tools/Unix.mk:527: nuttx] Error 2
| make: Target 'all' not remade because of errors.
-----------------------------------------
Signed-off-by: chao an <anchao@xiaomi.com>
sim_x11events should process all x11 events in each event loop,
otherwise it will cause events to accumulate in the queue and affect the interaction.
Signed-off-by: pengyiqiang <pengyiqiang@xiaomi.com>
RISCV has a modular instruction set. It's hard to define cpu-model to support all toolchain.
For Zig, cpu model is this formal: generic_rv[32|64][i][m][a][f][d][c]
For Rust, cpu model is this formal: riscv[32|64][i][m][a][f][d][c]
So, it's better to map the NuttX config to LLVM builtin cpu model, these models supported by
all LLVM based toolchain.
Refer to : https://github.com/llvm/llvm-project/blob/release/15.x/llvm/lib/Target/RISCV/RISCV.td
These models can't cover all implementation of RISCV, but it's enough for most cases.
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
openvela-robot