natas_hw
/
cbc
mirror of https://github.com/aamine/cbc
0
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

r4994@macbookpro: aamine | 2009-05-27 01:59:19 +0900 

* net/loveruby/cflat/sysdep/x86/AssemblyFile.java: remove unused methods.
 * net/loveruby/cflat/sysdep/x86/AssemblyFile.java: reduce Type argument.
 * net/loveruby/cflat/sysdep/x86/CodeGenerator.java: follow changes.
 


git-svn-id: file:///Users/aamine/c/gitwork/public/cbc/trunk@4267 1b9489fe-b721-0410-924e-b54b9192deb8
This commit is contained in:
Minero Aoki 2009-05-26 17:06:04 +00:00
parent 9805e5c958
commit 3b566ad27c
3 changed files with 85 additions and 117 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
ChangeLog
View File

@ -1,3 +1,14 @@
Wed May 27 01:59:03 2009 Minero Aoki <aamine@loveruby.net>
* net/loveruby/cflat/sysdep/x86/AssemblyFile.java: remove unused
methods.
* net/loveruby/cflat/sysdep/x86/AssemblyFile.java: reduce Type
argument.
* net/loveruby/cflat/sysdep/x86/CodeGenerator.java: follow
changes.
Tue May 26 16:52:18 2009 Minero Aoki <aamine@loveruby.net> Tue May 26 16:52:18 2009 Minero Aoki <aamine@loveruby.net>
* net/loveruby/cflat/asm/NamedSymbol.java (dump): dump name as * net/loveruby/cflat/asm/NamedSymbol.java (dump): dump name as

140
net/loveruby/cflat/sysdep/x86/AssemblyFile.java
View File

@ -277,10 +277,6 @@ public class AssemblyFile implements net.loveruby.cflat.sysdep.AssemblyFile {
insn("jmp", new DirectMemoryReference(label.symbol())); insn("jmp", new DirectMemoryReference(label.symbol()));
} }
void jz(Label label) {
insn("jz", new DirectMemoryReference(label.symbol()));
}
void jnz(Label label) { void jnz(Label label) {
insn("jnz", new DirectMemoryReference(label.symbol())); insn("jnz", new DirectMemoryReference(label.symbol()));
} }
@ -289,12 +285,8 @@ public class AssemblyFile implements net.loveruby.cflat.sysdep.AssemblyFile {
insn("je", new DirectMemoryReference(label.symbol())); insn("je", new DirectMemoryReference(label.symbol()));
} }
void jne(Label label) { void cmp(Operand a, Register b) {
insn("jne", new DirectMemoryReference(label.symbol())); insn(b.type, "cmp", a, b);
}
void cmp(Type t, Operand a, Register b) {
insn(t, "cmp", a, b);
} }
void sete(Register reg) { void sete(Register reg) {
@ -337,8 +329,8 @@ public class AssemblyFile implements net.loveruby.cflat.sysdep.AssemblyFile {
insn("setle", reg); insn("setle", reg);
} }
void test(Type type, Register a, Register b) { void test(Register a, Register b) {
insn(type, "test", a, b); insn(b.type, "test", a, b);
} }
void push(Register reg) { void push(Register reg) {
@ -363,8 +355,18 @@ public class AssemblyFile implements net.loveruby.cflat.sysdep.AssemblyFile {
insn("ret"); insn("ret");
} }
void mov(Operand src, Operand dest) { void mov(Register src, Register dest) {
mov(naturalType, src, dest); insn(naturalType, "mov", src, dest);
}
// load
void mov(Operand src, Register dest) {
insn(dest.type, "mov", src, dest);
}
// save
void mov(Register src, Operand dest) {
insn(src.type, "mov", src, dest);
} }
// for stack access // for stack access
@ -372,119 +374,75 @@ public class AssemblyFile implements net.loveruby.cflat.sysdep.AssemblyFile {
assemblies.add(new Instruction("mov", typeSuffix(naturalType), src, dest, true)); assemblies.add(new Instruction("mov", typeSuffix(naturalType), src, dest, true));
} }
void mov(Type type, Operand src, Operand dest) { void movsx(Register src, Register dest) {
insn(type, "mov", src, dest); insn("movs", typeSuffix(src.type, dest.type), src, dest);
} }
void movsx(Type t1, Type t2, Operand src, Operand dest) { void movzx(Register src, Register dest) {
insn("movs", typeSuffix(t1, t2), src, dest); insn("movz", typeSuffix(src.type, dest.type), src, dest);
} }
void movsbl(Operand src, Operand dest) { void movzb(Register src, Register dest) {
insn("movs", "bl", src, dest); insn("movz", "b" + typeSuffix(dest.type), src, dest);
} }
void movswl(Operand src, Operand dest) { void lea(Operand src, Register dest) {
insn("movs", "wl", src, dest); insn(naturalType, "lea", src, dest);
} }
void movzx(Type t1, Type t2, Operand src, Operand dest) { void neg(Register reg) {
insn("movz", typeSuffix(t1, t2), src, dest); insn(reg.type, "neg", reg);
} }
void movzb(Type t, Operand src, Operand dest) { void add(Operand diff, Register base) {
insn("movz", "b" + typeSuffix(t), src, dest); insn(base.type, "add", diff, base);
} }
void movzbl(Operand src, Operand dest) { void sub(Operand diff, Register base) {
insn("movz", "bl", src, dest); insn(base.type, "sub", diff, base);
}
void movzwl(Operand src, Operand dest) {
insn("movz", "wl", src, dest);
}
void lea(Operand src, Operand dest) {
lea(naturalType, src, dest);
}
void lea(Type type, Operand src, Operand dest) {
insn(type, "lea", src, dest);
}
void neg(Type type, Register reg) {
insn(type, "neg", reg);
}
void inc(Type type, Operand reg) {
insn(type, "inc", reg);
}
void dec(Type type, Operand reg) {
insn(type, "dec", reg);
}
void add(Operand diff, Operand base) {
add(naturalType, diff, base);
}
void add(Type type, Operand diff, Operand base) {
insn(type, "add", diff, base);
}
void sub(Operand diff, Operand base) {
sub(naturalType, diff, base);
}
void sub(Type type, Operand diff, Operand base) {
insn(type, "sub", diff, base);
} }
void imul(Operand m, Register base) { void imul(Operand m, Register base) {
imul(naturalType, m, base); insn(base.type, "imul", m, base);
}
void imul(Type type, Operand m, Register base) {
insn(type, "imul", m, base);
} }
void cltd() { void cltd() {
insn("cltd"); insn("cltd");
} }
void div(Type type, Register base) { void div(Register base) {
insn(type, "div", base); insn(base.type, "div", base);
} }
void idiv(Type type, Register base) { void idiv(Register base) {
insn(type, "idiv", base); insn(base.type, "idiv", base);
} }
void not(Type type, Register reg) { void not(Register reg) {
insn(type, "not", reg); insn(reg.type, "not", reg);
} }
void and(Type type, Operand bits, Register base) { void and(Operand bits, Register base) {
insn(type, "and", bits, base); insn(base.type, "and", bits, base);
} }
void or(Type type, Operand bits, Register base) { void or(Operand bits, Register base) {
insn(type, "or", bits, base); insn(base.type, "or", bits, base);
} }
void xor(Type type, Operand bits, Register base) { void xor(Operand bits, Register base) {
insn(type, "xor", bits, base); insn(base.type, "xor", bits, base);
} }
void sar(Type type, Register bits, Register base) { void sar(Register bits, Register base) {
insn(type, "sar", bits, base); insn(base.type, "sar", bits, base);
} }
void sal(Type type, Register bits, Register base) { void sal(Register bits, Register base) {
insn(type, "sal", bits, base); insn(base.type, "sal", bits, base);
} }
void shr(Type type, Register bits, Register base) { void shr(Register bits, Register base) {
insn(type, "shr", bits, base); insn(base.type, "shr", bits, base);
} }
} }

51
net/loveruby/cflat/sysdep/x86/CodeGenerator.java
View File

@ -727,7 +727,7 @@ public class CodeGenerator
public Void visit(CJump node) { public Void visit(CJump node) {
compile(node.cond()); compile(node.cond());
Type t = node.cond().type(); Type t = node.cond().type();
as.test(t, ax(t), ax(t)); as.test(ax(t), ax(t));
as.jnz(node.thenLabel()); as.jnz(node.thenLabel());
as.jmp(node.elseLabel()); as.jmp(node.elseLabel());
return null; return null;
@ -739,7 +739,7 @@ public class CodeGenerator
Type t = node.cond().type(); Type t = node.cond().type();
for (Case c : node.cases()) { for (Case c : node.cases()) {
as.mov(imm(c.value), cx()); as.mov(imm(c.value), cx());
as.cmp(t, cx(t), ax(t)); as.cmp(cx(t), ax(t));
as.je(c.label); as.je(c.label);
} }
as.jmp(node.defaultLabel()); as.jmp(node.defaultLabel());
@ -783,7 +783,7 @@ public class CodeGenerator
as.virtualPop(cx()); as.virtualPop(cx());
right = cx(node.type()); right = cx(node.type());
} }
compileBinaryOp(node.type(), node.op(), ax(node.type()), right); compileBinaryOp(node.op(), ax(node.type()), right);
return null; return null;
} }
// #@@} // #@@}
@ -806,24 +806,23 @@ public class CodeGenerator
// #@@} // #@@}
// #@@range/compileBinaryOp_begin{ // #@@range/compileBinaryOp_begin{
private void compileBinaryOp(Type t, Op op, private void compileBinaryOp(Op op, Register left, Operand right) {
Register left, Operand right) {
// #@@range/compileBinaryOp_arithops{ // #@@range/compileBinaryOp_arithops{
switch (op) { switch (op) {
case ADD: case ADD:
as.add(t, right, left); as.add(right, left);
break; break;
case SUB: case SUB:
as.sub(t, right, left); as.sub(right, left);
break; break;
// #@@range/compileBinaryOp_begin} // #@@range/compileBinaryOp_begin}
case MUL: case MUL:
as.imul(t, right, left); as.imul(right, left);
break; break;
case S_DIV: case S_DIV:
case S_MOD: case S_MOD:
as.cltd(); as.cltd();
as.idiv(t, cx(t)); as.idiv(cx(left.type));
if (op == Op.S_MOD) { if (op == Op.S_MOD) {
as.mov(dx(), left); as.mov(dx(), left);
} }
@ -831,7 +830,7 @@ public class CodeGenerator
case U_DIV: case U_DIV:
case U_MOD: case U_MOD:
as.mov(imm(0), dx()); as.mov(imm(0), dx());
as.div(t, cx(t)); as.div(cx(left.type));
if (op == Op.U_MOD) { if (op == Op.U_MOD) {
as.mov(dx(), left); as.mov(dx(), left);
} }
@ -839,28 +838,28 @@ public class CodeGenerator
// #@@} // #@@}
// #@@range/compileBinaryOp_bitops{ // #@@range/compileBinaryOp_bitops{
case BIT_AND: case BIT_AND:
as.and(t, right, left); as.and(right, left);
break; break;
case BIT_OR: case BIT_OR:
as.or(t, right, left); as.or(right, left);
break; break;
case BIT_XOR: case BIT_XOR:
as.xor(t, right, left); as.xor(right, left);
break; break;
case BIT_LSHIFT: case BIT_LSHIFT:
as.sal(t, cl(), left); as.sal(cl(), left);
break; break;
case BIT_RSHIFT: case BIT_RSHIFT:
as.shr(t, cl(), left); as.shr(cl(), left);
break; break;
case ARITH_RSHIFT: case ARITH_RSHIFT:
as.sar(t, cl(), left); as.sar(cl(), left);
break; break;
// #@@} // #@@}
// #@@range/compileBinaryOp_cmpops{ // #@@range/compileBinaryOp_cmpops{
default: default:
// Comparison operators // Comparison operators
as.cmp(t, right, ax(t)); as.cmp(right, ax(left.type));
switch (op) { switch (op) {
case EQ: as.sete (al()); break; case EQ: as.sete (al()); break;
case NEQ: as.setne(al()); break; case NEQ: as.setne(al()); break;
@ -875,7 +874,7 @@ public class CodeGenerator
default: default:
throw new Error("unknown binary operator: " + op); throw new Error("unknown binary operator: " + op);
} }
as.movzb(t, al(), ax(t)); as.movzb(al(), left);
} }
// #@@} // #@@}
} }
@ -888,21 +887,21 @@ public class CodeGenerator
compile(node.expr()); compile(node.expr());
switch (node.op()) { switch (node.op()) {
case UMINUS: case UMINUS:
as.neg(src, ax(src)); as.neg(ax(src));
break; break;
case BIT_NOT: case BIT_NOT:
as.not(src, ax(src)); as.not(ax(src));
break; break;
case NOT: case NOT:
as.test(src, ax(src), ax(dest)); as.test(ax(src), ax(src));
as.sete(al()); as.sete(al());
as.movzbl(al(), ax()); as.movzb(al(), ax(dest));
break; break;
case S_CAST: case S_CAST:
as.movsx(src, dest, ax(src), ax(dest)); as.movsx(ax(src), ax(dest));
break; break;
case U_CAST: case U_CAST:
as.movzx(src, dest, ax(src), ax(dest)); as.movzx(ax(src), ax(dest));
break; break;
default: default:
throw new Error("unknown unary operator: " + node.op()); throw new Error("unknown unary operator: " + node.op());
@ -1099,13 +1098,13 @@ public class CodeGenerator
// #@@range/load{ // #@@range/load{
private void load(Type type, MemoryReference mem, Register reg) { private void load(Type type, MemoryReference mem, Register reg) {
as.mov(type, mem, reg.forType(type)); as.mov(mem, reg.forType(type));
} }
// #@@} // #@@}
// #@@range/save{ // #@@range/save{
private void save(Type type, Register reg, MemoryReference mem) { private void save(Type type, Register reg, MemoryReference mem) {
as.mov(type, reg.forType(type), mem); as.mov(reg.forType(type), mem);
} }
// #@@} // #@@}
} }