diff --git a/ChangeLog b/ChangeLog index 4e32c5b..63f1ce7 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,14 @@ +Wed May 27 01:59:03 2009 Minero Aoki + + * net/loveruby/cflat/sysdep/x86/AssemblyFile.java: remove unused + methods. + + * net/loveruby/cflat/sysdep/x86/AssemblyFile.java: reduce Type + argument. + + * net/loveruby/cflat/sysdep/x86/CodeGenerator.java: follow + changes. + Tue May 26 16:52:18 2009 Minero Aoki * net/loveruby/cflat/asm/NamedSymbol.java (dump): dump name as diff --git a/net/loveruby/cflat/sysdep/x86/AssemblyFile.java b/net/loveruby/cflat/sysdep/x86/AssemblyFile.java index 3f6d50a..b663518 100644 --- a/net/loveruby/cflat/sysdep/x86/AssemblyFile.java +++ b/net/loveruby/cflat/sysdep/x86/AssemblyFile.java @@ -277,10 +277,6 @@ public class AssemblyFile implements net.loveruby.cflat.sysdep.AssemblyFile { insn("jmp", new DirectMemoryReference(label.symbol())); } - void jz(Label label) { - insn("jz", new DirectMemoryReference(label.symbol())); - } - void jnz(Label label) { insn("jnz", new DirectMemoryReference(label.symbol())); } @@ -289,12 +285,8 @@ public class AssemblyFile implements net.loveruby.cflat.sysdep.AssemblyFile { insn("je", new DirectMemoryReference(label.symbol())); } - void jne(Label label) { - insn("jne", new DirectMemoryReference(label.symbol())); - } - - void cmp(Type t, Operand a, Register b) { - insn(t, "cmp", a, b); + void cmp(Operand a, Register b) { + insn(b.type, "cmp", a, b); } void sete(Register reg) { @@ -337,8 +329,8 @@ public class AssemblyFile implements net.loveruby.cflat.sysdep.AssemblyFile { insn("setle", reg); } - void test(Type type, Register a, Register b) { - insn(type, "test", a, b); + void test(Register a, Register b) { + insn(b.type, "test", a, b); } void push(Register reg) { @@ -363,8 +355,18 @@ public class AssemblyFile implements net.loveruby.cflat.sysdep.AssemblyFile { insn("ret"); } - void mov(Operand src, Operand dest) { - mov(naturalType, src, dest); + void mov(Register src, Register dest) { + insn(naturalType, "mov", src, dest); + } + + // load + void mov(Operand src, Register dest) { + insn(dest.type, "mov", src, dest); + } + + // save + void mov(Register src, Operand dest) { + insn(src.type, "mov", src, dest); } // for stack access @@ -372,119 +374,75 @@ public class AssemblyFile implements net.loveruby.cflat.sysdep.AssemblyFile { assemblies.add(new Instruction("mov", typeSuffix(naturalType), src, dest, true)); } - void mov(Type type, Operand src, Operand dest) { - insn(type, "mov", src, dest); + void movsx(Register src, Register dest) { + insn("movs", typeSuffix(src.type, dest.type), src, dest); } - void movsx(Type t1, Type t2, Operand src, Operand dest) { - insn("movs", typeSuffix(t1, t2), src, dest); + void movzx(Register src, Register dest) { + insn("movz", typeSuffix(src.type, dest.type), src, dest); } - void movsbl(Operand src, Operand dest) { - insn("movs", "bl", src, dest); + void movzb(Register src, Register dest) { + insn("movz", "b" + typeSuffix(dest.type), src, dest); } - void movswl(Operand src, Operand dest) { - insn("movs", "wl", src, dest); + void lea(Operand src, Register dest) { + insn(naturalType, "lea", src, dest); } - void movzx(Type t1, Type t2, Operand src, Operand dest) { - insn("movz", typeSuffix(t1, t2), src, dest); + void neg(Register reg) { + insn(reg.type, "neg", reg); } - void movzb(Type t, Operand src, Operand dest) { - insn("movz", "b" + typeSuffix(t), src, dest); + void add(Operand diff, Register base) { + insn(base.type, "add", diff, base); } - void movzbl(Operand src, Operand dest) { - insn("movz", "bl", src, dest); - } - - void movzwl(Operand src, Operand dest) { - insn("movz", "wl", src, dest); - } - - void lea(Operand src, Operand dest) { - lea(naturalType, src, dest); - } - - void lea(Type type, Operand src, Operand dest) { - insn(type, "lea", src, dest); - } - - void neg(Type type, Register reg) { - insn(type, "neg", reg); - } - - void inc(Type type, Operand reg) { - insn(type, "inc", reg); - } - - void dec(Type type, Operand reg) { - insn(type, "dec", reg); - } - - void add(Operand diff, Operand base) { - add(naturalType, diff, base); - } - - void add(Type type, Operand diff, Operand base) { - insn(type, "add", diff, base); - } - - void sub(Operand diff, Operand base) { - sub(naturalType, diff, base); - } - - void sub(Type type, Operand diff, Operand base) { - insn(type, "sub", diff, base); + void sub(Operand diff, Register base) { + insn(base.type, "sub", diff, base); } void imul(Operand m, Register base) { - imul(naturalType, m, base); - } - - void imul(Type type, Operand m, Register base) { - insn(type, "imul", m, base); + insn(base.type, "imul", m, base); } void cltd() { insn("cltd"); } - void div(Type type, Register base) { - insn(type, "div", base); + void div(Register base) { + insn(base.type, "div", base); } - void idiv(Type type, Register base) { - insn(type, "idiv", base); + void idiv(Register base) { + insn(base.type, "idiv", base); } - void not(Type type, Register reg) { - insn(type, "not", reg); + void not(Register reg) { + insn(reg.type, "not", reg); } - void and(Type type, Operand bits, Register base) { - insn(type, "and", bits, base); + void and(Operand bits, Register base) { + insn(base.type, "and", bits, base); } - void or(Type type, Operand bits, Register base) { - insn(type, "or", bits, base); + void or(Operand bits, Register base) { + insn(base.type, "or", bits, base); } - void xor(Type type, Operand bits, Register base) { - insn(type, "xor", bits, base); + void xor(Operand bits, Register base) { + insn(base.type, "xor", bits, base); } - void sar(Type type, Register bits, Register base) { - insn(type, "sar", bits, base); + void sar(Register bits, Register base) { + insn(base.type, "sar", bits, base); } - void sal(Type type, Register bits, Register base) { - insn(type, "sal", bits, base); + void sal(Register bits, Register base) { + insn(base.type, "sal", bits, base); } - void shr(Type type, Register bits, Register base) { - insn(type, "shr", bits, base); + void shr(Register bits, Register base) { + insn(base.type, "shr", bits, base); } } diff --git a/net/loveruby/cflat/sysdep/x86/CodeGenerator.java b/net/loveruby/cflat/sysdep/x86/CodeGenerator.java index 9ad32df..36c7d5d 100644 --- a/net/loveruby/cflat/sysdep/x86/CodeGenerator.java +++ b/net/loveruby/cflat/sysdep/x86/CodeGenerator.java @@ -727,7 +727,7 @@ public class CodeGenerator public Void visit(CJump node) { compile(node.cond()); Type t = node.cond().type(); - as.test(t, ax(t), ax(t)); + as.test(ax(t), ax(t)); as.jnz(node.thenLabel()); as.jmp(node.elseLabel()); return null; @@ -739,7 +739,7 @@ public class CodeGenerator Type t = node.cond().type(); for (Case c : node.cases()) { as.mov(imm(c.value), cx()); - as.cmp(t, cx(t), ax(t)); + as.cmp(cx(t), ax(t)); as.je(c.label); } as.jmp(node.defaultLabel()); @@ -783,7 +783,7 @@ public class CodeGenerator as.virtualPop(cx()); right = cx(node.type()); } - compileBinaryOp(node.type(), node.op(), ax(node.type()), right); + compileBinaryOp(node.op(), ax(node.type()), right); return null; } // #@@} @@ -806,24 +806,23 @@ public class CodeGenerator // #@@} // #@@range/compileBinaryOp_begin{ - private void compileBinaryOp(Type t, Op op, - Register left, Operand right) { + private void compileBinaryOp(Op op, Register left, Operand right) { // #@@range/compileBinaryOp_arithops{ switch (op) { case ADD: - as.add(t, right, left); + as.add(right, left); break; case SUB: - as.sub(t, right, left); + as.sub(right, left); break; // #@@range/compileBinaryOp_begin} case MUL: - as.imul(t, right, left); + as.imul(right, left); break; case S_DIV: case S_MOD: as.cltd(); - as.idiv(t, cx(t)); + as.idiv(cx(left.type)); if (op == Op.S_MOD) { as.mov(dx(), left); } @@ -831,7 +830,7 @@ public class CodeGenerator case U_DIV: case U_MOD: as.mov(imm(0), dx()); - as.div(t, cx(t)); + as.div(cx(left.type)); if (op == Op.U_MOD) { as.mov(dx(), left); } @@ -839,28 +838,28 @@ public class CodeGenerator // #@@} // #@@range/compileBinaryOp_bitops{ case BIT_AND: - as.and(t, right, left); + as.and(right, left); break; case BIT_OR: - as.or(t, right, left); + as.or(right, left); break; case BIT_XOR: - as.xor(t, right, left); + as.xor(right, left); break; case BIT_LSHIFT: - as.sal(t, cl(), left); + as.sal(cl(), left); break; case BIT_RSHIFT: - as.shr(t, cl(), left); + as.shr(cl(), left); break; case ARITH_RSHIFT: - as.sar(t, cl(), left); + as.sar(cl(), left); break; // #@@} // #@@range/compileBinaryOp_cmpops{ default: // Comparison operators - as.cmp(t, right, ax(t)); + as.cmp(right, ax(left.type)); switch (op) { case EQ: as.sete (al()); break; case NEQ: as.setne(al()); break; @@ -875,7 +874,7 @@ public class CodeGenerator default: throw new Error("unknown binary operator: " + op); } - as.movzb(t, al(), ax(t)); + as.movzb(al(), left); } // #@@} } @@ -888,21 +887,21 @@ public class CodeGenerator compile(node.expr()); switch (node.op()) { case UMINUS: - as.neg(src, ax(src)); + as.neg(ax(src)); break; case BIT_NOT: - as.not(src, ax(src)); + as.not(ax(src)); break; case NOT: - as.test(src, ax(src), ax(dest)); + as.test(ax(src), ax(src)); as.sete(al()); - as.movzbl(al(), ax()); + as.movzb(al(), ax(dest)); break; case S_CAST: - as.movsx(src, dest, ax(src), ax(dest)); + as.movsx(ax(src), ax(dest)); break; case U_CAST: - as.movzx(src, dest, ax(src), ax(dest)); + as.movzx(ax(src), ax(dest)); break; default: throw new Error("unknown unary operator: " + node.op()); @@ -1099,13 +1098,13 @@ public class CodeGenerator // #@@range/load{ private void load(Type type, MemoryReference mem, Register reg) { - as.mov(type, mem, reg.forType(type)); + as.mov(mem, reg.forType(type)); } // #@@} // #@@range/save{ private void save(Type type, Register reg, MemoryReference mem) { - as.mov(type, reg.forType(type), mem); + as.mov(reg.forType(type), mem); } // #@@} }