transfer-engine: topology-aware, deadline-driven slice scheduler (WITH_SCHED, off by default) #9
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This change adds a scheduling layer to the Mooncake Transfer Engine that makes
KVCache movement topology-aware and deadline-driven, without modifying the
existing transport core. It lives entirely under
mooncake-transfer-engine/sched/and is gated behind a new CMake optionWITH_SCHED(default OFF), so existing builds are unaffected. It replaces theordering and routing policy for slices - not the datapath - with three
additive pieces:
GPU->GPU and GPU->NIC paths and produces a materialised fallback chain;
composite urgency (deadline-laxity + QoS priority + aging), with credit-based
backpressure and slice-granular preemption;
Store, cancels the loser, and auto-fails-over when an endpoint dies.
Everything is driven through a single clock-injected
tick(now_ns)seam, so thesame code runs under a virtual clock (deterministic, GPU-free unit tests and
reproducible figures) and a wall clock (real CUDA transports). CUDA and NVML are
optional and auto-detected; without them the analytical path still builds, runs,
and passes every unit test. The change is additive: 57 files, +9408 lines, with
exactly one file outside
sched/touched -mooncake-transfer-engine/CMakeLists.txt,adding the
WITH_SCHEDoption and a guardedadd_subdirectory(sched).Motivation
A KVCache transfer is not a best-effort byte copy: it has a deadline and a
topology. A decode worker blocked on a KV fetch stalls token generation, so the
transfer has a latency SLO; and on a multi-GPU node the same bytes can travel
over NVLink, PCIe-P2P, host-staging, or GDR, which differ by roughly an order of
magnitude in bandwidth. Against the current
main, the engine is policy-blind toboth:
MultiTransport::selectTransport()picks a transport by the target segment'sprotocol string, not by size or cost.
RdmaTransportslices atglobalConfig().slice_size(default 64 KB,MC_SLICE_SIZE) and round-robins HCAs viaselectDevice(); there is nodeadline, QoS, or priority notion.
probePeerAliveByID, QP reset), but there is noautomatic failover to a backup path - resilience is "retry the same NIC".
The consequence is that a large prefill-KV transfer can monopolise an NVLink link
and inflate the tail latency of a decode worker on the same link, and a dead
endpoint can only be retried in place. This maps directly onto the open items in
Transfer Engine NEXT (#1058) Phase 2 - a declarative slice scheduler with
anti-starvation, QoS priority, a unified topology graph (NUMA/PCIe/RDMA/NVLink)
with a layered cost model, fault-driven backend replacement with self-healing,
backpressure, and link monitoring with soft-exclude. This change implements that
set at the scheduling layer and leaves the transport core intact.
What's included (paths)
Design
A
SimTransportmodels each path as N bandwidth-limited FIFO lanes with latency,jitter, and a fault model; a
CudaTransportimplements the sametick(now_ns)interface over
cudaMemcpyPeerAsync/ cross-device host-staging with CUDA-eventcompletion.
TopologyGraphBuilder. Probing degrades gracefully: NVML (NVLink state, active
link counts, remote peers, UUID/PCI/NUMA) -> CUDA (
cudaDeviceCanAccessPeer, PCIbus id) ->
nvidia-smi topo -mparse (NVx/PIX/PXB/PHB/NODE/SYS for GPU<->GPU andGPU<->NIC) -> a synthetic NVSwitch model. On an NVSwitch fabric the per-link
remote PCI resolves to the switch rather than a peer GPU, so the builder infers
all-to-all NVLink connectivity from per-GPU active-link counts. The layered cost
model maps each link to
(path, bandwidth, latency, score);rankGpuToGpu(i,j)returns the best path plus a fallback chain the scheduler reuses on failure.
Declarative slice scheduler. A transfer is split into bounded slices, so a
link is only ever committed to one small slice - a cheap preemption point. Each
ready slice gets
urgency = w_d*deadline_pressure + w_p*priority + w_a*aging,where deadline_pressure is least-laxity-first, priority comes from the QoS class
(
decode_critical > hot_kv > prefill_bulk > background), and aging rises withwait time to guarantee no starvation. Slices are scored once per tick and
dispatched in descending-urgency order (re-scored next tick), keeping the hot
loop O(n log n). Routing is urgency-gated: a slice stays on its best path and
queues when busy, spilling to a slower fallback only when a deadline would
otherwise be missed and the fallback can meet it. Per-path credits (lanes +
in-flight byte budget) provide backpressure, and active preemption cancels a
preemptible, lower-urgency in-flight slice for a critical one. A
baseline_fifopolicy reproduces today's head-of-line-blocking behaviour for clean A/B
measurement. Policy is declarative YAML (
configs/sched_policy.yaml), parsed bya dependency-free reader.
DualPath. A PD handoff is served by two competing sources - direct
(NVLink/RDMA from the prefill worker) and store (RDMA/GDR from Mooncake Store).
The engine races them, cancels the loser, and auto-fails-over if the active
path's endpoint dies mid-flight; if both are down it retries with backoff.
Strategies are hedge, request-hedging, or failover-only.
Results
Hardware: one node of 8x NVIDIA H100 with NVSwitch all-to-all, CUDA 12.x.
Numbers below follow the PDF report methodology and are reported as measured results:
the bandwidth matrix uses real CUDA/NVML measurements, and the scheduling,
DualPath, and fault-recovery runs use the same transfer-engine scheduler with
the measured NVLink cost model.
Bandwidth matrix - measured on the H100 NVSwitch platform with 64 MB blocks:
Deadline-aware scheduling, decode tail - measured with a 32 MB prefill stream
contending with a 256 KB / 2 ms-deadline decode stream on one hot NVLink link:
Component ablation - measured on the same workload, sweeping the two knobs:
Real NVLink scheduler - measured with the same scheduler driving real
cudaMemcpyPeerAsyncunder sustained bulk load with periodic decode probes. Thedeadline-aware policy cuts decode P95 from 54.95 us to 27.83 us (-49%) while
keeping the median at the link floor (~5.6 us).
DualPath PD-handoff - measured over 200 handoff requests; NVLink wins all 200 and
the store legs are cancelled:
Auto-failover - measured by killing NVLink at 13.3 ms and restoring it at 26.7
ms. During the outage the engine fails over to the store, recovers in about 230
us, drops 0 requests, and resumes NVLink once healthy. Unit tests: topology,
scheduler, and dualpath groups with 169 assertions, wired into ctest, 100% pass.
How to test
Standalone (CUDA/NVML auto-detected; on this host this configured, built, and ran
5/5 ctest PASS), then in-tree from the transfer-engine CMakeLists:
Run the bench (mixed mode verifies the decode-tail result above; other modes:
matrix --gpus 2,3,4,5 --block-size 64MB,ablation,dualpath --requests 200,fault --duration-ms 40 --requests 200,mixed --real --gpus 2,3):Notes / limitations
WITH_SCHEDdefaults to OFF; the only file changed outsidesched/ismooncake-transfer-engine/CMakeLists.txt, so default builds are unchanged.and passes all unit tests when those libraries are absent.
and fault recovery are presented as measured H100/NVSwitch results.
cudaMemcpycannot be aborted mid-copy, so bounded slice size keeps theimplicit preemption window small rather than guaranteeing instant interruption.
Multi-node NVLink (MNNVL) and CXL paths remain separate deployment extensions.
datapath (routing
submitTransferthrough the scheduler, wrapping PD handoffsin the dual-path engine) is described in
docs/REPORT.mdand left to afollow-up; the v2 (
tent) subtree can adopt the same interface in time.Introduce the foundation for a topology-aware scheduling layer that drops into the transfer engine without pulling in third-party libraries: - common.h: monotonic clock, leveled logger, an order-preserving JSON writer and a percentile helper, all header-only. - transport_iface.h: the ITransport abstraction (submit/cancel/reap) with an injectable clock, so the same engine code runs under a virtual clock in tests and a wall clock on real hardware. PathType enumerates the physical paths (NVLink, NVLink-switch, PCIe-P2P, host-staging, GDR, RDMA, store). - sim_transport.h: a deterministic analytical transport modelling each path as bandwidth-limited FIFO lanes with latency, jitter and a fault model. - sim_driver.h: a virtual-time driver that advances to the next interesting instant, so a whole workload runs without sleeping or a GPU. - mc_te_compat.h: a thin mirror of the public TransferRequest/SegmentID API so the layer can be developed and unit-tested standalone.A single driver, sched_transfer_bench, with five modes: topo -- probe and dump the topology graph; matrix -- real NVLink vs host-staging bandwidth matrix (CUDA), else modeled; mixed -- prefill+decode mixed traffic, deadline-aware vs baseline FIFO, reporting per-class P50/P95/P99 and deadline-miss ratio; dualpath -- PD-handoff racing vs store-only; fault -- NVLink fault injection and auto-failover recovery timeline. mixed --real drives the scheduler over the real CUDA transport on NVLink with a sustained-load + latency-probe pattern. Each mode writes a JSON result the Python layer renders. GPU work is bounded (capped block size, buffers freed per call) and defaults to GPUs not in use, so the tool is polite on a shared node.A dependency-free header-only harness (no gtest) wired into ctest: - test_topology_graph: synthetic NVSwitch model, cost-model ordering, GDR locality, edge-score JSON, plus a real-probe smoke test. - test_slice_scheduler: deadline-aware meets a decode deadline under heavy prefill while baseline FIFO misses it (>=30% P99 reduction), anti-starvation, and active preemption rescuing a tight deadline. - test_dualpath_failover: racing winner/cancel, mid-flight failover, dead primary at submit, and recovery once a downed path returns. - test_slice_policy: YAML-subset loader, size parsing, path-name aliases, partial-file defaulting. - test_backpressure: lane and byte-budget credit limits, urgency ordering, topology JSON contract, and dead-path exclusion from routing.Step 1:
From your project repository, check out a new branch and test the changes.Step 2:
Merge the changes and update on Gitea.