Commit Graph

29 Commits

Author SHA1 Message Date
Liu Hua 6d0d1ff068 sched: /proc/cpuinfo in docker base on cpu quota
Signed-off-by: Liu Hua <shookliu@tencent.com>
2020-07-16 14:59:05 +08:00
Liu Hua 1fe0578c20 cgroup: add switch for subsystem stats isolated
Statictics of memcg, cpuset, cpuacct and blkio export by /proc/
 when switch enabled.

Signed-off-by: Liu Hua <shookliu@tencent.com>
2020-07-16 14:52:41 +08:00
chen xiaoguang e59390ab76 Revert "sched/BT: add RDT support for BT scheduler class"
This reverts commit a2119393bd.

Signed-off-by: Xiaoguang Chen <xiaoggchen@tencent.com>
2020-07-16 12:41:34 +08:00
David Lin 01bad2abca
Fixed typo in thread_info.h (#16)
* Fixed typo in thread_info.h

user-thead -> user-thread
2020-07-02 14:46:02 +08:00
Xiaoming Gao 6e466f2dca build: fix series of warnings
Signed-off-by: Xiaoming Gao <newtongao@tencent.com>
2020-06-04 18:43:47 +08:00
He Chen a2119393bd sched/BT: add RDT support for BT scheduler class
Offline tasks (BT tasks) may have some performance impact to online
tasks.
In this commit, we introduce Intel RDT features to limit offline tasks
L3 cache usage to avoid the influence caused by offline tasks.

Signed-off-by: Xiaoguang Chen <xiaoggchen@tencent.com>
Signed-off-by: He Chen <heddchen@tencent.com>
2020-05-29 10:40:58 +08:00
hygonsoc bfb0e753b7 x86/cpu: Fix Hygon Family 18h socket ID calculate issue
In patch 660998b7a9, merged codes in
function amd_get_topology() not works for Hygon Family 18h.

Move Hygon CPU socket ID calculation codes to cacheinfo_amd_init_llc_id()
function,to make Socket ID calculate codes works for Hygon Family 18h CPU.
2020-03-20 11:29:26 +08:00
Samuel Liao 660998b7a9 x86: add hygon family 18h 2020-03-13 19:37:23 +08:00
Chen Lei 90cd3dbc49
Merge pull request #8 from DavidLin1577/patch-2
Fixed macro spelling mistake in vfpmodule.c
2020-03-11 16:01:30 +08:00
Chen Lei 07104ee1dc
another typo 2020-03-11 16:00:16 +08:00
David Lin 3d33096d1b
Fixed macro spelling mistake in vfpmodule.c
Fixed macro  spelling error: THREAD_NOFTIFY_SWTICH -> THREAD_NOFTIFY_SWITCH
2020-02-16 22:02:03 +08:00
David Lin cee2e8c3db
Fixed typo: 'swtich' in irq.c
Note that the word 'swtich' is wrong,
so that 'swtich' should been replaced with 'switch'.
2020-02-16 21:52:07 +08:00
Xiaoming Gao 8c11e62b2e arm64/init: Fix crashkernel parse build error
Signed-off-by: Xiaoming Gao <newtongao@tencent.com>
2020-01-02 12:24:04 +08:00
Xiaoming Gao 32b932205d kvm: add kvm_no_pv_ipi kernel parameter
add kvm_no_pv_ipi, default is false.

Signed-off-by: Xiaoming Gao <newtongao@tencent.com>
2020-01-02 12:22:04 +08:00
loobinliu 22bbd5bd41 KVM: X86: Implement PV IPIs in linux guest
Based on upstream commit:
d63bae0 KVM: X86: Add kvm hypervisor init time platform setup callback
aaffcfd KVM: X86: Implement PV IPIs in linux guest

Implement paravirtual apic hooks to enable PV IPIs for KVM if the "send IPI"
hypercall is available.  The hypercall lets a guest send IPIs, with
at most 128 destinations per hypercall in 64-bit mode and 64 vCPUs per
hypercall in 32-bit mode.

Signed-off-by: loobinliu <loobinliu@tencent.com>
2020-01-02 12:21:01 +08:00
Xiaoming Gao 3610625cdd perf/amd: Fixed ROME Perf BUG
Signed-off-by: Xiaoming Gao <newtongao@tencent.com>
2020-01-02 12:19:21 +08:00
Xiaoming Gao 2423530faa x86/mce: Handle varying MCA bank counts
merge from AMD

Signed-off-by: Xiaoming Gao <newtongao@tencent.com>
2020-01-02 12:19:15 +08:00
Xiaoming Gao 3893c04cf1 x86/irq: remapping Move irq remapping mode enum
merge from AMD

Signed-off-by: Xiaoming Gao <newtongao@tencent.com>
2020-01-02 12:19:01 +08:00
Xiaoming Gao fd8d092e2e Revert "iommu/amd: Support AMD platform with more than 255 CPU"
This reverts commit 7d65c03648b08c4a48fe8ce22fc1aadddcdf8f6f.
2020-01-02 12:18:52 +08:00
Jan Kiszka 7c81036381 x86/apic: Install an empty physflat_init_apic_ldr
As the comment already stated, there is no need for setting up LDR (and
DFR) in physflat mode as it remains unused (see SDM, 10.6.2.1).
flat_init_apic_ldr only served as a placeholder for a nop operation so
far, causing no harm.

That will change when running over the Jailhouse hypervisor. Here we
must not touch LDR in a way that destroys the mapping originally set up
by the Linux root cell. Jailhouse enforces this setting in order to
efficiently validate any IPI requests sent by a cell.

Avoid a needless clash caused by flat_init_apic_ldr by installing a true
nop handler.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: jailhouse-dev@googlegroups.com
Link: https://lkml.kernel.org/r/f9867d294cdae4d45ed89d3a2e6adb524f4f6794.1511770314.git.jan.kiszka@siemens.com
2020-01-02 12:16:06 +08:00
Kaixu Xia d2290bb348 tkernel: add the kpatch kmod support
Add the kpatch and write relocations support.

Signed-off-by: Kaixu Xia <kaixuxia@tencent.com>
2020-01-02 12:15:37 +08:00
Kaixu Xia de046697ad arm64: implement ftrace with regs by using patchable-function-entry
Signed-off-by: Kaixu Xia <kaixuxia@tencent.com>
2020-01-02 12:14:57 +08:00
Shengmiao Liao 74913e31a6 iommu/amd: Support AMD platform with more than 255 CPU
x86: irq_remapping: Move irq remapping mode enum
iommu/amd: Add support for higher 64-bit IOMMU Control Register
iommu/amd: Add support for IOMMU XT mode

Signed-off-by: Shengmiao Liao <samuelliao@tencent.com>
2020-01-02 12:12:33 +08:00
Chandu-babu Namburu 9ebff5b8c5 Add AMD Rome RAS feature support
Backported from linux-tip ras/core

x86/MCE/AMD, EDAC/mce_amd: Add new MP5, NBIO, and PCIE SMCA bank types
x86/MCE/AMD, EDAC/mce_amd: Add new McaTypes for CS, PSP, and SMU units
x86/MCE/AMD, EDAC/mce_amd: Add new error descriptions for some SMCA bank types

Signed-off-by: Xiaoming Gao <newtongao@tencent.com>
2020-01-02 12:07:19 +08:00
Chandu Babu N 675a474ab9 Add AMD Rome CPU/Cache Topology support
Patches backported from linux-stable branch

perf/events/amd/uncore: Fix amd_uncore_llc ID to use pre-defined cpu_llc_id
x86/CPU: Rename intel_cacheinfo.c to cacheinfo.c
x86/CPU/AMD: Calculate last level cache ID from number of sharing threads
x86/CPU: Modify detect_extended_topology() to return result
x86/CPU/AMD: Derive CPU topology from CPUID function 0xB when available
x86/CPU/AMD: Fix LLC ID bit-shift calculation

Signed-off-by: Xiaoming Gao <newtongao@tencent.com>
2020-01-02 12:07:12 +08:00
Kaixu Xia 88513dc458 xfs: add kmem_alloc_by_vmalloc and kmem_alloc_large_dump_stack sysctl
Add dump stack logic when kmem_alloc failed.

kmem_alloc_by_vmalloc: when kmem_alloc size larger than PAGE_SIZE*kmem_alloc_by_vmalloc,
use vmalloc instead kmalloc.
kmem_alloc_large_dump_stack: dump info and stack when kmem_alloc size
larger than PAGE_SIZE*kmem_alloc_by_vmalloc.

Signed-off-by: Xiaoming Gao <newtongao@tencent.com>
Signed-off-by: Kaixu Xia <kaixuxia@tencent.com>
2020-01-02 11:54:24 +08:00
Liu Hua 6591a576a9 ioapic: add pr_info in __assign_irq_vector when vector not assigned
if vector not assigned in vector_irq, do_IRQ will fail and print
warning like "No irq handler for vector (irq -1)"

Signed-off-by: Xiaoming Gao <newtongao@tencent.com>
Signed-off-by: Liu Hua <shookliu@tencent.com>
2020-01-02 11:49:40 +08:00
Liu Hua 36318843d4 irq: add more info when interrupt cannot find handler
Signed-off-by: Xiaoming Gao <newtongao@tencent.com>
Signed-off-by: Liu Hua <shookliu@tencent.com>
2020-01-02 11:48:43 +08:00
Xiaoming Gao 78a8c3c2c2 Init Repo base on 4.14.105 long term, and add base tlinux kernel interfaces
Signed-off-by: Xiaoming Gao <newtongao@tencent.com>
2020-01-02 10:51:04 +08:00