forked from TencentOS/TencentOS-kernel
Merge pull request #235 from peaceforeverCN/master
kernel: config pci reset quirk by cmdline
This commit is contained in:
frankjpliu
GitHub
commit
6bd26b3101
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@ -3817,6 +3817,150 @@ static int reset_chelsio_generic_dev(struct pci_dev *dev, int probe)
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return 0;
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}
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#define DEFAULT_PCI_RESET_WAIT_TIMEOUT 0
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#define MIN_PCI_RESET_WAIT_TIMEOUT DEFAULT_PCI_RESET_WAIT_TIMEOUT
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#define MAX_PCI_RESET_WAIT_TIMEOUT 4
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struct pci_reset_quirk_config {
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unsigned short vendor;
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unsigned short device;
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union { /* 4 bytes in size. */
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unsigned int timeout;
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unsigned int reserve;
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};
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int (*reset)(struct pci_dev *dev, struct pci_reset_quirk_config *cfg, int probe);
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};
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#define MAX_PCI_RESET_CONFIG_NUM 20
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static int pci_reset_quirk_config_num = 0;
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static struct pci_reset_quirk_config pci_reset_quirk_config[MAX_PCI_RESET_CONFIG_NUM] = {
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{ 0 }
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};
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static int pci_reset_quirk_no_reset(struct pci_dev *dev,
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struct pci_reset_quirk_config *cfg, int probe)
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{
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pci_info(dev, "do no reset the device\n");
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return 0;
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}
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static void pci_no_reset_quirk_get_opt(char *str)
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{
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unsigned short vid, did;
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struct pci_reset_quirk_config *cfg;
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while (str) {
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char *k = strchr(str, ',');
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if (k)
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*k++ = 0;
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if (str) {
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vid = (unsigned short)simple_strtoul(str, &str, 16);
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did = (unsigned short)simple_strtoul(str + 1, &str, 16);
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cfg = &pci_reset_quirk_config[pci_reset_quirk_config_num++ % MAX_PCI_RESET_CONFIG_NUM];
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cfg->vendor = vid;
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cfg->device = did;
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cfg->reserve = 0;
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cfg->reset = pci_reset_quirk_no_reset;
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pr_info("add no reset quirk success: %x:%x\n", vid, did);
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}
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str = k;
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}
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}
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static int pci_reset_quirk_ssleep_after_sbr(struct pci_dev *dev,
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struct pci_reset_quirk_config *cfg, int probe)
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{
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struct pci_dev *slot = dev->bus->self;
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u16 reg, timeout = cfg->timeout;
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if (probe)
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return -ENOTTY;
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if (!timeout)
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return -ENOTTY;
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pcie_capability_read_word(slot, PCI_EXP_SLTCTL, ®);
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reg &= (~PCI_EXP_SLTCTL_DLLSCE);
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pcie_capability_write_word(slot, PCI_EXP_SLTCTL, reg);
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pci_reset_secondary_bus(slot);
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ssleep(timeout);
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pcie_capability_write_word(slot, PCI_EXP_SLTSTA, PCI_EXP_SLTSTA_DLLSC);
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pcie_capability_read_word(slot, PCI_EXP_SLTCTL, ®);
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reg |= PCI_EXP_SLTCTL_DLLSCE;
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pcie_capability_write_word(slot, PCI_EXP_SLTCTL, reg);
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pci_info(dev, "do sleep %ds after device reset\n", timeout);
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return 0;
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}
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static void pci_reset_timeout_quirk_get_opt(char *str)
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{
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unsigned short vid, did;
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unsigned int t;
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struct pci_reset_quirk_config *cfg;
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while (str) {
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char *k = strchr(str, ',');
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if (k)
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*k++ = 0;
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if (str) {
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vid = (unsigned short)simple_strtoul(str, &str, 16);
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did = (unsigned short)simple_strtoul(str + 1, &str, 16);
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t = (unsigned int)simple_strtoul(str + 1, &str, 10);
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if (t > MAX_PCI_RESET_WAIT_TIMEOUT
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|| t < MIN_PCI_RESET_WAIT_TIMEOUT)
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t = MIN_PCI_RESET_WAIT_TIMEOUT;
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cfg = &pci_reset_quirk_config[pci_reset_quirk_config_num++ % MAX_PCI_RESET_CONFIG_NUM];
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cfg->vendor = vid;
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cfg->device = did;
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cfg->timeout = t;
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cfg->reset = pci_reset_quirk_ssleep_after_sbr;
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pr_info("add reset timeout quirk success: %x:%x timeout:%x\n", vid, did, t);
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}
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str = k;
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}
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}
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/*
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* cmdline e.g.: pcireset_quirk=timeout,1ea0:2a16=4,1ea0:2a17=3 pcireset_quirk=noreset,1ea0:2a16,1ea0:2a17
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*/
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static int __init pci_reset_quirk_setup(char *str)
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{
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if (!strncmp(str, "timeout,", 8)) {
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pci_reset_timeout_quirk_get_opt(str + 8);
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} else if (!strncmp(str, "noreset,", 8)) {
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pci_no_reset_quirk_get_opt(str + 8);
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} else {
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pr_err("PCI: Unknown option in pcireset_quirk. '%s'\n", str);
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}
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return 0;
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}
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__setup("pcireset_quirk=", pci_reset_quirk_setup);
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static int pci_reset_quirk_cmdline(struct pci_dev *dev, int probe)
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{
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int i;
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struct pci_reset_quirk_config *cfg;
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for (i = 0; i < pci_reset_quirk_config_num && i < MAX_PCI_RESET_CONFIG_NUM; i++){
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cfg = &pci_reset_quirk_config[i];
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if (cfg->vendor == dev->vendor &&
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cfg->device == dev->device &&
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cfg->reset)
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return cfg->reset(dev, cfg, probe);
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}
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return -ENOTTY;
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}
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#define PCI_DEVICE_ID_INTEL_82599_SFP_VF 0x10ed
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#define PCI_DEVICE_ID_INTEL_IVB_M_VGA 0x0156
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#define PCI_DEVICE_ID_INTEL_IVB_M2_VGA 0x0166
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@ -3830,6 +3974,7 @@ static const struct pci_dev_reset_methods pci_dev_reset_methods[] = {
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reset_ivb_igd },
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{ PCI_VENDOR_ID_CHELSIO, PCI_ANY_ID,
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reset_chelsio_generic_dev },
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{ PCI_ANY_ID, PCI_ANY_ID, pci_reset_quirk_cmdline },
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{ 0 }
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};
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