agent fixed

ut_frontend/ifu/pred_checker/agent/__init__.py

@@ -1 +1,35 @@
-from .pred_checker_agent import PredCheckerAgent
+from toffee.agent import *
+from ..bundle import PredCheckerBundle
+from ... import PREDICT_WIDTH, RVC_LABEL, RET_LABEL, BRTYPE_LABEL
+
+class PredCheckerAgent(Agent):
+    def __init__(self, bundle: PredCheckerBundle):
+        super().__init__(bundle)
+        self.bundle = bundle
+    
+    @driver_method()
+    async def agent_pred_check(self, ftqValid, ftqOffBits, instrRange, instrValid, jumpOffset, pc, pds, tgt, fire):
+        self.bundle.io._in._ftqOffset._valid.value = ftqValid
+        self.bundle.io._in._ftqOffset._bits.value = ftqOffBits
+        self.bundle.io._in._target.value = tgt
+        self.bundle.io._in._fire_in.value = fire
+        for i in range(PREDICT_WIDTH):
+            getattr(self.bundle.io._in._pc, f'_{i}').value = pc[i]
+            getattr(self.bundle.io._in._instrRange, f'_{i}').value = instrRange[i]
+            getattr(self.bundle.io._in._instrValid, f'_{i}').value = instrValid[i]
+            getattr(self.bundle.io._in._jumpOffset, f'_{i}').value = jumpOffset[i]
+            
+            getattr(self.bundle.io._in._pds, f'_{i}')._isRVC.value = pds[i][RVC_LABEL]
+            getattr(self.bundle.io._in._pds, f'_{i}')._brType.value = pds[i][BRTYPE_LABEL]
+            getattr(self.bundle.io._in._pds, f'_{i}')._isRet.value = pds[i][RET_LABEL]
+
+        await self.bundle.step()
+        stg1_fixedRange = [getattr(self.bundle.io._out._stage1Out._fixedRange, f'_{i}').value for i in range(PREDICT_WIDTH)]
+        stg1_fixedTaken = [getattr(self.bundle.io._out._stage1Out._fixedTaken, f'_{i}').value for i in range(PREDICT_WIDTH)]
+        #yield stg1_fixedRange, stg1_fixedTaken
+        await self.bundle.step()
+        stg2_fixedTarget = [getattr(self.bundle.io._out._stage2Out._fixedTarget, f'_{i}').value for i in range(PREDICT_WIDTH)]
+        stg2_fixedMissPred = [getattr(self.bundle.io._out._stage2Out._fixedMissPred, f'_{i}').value for i in range(PREDICT_WIDTH)]
+        stg2_jalTarget = [getattr(self.bundle.io._out._stage2Out._jalTarget, f'_{i}').value for i in range(PREDICT_WIDTH)]
+        #yield stg2_fixedTarget, stg2_jalTarget, stg2_fixedMissPred
+        return stg1_fixedRange, stg1_fixedTaken, stg2_fixedTarget, stg2_jalTarget, stg2_fixedMissPred

ut_frontend/ifu/pred_checker/bundle/auto_bundle.py

@@ -79,32 +79,10 @@ class _9Bundle(Bundle):
 	_fixedRange = _0Bundle.from_prefix("_fixedRange")
 	_fixedTaken = _0Bundle.from_prefix("_fixedTaken")
 
-class singleFaultTypeBundle(Bundle):
-	_value = Signal()
-
-class faultTypesBundle(Bundle):
-	_12 = singleFaultTypeBundle.from_prefix("_12")
-	_1 = singleFaultTypeBundle.from_prefix("_1")
-	_9 = singleFaultTypeBundle.from_prefix("_9")
-	_15 = singleFaultTypeBundle.from_prefix("_15")
-	_6 = singleFaultTypeBundle.from_prefix("_6")
-	_5 = singleFaultTypeBundle.from_prefix("_5")
-	_7 = singleFaultTypeBundle.from_prefix("_7")
-	_3 = singleFaultTypeBundle.from_prefix("_3")
-	_4 = singleFaultTypeBundle.from_prefix("_4")
-	_2 = singleFaultTypeBundle.from_prefix("_2")
-	_11 = singleFaultTypeBundle.from_prefix("_11")
-	_8 = singleFaultTypeBundle.from_prefix("_8")
-	_14 = singleFaultTypeBundle.from_prefix("_14")
-	_13 = singleFaultTypeBundle.from_prefix("_13")
-	_10 = singleFaultTypeBundle.from_prefix("_10")
-	_0 = singleFaultTypeBundle.from_prefix("_0")
-
 class _10Bundle(Bundle):
 	_fixedTarget = _0Bundle.from_prefix("_fixedTarget")
 	_fixedMissPred = _0Bundle.from_prefix("_fixedMissPred")
 	_jalTarget = _0Bundle.from_prefix("_jalTarget")
-	_faultType = faultTypesBundle.from_prefix("_faultType")
 
 class _11Bundle(Bundle):
 	_stage2Out = _10Bundle.from_prefix("_stage2Out")

ut_frontend/ifu/pred_checker/env/__init__.py

@@ -2,10 +2,14 @@ from toffee import Env
 from ..agent import PredCheckerAgent
 from ..bundle import PredCheckerBundle
 from dut.PredChecker import DUTPredChecker
+from .pred_checker_mdl import *
 
 
 class PredCheckerEnv(Env):
 
     def __init__(self, dut:DUTPredChecker):
         super().__init__()
-        self.predCheckerAgent = PredCheckerAgent(PredCheckerBundle.from_prefix("").bind(dut))
+        self.predCheckerAgent = PredCheckerAgent(PredCheckerBundle.from_prefix("").bind(dut))
+        self.mdl = PredCheckerModel()
+        self.attach(self.mdl)
+        

ut_frontend/ifu/pred_checker/env/pred_checker_mdl.py

@@ -0,0 +1,112 @@
+from ... import PREDICT_WIDTH, RET_LABEL, RVC_LABEL, BRTYPE_LABEL
+from toffee.model import *
+from ..bundle import PredCheckerBundle
+'''PredChecker reference model'''
+
+class PredCheckerModel(Model):
+    def __init__(self):
+        super().__init__()
+        self.fixedRange = [0 for _ in range(PREDICT_WIDTH)]
+        self.fixedTarget = [0 for _ in range(PREDICT_WIDTH)]
+        self.fixedMisspred = [0 for _ in range(PREDICT_WIDTH)]
+        self.fixedTarget = [0 for _ in range(PREDICT_WIDTH)]
+        self.jalTarget = [0 for _ in range(PREDICT_WIDTH)]
+
+    @driver_hook(agent_name="predCheckerAgent", driver_name="agent_pred_check")
+    def ref_pred_check(self, ftqValid, ftqOffbits, instrRange, instrValid, jumpOffset, pc, pds, tgt, fire):
+        # Store input
+        self.ftqValid = ftqValid
+        self.ftqOffbits = ftqOffbits
+        self.instrRange = instrRange
+        self.instrValid = instrValid
+        self.jumpOffset = jumpOffset
+        self.pc = pc
+        self.pds = pds
+        self.tgt = tgt
+        # Clear the previous result if it exists
+        for i in range(PREDICT_WIDTH):
+            if instrRange[i]:
+                self.fixedRange[i] = 1
+            else:
+                self.fixedRange[i] = 0
+        self.fixedTaken = [0 for i in range(PREDICT_WIDTH)]
+        self.fixedMisspred = [0 for i in range(PREDICT_WIDTH)]
+        self.fixedTarget = [0 for i in range(PREDICT_WIDTH)]
+        self.jalTarget = [0 for i in range(PREDICT_WIDTH)]
+        
+        # Generate fixedTarget and jalTarget
+        for idx in range(PREDICT_WIDTH):
+            if pds[idx][RVC_LABEL] or (not instrValid[idx]):
+                self.fixedTarget[idx] = pc[idx]  + 2
+                self.jalTarget[idx] = pc[idx] + jumpOffset[idx]
+            else:
+                self.fixedTarget[idx] = pc[idx] + 4
+                self.jalTarget[idx] = pc[idx] + jumpOffset[idx]
+        # Overflow condition
+        for i in range(PREDICT_WIDTH):
+            if self.jalTarget[i] >= 2**50:
+                self.jalTarget[i] = self.jalTarget[i] - 2**50
+                
+        # Check missPred accroding to pds info
+        cfi_idx = []
+        for idx in range(PREDICT_WIDTH):
+            # First determine whether this instruction is valid
+            if instrValid[idx] and (pds[idx][RET_LABEL] or (pds[idx][BRTYPE_LABEL] > 0)):
+                cfi_idx.extend([idx])
+        
+        # if pds gave a valid instr info
+        if len(cfi_idx) != 0:
+            cfi_idx.sort()
+            self.fixedTaken[cfi_idx[0]] = 1
+            if ftqValid and (cfi_idx[0] != ftqOffbits):
+                self.fixedRange = [0 for _ in range(PREDICT_WIDTH)]
+                if(cfi_idx[0] < ftqOffbits): # Renew range
+                    self.fixedMisspred[cfi_idx[0]] = 1
+                    for i in range(cfi_idx[0] + 1):
+                        self.fixedRange[i] = 1
+                else:
+                    self.fixedMisspred[ftqOffbits] = 1
+                    for i in range(ftqOffbits + 1):
+                        self.fixedRange[i] = 1
+                    for i in range(PREDICT_WIDTH):
+                        self.fixedTaken[i] = 0
+                    if(pds[cfi_idx[0]][BRTYPE_LABEL] == 3) and (not pds[cfi_idx[0]][RET_LABEL]):
+                        for i in range(PREDICT_WIDTH):
+                            if(instrRange[i]):
+                                self.fixedRange[i] = 1
+                        self.fixedTaken[cfi_idx[0]] = 1
+            if not ftqValid:
+                self.fixedRange = [1 for _ in range(cfi_idx[0] + 1)]
+                self.fixedRange.extend([0 for _ in range(PREDICT_WIDTH - cfi_idx[0] - 1)])
+                self.fixedMisspred[cfi_idx[0]] = 1
+            # Target check for JAL and BR instr
+            if (not pds[cfi_idx[0]][RET_LABEL]) and (pds[cfi_idx[0]][BRTYPE_LABEL] < 3):
+            # Target fix includes 2 conditions:
+            # 1. ftqOffbits is larger than valid CFI index number;
+            # 2. ftqOffbits equal to valid CFI index, but tgt not equal to pc[x] + jumpOffset[x].
+                pds_tgt = pc[cfi_idx[0]] + jumpOffset[cfi_idx[0]]
+                if pds_tgt >= 2**50: # If target overflow
+                    pds_tgt = pds_tgt - 2**50
+                if (self.instrRange[cfi_idx[0]] == 1) \
+                    and ((pds_tgt != tgt) or (cfi_idx[0] < ftqOffbits)) \
+                    or (not ftqValid):
+                    self.fixedTarget[cfi_idx[0]] = self.jalTarget[cfi_idx[0]]
+                    if cfi_idx[0] <= ftqOffbits:
+                        self.fixedMisspred[cfi_idx[0]] = 1
+        else:
+            # pds do not exist CFI but FTQ gave a jumping prediction
+            if ftqValid:
+                self.fixedMisspred[ftqOffbits] = 1
+    
+        for i in range(PREDICT_WIDTH):
+            if self.fixedTarget[i] >= 2**50:
+                self.fixedTarget[i] = self.fixedTarget[i] - 2**50
+        stg1_fixedRange = self.fixedRange
+        stg1_fixedTaken = self.fixedTaken
+        stg2_fixedTarget = self.fixedTarget
+        stg2_jalTarget = self.jalTarget
+        stg2_fixedMissPred = self.fixedMisspred
+        
+        return stg1_fixedRange, stg1_fixedTaken, stg2_fixedTarget, stg2_jalTarget, stg2_fixedMissPred 
+    
+    

ut_frontend/ifu/pred_checker/env/pred_checker_sqr.py

@@ -0,0 +1,498 @@
+from ... import PREDICT_WIDTH, RET_LABEL, RVC_LABEL, BRTYPE_LABEL
+import random
+
+class pred_checker_sqr:
+    latest_vec_pkt = None
+    def __init__(self):
+        pass
+    
+    def gen_vec(self, PREDICT_WIDTH, vec_depth, caseId):
+        vec_pkt = [self._gen_vec_single(PREDICT_WIDTH, caseId) for _ in range(vec_depth)]        
+        self.latest_vec_pkt = vec_pkt
+        return vec_pkt
+    
+    def _gen_vec_single(self, PREDICT_WIDTH, caseId):
+        fire = True
+        ftqValid = False
+        ftqOffBits = random.randint(0, 15)
+        instrRange = [False for _ in range(PREDICT_WIDTH)]
+        instrValid = [False for _ in range(PREDICT_WIDTH)]
+        jumpOffset = [0 for _ in range(PREDICT_WIDTH)]
+        pc = [0 for _ in range(PREDICT_WIDTH)]
+        tgt = 0
+        pds = [{RVC_LABEL: False, RET_LABEL: False, BRTYPE_LABEL: 0 } for i in range(PREDICT_WIDTH)]
+        
+        # Pds has no JAL info; instrRange is False; instrValid is False;
+        # Check if the pred_checker will report a JAL missed prediction
+        if(caseId == 1):
+            pds = [{RVC_LABEL: False, RET_LABEL: False, BRTYPE_LABEL: random.choice([0]) } for i in range(PREDICT_WIDTH)]
+            instrRange = [random.choice([True]) for _ in range(PREDICT_WIDTH)]
+            instrValid = [random.choice([True]) for _ in range(PREDICT_WIDTH)]
+            pc_0 = random.randint(0, 2**50 - 64)
+            pc = self._gen_pc_list(pc_0, pds)
+            jumpOffset = [0 for _ in range(PREDICT_WIDTH)]
+            tgt = pc[PREDICT_WIDTH - 1] + 1 
+            
+            
+        # Pds has JAL info;  insrRange&instrValid is corresponding to JAL info;
+        # Check if the pred_checker will report a JAL missed prediction
+        elif(caseId == 2):    
+            #print("Case 1.1.2: generate test vector")
+            pc_0 = random.randint(0, 2**50 - 2**6)
+            randOffset = random.randint(0, 15)
+            pds = [{RVC_LABEL: False, RET_LABEL: False, BRTYPE_LABEL: 0 } for i in range(PREDICT_WIDTH)]
+            pds[randOffset] = {RVC_LABEL: False, RET_LABEL: False, BRTYPE_LABEL: 2}
+            ftqValid = True
+            ftqOffBits = randOffset
+            instrRange = [True for _ in range(PREDICT_WIDTH)]
+            instrValid = [True for _ in range(PREDICT_WIDTH)]
+            jumpOffset = [0 for _ in range(PREDICT_WIDTH)]
+            pc = self._gen_pc_list(pc_0, pds)
+            jumpOffset[randOffset] = random.randint(0, 2**50 - pc[randOffset])
+            tgt = pc[randOffset] + jumpOffset[randOffset]
+        
+        elif(caseId == 3):
+            #print("Case 1.2.1: generate test vector")
+            pc_0 = random.randint(0, 2**50 - 2**6)
+            randOffset = random.randint(0, 15)
+            pds = [{RVC_LABEL: False, RET_LABEL: False, BRTYPE_LABEL: 0 } for i in range(PREDICT_WIDTH)]
+            ftqValid = False
+            ftqOffBits = 0
+            instrRange = [True for _ in range(PREDICT_WIDTH)]
+            instrValid = [True for _ in range(PREDICT_WIDTH)]
+            pds[randOffset] = {RVC_LABEL: False, RET_LABEL: False, BRTYPE_LABEL: 2}
+            jumpOffset = [0 for _ in range(PREDICT_WIDTH)]
+            jumpOffset[randOffset] = random.randint(0, 2**50 - pc[randOffset])
+            pc = self._gen_pc_list(pc_0, pds)
+            # Cause we are testing a wrong prediction, so tgt is not cared.
+            tgt = pc[randOffset] + random.randint(0, 2**50 - pc[randOffset]) 
+        
+        elif(caseId == 4):
+            #print("Case 1.2.2: generate test vector")
+            pc_0 = random.randint(0, 2**50 - 2**6)
+            ftqValid = True
+            ftqOffBits = random.randint(1, 15)
+            randOffset = random.randint(0, 14)
+            while randOffset >= ftqOffBits:
+                randOffset = random.randint(0, 14)
+            pds = [{RVC_LABEL: False, RET_LABEL: False, BRTYPE_LABEL: 0 } for i in range(PREDICT_WIDTH)]
+            pds[randOffset] = {RVC_LABEL: False, RET_LABEL: False, BRTYPE_LABEL: 2}
+            instrRange = [True for _ in range(PREDICT_WIDTH)]
+            instrValid = [True for _ in range(PREDICT_WIDTH)]
+            jumpOffset = [0 for _ in range(PREDICT_WIDTH)]
+            jumpOffset[randOffset] = random.randint(0, 2**50 - pc_0)
+            pc = self._gen_pc_list(pc_0, pds)
+            tgt = pc[randOffset] + jumpOffset[randOffset]
+
+        elif(caseId == 21):
+            #print("Case 2.1.1: generate test vector") 
+            pds = [{RVC_LABEL: False, RET_LABEL: False, BRTYPE_LABEL: random.choice([0]) } for i in range(PREDICT_WIDTH)]
+            instrRange = [random.choice([True]) for _ in range(PREDICT_WIDTH)]
+            instrValid = [random.choice([True]) for _ in range(PREDICT_WIDTH)]
+            pc_0 = random.randint(0, 2**50 - 64)
+            pc = self._gen_pc_list(pc_0, pds)
+            jumpOffset = [0 for _ in range(PREDICT_WIDTH)]
+            tgt = pc[PREDICT_WIDTH - 1] + 1 
+
+        elif(caseId == 22):
+            #print("Case 2.1.2: generate test vector")
+            pc_0 = random.randint(0, 2**50 - 2**6)
+            randOffset = random.randint(0, 15)
+            pds = [{RVC_LABEL: False, RET_LABEL: False, BRTYPE_LABEL: 0 } for i in range(PREDICT_WIDTH)]
+            pds[randOffset] = {RVC_LABEL: False, RET_LABEL: True, BRTYPE_LABEL: 3}
+            ftqValid = True
+            ftqOffBits = randOffset
+            instrRange = [True for _ in range(PREDICT_WIDTH)]
+            instrValid = [True for _ in range(PREDICT_WIDTH)]
+            jumpOffset = [0 for _ in range(PREDICT_WIDTH)]
+            pc = self._gen_pc_list(pc_0, pds)
+            jumpOffset[randOffset] = random.randint(0, 2**50 - pc[randOffset])
+            tgt = pc[randOffset] + jumpOffset[randOffset]
+        elif(caseId == 23):
+            #print("Case 2.2.1: generate test vector")
+            pc_0 = random.randint(0, 2**50 - 2**6)
+            randOffset = random.randint(0, 15)
+            pds = [{RVC_LABEL: False, RET_LABEL: False, BRTYPE_LABEL: 0 } for i in range(PREDICT_WIDTH)]
+            ftqValid = False
+            ftqOffBits = 0
+            pds[randOffset] = {RVC_LABEL: False, RET_LABEL: True, BRTYPE_LABEL: 3}
+            instrRange = [True for _ in range(PREDICT_WIDTH)]
+            instrValid = [True for _ in range(PREDICT_WIDTH)]
+            jumpOffset = [0 for _ in range(PREDICT_WIDTH)]
+            jumpOffset[randOffset] = random.randint(0, 2**50 - pc_0)
+            pc = self._gen_pc_list(pc_0, pds)
+            tgt = pc[randOffset] + random.randint(0, 2**50 - pc[randOffset]) 
+        
+        elif(caseId == 24):
+            #print("Case 2.2.2: generate test vector")
+            pc_0 = random.randint(0, 2**50 - 2**6)
+            ftqValid = True
+            ftqOffBits = random.randint(1, 15)
+            randOffset = random.randint(0, 14)
+            while randOffset >= ftqOffBits:
+                randOffset = random.randint(0, 14)
+            pds = [{RVC_LABEL: False, RET_LABEL: False, BRTYPE_LABEL: 0 } for i in range(PREDICT_WIDTH)]
+            pds[randOffset] = {RVC_LABEL: False, RET_LABEL: True, BRTYPE_LABEL: 3}
+            instrRange = [True for _ in range(PREDICT_WIDTH)]
+            instrValid = [True for _ in range(PREDICT_WIDTH)]
+            jumpOffset = [0 for _ in range(PREDICT_WIDTH)]
+            jumpOffset[randOffset] = random.randint(0, 2**50 - pc_0)
+            pc = self._gen_pc_list(pc_0, pds)
+            tgt = pc_0 + jumpOffset[randOffset]
+        
+        elif(caseId == 31):
+            #print("Case 3.1.1: generate test vector") 
+            pds = [{RVC_LABEL: False, RET_LABEL: False, BRTYPE_LABEL: random.choice([0]) } for i in range(PREDICT_WIDTH)]
+            instrRange = [random.choice([True]) for _ in range(PREDICT_WIDTH)]
+            instrValid = [random.choice([True]) for _ in range(PREDICT_WIDTH)]
+            pc_0 = random.randint(0, 2**50 - 64)
+            pc = self._gen_pc_list(pc_0, pds)
+            jumpOffset = [0 for _ in range(PREDICT_WIDTH)]
+            tgt = pc[PREDICT_WIDTH - 1] + 1 
+
+        elif(caseId == 32):
+            #print("Case 3.1.2: generate test vector")
+            pc_0 = random.randint(0, 2**50 - 2**6)
+            randOffset = random.randint(0, 15)
+            pds = [{RVC_LABEL: False, RET_LABEL: False, BRTYPE_LABEL: 0 } for i in range(PREDICT_WIDTH)]
+            pds[randOffset] = {RVC_LABEL: False, RET_LABEL: False, BRTYPE_LABEL: 3}
+            ftqValid = True
+            ftqOffBits = randOffset
+            instrRange = [True for _ in range(PREDICT_WIDTH)]
+            instrValid = [True for _ in range(PREDICT_WIDTH)]
+            jumpOffset = [0 for _ in range(PREDICT_WIDTH)]
+            pc = self._gen_pc_list(pc_0, pds)
+            jumpOffset[randOffset] = random.randint(0, 2**50 - pc[randOffset])
+            tgt = pc[randOffset] + jumpOffset[randOffset]
+            
+        elif(caseId == 33):
+            #print("Case 3.2.1: generate test vector")
+            pc_0 = random.randint(0, 2**50 - 2**6)
+            randOffset = 12 #random.randint(0, 15)
+            pds = [{RVC_LABEL: False, RET_LABEL: False, BRTYPE_LABEL: 0 } for i in range(PREDICT_WIDTH)]
+            ftqValid = False
+            ftqOffBits = 0
+            pds[randOffset] = {RVC_LABEL: False, RET_LABEL: False, BRTYPE_LABEL: 3}
+            instrRange = [True for _ in range(PREDICT_WIDTH)]
+            instrValid = [True for _ in range(PREDICT_WIDTH)]
+            jumpOffset = [0 for _ in range(PREDICT_WIDTH)]
+            jumpOffset[randOffset] = random.randint(0, 2**50 - pc_0)
+            pc = self._gen_pc_list(pc_0, pds)
+            tgt = pc[randOffset] + random.randint(0, 2**50 - pc[randOffset]) 
+        
+        elif(caseId == 34):
+            #print("Case 3.2.2: generate test vector")
+            pc_0 = random.randint(0, 2**50 - 2**6)
+            ftqValid = True
+            ftqOffBits = random.randint(1, 15)
+            randOffset = random.randint(0, 14)
+            while randOffset >= ftqOffBits:
+                randOffset = random.randint(0, 14)
+            pds = [{RVC_LABEL: False, RET_LABEL: False, BRTYPE_LABEL: 0 } for i in range(PREDICT_WIDTH)]
+            pds[randOffset] = {RVC_LABEL: False, RET_LABEL: False, BRTYPE_LABEL: 3}
+            instrRange = [True for _ in range(PREDICT_WIDTH)]
+            instrValid = [True for _ in range(PREDICT_WIDTH)]
+            jumpOffset = [0 for _ in range(PREDICT_WIDTH)]
+            jumpOffset[randOffset] = random.randint(0, 2**50 - pc_0)
+            pc = self._gen_pc_list(pc_0, pds)
+            tgt = pc_0 + jumpOffset[randOffset]
+            
+        elif(caseId == 41):
+            #print("Case 4.2: generate test vector")
+            pc_0 = random.randint(0, 2**50 - 2**6)
+            ftqValid = True
+            randOffset = random.randint(0, 14)
+            ftqOffBits = randOffset
+            pds = [{RVC_LABEL: False, RET_LABEL: False, BRTYPE_LABEL: 0 } for i in range(PREDICT_WIDTH)]
+            pds[randOffset] = random.choice([{RVC_LABEL: False, RET_LABEL: False, BRTYPE_LABEL: 2}, 
+                                            {RVC_LABEL: False, RET_LABEL: True, BRTYPE_LABEL: 3}])
+            instrRange = [True for _ in range(ftqOffBits + 1)]
+            instrRange.extend([False for _ in range(PREDICT_WIDTH - 1 - ftqOffBits)])
+            instrValid = [True for _ in range(PREDICT_WIDTH)]
+            jumpOffset = [0 for _ in range(PREDICT_WIDTH)]
+            jumpOffset[randOffset] = random.randint(0, 2**50 - pc_0)
+            pc = self._gen_pc_list(pc_0, pds)
+            tgt = pc_0 + jumpOffset[randOffset]
+            
+        elif(caseId == 42):
+            #print("Case 4.2: generate test vector")
+            pc_0 = random.randint(0, 2**50 - 2**6)
+            ftqValid = True
+            randOffset = random.randint(0, 14)
+            pds = [{RVC_LABEL: False, RET_LABEL: False, BRTYPE_LABEL: 0 } for i in range(PREDICT_WIDTH)]
+            pds[randOffset] = random.choice([{RVC_LABEL: False, RET_LABEL: False, BRTYPE_LABEL: 2}, 
+                                            {RVC_LABEL: False, RET_LABEL: True, BRTYPE_LABEL: 3}])
+            while ftqOffBits <= randOffset:
+                ftqOffBits = random.randint(1, 15)
+            instrRange = [True for _ in range(ftqOffBits + 1)]
+            instrRange.extend([False for _ in range(PREDICT_WIDTH - 1 - ftqOffBits)])
+            instrValid = [True for _ in range(PREDICT_WIDTH)]
+            jumpOffset = [0 for _ in range(PREDICT_WIDTH)]
+            jumpOffset[randOffset] = random.randint(0, 2**50 - pc_0)
+            pc = self._gen_pc_list(pc_0, pds)
+            tgt = pc_0 + 10086 # Cause we are testing a wrong prediction, so tgt is not cared.
+            
+        elif(caseId == 43):
+            #print("Case 4.3: generate test vector")
+            pc_0 = random.randint(0, 2**50 - 2**6)
+            ftqValid = True
+            randOffset = random.randint(1, 15)
+            pds = [{RVC_LABEL: False, RET_LABEL: False, BRTYPE_LABEL: 0 } for i in range(PREDICT_WIDTH)]
+            pds[randOffset] = random.choice([{RVC_LABEL: False, RET_LABEL: False, BRTYPE_LABEL: 2}, 
+                                            {RVC_LABEL: False, RET_LABEL: True, BRTYPE_LABEL: 3}])
+            while ftqOffBits >= randOffset:
+                ftqOffBits = random.randint(0, 14)
+            instrRange = [True for _ in range(ftqOffBits + 1)]
+            instrRange.extend([False for _ in range(PREDICT_WIDTH - ftqOffBits - 1)])
+            instrValid = [True for _ in range(PREDICT_WIDTH)]
+            jumpOffset = [0 for _ in range(PREDICT_WIDTH)]
+            jumpOffset[randOffset] = random.randint(0, 2**50 - pc_0)
+            pc = self._gen_pc_list(pc_0, pds)
+            tgt = pc[randOffset] + jumpOffset[randOffset]
+        
+        elif(caseId == 51):
+            #print("Case 5.1.1: generate test vector")
+            pc_0 = random.randint(0, 2**50 - 2**6)
+            ftqValid = False
+            randOffset = random.randint(0, 15)
+            ftqOffBits = random.randint(0, 15)
+            pds = [{RVC_LABEL: False, RET_LABEL: False, BRTYPE_LABEL: 0 } for i in range(PREDICT_WIDTH)]
+            instrRange = [True for _ in range(PREDICT_WIDTH)]
+            instrValid = [True for _ in range(PREDICT_WIDTH)]
+            jumpOffset = [0 for _ in range(PREDICT_WIDTH)]
+            pc = self._gen_pc_list(pc_0, pds)
+            tgt = pc_0 + 10086 # Cause we are testing no-jumping case, so tgt is not cared.
+        
+        elif(caseId == 52):
+            #print("Case 5.1.2: generate test vector")
+            pc_0 = random.randint(0, 2**50 - 2**6)
+            randOffset = random.randint(0, 15)
+            pds = [{RVC_LABEL: False, RET_LABEL: False, BRTYPE_LABEL: 0 } for i in range(PREDICT_WIDTH)]
+            pds[randOffset] = random.choice([{RVC_LABEL: False, RET_LABEL: True, BRTYPE_LABEL: 3},
+                                             {RVC_LABEL: False, RET_LABEL: False, BRTYPE_LABEL: 2},
+                                             {RVC_LABEL: False, RET_LABEL:False, BRTYPE_LABEL:1}])
+            ftqValid = True
+            ftqOffBits = randOffset
+            instrRange = [True for _ in range(PREDICT_WIDTH)]
+            instrValid = [True for _ in range(PREDICT_WIDTH)]
+            jumpOffset = [0 for _ in range(PREDICT_WIDTH)]
+            pc = self._gen_pc_list(pc_0, pds)
+            jumpOffset[randOffset] = random.randint(0, 2**50 - pc[randOffset])
+            tgt = pc[randOffset] + jumpOffset[randOffset]
+            
+        elif(caseId == 53):
+            #print("Case 5.2")
+            pc_0 = random.randint(0, 2**50 - 2**6)
+            ftqValid = True
+            ftqOffBits = random.randint(0, 15)
+            pds = [{RVC_LABEL: False, RET_LABEL: False, BRTYPE_LABEL: 0 } for i in range(PREDICT_WIDTH)]
+            instrRange = [True for _ in range(PREDICT_WIDTH)]
+            instrValid = [True for _ in range(PREDICT_WIDTH)]
+            jumpOffset = [0 for _ in range(PREDICT_WIDTH)]
+            pc = self._gen_pc_list(pc_0, pds)
+            tgt = pc_0 + 10086 # Cause the case has to generate a fault prediction, so tgt is not cared.
+            
+        elif(caseId == 61):
+            #print("Case 6.1.1")
+            pc_0 = random.randint(0, 2**50 - 2**6)
+            ftqValid = False
+            ftqOffBits = 0
+            pds = [{RVC_LABEL: random.choice([True, False]), RET_LABEL: False, BRTYPE_LABEL: 0} for _ in range(PREDICT_WIDTH)]
+            instrRange = [True for _ in range(PREDICT_WIDTH)]
+            instrValid = [True for _ in range(PREDICT_WIDTH)]
+            jumpOffset = [0 for _ in range(PREDICT_WIDTH)]
+            pc = self._gen_pc_list(pc_0, pds)
+            tgt = pc_0 + 10086 # Cause the case has to generate no-jumping prediction, so tgt is not cared.
+            
+        elif(caseId == 62):
+            #print("Case 6.1.2")
+            randOffset = random.randint(0, 15)
+            pc_0 = random.randint(0, 2**50 - 2**6)
+            ftqValid = False
+            ftqOffBits = 0
+            instrRange = [True for _ in range(PREDICT_WIDTH)]
+            instrValid = [True for _ in range(PREDICT_WIDTH)]
+            pds = [{RVC_LABEL: random.choice([True, False]), RET_LABEL: False, BRTYPE_LABEL: 0} for _ in range(PREDICT_WIDTH)]
+            instrValid[randOffset] = False
+            pc = self._gen_pc_list(pc_0, pds)
+            jumpOffset = [0 for _ in range(PREDICT_WIDTH)]
+            # randOffset_1: true jump instr location
+            if randOffset != 15:
+                randOffset_1 = random.randint(randOffset + 1, 15)
+                pds[randOffset_1] = random.choice([{RVC_LABEL: random.choice([True, False]), RET_LABEL: True, BRTYPE_LABEL: 3},
+                                             {RVC_LABEL: random.choice([True, False]), RET_LABEL: False, BRTYPE_LABEL: 2}])
+                                             #{RVC_LABEL: random.choice([True, False]), RET_LABEL:False, BRTYPE_LABEL:1}])
+                jumpOffset[randOffset_1] = random.randint(0, 2**50 - pc_0 - 2**6)
+                tgt = pc[randOffset_1] + jumpOffset[randOffset_1]
+            else:
+                tgt = pc[randOffset]
+                        
+        elif(caseId == 63):
+            #print("Case 6.1.3")
+            randOffset = random.randint(0, 15)
+            pc_0 = random.randint(0, 2**50 - 2**6)
+            ftqValid = True
+            ftqOffBits = randOffset
+            instrRange = [True for _ in range(PREDICT_WIDTH)]
+            instrValid = [True for _ in range(PREDICT_WIDTH)]
+            pds = [{RVC_LABEL: random.choice([True, False]), RET_LABEL: False, BRTYPE_LABEL: 0} for _ in range(PREDICT_WIDTH)]
+            pds[randOffset] = random.choice([{RVC_LABEL: random.choice([True, False]), RET_LABEL: True, BRTYPE_LABEL: 3},
+                                             {RVC_LABEL: random.choice([True, False]), RET_LABEL: False, BRTYPE_LABEL: 2},
+                                             {RVC_LABEL: random.choice([True, False]), RET_LABEL:False, BRTYPE_LABEL:1}])
+            pc = self._gen_pc_list(pc_0, pds)
+            jumpOffset = [0 for _ in range(PREDICT_WIDTH)]
+            jumpOffset[randOffset] = random.randint(0, 2**50 - pc_0 - 2**6)
+            tgt = pc[randOffset] + jumpOffset[randOffset]
+        
+        elif(caseId == 64):
+            #print("Case 6.2")
+            randOffset = random.randint(0, 15)
+            pc_0 = random.randint(0, 2**50 - 2 ** 6)
+            ftqValid = True
+            # randOffset: fault prediction location
+            ftqOffBits = randOffset
+            instrRange = [True for _ in range(randOffset + 1)] + [False for _ in range(PREDICT_WIDTH - randOffset - 1)]
+            instrValid = [True for _ in range(PREDICT_WIDTH)]
+            instrValid[randOffset] = False
+            pds = [{RVC_LABEL: random.choice([True, False]), RET_LABEL: False, BRTYPE_LABEL: 0} for _ in range(PREDICT_WIDTH)]
+            pds[randOffset] = {RVC_LABEL: random.choice([True, False]), RET_LABEL: False, BRTYPE_LABEL: 0}
+            jumpOffset = [0 for _ in range(PREDICT_WIDTH)]
+            # randOffset_1: true jump instr location
+            if randOffset != 15:
+                randOffset_1 = random.randint(randOffset + 1, 15)
+                pds[randOffset_1] = random.choice([{RVC_LABEL: random.choice([True, False]), RET_LABEL: True, BRTYPE_LABEL: 3},
+                                             {RVC_LABEL: random.choice([True, False]), RET_LABEL: False, BRTYPE_LABEL: 2},
+                                             {RVC_LABEL: random.choice([True, False]), RET_LABEL:False, BRTYPE_LABEL:1}])
+                jumpOffset[randOffset_1] = random.randint(0, 2**50 - pc_0 - 2**6)
+            pc = self._gen_pc_list(pc_0, pds)
+            tgt = pc[randOffset] + jumpOffset[randOffset]
+        
+        elif(caseId == 71):
+            #print("Case 7.1.1") 
+            randOffset = random.randint(0, 15)
+            pc_0 = random.randint(0, 2**50 - 2 ** 6)
+            ftqValid = True
+            ftqOffBits = randOffset
+            instrRange = [True for _ in range(randOffset + 1)] + [False for _ in range(PREDICT_WIDTH - randOffset - 1)]
+            instrValid = [True for _ in range(PREDICT_WIDTH)]
+            pds = [{RVC_LABEL: random.choice([True, False]), RET_LABEL: False, BRTYPE_LABEL: 0} for _ in range(PREDICT_WIDTH)]
+            pds[randOffset] = {RVC_LABEL: random.choice([True, False]), RET_LABEL: False, BRTYPE_LABEL: 0}
+            pc = self._gen_pc_list(pc_0, pds)
+            jumpOffset = [0 for _ in range(PREDICT_WIDTH)]
+            tgt = pc[randOffset] + jumpOffset[randOffset]
+            
+        elif(caseId == 72):
+            #print("Case 7.1.2")
+            randOffset = random.randint(0, 15)
+            pc_0 = random.randint(0, 2**50 - 2 ** 6)
+            ftqValid = True
+            ftqOffBits = randOffset
+            instrRange = [True for _ in range(randOffset + 1)] + [False for _ in range(PREDICT_WIDTH - randOffset - 1)]
+            instrValid = [True for _ in range(PREDICT_WIDTH)]
+            pds = [{RVC_LABEL: random.choice([True, False]), RET_LABEL: False, BRTYPE_LABEL: 0} for _ in range(PREDICT_WIDTH)]
+            pds[randOffset] = random.choice([{RVC_LABEL: random.choice([True, False]), RET_LABEL: True, BRTYPE_LABEL: 3},
+                                             {RVC_LABEL: random.choice([True, False]), RET_LABEL: False, BRTYPE_LABEL: 2},
+                                             {RVC_LABEL: random.choice([True, False]), RET_LABEL:False, BRTYPE_LABEL:1}])
+            pc = self._gen_pc_list(pc_0, pds)
+            jumpOffset = [0 for _ in range(PREDICT_WIDTH)]
+            jumpOffset[randOffset] = random.randint(4, 2**50 - pc_0)
+            tgt = pc[randOffset] + jumpOffset[randOffset]
+            
+        elif(caseId == 73):
+            #print("Case 7.2")
+            randOffset = random.randint(0, 15)
+            pc_0 = random.randint(0, 2**50 - 2 ** 6)
+            ftqValid = True
+            ftqOffBits = randOffset
+            instrRange = [True for _ in range(randOffset + 1)] + [False for _ in range(PREDICT_WIDTH - randOffset - 1)]
+            instrValid = [True for _ in range(PREDICT_WIDTH)]
+            pds = [{RVC_LABEL: random.choice([True, False]), RET_LABEL: False, BRTYPE_LABEL: 0} for _ in range(PREDICT_WIDTH)]
+            pds[randOffset] = random.choice([{RVC_LABEL: random.choice([True, False]), RET_LABEL: True, BRTYPE_LABEL: 3},
+                                             {RVC_LABEL: random.choice([True, False]), RET_LABEL: False, BRTYPE_LABEL: 2},
+                                             {RVC_LABEL: random.choice([True, False]), RET_LABEL:False, BRTYPE_LABEL:1}])
+            pc = self._gen_pc_list(pc_0, pds)
+            jumpOffset = [0 for _ in range(PREDICT_WIDTH)]
+            jumpOffset[randOffset] = random.randint(4, 2**50 - pc_0)
+            tgt = pc[randOffset] + jumpOffset[randOffset] + 10086
+        
+        elif(caseId == 81):
+            #print("Case 8")
+            randOffset = random.randint(0, 15)
+            pc_0 = random.randint(0, 2**50 - 2 ** 6)
+            ftqValid = True
+            ftqOffBits = randOffset
+            instrRange = [True for _ in range(randOffset + 1)] + [False for _ in range(PREDICT_WIDTH - randOffset - 1)]
+            instrValid = [random.choice([True, False]) for _ in range(PREDICT_WIDTH)]
+            pds = [{RVC_LABEL: False, RET_LABEL: False, BRTYPE_LABEL: 0} for _ in range(PREDICT_WIDTH)]
+            pds[randOffset] = random.choice([{RVC_LABEL: random.choice([True, False]), RET_LABEL: True, BRTYPE_LABEL: 3},
+                                             {RVC_LABEL: random.choice([True, False]), RET_LABEL: False, BRTYPE_LABEL: 2},
+                                             {RVC_LABEL: random.choice([True, False]), RET_LABEL:False, BRTYPE_LABEL:1}])
+            pc = self._gen_pc_list(pc_0, pds)
+            jumpOffset = [0 for _ in range(PREDICT_WIDTH)]
+            negJumpOffset = - 2**50
+            while (negJumpOffset + pc_0 < 0):
+                negJumpOffset = random.randint(-(2**50), -4)
+            posJumpOffset = random.randint(4, 2**50 - pc[PREDICT_WIDTH - 1])
+            jumpOffset[randOffset] = random.choice([negJumpOffset, posJumpOffset])
+            tgt = pc[randOffset] + jumpOffset[randOffset]
+            if tgt >= 2**50:
+                tgt = tgt - 2**50
+            
+        elif(caseId == 82):
+            # Case 8 with additional target boundary test
+            randOffset = random.randint(0, 15)
+            pc_0 = random.randint(2**50 - 2 ** 8, 2**50 - 2**6 - 1) # boundary pc
+            ftqValid = True
+            ftqOffBits = randOffset
+            instrRange = [True for _ in range(randOffset + 1)] + [False for _ in range(PREDICT_WIDTH - randOffset - 1)]
+            instrValid = [random.choice([True, False]) for _ in range(PREDICT_WIDTH)]
+            pds = [{RVC_LABEL: False, RET_LABEL: False, BRTYPE_LABEL: 0} for _ in range(PREDICT_WIDTH)]
+            pds[randOffset] = random.choice([{RVC_LABEL: random.choice([True, False]), RET_LABEL: True, BRTYPE_LABEL: 3},
+                                             {RVC_LABEL: random.choice([True, False]), RET_LABEL: False, BRTYPE_LABEL: 2},
+                                             {RVC_LABEL: random.choice([True, False]), RET_LABEL:False, BRTYPE_LABEL:1}])
+            pc = self._gen_pc_list(pc_0, pds)
+            jumpOffset = [0 for _ in range(PREDICT_WIDTH)]
+            negJumpOffset = - 2**50
+            while (negJumpOffset + pc_0 < 0):
+                negJumpOffset = random.randint(-(2**50), -4)
+            posJumpOffset = random.randint(4, 2**50 - pc[PREDICT_WIDTH - 1])
+            jumpOffset[randOffset] = random.choice([negJumpOffset, posJumpOffset])
+            tgt = pc[randOffset] + jumpOffset[randOffset]
+            if tgt >= 2**50:
+                tgt = tgt - 2**50
+            
+        elif(caseId == 83):
+            # Case 8 with additional target boundary test: overflow
+            randOffset = random.randint(0, 15)
+            pc_0 = 2**50 - random.randint(1, 65) # boundary pc
+            ftqValid = True
+            ftqOffBits = randOffset
+            instrRange = [True for _ in range(randOffset + 1)] + [False for _ in range(PREDICT_WIDTH - randOffset - 1)]
+            instrValid = [True  for _ in range(PREDICT_WIDTH)]
+            pds = [{RVC_LABEL: False, RET_LABEL: False, BRTYPE_LABEL: 0} for _ in range(PREDICT_WIDTH)]
+            pds[randOffset] = {RVC_LABEL: False, RET_LABEL: False, BRTYPE_LABEL: 2}
+            pc = self._gen_pc_list(pc_0, pds)
+            jumpOffset = [0 for _ in range(PREDICT_WIDTH)]
+            jumpOffset[randOffset] = random.randint(66, 128)
+            tgt = pc[randOffset] + jumpOffset[randOffset]
+            if tgt >= 2**50:
+                tgt = tgt - 2**50
+            
+            
+        else:
+            print(f"Invalid case number, caseId == {caseId}")
+            assert caseId == -1, "caseId error"
+        
+        vec = [ftqValid, ftqOffBits, instrRange, instrValid, jumpOffset, pc, pds, tgt, fire]
+        #print("Generated test vector: ftqValid, ftqOffBits, instrRange, instrValid, jumpOffset, pc, pds, tgt, fire\n", vec)
+        return vec
+    
+    def _gen_pc_list(self, pc_0, pds_info):
+        pc = [0 for i in range(PREDICT_WIDTH)]
+        for i in range(PREDICT_WIDTH - 1):
+            pc[0] = pc_0;
+            if pds_info[i][RVC_LABEL] == False:
+                pc[i + 1] = pc[i] + 4
+            else:
+                pc[i + 1] = pc[i] + 2
+        return pc

ut_frontend/ifu/pred_checker/test/pred_checker_dut.py

@@ -1,25 +1,144 @@
 import toffee_test
 import toffee
+from operator import *
 from ..env import PredCheckerEnv
 from dut.PredChecker import DUTPredChecker
 import toffee.funcov as fc
 from toffee.funcov import CovGroup
+from comm.functions import UT_FCOV, module_name_with
+from ... import PREDICT_WIDTH, RET_LABEL, RVC_LABEL, BRTYPE_LABEL
 
-def pred_checker_cover_point(pred_checker):
-    g = CovGroup("predChecker addition function")
-    # g.add_cover_point(pred_checker.io_out_stage1Out_fixedRange_0, {"io_stage1Out_fixedRange is 0": fc.Eq(0)}, name="stage1Out0 is 0")
+# moudle path is ut_frontend.ifu.pred_checker.test.pred_checker_dut
+gr = fc.CovGroup(UT_FCOV("../../../pred_checker"))
+
+def init_pred_checker_funcov(dut:DUTPredChecker, g:fc.CovGroup, env:PredCheckerEnv):
+    mdl = env.mdl
+    # For function point 1 - JAL prediction error checking:
+    # NO_JAL_FALSE_REPORT - 误检检查: False detection test
+    for j in range(PREDICT_WIDTH):
+        g.add_watch_point(dut, {
+            "JAL_PRED_VALID": lambda dut: getattr(dut, "io_in_ftqOffset_valid").value == 1,
+            "JAL_PRED_INVALID": lambda dut: getattr(dut, "io_in_ftqOffset_valid").value == 0,
+            f"JAL_INSTR_VALID_{j}": lambda dut: getattr(dut, f"io_in_instrValid_{j}").value == 1,
+            f"JAL_INSTR_RANGE_{j}": lambda dut: sum(getattr(dut, f"io_in_instrRange_{i}").value for i in range(PREDICT_WIDTH)) == j,
+            f"JAL_PRED_OFFSET_AT_{j}": lambda dut: getattr(dut, f"io_in_ftqOffset_bits").value == j,
+            f"JAL_PDS_INFO_AT_{j}": lambda dut: getattr(dut, f"io_in_pds_{j}_brType").value == 2
+        }, name=f"JAL_PRED_COV_{j}")
+    
+    # For function point 2 - RET prediction error checking:
+    for j in range(PREDICT_WIDTH):
+        g.add_watch_point(dut, {
+            "RET_PRED_VALID": lambda dut: getattr(dut, "io_in_ftqOffset_valid").value == 1,
+            "RET_PRED_INVALID": lambda dut: getattr(dut, "io_in_ftqOffset_valid").value == 0,
+            f"RET_INSTR_VALID_{j}": lambda dut: getattr(dut, f"io_in_instrValid_{j}").value == 1,
+            f"RET_INSTR_RANGE_{j}": lambda dut: sum(getattr(dut, f"io_in_instrRange_{i}").value for i in range(PREDICT_WIDTH)) == j,
+            f"RET_PRED_OFFSET_AT_{j}": lambda dut: getattr(dut, f"io_in_ftqOffset_bits").value == j,
+            f"RET_PDS_INFO_AT_{j}": lambda dut: getattr(dut, f"io_in_pds_{j}_brType").value == 3
+        }, name=f"RET_PRED_COV_{j}")
+    
+    # For function point 2 - RET prediction error checking:
+    for j in range(PREDICT_WIDTH):
+        g.add_watch_point(dut, {
+            "RET_PRED_VALID": lambda dut: getattr(dut, "io_in_ftqOffset_valid").value == 1,
+            "RET_PRED_INVALID": lambda dut: getattr(dut, "io_in_ftqOffset_valid").value == 0,
+            f"RET_INSTR_VALID_{j}": lambda dut: getattr(dut, f"io_in_instrValid_{j}").value == 1,
+            f"RET_INSTR_RANGE_{j}": lambda dut: sum(getattr(dut, f"io_in_instrRange_{i}").value for i in range(PREDICT_WIDTH)) == j,
+            f"RET_PRED_OFFSET_AT_{j}": lambda dut: getattr(dut, f"io_in_ftqOffset_bits").value == j,
+            f"RET_PDS_INFO_AT_{j}": lambda dut: getattr(dut, f"io_in_pds_{j}_brType").value == 3
+        }, name=f"JALR_PRED_COV_{j}")
+        
+    # For function point 4 - Renewing instruction range:
+    for j in range(PREDICT_WIDTH):
+        g.add_watch_point(dut, {
+            f"RANGE_LENGTH_{j}_COV": lambda dut: sum(1 for i in range(PREDICT_WIDTH) if getattr(dut, f"io_in_instrRange_{i}").value == 1) == j
+        }, name=f"RANGE_FIXING_COV_{j}")
+    
+    # For function point 5 - Not-CFI instruction checking
+    for j in range(PREDICT_WIDTH):
+        g.add_watch_point(dut,{
+            "CFI_PRED_VALID": lambda dut: getattr(dut, "io_in_ftqOffset_valid").value == 1,
+            "CFI_PRED_INVALID": lambda dut: getattr(dut, "io_in_ftqOffset_valid").value == 0,
+            f"CFI_INSTR_VALID_{j}": lambda dut: getattr(dut, f"io_in_instrValid_{j}").value == 1,
+            f"CFI_INSTR_RANGE_{j}": lambda dut: sum(getattr(dut, f"io_in_instrRange_{i}").value for i in range(PREDICT_WIDTH)) == j,
+            f"CFI_PRED_OFFSET_AT_{j}": lambda dut: getattr(dut, f"io_in_ftqOffset_bits").value == j,
+            f"CFI_PDS_INFO_AT_{j}": lambda dut: getattr(dut, f"io_in_pds_{j}_brType").value  > 0
+        }, name=f"CFI_PRED_COV_{j}")
+    
+    # For function point 6 - Invalid instruction checking
+    for j in range(PREDICT_WIDTH):
+        g.add_watch_point(dut,{
+            "INV_PRED_VALID": lambda dut: getattr(dut, "io_in_ftqOffset_valid").value == 1,
+            "INV_PRED_INVALID": lambda dut: getattr(dut, "io_in_ftqOffset_valid").value == 0,
+            f"INV_INSTR_OFFSET_{j}": lambda dut: getattr(dut, f"io_in_instrValid_{j}").value == 0,
+            f"INV_INSTR_RANGE_{j}": lambda dut: sum(getattr(dut, f"io_in_instrRange_{i}").value for i in range(PREDICT_WIDTH)) == j,
+            f"INV_PRED_OFFSET_AT_{j}": lambda dut: getattr(dut, f"io_in_ftqOffset_bits").value == j,
+        }, name=f"INV_PRED_COV_{j}")
+    
+    # For function point 7 - Target error checking
+    for j in range(PREDICT_WIDTH):
+        g.add_watch_point(dut,
+            {
+            "TGT_CFI_PRED_VALID": lambda dut: getattr(dut, "io_in_ftqOffset_valid").value == 1,
+            "TGT_CFI_PRED_INVALID": lambda dut: getattr(dut, "io_in_ftqOffset_valid").value == 0,
+            "TGT_CFI_INSTR_VALID": lambda dut: getattr(dut, f"io_in_instrValid_{j}").value == 1,
+            f"TGT_CFI_INSTR_RANGE_{j}": lambda dut: sum(getattr(dut, f"io_in_instrRange_{i}").value for i in range(PREDICT_WIDTH)) == j,
+            f"TGT_CFI_PRED_OFFSET_AT_{j}": lambda dut: getattr(dut, f"io_in_ftqOffset_bits").value == j,
+            f"TGT_CFI_PDS_INFO_AT_{j}": lambda dut: getattr(dut, f"io_in_pds_{j}_brType").value  > 0,
+            f"TGT_CFI_JMPOFFSET_VAL_{j}": lambda dut: getattr(dut, f"io_in_jumpOffset_{j}").value > 0,
+            f"TGT_CFI_TGT_VAL": lambda dut: getattr(dut, "io_in_target").value > 0,
+            f"TGT_CFI_PC_VAL_{j}": lambda dut: getattr(dut, f"io_in_pc_{j}").value > 2**50 - 2**6 - 4
+            },
+            name=f"TGT_ERROR_COV_{j}",
+        )
+    
+    # For function point 8 - Random target checking
+    for i in range(PREDICT_WIDTH):
+        g.add_watch_point(dut,{
+            "RAND_PRED_VALID": lambda dut: getattr(dut, "io_in_ftqOffset_valid").value == 1,
+            "RAND_PRED_INVALID": lambda dut: getattr(dut, "io_in_ftqOffset_valid").value == 0,
+            "RAND_INSTR_VALID": lambda dut: getattr(dut, f"io_in_instrValid_{j}").value == 1,
+            "RAND_INSTR_RANGE": lambda dut: sum(getattr(dut, f"io_in_instrRange_{i}").value for i in range(PREDICT_WIDTH)) == j,
+            f"RAND_PRED_OFFSET_AT_{j}": lambda dut: getattr(dut, f"io_in_ftqOffset_bits").value == j,
+            f"RAND_PDS_INFO_AT_{j}": lambda dut: getattr(dut, f"io_in_pds_{j}_brType").value  > 0,
+            f"RAND_JMPOFFSET_VAL_{j}": lambda dut: getattr(dut, f"io_in_jumpOffset_{j}").value > 0,
+            f"RAND_TGT_VAL": lambda dut: getattr(dut, "io_in_target").value > 0,
+            f"RAND_PC_VAL_{j}": lambda dut: getattr(dut, f"io_in_pc_{j}").value > 2**50 - 2**6 - 4
+            #f"FIXED_TARGET_{i}_CORRECT": lambda dut: getattr(dut, f"io_out_stage2Out_fixedTarget_{i}").value == mdl.pc[i] + mdl.jumpOffset[i]
+            #                                        or getattr(dut, f"io_out_stage2Out_fixedTarget_{i}").value == mdl.pc[i] + mdl.jumpOffset[i] - 2**50
+            #                                        or getattr(dut, f"io_out_stage2Out_fixedTarget_{i}").value == mdl.pc[i] + 2
+            #                                        or getattr(dut, f"io_out_stage2Out_fixedTarget_{i}").value == mdl.pc[i] + 4,
+            #f"JAL_TARGET_{i}_CORRECT": lambda dut: getattr(dut, f"io_out_stage2Out_jalTarget_{i}").value == mdl.pc[i] + mdl.jumpOffset[i]
+            #                                        or getattr(dut, f"io_out_stage2Out_jalTarget_{i}").value == mdl.pc[i] + mdl.jumpOffset[i] - 2**50,
+            #f"FIXED_TARGET_{i}_BOUNDARY": lambda dut: getattr(dut, f"io_out_stage2Out_fixedTarget_{i}").value > 0x3_FFFF_FFFF_FFC0,
+            #f"JAL_TARGET_{i}_BOUNDARY": lambda dut: getattr(dut, f"io_out_stage2Out_jalTarget_{i}").value > 0x3_FFFF_FFFF_FFC0
+        },
+        name=f"TARGET_{i}_COV")
+    
+    # Reverse mark
+    def _mark_name(name):
+        return module_name_with(name, "../../test_predchecker")
+    
+    
+    for i in range(PREDICT_WIDTH):
+        g.mark_function(f"JAL_PRED_COV_{i}", _mark_name(["test_jal_chk_1_1_1", "test_jal_chk_1_1_2", "test_jal_chk_1_2_1", "test_jal_chk_1_2_2"]))
+        g.mark_function(f"RET_PRED_COV_{i}", _mark_name(["test_ret_chk_2_1_1", "test_ret_chk_2_1_2", "test_ret_chk_2_2_1", "test_ret_chk_2_2_2"]))
+        g.mark_function(f"JALR_PRED_COV_{i}", _mark_name(["test_jalr_chk_3_1_1", "test_jalr_chk_3_1_2", "test_jalr_chk_3_2_1", "test_jalr_chk_3_2_2"]))
+        g.mark_function(f"RANGE_FIXING_COV_{i}", _mark_name(["test_renew_range_4_1", "test_renew_range_4_2", "test_renew_range_4_3"]))
+        g.mark_function(f"CFI_PRED_COV_{i}", _mark_name(["test_not_cfi_chk_5_1_1", "test_not_cfi_chk_5_1_2", "test_not_cfi_chk_5_2"]))
+        g.mark_function(f"INV_PRED_COV_{i}", _mark_name(["test_invalid_instr_chk_6_1_1","test_invalid_instr_chk_6_1_2", "test_invalid_instr_chk_6_1_3", "test_invalid_instr_chk_6_2" ]))
+        g.mark_function(f"TGT_ERROR_COV_{i}", _mark_name(["test_tgt_chk_7_1_1", "test_tgt_chk_7_1_2", "test_tgt_chk_7_2"]))
+        g.mark_function(f"TARGET_{i}_COV", _mark_name("test_rand_tgt_8")) 
+    
     return g
- 
 
 @toffee_test.fixture
 async def predchecker_env(toffee_request: toffee_test.ToffeeRequest):
-
     toffee.setup_logging(toffee.WARNING)
     dut = toffee_request.create_dut(DUTPredChecker)
-    toffee_request.add_cov_groups(pred_checker_cover_point(dut))
     dut.InitClock("clock")
     toffee.start_clock(dut)
     env = PredCheckerEnv(dut)
+    toffee_request.add_cov_groups(init_pred_checker_funcov(dut, gr, env))
     yield env
 
     import asyncio
@@ -30,4 +149,8 @@ async def predchecker_env(toffee_request: toffee_test.ToffeeRequest):
             try:
                 await task
             except asyncio.CancelledError:
-                break
+                break
+
+
+
+            

ut_frontend/ifu/pred_checker/test/test_demo.py

@@ -1,18 +0,0 @@
-import toffee_test
-from ... import PREDICT_WIDTH, RET_LABEL, RVC_LABEL, BRTYPE_LABEL
-from dut.PredChecker import DUTPredChecker
-from .pred_checker_dut import predchecker_env
-# from pred_checker_dut import predchecker_env
-
-@toffee_test.testcase
-async def test_fire(predchecker_env):
-    valid = False
-    bits = 0
-    jumpOffset = [0 for i in range(PREDICT_WIDTH)]
-    instrRange = [True for i in range(PREDICT_WIDTH)]
-    instrValid = [True for i in range(PREDICT_WIDTH)] # all RVCs
-    pc = [0 for i in range(PREDICT_WIDTH)]
-    pds = [{RVC_LABEL: True, RET_LABEL: False, BRTYPE_LABEL: 0 } for i in range(PREDICT_WIDTH)]
-    tgt = 0
-    async for res in predchecker_env.predCheckerAgent.agent_pred_check(valid, bits, instrRange, instrValid, jumpOffset, pc, pds, tgt, True):
-        print(res)

ut_frontend/ifu/pred_checker/test/test_predchecker.py

@@ -0,0 +1,276 @@
+import toffee_test
+from ... import PREDICT_WIDTH, RET_LABEL, RVC_LABEL, BRTYPE_LABEL
+from dut.PredChecker import DUTPredChecker
+from .pred_checker_dut import predchecker_env
+from ..env.pred_checker_sqr import pred_checker_sqr
+import toffee.funcov as fc 
+from comm.functions import UT_FCOV, module_name_with
+from toffee import *
+import os
+TEST_CYCLE = int(os.getenv("TEST_CYCLE", 100))
+
+
+
+@toffee_test.testcase 
+async def test_jal_chk_1_1_1(predchecker_env):
+    print("Testing case 1.1.1")
+    sqr = pred_checker_sqr()
+    vec_pkt = sqr.gen_vec(PREDICT_WIDTH, TEST_CYCLE, 1)
+    for i in range(TEST_CYCLE):
+        #print(*vec_pkt[i])
+        res = await predchecker_env.predCheckerAgent.agent_pred_check(*vec_pkt[i])
+    del sqr
+    
+@toffee_test.testcase
+async def test_jal_chk_1_1_2(predchecker_env):
+    print("Testing case 1.1.2")
+    sqr = pred_checker_sqr()
+    vec_pkt = sqr.gen_vec(PREDICT_WIDTH, TEST_CYCLE, 2)
+    for i in range(TEST_CYCLE):
+        #print(*vec_pkt[i])
+        res = await predchecker_env.predCheckerAgent.agent_pred_check(*vec_pkt[i])
+    del sqr
+    
+
+@toffee_test.testcase
+async def test_jal_chk_1_2_1(predchecker_env):
+    print("Testing case 1.2.1")
+    sqr = pred_checker_sqr()
+    vec_pkt = sqr.gen_vec(PREDICT_WIDTH, TEST_CYCLE, 3)
+    for i in range(TEST_CYCLE):
+        #print(*vec_pkt[i])
+        res = await predchecker_env.predCheckerAgent.agent_pred_check(*vec_pkt[i])
+    del sqr
+
+@toffee_test.testcase
+async def test_jal_chk_1_2_2(predchecker_env):
+    print("Testing case 1_2_2")
+    sqr = pred_checker_sqr()
+    vec_pkt = sqr.gen_vec(PREDICT_WIDTH, TEST_CYCLE, 4)
+    for i in range(TEST_CYCLE):
+        #print(*vec_pkt[i])
+        res = await predchecker_env.predCheckerAgent.agent_pred_check(*vec_pkt[i])
+    del sqr
+    
+    
+@toffee_test.testcase 
+async def test_ret_chk_2_1_1(predchecker_env):
+    print("Testing case 2.1.1")
+    sqr = pred_checker_sqr()
+    vec_pkt = sqr.gen_vec(PREDICT_WIDTH, TEST_CYCLE, 21)
+    for i in range(TEST_CYCLE):
+        #print(*vec_pkt[i])
+        res = await predchecker_env.predCheckerAgent.agent_pred_check(*vec_pkt[i])
+    del sqr
+    
+@toffee_test.testcase
+async def test_ret_chk_2_1_2(predchecker_env):
+    print("Testing case 2.1.1")
+    sqr = pred_checker_sqr()
+    vec_pkt = sqr.gen_vec(PREDICT_WIDTH, TEST_CYCLE, 22)
+    for i in range(TEST_CYCLE):
+        #print(*vec_pkt[i])
+        res = await predchecker_env.predCheckerAgent.agent_pred_check(*vec_pkt[i])
+    del sqr
+    
+@toffee_test.testcase
+async def test_ret_chk_2_2_1(predchecker_env):
+    print("Testing case 2.2.1")
+    sqr = pred_checker_sqr()
+    vec_pkt = sqr.gen_vec(PREDICT_WIDTH, TEST_CYCLE, 23)
+    for i in range(TEST_CYCLE):
+        #print(*vec_pkt[i])
+        res = await predchecker_env.predCheckerAgent.agent_pred_check(*vec_pkt[i])
+    del sqr
+
+
+@toffee_test.testcase
+async def test_ret_chk_2_2_2(predchecker_env):
+    print("Testing case 2.2.2")
+    sqr = pred_checker_sqr()
+    vec_pkt = sqr.gen_vec(PREDICT_WIDTH, TEST_CYCLE, 24)
+    for i in range(TEST_CYCLE):
+        #print(*vec_pkt[i])
+        res = await predchecker_env.predCheckerAgent.agent_pred_check(*vec_pkt[i])
+    del sqr
+
+
+@toffee_test.testcase
+async def test_jalr_chk_3_1_1(predchecker_env):
+    sqr = pred_checker_sqr()
+    vec_pkt = sqr.gen_vec(PREDICT_WIDTH, TEST_CYCLE, 31)
+    for i in range(TEST_CYCLE):
+        #print(*vec_pkt[i])
+        res = await predchecker_env.predCheckerAgent.agent_pred_check(*vec_pkt[i])
+    del sqr
+
+@toffee_test.testcase
+async def test_jalr_chk_3_1_2(predchecker_env):
+    sqr = pred_checker_sqr()
+    vec_pkt = sqr.gen_vec(PREDICT_WIDTH, TEST_CYCLE, 32)
+    for i in range(TEST_CYCLE):
+        #print(*vec_pkt[i])
+        res = await predchecker_env.predCheckerAgent.agent_pred_check(*vec_pkt[i])
+    del sqr
+
+@toffee_test.testcase
+async def test_jalr_chk_3_2_1(predchecker_env):
+    sqr = pred_checker_sqr()
+    vec_pkt = sqr.gen_vec(PREDICT_WIDTH, TEST_CYCLE, 33)
+    for i in range(TEST_CYCLE):
+        #print(*vec_pkt[i])
+        res = await predchecker_env.predCheckerAgent.agent_pred_check(*vec_pkt[i])
+    del sqr
+
+@toffee_test.testcase
+async def test_jalr_chk_3_2_2(predchecker_env):
+    sqr = pred_checker_sqr()
+    vec_pkt = sqr.gen_vec(PREDICT_WIDTH, TEST_CYCLE, 34)
+    for i in range(TEST_CYCLE):
+        #print(*vec_pkt[i])
+        res = await predchecker_env.predCheckerAgent.agent_pred_check(*vec_pkt[i])
+    del sqr
+
+@toffee_test.testcase
+async def test_renew_range_4_1(predchecker_env):
+    print("Test 4.1: If prediction is correct, check instrRange")
+    sqr = pred_checker_sqr()
+    vec_pkt = sqr.gen_vec(PREDICT_WIDTH, TEST_CYCLE, 41)
+    for i in range(TEST_CYCLE):
+        #print(*vec_pkt[i])
+        res = await predchecker_env.predCheckerAgent.agent_pred_check(*vec_pkt[i])
+    del sqr
+
+@toffee_test.testcase  
+async def test_renew_range_4_2(predchecker_env):
+    print("Test 4.2: RET/JAL prediction fault, pds gave a narrower range")
+    sqr = pred_checker_sqr()
+    vec_pkt = sqr.gen_vec(PREDICT_WIDTH, TEST_CYCLE, 42)
+    for i in range(TEST_CYCLE):
+        #print(*vec_pkt[i])
+        res = await predchecker_env.predCheckerAgent.agent_pred_check(*vec_pkt[i])
+    del sqr
+    
+@toffee_test.testcase
+async def test_renew_range_4_3(predchecker_env):
+    print("Test 4.3: No-CFI/Invalid prediction, fixing range to the first CFI instruction")
+    sqr = pred_checker_sqr()
+    vec_pkt = sqr.gen_vec(PREDICT_WIDTH, TEST_CYCLE, 43)
+    for i in range(TEST_CYCLE):
+        #print(*vec_pkt[i])
+        res = await predchecker_env.predCheckerAgent.agent_pred_check(*vec_pkt[i])
+    del sqr
+
+
+@toffee_test.testcase
+async def test_not_cfi_chk_5_1_1(predchecker_env):
+    print("Test case 5.1.1: Input do not exist CFI and FTQ hasn't given a jump prediction, check pred_checker report")
+    sqr = pred_checker_sqr()
+    vec_pkt = sqr.gen_vec(PREDICT_WIDTH, TEST_CYCLE, 51)
+    for i in range(TEST_CYCLE):
+        #print(*vec_pkt[i])
+        res = await predchecker_env.predCheckerAgent.agent_pred_check(*vec_pkt[i])
+    del sqr
+    
+@toffee_test.testcase
+async def test_not_cfi_chk_5_1_2(predchecker_env):
+    print("Test case 5.1.2: Input a valid CFI and FTQ gave a correct jump prediction, check pred_checker report")
+    sqr = pred_checker_sqr()
+    vec_pkt = sqr.gen_vec(PREDICT_WIDTH, TEST_CYCLE, 52)
+    for i in range(TEST_CYCLE):
+        #print(*vec_pkt[i])
+        res = await predchecker_env.predCheckerAgent.agent_pred_check(*vec_pkt[i])
+    del sqr
+
+@toffee_test.testcase
+async def test_not_cfi_chk_5_2(predchecker_env):
+    print("Test case 5.2: Input no-exist CFI but FTQ gave a jump prediction, check pred_checker report")
+    sqr = pred_checker_sqr()
+    vec_pkt = sqr.gen_vec(PREDICT_WIDTH, TEST_CYCLE, 53)
+    for i in range(TEST_CYCLE):
+        #print(*vec_pkt[i])
+        res = await predchecker_env.predCheckerAgent.agent_pred_check(*vec_pkt[i])
+    del sqr
+
+@toffee_test.testcase
+async def test_invalid_instr_chk_6_1_1(predchecker_env):
+    print("Test case 6.1.1, pds gave no jump instruction info and FTQ gave no jump prediction, check result")
+    sqr = pred_checker_sqr()
+    vec_pkt = sqr.gen_vec(PREDICT_WIDTH, TEST_CYCLE, 61)
+    for i in range(TEST_CYCLE):
+        #print(*vec_pkt[i])
+        res = await predchecker_env.predCheckerAgent.agent_pred_check(*vec_pkt[i])
+    del sqr
+    
+@toffee_test.testcase
+async def test_invalid_instr_chk_6_1_2(predchecker_env):
+    print("Test case 6.1.2: pds gave an invalid instruction and FTQ gave no jump prediction, check result")
+    sqr = pred_checker_sqr()
+    vec_pkt = sqr.gen_vec(PREDICT_WIDTH, TEST_CYCLE, 62)
+    for i in range(TEST_CYCLE):
+        #print(*vec_pkt[i])
+        res = await predchecker_env.predCheckerAgent.agent_pred_check(*vec_pkt[i])
+    del sqr
+    
+@toffee_test.testcase
+async def test_invalid_instr_chk_6_1_3(predchecker_env):
+    print("Test 6.1.3: pds gave a jump instruction and FTQ gave a corrcet prediction, check result")
+    sqr = pred_checker_sqr()
+    vec_pkt = sqr.gen_vec(PREDICT_WIDTH, TEST_CYCLE, 63)
+    for i in range(TEST_CYCLE):
+        #print(*vec_pkt[i])
+        res = await predchecker_env.predCheckerAgent.agent_pred_check(*vec_pkt[i])
+    del sqr
+
+@toffee_test.testcase
+async def test_invalid_instr_chk_6_2(predchecker_env):
+    print("Test 6.2, pds gave invalid instruction info but FTQ gave a jump prediction, check result")
+    sqr = pred_checker_sqr()
+    vec_pkt = sqr.gen_vec(PREDICT_WIDTH, TEST_CYCLE, 64)
+    for i in range(TEST_CYCLE):
+        #print(*vec_pkt[i])
+        res = await predchecker_env.predCheckerAgent.agent_pred_check(*vec_pkt[i])
+    del sqr
+
+@toffee_test.testcase
+async def test_tgt_chk_7_1_1(predchecker_env):
+    print("Test case 7.1.1, pds has no jumping instruction and FTQ gave no jumping prediction, check result")
+    sqr = pred_checker_sqr()
+    vec_pkt = sqr.gen_vec(PREDICT_WIDTH, TEST_CYCLE, 71)
+    for i in range(TEST_CYCLE):
+        #print(*vec_pkt[i])
+        res = await predchecker_env.predCheckerAgent.agent_pred_check(*vec_pkt[i])
+    del sqr
+    
+@toffee_test.testcase
+async def test_tgt_chk_7_1_2(predchecker_env):
+    print("Test case 7.1.2, pds gave a jumping info and FTQ prediction is corresponding with it, check result")
+    sqr = pred_checker_sqr()
+    vec_pkt = sqr.gen_vec(PREDICT_WIDTH, TEST_CYCLE, 72)
+    for i in range(TEST_CYCLE):
+        #print(*vec_pkt[i])
+        res = await predchecker_env.predCheckerAgent.agent_pred_check(*vec_pkt[i])
+    del sqr
+    
+@toffee_test.testcase
+async def test_tgt_chk_7_2(predchecker_env):
+    print("Test 7.2, pds has jumping info but FTQ has error jumping target, check result")
+    sqr = pred_checker_sqr()
+    vec_pkt = sqr.gen_vec(PREDICT_WIDTH, TEST_CYCLE, 73)
+    for i in range(TEST_CYCLE):
+        #print(*vec_pkt[i])
+        res = await predchecker_env.predCheckerAgent.agent_pred_check(*vec_pkt[i])
+    del sqr
+
+@toffee_test.testcase
+async def test_rand_tgt_8(predchecker_env):
+    print("Test 8, random pds info, check result")
+    sqr = pred_checker_sqr()
+    vec_pkt = sqr.gen_vec(PREDICT_WIDTH, TEST_CYCLE, 81)
+    vec_pkt.extend(sqr.gen_vec(PREDICT_WIDTH, TEST_CYCLE, 82))
+    vec_pkt.extend(sqr.gen_vec(PREDICT_WIDTH, TEST_CYCLE, 83))
+    for i in range(len(vec_pkt)):
+        #print(*vec_pkt[i])
+        res = await predchecker_env.predCheckerAgent.agent_pred_check(*vec_pkt[i])
+    del sqr
+    

ut_frontend/itlb/toffee_version/agent/itlb_agent.py

@@ -0,0 +1,363 @@
+from toffee.agent import *
+from ..bundle import TlbBundle
+from .itlb_trans import *
+from toffee import Executor
+from typing import List
+
+class ItlbAgent(Agent):
+    def __init__(self, bundle: TlbBundle):
+        super().__init__(bundle)
+        self.bundle = bundle
+        self.drvReq0Flg     =   False
+        self.drvReq1Flg     =   False
+        self.drvReq2Flg     =   False
+        
+    # drive signals into dut: Sfence signals
+    async def drvSfence(self, cycles, sfenceBits, trSfence:ItlbTransSfence):
+        print("drv sfence")
+        for i in range(cycles):
+            sfenceBits._rs1.value                             =       trSfence.sfenceBitsRs1[i]
+            sfenceBits._rs2.value                             =       trSfence.sfenceBitsRs2[i]
+            sfenceBits._addr.value                            =       trSfence.sfenceBitsAddr[i]
+            sfenceBits._id.value                              =       trSfence.sfenceBitsId[i]
+            sfenceBits._flushPipe.value                       =       trSfence.sfenceBitsFlushPipe[i]
+            sfenceBits._hv.value                              =       trSfence.sfenceBitsHv[i]
+            sfenceBits._hg.value                              =       trSfence.sfenceBitsHg[i]
+            await self.bundle.step()
+    
+    # drive signals into dut: flush pip        
+    async def drvFlsPip(self, cycles, flushPipe, trFlsPip:ItlbTransFlsPipe):
+     for i in range(cycles):
+         #print("trDrvFls")
+         flushPipe._0.value                                =       trFlsPip.flushPipe0[i]
+         flushPipe._1.value                                =       trFlsPip.flushPipe1[i]
+         flushPipe._2.value                                =       trFlsPip.flushPipe2[i]
+         await self.bundle.step()
+        
+    # drive signals into dut: Csr signals
+    def drvCsr(self, idx):
+        csr         =   self.bundle.io._csr
+        csr._satp._mode.value                             =       self.trCsr.csrSatpMode[idx]
+        csr._satp._asid.value                             =       self.trCsr.csrSatpAsid[idx]
+        csr._satp._changed.value                          =       self.trCsr.csrSatpChanged[idx]
+        csr._vsatp._mode.value                            =       self.trCsr.csrVsatpMode[idx]
+        csr._vsatp._asid.value                            =       self.trCsr.csrVsatpAsid[idx]
+        csr._vsatp._changed.value                         =       self.trCsr.csrVsatpChanged[idx]
+        csr._hgatp._mode.value                            =       self.trCsr.csrHgatpMode[idx]
+        csr._hgatp._vmid.value                            =       self.trCsr.csrHgatpVmid[idx]
+        csr._hgatp._changed.value                         =       self.trCsr.csrHgatpChanged[idx]
+        csr._priv._virt.value                             =       self.trCsr.csrPrivVirt[idx]
+        csr._priv._virt.value                             =       self.trCsr.csrPrivImode[idx]
+        #await self.bundle.step()
+            
+    # drive signals: Requestor 0 or 1
+    async def drvRequestor0(self, cycles, requestor, trReq:ItlbTransRqstReq): 
+        print("drvRequestor0")
+        for i in range(cycles + 1):
+            if(trReq.requestorReqBitsVaddr[i] != 0):
+                print(f"i = {i}")
+                print(f"Vaddr = {trReq.requestorReqBitsVaddr[i]}")
+                requestor._req._valid.value                      =       True
+                requestor._req._bits_vaddr.value                 =       trReq.requestorReqBitsVaddr[i]
+            else:
+                requestor._req._valid.value                      =       False
+            self.drvCsr(i)
+            await self.bundle.step()
+        requestor._req._valid.value                      =       False
+        self.drvReq0Flg =   True
+    
+    # drive signals: Requestor 0 or 1
+    async def drvRequestor1(self, cycles, requestor, trReq:ItlbTransRqstReq): 
+        print("drvRequestor1")        
+        while(not self.drvReq0Flg):
+            await self.bundle.step()
+        for i in range(cycles + 1):
+            if(trReq.requestorReqBitsVaddr[i] != 0):
+                requestor._req._valid.value                      =       True
+                print(f"i = {i}")
+                print(f"Vaddr = {trReq.requestorReqBitsVaddr[i]}")
+                requestor._req._bits_vaddr.value                 =       trReq.requestorReqBitsVaddr[i]
+            else:
+                requestor._req._valid.value                      =       False
+            self.drvCsr(i)
+            await self.bundle.step()
+        requestor._req._valid.value                      =       False
+        self.drvReq1Flg =   True
+    
+    # drive signals: requestor 2
+    async def drvRequestor2(self, cycles, requestor, trReq:ItlbTransRqstReq):
+        print("drvRequestor2")
+        waitCycle = 0
+        while(not self.drvReq1Flg):
+            await self.bundle.step()
+            print("drvReq1Flg is False")
+        for i in range(cycles + 1):
+            requestor._req._valid.value                =        False
+            while(not requestor._req._ready.value):
+                requestor._req._valid.value                    =   False
+                print(f"rqst2 blocked and waited {waitCycle} cycles")
+                waitCycle += 1
+                await self.bundle.step()
+            # drive signals into dut: Requestor 2
+            if(trReq.requestorReqBitsVaddr[i] != 0):
+                print(f"i = {i}")
+                print(f"Vaddr = {trReq.requestorReqBitsVaddr[i]}")
+                requestor._req._valid.value                     =    True
+                requestor._req._bits_vaddr.value                =    trReq.requestorReqBitsVaddr[i]
+            else:
+                requestor._req._valid.value                     =    False
+            self.drvCsr(i)
+            await self.bundle.step()
+        requestor._req._valid.value     =   False
+        self.drvReq2Flg =   False
+    
+    async def drvPtwResp(self, cycles, ptwResp, trPtwResp:ItlbTransPtwResp):
+        for i in range(cycles):
+            #print("trDrvPtwResp")
+            ptwResp._valid.value                              =       True
+            ptwResp._bits._s2xlate.value                      =       trPtwResp.s2xlate[i]
+            ptwResp._bits._getGpa.value                       =       trPtwResp.getgpa[i]
+            ptwResp._bits._s1._entry._tag.value               =       trPtwResp.s1entrytag[i]
+            ptwResp._bits._s1._entry._asid.value              =       trPtwResp.s1entryasid[i]
+            ptwResp._bits._s1._entry._vmid.value              =       trPtwResp.s1entryvmid[i]
+            ptwResp._bits._s1._entry._n.value                 =       trPtwResp.s1entryn[i]
+            ptwResp._bits._s1._entry._pbmt.value              =       trPtwResp.s1entrypbmt[i]
+            ptwResp._bits._s1._entry._perm._d.value           =       trPtwResp.s1entrypermd[i]
+            ptwResp._bits._s1._entry._perm._a.value           =       trPtwResp.s1entryperma[i]
+            ptwResp._bits._s1._entry._perm._g.value           =       trPtwResp.s1entrypermg[i]
+            ptwResp._bits._s1._entry._perm._u.value           =       trPtwResp.s1entrypermu[i]
+            ptwResp._bits._s1._entry._perm._x.value           =       trPtwResp.s1entrypermx[i]
+            ptwResp._bits._s1._entry._perm._w.value           =       trPtwResp.s1entrypermw[i]
+            ptwResp._bits._s1._entry._perm._r.value           =       trPtwResp.s1entrypermr[i]
+            ptwResp._bits._s1._entry._level.value             =       trPtwResp.s1entrylevel[i]
+            ptwResp._bits._s1._entry._v.value                 =       trPtwResp.s1entryv[i]
+            ptwResp._bits._s1._entry._ppn.value               =       trPtwResp.s1entryppn[i]
+            ptwResp._bits._s1._addr_low.value                 =       trPtwResp.s1addrlow[i]
+            ptwResp._bits._s1._ppn_low._0.value               =       trPtwResp.s1ppnlow0[i]
+            ptwResp._bits._s1._ppn_low._1.value               =       trPtwResp.s1ppnlow1[i]
+            ptwResp._bits._s1._ppn_low._2.value               =       trPtwResp.s1ppnlow2[i]
+            ptwResp._bits._s1._ppn_low._3.value               =       trPtwResp.s1ppnlow3[i]
+            ptwResp._bits._s1._ppn_low._4.value               =       trPtwResp.s1ppnlow4[i]
+            ptwResp._bits._s1._ppn_low._5.value               =       trPtwResp.s1ppnlow5[i]
+            ptwResp._bits._s1._ppn_low._6.value               =       trPtwResp.s1ppnlow6[i]
+            ptwResp._bits._s1._ppn_low._7.value               =       trPtwResp.s1ppnlow7[i]
+            ptwResp._bits._s1._valididx._0.value              =       trPtwResp.s1valididx0[i]
+            ptwResp._bits._s1._valididx._1.value              =       trPtwResp.s1valididx1[i]
+            ptwResp._bits._s1._valididx._2.value              =       trPtwResp.s1valididx2[i]
+            ptwResp._bits._s1._valididx._3.value              =       trPtwResp.s1valididx3[i]
+            ptwResp._bits._s1._valididx._4.value              =       trPtwResp.s1valididx4[i]
+            ptwResp._bits._s1._valididx._5.value              =       trPtwResp.s1valididx5[i]
+            ptwResp._bits._s1._valididx._6.value              =       trPtwResp.s1valididx6[i]
+            ptwResp._bits._s1._valididx._7.value              =       trPtwResp.s1valididx7[i]
+            ptwResp._bits._s1._pteidx._0.value                =       trPtwResp.s1pteidx0[i]
+            ptwResp._bits._s1._pteidx._1.value                =       trPtwResp.s1pteidx1[i]
+            ptwResp._bits._s1._pteidx._2.value                =       trPtwResp.s1pteidx2[i]
+            ptwResp._bits._s1._pteidx._3.value                =       trPtwResp.s1pteidx3[i]
+            ptwResp._bits._s1._pteidx._4.value                =       trPtwResp.s1pteidx4[i]
+            ptwResp._bits._s1._pteidx._5.value                =       trPtwResp.s1pteidx5[i]
+            ptwResp._bits._s1._pteidx._6.value                =       trPtwResp.s1pteidx6[i]
+            ptwResp._bits._s1._pteidx._7.value                =       trPtwResp.s1pteidx7[i]
+            ptwResp._bits._s1._pf.value                       =       trPtwResp.s1pf[i]
+            ptwResp._bits._s1._af.value                       =       trPtwResp.s1af[i]
+            await self.bundle.step()
+            ptwResp._bits._s2._entry._tag.value               =       trPtwResp.s2entrytag[i]
+            ptwResp._bits._s2._entry._vmid.value              =       trPtwResp.s2entryvmid[i]
+            ptwResp._bits._s2._entry._n.value                 =       trPtwResp.s2entryn[i]
+            ptwResp._bits._s2._entry._pbmt.value              =       trPtwResp.s2entrypbmt[i]
+            ptwResp._bits._s2._entry._ppn.value               =       trPtwResp.s2entryppn[i]
+            ptwResp._bits._s2._entry._perm._d.value           =       trPtwResp.s2entrypermd[i]
+            ptwResp._bits._s2._entry._perm._a.value           =       trPtwResp.s2entryperma[i]
+            ptwResp._bits._s2._entry._perm._g.value           =       trPtwResp.s2entrypermg[i]
+            ptwResp._bits._s2._entry._perm._u.value           =       trPtwResp.s2entrypermu[i]
+            ptwResp._bits._s2._entry._perm._x.value           =       trPtwResp.s2entrypermx[i]
+            ptwResp._bits._s2._entry._perm._w.value           =       trPtwResp.s2entrypermw[i]
+            ptwResp._bits._s2._entry._perm._r.value           =       trPtwResp.s2entrypermr[i]
+            ptwResp._bits._s2._entry._level.value             =       trPtwResp.s2entrylevel[i]
+            ptwResp._bits._s2._gpf.value                      =       trPtwResp.s2gpf[i]
+            ptwResp._bits._s2._gaf.value                      =       trPtwResp.s2gaf[i]
+            await self.bundle.step()
+        
+    # get signals: requestor 0 or 1
+    async def monReqestor0(self, requestor, trResp:ItlbTransRqstResp):
+        i = 0
+        while(True):
+            #print("trMonReq")
+            if(i < trResp.validPktLen):
+                trResp.requestorRespBitsPaddr[i]              =       requestor._resp_bits._paddr._0.value
+                trResp.requestorRespBitsGpaddr[i]             =       requestor._resp_bits._gpaddr._0.value
+                trResp.requestorRespBitsPbmt[i]               =       requestor._resp_bits._pbmt._0.value
+                trResp.requestorRespBitsMiss[i]               =       requestor._resp_bits._miss.value
+                trResp.requestorRespBitsIsForVSnonLeafPTE[i]  =       requestor._resp_bits._isForVSnonLeafPTE.value
+                trResp.requestorRespBitsExcpGpfInstr[i]       =       requestor._resp_bits._excp._0._gpf_instr.value
+                trResp.requestorRespBitsExcpPfInstr[i]        =       requestor._resp_bits._excp._0._pf_instr.value
+                trResp.requestorRespBitsExcpAfInstr[i]        =       requestor._resp_bits._excp._0._af_instr.value
+                i += 1
+            await self.bundle.step()
+    
+    # get signals: requestor 0 or 1
+    async def monReqestor1(self, requestor, trResp:ItlbTransRqstResp):
+        i = 0
+        while(True):
+            #print("trMonReq")
+            if(i < trResp.validPktLen):
+                trResp.requestorRespBitsPaddr[i]              =       requestor._resp_bits._paddr._0.value
+                trResp.requestorRespBitsGpaddr[i]             =       requestor._resp_bits._gpaddr._0.value
+                trResp.requestorRespBitsPbmt[i]               =       requestor._resp_bits._pbmt._0.value
+                trResp.requestorRespBitsMiss[i]               =       requestor._resp_bits._miss.value
+                trResp.requestorRespBitsIsForVSnonLeafPTE[i]  =       requestor._resp_bits._isForVSnonLeafPTE.value
+                trResp.requestorRespBitsExcpGpfInstr[i]       =       requestor._resp_bits._excp._0._gpf_instr.value
+                trResp.requestorRespBitsExcpPfInstr[i]        =       requestor._resp_bits._excp._0._pf_instr.value
+                trResp.requestorRespBitsExcpAfInstr[i]        =       requestor._resp_bits._excp._0._af_instr.value
+                i += 1
+            await self.bundle.step()
+    
+    
+    async def monRequestor2(self, requestor, trResp:ItlbTransRqstResp):
+        i = 0
+        while(True):
+            #print("trMonReq2")
+            requestor._resp._ready.value              =    True
+            while(not requestor._resp._valid.value):
+                await self.bundle.step()
+            if(i < trResp.validPktLen):
+                trResp.requestorRespBitsPaddr[i]             =    requestor._resp._bits._paddr._0.value
+                trResp.requestorRespBitsGpaddr[i]            =    requestor._resp._bits._gpaddr._0.value
+                trResp.requestorRespBitsPbmt[i]              =    requestor._resp._bits._pbmt._0.value
+                trResp.requestorRespBitsIsForVSnonLeafPTE[i] =    requestor._resp._bits._isForVSnonLeafPTE.value
+                trResp.requestorRespBitsExcpGpfInstr[i]      =    requestor._resp._bits._excp._0._gpf_instr.value
+                trResp.requestorRespBitsExcpPfInstr[i]       =    requestor._resp._bits._excp._0._pf_instr.value
+                trResp.requestorRespBitsExcpAfInstr[i]       =    requestor._resp._bits._excp._0._af_instr.value
+                i += 1
+            await self.bundle.step()
+    
+    async def monPtwReq0(self, ptwReq, trPtwReq:ItlbTransPtwReq):
+        i = 0
+        while(True):
+            #print("trMonPtwReq")
+            while(not ptwReq._valid.value):
+                await self.bundle.step()
+            if(i < trPtwReq.validPktLen):
+                trPtwReq.reqBitsVpn[i]                         =       ptwReq._bits._vpn.value   
+                trPtwReq.reqBitsGetGpa[i]                      =       ptwReq._bits._getGpa.value
+                trPtwReq.reqBitsS2Xlate[i]                     =       ptwReq._bits._s2xlate.value
+                i += 1
+            await self.bundle.step()
+    
+    async def monPtwReq1(self, ptwReq, trPtwReq:ItlbTransPtwReq):
+        i = 0
+        while(True):
+            #print("trMonPtwReq")
+            while(not ptwReq._valid.value):
+                await self.bundle.step()
+            if(i < trPtwReq.validPktLen):
+                trPtwReq.reqBitsVpn[i]                         =       ptwReq._bits._vpn.value   
+                trPtwReq.reqBitsGetGpa[i]                      =       ptwReq._bits._getGpa.value
+                trPtwReq.reqBitsS2Xlate[i]                     =       ptwReq._bits._s2xlate.value
+                i += 1
+            await self.bundle.step()
+    
+    async def monPtwReq2(self, ptwReq, trPtwReq:ItlbTransPtwReq):
+        i = 0
+        while(True):
+            #print("trMonPtwReq2")
+            ptwReq._ready.value                         =       True
+            while(not ptwReq._valid.value):
+                await self.bundle.step()
+            if(i < trPtwReq.validPktLen):
+                trPtwReq.reqBitsVpn[i]                         =       ptwReq._bits._vpn.value   
+                trPtwReq.reqBitsGetGpa[i]                      =       ptwReq._bits._getGpa.value
+                trPtwReq.reqBitsS2Xlate[i]                     =       ptwReq._bits._s2xlate.value
+            i += 1
+            await self.bundle.step()
+        
+        
+    async def delayCycle(self, cycles):
+        print(f"Test clock cycles: {cycles}")
+        await self.bundle.step(cycles)
+     
+#    # driving signals with limited cycles
+#    async def drv_lim_cycle(self, cycles, sfenceBits, csr, requestor0, requestor1, requestor2, flushPipe, ptwResp,
+#        trSfence: ItlbTransSfence,
+#        trCsr: ItlbTransCsr,
+#        trRqstReq0: ItlbTransRqstReq, trRqstReq1: ItlbTransRqstReq, trRqstReq2: ItlbTransRqstReq,
+#        trFlsPip: ItlbTransFlsPipe,
+#        trPtwResp: ItlbTransPtwResp
+#        ):
+#        async with Executor(exit="any") as exec:
+#            exec(self.drv_blocked(cycles, requestor2, ptwResp, trRqstReq2, ptwResp, trPtwResp))
+#            exec(self.delayCycle(4*cycles))
+#    
+#    # driving signals with some blocking calls
+#    async def drv_blocked(self, cycles, requestor2, ptwResp,
+#        trRqstReq2: ItlbTransRqstReq,
+#        trPtwResp: ItlbTransPtwResp
+#        ):
+#        async with Executor(exit="all") as exec:
+#            exec(self.drvRequestor2(cycles, requestor2, trRqstReq2))
+#            exec(self.drvPtwResp(cycles, ptwResp, trPtwResp))
+#    
+    # agent top func
+    async def agent_itlb(self, cycles,
+        trSfence: ItlbTransSfence,
+        trCsr: ItlbTransCsr,
+        trRqstReq0: ItlbTransRqstReq, trRqstReq1: ItlbTransRqstReq, trRqstReq2: ItlbTransRqstReq,
+        trRqstResp0: ItlbTransRqstResp, trRqstResp1: ItlbTransRqstResp, trRqstResp2: ItlbTransRqstResp,
+        trFlsPip: ItlbTransFlsPipe,
+        trPtwReq0: ItlbTransPtwReq, trPtwReq1: ItlbTransPtwReq, trPtwReq2: ItlbTransPtwReq,
+        trPtwResp: ItlbTransPtwResp
+        ):
+        self.cycles =   cycles
+        
+        ## bundle abbr
+        # sfence
+        sfenceBits  =   self.bundle.io._sfence._bits
+        # csr
+        csr         =   self.bundle.io._csr
+        # requestor
+        requestor0  =   self.bundle.io._requestor._0
+        requestor1  =   self.bundle.io._requestor._1
+        requestor2  =   self.bundle.io._requestor._2
+        # flushPipe
+        flushPipe  =   self.bundle.io._flushPipe
+        # ptw request
+        ptwReq0     =   self.bundle.io._ptw._req._0
+        ptwReq1     =   self.bundle.io._ptw._req._1
+        ptwReq2     =   self.bundle.io._ptw._req._2
+        # ptw respond
+        ptwResp     =   self.bundle.io._ptw._resp
+        
+        self.trCsr  =   trCsr
+        
+        # reset
+        await self.bundle.step(1)
+        self.bundle.reset.value = 1
+        await self.bundle.step(2)
+        self.bundle.reset.value = 0
+        await self.bundle.step(8)
+        
+        async with Executor(exit="none") as exec:
+#            exec(self.drv_lim_cycle(cycles,
+#            sfenceBits,csr,requestor0,requestor1,requestor2,flushPipe,ptwResp,
+#            trSfence,
+#            trCsr,
+#            trRqstReq0,
+#            trRqstReq1,
+#            trRqstReq2,
+#            trFlsPip,
+#            trPtwResp
+#            ))
+            exec(self.drvSfence(cycles, sfenceBits, trSfence))
+            exec(self.drvRequestor0(cycles, requestor0, trRqstReq0))
+            exec(self.drvRequestor1(cycles, requestor1, trRqstReq1))
+            exec(self.drvRequestor2(cycles, requestor2, trRqstReq1))
+            exec(self.drvFlsPip(cycles, flushPipe, trFlsPip))
+            exec(self.drvPtwResp(cycles, ptwResp, trPtwResp))
+            exec(self.monReqestor0(requestor0, trRqstResp0))
+            exec(self.monReqestor1(requestor1, trRqstResp1))
+            exec(self.monRequestor2(requestor2, trRqstResp2))
+            exec(self.monPtwReq0(ptwReq0, trPtwReq0))
+            exec(self.monPtwReq1(ptwReq1, trPtwReq1))
+            exec(self.monPtwReq2(ptwReq2, trPtwReq2))
+        await self.bundle.step(4*cycles)
+        
+        return 0

ut_frontend/itlb/toffee_version/agent/itlb_trans.py

@@ -0,0 +1,133 @@
+class baseTr():
+    def __init__(self):
+        self.startIdx       =   0
+        self.validPktLen    =   0
+
+# Trans packet for tlb
+class ItlbTransSfence(baseTr):
+    def __init__(self, pktLen):
+        super().__init__()
+        self.validPktLen    =   pktLen
+        self.sfenceBitsRs1 = [0] * pktLen
+        self.sfenceBitsRs2 = [0] * pktLen
+        self.sfenceBitsAddr = [0] * pktLen
+        self.sfenceBitsId = [0] * pktLen 
+        self.sfenceBitsFlushPipe = [0] * pktLen
+        self.sfenceBitsHv = [0] * pktLen
+        self.sfenceBitsHg = [0] * pktLen
+
+class ItlbTransCsr(baseTr):
+    def __init__(self, pktLen):
+        super().__init__()
+        self.validPktLen    =   pktLen
+        self.csrSatpMode = [0] * pktLen
+        self.csrSatpAsid = [0] * pktLen
+        self.csrSatpChanged = [0] * pktLen
+        self.csrVsatpMode = [0] * pktLen
+        self.csrVsatpAsid = [0] * pktLen
+        self.csrVsatpChanged = [0] * pktLen
+        self.csrHgatpMode = [0] * pktLen
+        self.csrHgatpVmid = [0] * pktLen
+        self.csrHgatpChanged = [0] * pktLen
+        self.csrPrivVirt = [0] * pktLen
+        self.csrPrivImode = [0] * pktLen
+
+class ItlbTransRqstReq(baseTr):
+    def __init__(self, pktLen):
+        super().__init__()
+        self.validPktLen    =   pktLen
+        self.requestorReqBitsVaddr = [0] * pktLen
+
+class ItlbTransRqstResp(baseTr):
+    def __init__(self, pktLen):
+        super().__init__()
+        self.validPktLen    =   pktLen
+        self.requestorRespBitsPaddr             =   [0] * pktLen
+        self.requestorRespBitsGpaddr            =   [0] * pktLen
+        self.requestorRespBitsPbmt              =   [0] * pktLen
+        self.requestorRespBitsMiss              =   [0] * pktLen
+        self.requestorRespBitsIsForVSnonLeafPTE =   [0] * pktLen
+        self.requestorRespBitsExcpGpfInstr      =   [0] * pktLen
+        self.requestorRespBitsExcpPfInstr       =   [0] * pktLen
+        self.requestorRespBitsExcpAfInstr       =   [0] * pktLen
+
+class ItlbTransFlsPipe(baseTr):
+    def __init__(self, pktLen):
+        super().__init__()
+        self.validPktLen    =   pktLen
+        self.flushPipe0 = [0] * pktLen
+        self.flushPipe1 = [0] * pktLen
+        self.flushPipe2 = [0] * pktLen
+        
+class ItlbTransPtwReq(baseTr):
+    def __init__(self, pktLen):
+        super().__init__()
+        self.validPktLen    =   pktLen
+        self.reqBitsVpn             =   [0] * pktLen
+        self.reqBitsS2Xlate         =   [0] * pktLen
+        self.reqBitsGetGpa          =   [0] * pktLen
+        
+class ItlbTransPtwResp(baseTr):
+    def __init__(self, pktLen):
+        super().__init__()
+        self.validPktLen    =   pktLen
+        self.s2xlate         =   [0] * pktLen
+        self.s1entrytag      =   [0] * pktLen
+        self.s1entryasid     =   [0] * pktLen
+        self.s1entryvmid     =   [0] * pktLen
+        self.s1entryn        =   [0] * pktLen
+        self.s1entrypbmt     =   [0] * pktLen
+        self.s1entrypermd    =   [0] * pktLen
+        self.s1entryperma    =   [0] * pktLen
+        self.s1entrypermg    =   [0] * pktLen
+        self.s1entrypermu    =   [0] * pktLen
+        self.s1entrypermx    =   [0] * pktLen
+        self.s1entrypermw    =   [0] * pktLen
+        self.s1entrypermr    =   [0] * pktLen
+        self.s1entrylevel    =   [0] * pktLen
+        self.s1entryv        =   [0] * pktLen
+        self.s1entryppn      =   [0] * pktLen
+        self.s1addrlow       =   [0] * pktLen
+        self.s1ppnlow0       =   [0] * pktLen
+        self.s1ppnlow1       =   [0] * pktLen
+        self.s1ppnlow2       =   [0] * pktLen
+        self.s1ppnlow3       =   [0] * pktLen
+        self.s1ppnlow4       =   [0] * pktLen
+        self.s1ppnlow5       =   [0] * pktLen
+        self.s1ppnlow6       =   [0] * pktLen
+        self.s1ppnlow7       =   [0] * pktLen
+        self.s1valididx0     =   [0] * pktLen
+        self.s1valididx1     =   [0] * pktLen
+        self.s1valididx2     =   [0] * pktLen
+        self.s1valididx3     =   [0] * pktLen
+        self.s1valididx4     =   [0] * pktLen
+        self.s1valididx5     =   [0] * pktLen
+        self.s1valididx6     =   [0] * pktLen
+        self.s1valididx7     =   [0] * pktLen
+        self.s1pteidx0       =   [0] * pktLen
+        self.s1pteidx1       =   [0] * pktLen
+        self.s1pteidx2       =   [0] * pktLen
+        self.s1pteidx3       =   [0] * pktLen
+        self.s1pteidx4       =   [0] * pktLen
+        self.s1pteidx5       =   [0] * pktLen
+        self.s1pteidx6       =   [0] * pktLen
+        self.s1pteidx7       =   [0] * pktLen
+        self.s1pf            =   [0] * pktLen
+        self.s1af            =   [0] * pktLen
+        self.s2entrytag      =   [0] * pktLen
+        self.s2entryvmid     =   [0] * pktLen
+        self.s2entryn        =   [0] * pktLen
+        self.s2entrypbmt     =   [0] * pktLen
+        self.s2entryppn      =   [0] * pktLen
+        self.s2entrypermd    =   [0] * pktLen
+        self.s2entryperma    =   [0] * pktLen
+        self.s2entrypermg    =   [0] * pktLen
+        self.s2entrypermu    =   [0] * pktLen
+        self.s2entrypermx    =   [0] * pktLen
+        self.s2entrypermw    =   [0] * pktLen
+        self.s2entrypermr    =   [0] * pktLen
+        self.s2entrylevel    =   [0] * pktLen
+        self.s2gpf           =   [0] * pktLen
+        self.s2gaf           =   [0] * pktLen
+        self.getgpa          =   [0] * pktLen
+

ut_frontend/itlb/toffee_version/bundle/__init__.py

@@ -0,0 +1 @@
+from .auto_bundle import TlbBundle

ut_frontend/itlb/toffee_version/bundle/auto_bundle.py

@@ -0,0 +1,137 @@
+from toffee import Bundle, Signals, Signal
+
+class _0Bundle(Bundle):
+	_vmid, _changed, _mode = Signals(3)
+
+class _1Bundle(Bundle):
+	_imode, _virt = Signals(2)
+
+class _2Bundle(Bundle):
+	_changed, _mode, _asid = Signals(3)
+
+class _3Bundle(Bundle):
+	_priv = _1Bundle.from_prefix("_priv")
+	_vsatp = _2Bundle.from_prefix("_vsatp")
+	_satp = _2Bundle.from_prefix("_satp")
+	_hgatp = _0Bundle.from_prefix("_hgatp")
+
+class _4Bundle(Bundle):
+	_1, _2, _0 = Signals(3)
+
+class _5Bundle(Bundle):
+	_getGpa, _vpn, _s2xlate = Signals(3)
+
+class _6Bundle(Bundle):
+	_bits = _5Bundle.from_prefix("_bits")
+	_valid = Signal()
+
+class _7Bundle(Bundle):
+	_bits = _5Bundle.from_prefix("_bits")
+	_valid, _ready = Signals(2)
+
+class _8Bundle(Bundle):
+	_2 = _7Bundle.from_prefix("_2")
+	_1 = _6Bundle.from_prefix("_1")
+	_0 = _6Bundle.from_prefix("_0")
+
+class _9Bundle(Bundle):
+	_g, _r, _w, _a, _u, _d, _x = Signals(7)
+
+class _10Bundle(Bundle):
+	_perm = _9Bundle.from_prefix("_perm")
+	_level, _tag, _pbmt, _v, _vmid, _asid, _ppn, _n = Signals(8)
+
+class _11Bundle(Bundle):
+	_6, _4, _3, _0, _1, _7, _2, _5 = Signals(8)
+
+class _12Bundle(Bundle):
+	_valididx = _11Bundle.from_prefix("_valididx")
+	_ppn_low = _11Bundle.from_prefix("_ppn_low")
+	_pteidx = _11Bundle.from_prefix("_pteidx")
+	_entry = _10Bundle.from_prefix("_entry")
+	_af, _addr_low, _pf = Signals(3)
+
+class _13Bundle(Bundle):
+	_perm = _9Bundle.from_prefix("_perm")
+	_level, _tag, _pbmt, _vmid, _ppn, _n = Signals(6)
+
+class _14Bundle(Bundle):
+	_entry = _13Bundle.from_prefix("_entry")
+	_gpf, _gaf = Signals(2)
+
+class _15Bundle(Bundle):
+	_s1 = _12Bundle.from_prefix("_s1")
+	_s2 = _14Bundle.from_prefix("_s2")
+	_getGpa, _s2xlate = Signals(2)
+
+class _16Bundle(Bundle):
+	_bits = _15Bundle.from_prefix("_bits")
+	_valid = Signal()
+
+class _17Bundle(Bundle):
+	_req = _8Bundle.from_prefix("_req")
+	_resp = _16Bundle.from_prefix("_resp")
+
+class _18Bundle(Bundle):
+	_valid, _bits_vaddr = Signals(2)
+
+class _19Bundle(Bundle):
+	_af_instr, _pf_instr, _gpf_instr = Signals(3)
+
+class _20Bundle(Bundle):
+	_0 = _19Bundle.from_prefix("_0")
+
+class _21Bundle(Bundle):
+	_0 = Signal()
+
+class _22Bundle(Bundle):
+	_gpaddr = _21Bundle.from_prefix("_gpaddr")
+	_pbmt = _21Bundle.from_prefix("_pbmt")
+	_paddr = _21Bundle.from_prefix("_paddr")
+	_excp = _20Bundle.from_prefix("_excp")
+	_miss, _isForVSnonLeafPTE = Signals(2)
+
+class _23Bundle(Bundle):
+	_resp_bits = _22Bundle.from_prefix("_resp_bits")
+	_req = _18Bundle.from_prefix("_req")
+
+class _24Bundle(Bundle):
+	_valid, _bits_vaddr, _ready = Signals(3)
+
+class _25Bundle(Bundle):
+	_gpaddr = _21Bundle.from_prefix("_gpaddr")
+	_pbmt = _21Bundle.from_prefix("_pbmt")
+	_paddr = _21Bundle.from_prefix("_paddr")
+	_excp = _20Bundle.from_prefix("_excp")
+	_isForVSnonLeafPTE = Signal()
+
+class _26Bundle(Bundle):
+	_bits = _25Bundle.from_prefix("_bits")
+	_valid, _ready = Signals(2)
+
+class _27Bundle(Bundle):
+	_resp = _26Bundle.from_prefix("_resp")
+	_req = _24Bundle.from_prefix("_req")
+
+class _28Bundle(Bundle):
+	_0 = _23Bundle.from_prefix("_0")
+	_1 = _23Bundle.from_prefix("_1")
+	_2 = _27Bundle.from_prefix("_2")
+
+class _29Bundle(Bundle):
+	_rs2, _rs1, _hg, _flushPipe, _hv, _addr, _id = Signals(7)
+
+class _30Bundle(Bundle):
+	_bits = _29Bundle.from_prefix("_bits")
+	_valid = Signal()
+
+class _31Bundle(Bundle):
+	_flushPipe = _4Bundle.from_prefix("_flushPipe")
+	_sfence = _30Bundle.from_prefix("_sfence")
+	_csr = _3Bundle.from_prefix("_csr")
+	_ptw = _17Bundle.from_prefix("_ptw")
+	_requestor = _28Bundle.from_prefix("_requestor")
+
+class TlbBundle(Bundle):
+	clock, reset = Signals(2)
+	io = _31Bundle.from_prefix("io")

ut_frontend/itlb/toffee_version/env/__init__.py

@@ -0,0 +1,11 @@
+from toffee import Env
+from ..agent import itlb_agent
+from ..bundle import TlbBundle
+from dut.TLB import DUTTLB
+from .itlb_mdl import *
+
+class ItlbEnv(Env):
+    def __init__(self, dut:DUTTLB):
+        super().__init__()
+        self.itlbAgent = itlb_agent.ItlbAgent(TlbBundle.from_prefix("").bind(dut))
+        

ut_frontend/itlb/toffee_version/env/itlb_sqr.py

@@ -0,0 +1,114 @@
+from ..agent.itlb_trans import *
+import random
+
+class ItlbSqr:
+    def __init__(self, pktLen):
+        self.pktLen = pktLen
+        self.trSfence    =   ItlbTransSfence(2*self.pktLen)
+        self.trCsr       =   ItlbTransCsr(2*self.pktLen)
+        self.trRqstReq0  =   ItlbTransRqstReq(2*self.pktLen) 
+        self.trRqstReq1  =   ItlbTransRqstReq(2*self.pktLen) 
+        self.trRqstReq2  =   ItlbTransRqstReq(2*self.pktLen) 
+        self.trRqstResp0 =   ItlbTransRqstResp(2*self.pktLen)
+        self.trRqstResp1 =   ItlbTransRqstResp(2*self.pktLen)  
+        self.trRqstResp2 =   ItlbTransRqstResp(2*self.pktLen)  
+        self.trFlsPip    =   ItlbTransFlsPipe(2*self.pktLen)
+        self.trPtwReq0   =   ItlbTransPtwReq(2*self.pktLen)
+        self.trPtwReq1   =   ItlbTransPtwReq(2*self.pktLen)
+        self.trPtwReq2   =   ItlbTransPtwReq(2*self.pktLen)
+        self.trPtwResp   =   ItlbTransPtwResp(2*self.pktLen)
+    
+    def gen_vec(self, caseTag):
+        if(caseTag == 0):
+            pass
+        elif caseTag == "caseAcptRqst":
+            for i in range(1, self.pktLen + 1):
+                self.trRqstReq0.requestorReqBitsVaddr[i] = random.randint(0, 2**50 - 1)
+                self.trRqstReq1.requestorReqBitsVaddr[i] = random.randint(0, 2**50 - 1)
+                self.trRqstReq2.requestorReqBitsVaddr[i] = random.randint(0, 2**50 - 1)
+            for i in range(self.pktLen):
+                self.trCsr.csrSatpMode[i] = 9
+                self.trCsr.csrSatpAsid[i] = 1
+        else:
+            print("Case Tag does not exist!")
+        
+        return self.trSfence, self.trCsr, self.trRqstReq0, self.trRqstReq1, self.trRqstReq2, self.trRqstResp0, self.trRqstResp1, self.trRqstResp2, self.trFlsPip, self.trPtwReq0, self.trPtwReq1, self.trPtwReq2, self.trPtwResp
+    
+    def __set_resp(self):
+        for i in range(self.pktLen):
+            self.trPtwResp.s1entryasid[i] = self.trcsr.csrSatpAsid[i]
+            self.trPtwResp.s1entryvmid[i] = 0
+            self.trPtwResp.s1entrypermd[i] = 0
+            self.trPtwResp.s1entryperma[i] = random.choice(True, False)
+            self.trPtwResp.s1entrypermg[i] = random.choice(True, False)
+            self.trPtwResp.s1entrypermu[i] = random.choice(True, False)
+            self.trPtwResp.s1entrypermx[i] = random.choice(True, False)
+            self.trPtwResp.s1entrypermw[i] = random.choice(True, False)
+            self.trPtwResp.s1entrypermr[i] = random.choice(True, False)
+            self.trPtwResp.s1entrylevel[i] = 0
+            self.trPtwResp.s1entryppn[i] = random.randint(2*33 - 1)
+            self.trPtwResp.s1addrlow[i] = random.randint(2*3 - 1)
+            self.trPtwResp.s1ppnlow0[i] = random.randint(2*3 - 1)
+            self.trPtwResp.s1ppnlow1[i] = random.randint(2*3 - 1)
+            self.trPtwResp.s1ppnlow2[i] = random.randint(2*3 - 1)
+            self.trPtwResp.s1ppnlow3[i] = random.randint(2*3 - 1)
+            self.trPtwResp.s1ppnlow4[i] = random.randint(2*3 - 1)
+            self.trPtwResp.s1ppnlow5[i] = random.randint(2*3 - 1)
+            self.trPtwResp.s1ppnlow6[i] = random.randint(2*3 - 1)
+            self.trPtwResp.s1ppnlow7[i] = random.randint(2*3 - 1)
+            self.trPtwResp.s1valididx0[i] = 0
+            self.trPtwResp.s1valididx1[i] = 0
+            self.trPtwResp.s1valididx2[i] = 0
+            self.trPtwResp.s1valididx3[i] = 0
+            self.trPtwResp.s1valididx4[i] = 0
+            self.trPtwResp.s1valididx5[i] = 0
+            self.trPtwResp.s1valididx6[i] = 0
+            self.trPtwResp.s1valididx7[i] = 0
+            self.trPtwResp.s1pteidx0[i] = 0
+            self.trPtwResp.s1pteidx1[i] = 0
+            self.trPtwResp.s1pteidx2[i] = 0
+            self.trPtwResp.s1pteidx3[i] = 0
+            self.trPtwResp.s1pteidx4[i] = 0
+            self.trPtwResp.s1pteidx5[i] = 0
+            self.trPtwResp.s1pteidx6[i] = 0
+            self.trPtwResp.s1pteidx7[i] = 0
+            self.trPtwResp.s1pf[i] = 0
+            self.trPtwResp.s1af[i] = 0
+            self.trPtwResp.s2entrytag[i] = 0
+            self.trPtwResp.s2entryvmid[i] = 0
+            self.trPtwResp.s2entryn[i] = 0
+            self.trPtwResp.s2entrypbmt[i] = 0
+            self.trPtwResp.s2entryppn[i] = 0
+            self.trPtwResp.s2entrypermd[i] = 0
+            self.trPtwResp.s2entryperma[i] = 0
+            self.trPtwResp.s2entrypermg[i] = 0
+            self.trPtwResp.s2entrypermu[i] = 0
+            self.trPtwResp.s2entrypermx[i] = 0
+            self.trPtwResp.s2entrypermw[i] = 0
+            self.trPtwResp.s2entrypermr[i] = 0
+            self.trPtwResp.s2entrylevel[i] = 0
+            self.trPtwResp.s2gpf[i] = 0
+            self.trPtwResp.s2gaf[i] = 0
+            self.trPtwResp.getgpa[i] = 0
+            
+            
+            
+            
+        
+    def __del__(self):
+        pass
+        #for i in range(self.pktLen):
+        #    del self.trSfence[i]   
+        #    del self.trCsr[i]      
+        #    del self.trRqstReq0[i] 
+        #    del self.trRqstReq1[i] 
+        #    del self.trRqstReq2[i] 
+        #    del self.trRqstResp0[i]
+        #    del self.trRqstResp1[i]
+        #    del self.trRqstResp2[i]
+        #    del self.trFlsPip[i]   
+        #    del self.trPtwReq0[i]  
+        #    del self.trPtwReq1[i]  
+        #    del self.trPtwReq2[i]  
+        #    del self.trPtwResp[i]  
+    

ut_frontend/itlb/toffee_version/test/itlb_dut.py

@@ -0,0 +1,32 @@
+import toffee_test
+import toffee
+from operator import *
+from ..env import ItlbEnv
+from dut.TLB import DUTTLB
+import toffee.funcov as fc
+from comm.functions import UT_FCOV, module_name_with
+
+# module path is ut_frontend.ifu.itlb.toffee_version.test.itlb_dut.py
+#gr = fc.CovGroup(UT_FCOV("../../../../itlb"))
+
+
+
+@toffee_test.fixture
+async def itlb_env(toffee_request: toffee_test.ToffeeRequest):
+    toffee.setup_logging(toffee.WARNING)
+    dut = toffee_request.create_dut(DUTTLB)
+    dut.InitClock("clock")
+    toffee.start_clock(dut)
+    env = ItlbEnv(dut)
+    yield env
+    
+    import asyncio
+    cur_loop = asyncio.get_event_loop()
+    for task in asyncio.all_tasks(cur_loop):
+        if task.get_name() == "__clock_loop":
+            task.cancel()
+            try:
+                await task
+            except asyncio.CancelledError:
+                break
+            

ut_frontend/itlb/toffee_version/test/test_itlb_demo.py

@@ -0,0 +1,24 @@
+import toffee_test
+from dut.TLB import DUTTLB
+from .itlb_dut import itlb_env
+from ..agent.itlb_trans import *
+from ..env.itlb_sqr import *
+from toffee import *
+import os
+TEST_CYCLE = int(os.getenv("TEST_CYCLE", 100))
+
+#@toffee_test.testcase
+#async def test_reset(itlb_env):
+#    print("Test reset")
+#    sqr = ItlbSqr()
+#    res = await itlb_env.itlbAgent.agent_itlb(*sqr.gen_vec(0))
+#    del sqr
+    
+    
+@toffee_test.testcase
+async def test_tlb_acpt_rqst(itlb_env):
+    print("Test TLB accepted request")
+    res = []
+    sqr = ItlbSqr(TEST_CYCLE)
+    res= await itlb_env.itlbAgent.agent_itlb(TEST_CYCLE, *(sqr.gen_vec("caseAcptRqst")))
+    del sqr