forked from xuos/xiuos
261 lines
6.1 KiB
C
261 lines
6.1 KiB
C
/*
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* Copyright (c) 2020 AIIT XUOS Lab
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* XiUOS is licensed under Mulan PSL v2.
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* You can use this software according to the terms and conditions of the Mulan PSL v2.
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* You may obtain a copy of Mulan PSL v2 at:
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* http://license.coscl.org.cn/MulanPSL2
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* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
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* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
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* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
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* See the Mulan PSL v2 for more details.
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*/
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/**
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* @file board.c
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* @brief support xishutong-arm32-board init configure and start-up
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* @version 2.0
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* @author AIIT XUOS Lab
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* @date 2022-09-08
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*/
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/*************************************************
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File name: board.c
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Description: support xishutong-arm32-board init configure and driver/task/... init
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Others:
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History:
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1. Date: 2022-09-08
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Author: AIIT XUOS Lab
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Modification:
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1. support xishutong-arm32-board InitBoardHardware
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*************************************************/
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#include <board.h>
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#include <connect_usart.h>
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#include <hc32_ll.h>
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#include <xizi.h>
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#ifdef BSP_USING_GPIO
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#include <connect_gpio.h>
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#endif
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#ifdef BSP_USING_ADC
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#include <connect_adc.h>
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#endif
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#ifdef BSP_USING_DAC
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#include <connect_dac.h>
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#endif
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#ifdef BSP_USING_SDIO
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#include <connect_sdio.h>
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#endif
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#ifdef BSP_USING_SPI
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#include <connect_spi.h>
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#endif
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#ifdef BSP_USING_I2C
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#include <connect_i2c.h>
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#endif
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#ifdef BSP_USING_USB
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#include <connect_usb.h>
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#endif
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#ifdef BSP_USING_RTC
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#include <connect_rtc.h>
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#endif
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#ifdef BSP_USING_WDT
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#include <connect_wdt.h>
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#endif
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#ifdef BSP_USING_TIMER
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#include <connect_hwtimer.h>
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#endif
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#ifdef BSP_USING_CAN
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#include <connect_can.h>
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#endif
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#ifdef BSP_USING_LWIP
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#include <connect_ethernet.h>
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#endif
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#ifdef BSP_USING_EXTSDRAM
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#include <connect_sdram.h>
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#endif
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extern void entry(void);
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extern int HwUsartInit();
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/* Peripheral register WE/WP selection */
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#define LL_PERIPH_SEL (LL_PERIPH_GPIO | LL_PERIPH_FCG | LL_PERIPH_PWC_CLK_RMU | LL_PERIPH_EFM | LL_PERIPH_SRAM)
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void SystemClockConfig(void)
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{
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stc_clock_xtal_init_t stcXtalInit;
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stc_clock_pll_init_t stcPLLHInit;
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CLK_SetClockDiv(CLK_BUS_CLK_ALL,
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(CLK_PCLK0_DIV1 | CLK_PCLK1_DIV2 | CLK_PCLK2_DIV4 | CLK_PCLK3_DIV4 | CLK_PCLK4_DIV2 | CLK_EXCLK_DIV2 | CLK_HCLK_DIV1));
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(void)CLK_XtalStructInit(&stcXtalInit);
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/* Config Xtal and enable Xtal */
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stcXtalInit.u8Mode = CLK_XTAL_MD_OSC;
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stcXtalInit.u8Drv = CLK_XTAL_DRV_ULOW;
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stcXtalInit.u8State = CLK_XTAL_ON;
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stcXtalInit.u8StableTime = CLK_XTAL_STB_2MS;
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(void)CLK_XtalInit(&stcXtalInit);
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(void)CLK_PLLStructInit(&stcPLLHInit);
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stcPLLHInit.u8PLLState = CLK_PLL_ON;
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stcPLLHInit.PLLCFGR = 0UL;
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stcPLLHInit.PLLCFGR_f.PLLM = 1UL - 1UL;
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#ifdef BSP_USING_USB
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/* VCO = (8/1)*120 = 960MHz*/
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stcPLLHInit.PLLCFGR_f.PLLN = 120UL - 1UL;
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#else
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/* VCO = (8/1)*100 = 800MHz*/
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stcPLLHInit.PLLCFGR_f.PLLN = 100UL - 1UL;
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#endif
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stcPLLHInit.PLLCFGR_f.PLLP = 4UL - 1UL;
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stcPLLHInit.PLLCFGR_f.PLLQ = 4UL - 1UL;
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stcPLLHInit.PLLCFGR_f.PLLR = 4UL - 1UL;
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stcPLLHInit.PLLCFGR_f.PLLSRC = CLK_PLL_SRC_XTAL;
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(void)CLK_PLLInit(&stcPLLHInit);
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#ifdef BSP_USING_USB
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/* Highspeed SRAM set to 0 Read/Write wait cycle */
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SRAM_SetWaitCycle(SRAM_SRAMH, SRAM_WAIT_CYCLE0, SRAM_WAIT_CYCLE0);
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/* SRAM1_2_3_4_backup set to 1 Read/Write wait cycle */
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SRAM_SetWaitCycle((SRAM_SRAM123 | SRAM_SRAM4 | SRAM_SRAMB), SRAM_WAIT_CYCLE1, SRAM_WAIT_CYCLE1);
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#else
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/* Highspeed SRAM set to 1 Read/Write wait cycle */
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SRAM_SetWaitCycle(SRAM_SRAMH, SRAM_WAIT_CYCLE1, SRAM_WAIT_CYCLE1);
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/* SRAM1_2_3_4_backup set to 2 Read/Write wait cycle */
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SRAM_SetWaitCycle((SRAM_SRAM123 | SRAM_SRAM4 | SRAM_SRAMB), SRAM_WAIT_CYCLE2, SRAM_WAIT_CYCLE2);
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#endif
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/* 0-wait @ 40MHz */
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EFM_SetWaitCycle(EFM_WAIT_CYCLE5);
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/* 4 cycles for 200 ~ 250MHz */
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GPIO_SetReadWaitCycle(GPIO_RD_WAIT4);
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CLK_SetSysClockSrc(CLK_SYSCLK_SRC_PLL);
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}
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void PeripheralClockConfig(void)
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{
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#if defined(BSP_USING_CAN1)
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CLK_SetCANClockSrc(CLK_CAN1, CLK_CANCLK_SYSCLK_DIV6);
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#endif
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#if defined(BSP_USING_CAN2)
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CLK_SetCANClockSrc(CLK_CAN2, CLK_CANCLK_SYSCLK_DIV6);
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#endif
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#if defined(BSP_USING_ADC)
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CLK_SetPeriClockSrc(CLK_PERIPHCLK_PCLK);
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#endif
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}
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void SysTickConfiguration(void)
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{
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stc_clock_freq_t stcClkFreq;
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uint32_t cnts;
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CLK_GetClockFreq(&stcClkFreq);
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cnts = (uint32_t)stcClkFreq.u32HclkFreq / TICK_PER_SECOND;
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SysTick_Config(cnts);
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}
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void SysTick_Handler(void)
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{
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x_base lock = 0;
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lock = DISABLE_INTERRUPT();
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TickAndTaskTimesliceUpdate();
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ENABLE_INTERRUPT(lock);
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}
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struct InitSequenceDesc _board_init[] = {
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#ifdef BSP_USING_GPIO
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{ "hw_pin", HwGpioInit },
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#endif
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#ifdef BSP_USING_EXTSDRAM
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{ "ext_sdram", ExtSdramInit},
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#endif
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#ifdef BSP_USING_SDIO
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{ "sdio", HwSdioInit },
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#endif
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#ifdef BSP_USING_SPI
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{ "spi", HwSpiInit },
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#endif
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#ifdef BSP_USING_I2C
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{ "i2c", HwI2cInit },
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#endif
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#ifdef BSP_USING_ADC
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{ "hw adc init", HwAdcInit },
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#endif
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#ifdef BSP_USING_DAC
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{ "hw dac init", HwDacInit },
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#endif
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#ifdef BSP_USING_USB
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{ "usb", HwUsbHostInit },
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#endif
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#ifdef BSP_USING_RTC
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{ "rtc", HwRtcInit },
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#endif
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#ifdef BSP_USING_WDT
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{ "wdt", HwWdtInit },
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#endif
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#ifdef BSP_USING_TIMER
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{ "tmr", HwTimerInit },
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#endif
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#ifdef BSP_USING_CAN
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{ "can", HwCanInit },
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#endif
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#ifdef BSP_USING_W5500
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{ "wiz", HwWiznetInit },
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#endif
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{ " NONE ", NONE },
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};
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void InitBoardHardware()
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{
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int i = 0;
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int ret = 0;
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/* MCU Peripheral registers write unprotected */
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LL_PERIPH_WE(LL_PERIPH_SEL);
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SystemClockConfig();
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PeripheralClockConfig();
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SysTickConfiguration();
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#ifdef BSP_USING_UART
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HwUsartInit();
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#endif
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InitBoardMemory((void*)MEMORY_START_ADDRESS, (void*)MEMORY_END_ADDRESS);
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#ifdef KERNEL_CONSOLE
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InstallConsole(KERNEL_CONSOLE_BUS_NAME, KERNEL_CONSOLE_DRV_NAME, KERNEL_CONSOLE_DEVICE_NAME);
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KPrintf("\nconsole init completed.\n");
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KPrintf("board initialization......\n");
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#endif
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for (i = 0; _board_init[i].fn != NONE; i++) {
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ret = _board_init[i].fn();
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KPrintf("initialize %s %s\n", _board_init[i].fn_name, ret == 0 ? "success" : "failed");
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}
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KPrintf("board init done.\n");
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KPrintf("start kernel...\n");
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}
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