forked from xuos/xiuos
210 lines
9.7 KiB
C
210 lines
9.7 KiB
C
/*
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* Copyright (c) 2020 AIIT XUOS Lab
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* XiUOS is licensed under Mulan PSL v2.
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* You can use this software according to the terms and conditions of the Mulan PSL v2.
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* You may obtain a copy of Mulan PSL v2 at:
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* http://license.coscl.org.cn/MulanPSL2
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* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
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* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
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* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
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* See the Mulan PSL v2 for more details.
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*/
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#include "register_para.h"
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#include <xs_base.h>
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#include <xs_ktask.h>
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void __attribute__((naked)) SwitchKTaskContextExit()
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{
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asm volatile (LoadDS " a0, 0 * " RegLengthS "(sp)");
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asm volatile ("csrw mepc, a0");
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#ifdef TASK_ISOLATION
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asm volatile (LoadDS " a0, 2 * " RegLengthS "(sp)");
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asm volatile ("csrw mstatus, a0");
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asm volatile ("mv a0, sp");
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asm volatile ("jal RestoreMstatus");
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#else
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asm volatile ("li t0, 0x00007800");
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asm volatile ("csrw mstatus, t0");
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asm volatile (LoadDS " a0, 2 * " RegLengthS "(sp)");
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asm volatile ("csrs mstatus, a0");
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#endif
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asm volatile (LoadDS " ra, 1 * " RegLengthS "(sp)");
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asm volatile (LoadDS " tp, 4 * " RegLengthS "(sp)");
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asm volatile (LoadDS " t0, 5 * " RegLengthS "(sp)");
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asm volatile (LoadDS " t1, 6 * " RegLengthS "(sp)");
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asm volatile (LoadDS " t2, 7 * " RegLengthS "(sp)");
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asm volatile (LoadDS " s0, 8 * " RegLengthS "(sp)");
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asm volatile (LoadDS " s1, 9 * " RegLengthS "(sp)");
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asm volatile (LoadDS " a0, 10 * " RegLengthS "(sp)");
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asm volatile (LoadDS " a1, 11 * " RegLengthS "(sp)");
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asm volatile (LoadDS " a2, 12 * " RegLengthS "(sp)");
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asm volatile (LoadDS " a3, 13 * " RegLengthS "(sp)");
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asm volatile (LoadDS " a4, 14 * " RegLengthS "(sp)");
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asm volatile (LoadDS " a5, 15 * " RegLengthS "(sp)");
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asm volatile (LoadDS " a6, 16 * " RegLengthS "(sp)");
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asm volatile (LoadDS " a7, 17 * " RegLengthS "(sp)");
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asm volatile (LoadDS " s2, 18 * " RegLengthS "(sp)");
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asm volatile (LoadDS " s3, 19 * " RegLengthS "(sp)");
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asm volatile (LoadDS " s4, 20 * " RegLengthS "(sp)");
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asm volatile (LoadDS " s5, 21 * " RegLengthS "(sp)");
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asm volatile (LoadDS " s6, 22 * " RegLengthS "(sp)");
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asm volatile (LoadDS " s7, 23 * " RegLengthS "(sp)");
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asm volatile (LoadDS " s8, 24 * " RegLengthS "(sp)");
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asm volatile (LoadDS " s9, 25 * " RegLengthS "(sp)");
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asm volatile (LoadDS " s10, 26 * " RegLengthS "(sp)");
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asm volatile (LoadDS " s11, 27 * " RegLengthS "(sp)");
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asm volatile (LoadDS " t3, 28 * " RegLengthS "(sp)");
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asm volatile (LoadDS " t4, 29 * " RegLengthS "(sp)");
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asm volatile (LoadDS " t5, 30 * " RegLengthS "(sp)");
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asm volatile (LoadDS " t6, 31 * " RegLengthS "(sp)");
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asm volatile ("addi sp, sp, 32 * " RegLengthS "");
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#ifdef ARCH_RISCV_FPU
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asm volatile (FLOAD " f0, 0 *" FREGBYTES "(sp)");
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asm volatile (FLOAD " f1, 1 *" FREGBYTES "(sp)");
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asm volatile (FLOAD " f2, 2 *" FREGBYTES "(sp)");
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asm volatile (FLOAD " f3, 3 *" FREGBYTES "(sp)");
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asm volatile (FLOAD " f4, 4 *" FREGBYTES "(sp)");
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asm volatile (FLOAD " f5, 5 *" FREGBYTES "(sp)");
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asm volatile (FLOAD " f6, 6 *" FREGBYTES "(sp)");
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asm volatile (FLOAD " f7, 7 *" FREGBYTES "(sp)");
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asm volatile (FLOAD " f8, 8 *" FREGBYTES "(sp)");
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asm volatile (FLOAD " f9, 9 *" FREGBYTES "(sp)");
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asm volatile (FLOAD " f10, 10 *" FREGBYTES "(sp)");
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asm volatile (FLOAD " f11, 11 *" FREGBYTES "(sp)");
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asm volatile (FLOAD " f12, 12 *" FREGBYTES "(sp)");
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asm volatile (FLOAD " f13, 13 *" FREGBYTES "(sp)");
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asm volatile (FLOAD " f14, 14 *" FREGBYTES "(sp)");
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asm volatile (FLOAD " f15, 15 *" FREGBYTES "(sp)");
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asm volatile (FLOAD " f16, 16 *" FREGBYTES "(sp)");
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asm volatile (FLOAD " f17, 17 *" FREGBYTES "(sp)");
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asm volatile (FLOAD " f18, 18 *" FREGBYTES "(sp)");
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asm volatile (FLOAD " f19, 19 *" FREGBYTES "(sp)");
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asm volatile (FLOAD " f20, 20 *" FREGBYTES "(sp)");
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asm volatile (FLOAD " f21, 21 *" FREGBYTES "(sp)");
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asm volatile (FLOAD " f22, 22 *" FREGBYTES "(sp)");
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asm volatile (FLOAD " f23, 23 *" FREGBYTES "(sp)");
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asm volatile (FLOAD " f24, 24 *" FREGBYTES "(sp)");
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asm volatile (FLOAD " f25, 25 *" FREGBYTES "(sp)");
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asm volatile (FLOAD " f26, 26 *" FREGBYTES "(sp)");
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asm volatile (FLOAD " f27, 27 *" FREGBYTES "(sp)");
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asm volatile (FLOAD " f28, 28 *" FREGBYTES "(sp)");
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asm volatile (FLOAD " f29, 29 *" FREGBYTES "(sp)");
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asm volatile (FLOAD " f30, 30 *" FREGBYTES "(sp)");
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asm volatile (FLOAD " f31, 31 *" FREGBYTES "(sp)");
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asm volatile ("addi sp, sp, 32 *" FREGBYTES);
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#endif
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asm volatile ("mret");
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}
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void __attribute__((naked)) SaveMpie()
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{
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#ifdef ARCH_RISCV_FPV
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asm volatile ("addi sp, sp, -32 *" FREGBYTES);
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asm volatile (FSTORE " f0, 0 *" FREGBYTES "(sp)");
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asm volatile (FSTORE " f1, 1 *" FREGBYTES "(sp)");
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asm volatile (FSTORE " f2, 2 *" FREGBYTES "(sp)");
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asm volatile (FSTORE " f3, 3 *" FREGBYTES "(sp)");
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asm volatile (FSTORE " f4, 4 *" FREGBYTES "(sp)");
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asm volatile (FSTORE " f5, 5 *" FREGBYTES "(sp)");
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asm volatile (FSTORE " f6, 6 *" FREGBYTES "(sp)");
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asm volatile (FSTORE " f7, 7 *" FREGBYTES "(sp)");
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asm volatile (FSTORE " f8, 8 *" FREGBYTES "(sp)");
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asm volatile (FSTORE " f9, 9 *" FREGBYTES "(sp)");
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asm volatile (FSTORE " f10, 10 *" FREGBYTES "(sp)");
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asm volatile (FSTORE " f11, 11 *" FREGBYTES "(sp)");
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asm volatile (FSTORE " f12, 12 *" FREGBYTES "(sp)");
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asm volatile (FSTORE " f13, 13 *" FREGBYTES "(sp)");
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asm volatile (FSTORE " f14, 14 *" FREGBYTES "(sp)");
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asm volatile (FSTORE " f15, 15 *" FREGBYTES "(sp)");
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asm volatile (FSTORE " f16, 16 *" FREGBYTES "(sp)");
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asm volatile (FSTORE " f17, 17 *" FREGBYTES "(sp)");
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asm volatile (FSTORE " f18, 18 *" FREGBYTES "(sp)");
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asm volatile (FSTORE " f19, 19 *" FREGBYTES "(sp)");
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asm volatile (FSTORE " f20, 20 *" FREGBYTES "(sp)");
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asm volatile (FSTORE " f21, 21 *" FREGBYTES "(sp)");
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asm volatile (FSTORE " f22, 22 *" FREGBYTES "(sp)");
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asm volatile (FSTORE " f23, 23 *" FREGBYTES "(sp)");
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asm volatile (FSTORE " f24, 24 *" FREGBYTES "(sp)");
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asm volatile (FSTORE " f25, 25 *" FREGBYTES "(sp)");
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asm volatile (FSTORE " f26, 26 *" FREGBYTES "(sp)");
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asm volatile (FSTORE " f27, 27 *" FREGBYTES "(sp)");
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asm volatile (FSTORE " f28, 28 *" FREGBYTES "(sp)");
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asm volatile (FSTORE " f29, 29 *" FREGBYTES "(sp)");
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asm volatile (FSTORE " f30, 30 *" FREGBYTES "(sp)");
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asm volatile (FSTORE " f31, 31 *" FREGBYTES "(sp)");
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#endif
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asm volatile (StoreDS " a0, 2 * " RegLengthS "(sp)");
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asm volatile (StoreDS " tp, 4 * " RegLengthS "(sp)");
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asm volatile (StoreDS " t0, 5 * " RegLengthS "(sp)");
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asm volatile (StoreDS " t1, 6 * " RegLengthS "(sp)");
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asm volatile (StoreDS " t2, 7 * " RegLengthS "(sp)");
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asm volatile (StoreDS " s0, 8 * " RegLengthS "(sp)");
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asm volatile (StoreDS " s1, 9 * " RegLengthS "(sp)");
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asm volatile (StoreDS " a0, 10 * " RegLengthS "(sp)");
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asm volatile (StoreDS " a1, 11 * " RegLengthS "(sp)");
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asm volatile (StoreDS " a2, 12 * " RegLengthS "(sp)");
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asm volatile (StoreDS " a3, 13 * " RegLengthS "(sp)");
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asm volatile (StoreDS " a4, 14 * " RegLengthS "(sp)");
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asm volatile (StoreDS " a5, 15 * " RegLengthS "(sp)");
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asm volatile (StoreDS " a6, 16 * " RegLengthS "(sp)");
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asm volatile (StoreDS " a7, 17 * " RegLengthS "(sp)");
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asm volatile (StoreDS " s2, 18 * " RegLengthS "(sp)");
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asm volatile (StoreDS " s3, 19 * " RegLengthS "(sp)");
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asm volatile (StoreDS " s4, 20 * " RegLengthS "(sp)");
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asm volatile (StoreDS " s5, 21 * " RegLengthS "(sp)");
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asm volatile (StoreDS " s6, 22 * " RegLengthS "(sp)");
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asm volatile (StoreDS " s7, 23 * " RegLengthS "(sp)");
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asm volatile (StoreDS " s8, 24 * " RegLengthS "(sp)");
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asm volatile (StoreDS " s9, 25 * " RegLengthS "(sp)");
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asm volatile (StoreDS " s10, 26 * " RegLengthS "(sp)");
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asm volatile (StoreDS " s11, 27 * " RegLengthS "(sp)");
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asm volatile (StoreDS " t3, 28 * " RegLengthS "(sp)");
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asm volatile (StoreDS " t4, 29 * " RegLengthS "(sp)");
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asm volatile (StoreDS " t5, 30 * " RegLengthS "(sp)");
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asm volatile (StoreDS " t6, 31 * " RegLengthS "(sp)");
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asm volatile (LoadDS " sp, (a1)");
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asm volatile ("mv a0, a2");
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asm volatile ("jal RestoreCpusLockStatus");
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asm volatile ("j SwitchKTaskContextExit");
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}
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void __attribute__((naked)) SwitchKtaskContextTo(x_ubase to, struct TaskDescriptor *to_task)
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{
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asm volatile (LoadDS " sp, (a0)\n");
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asm volatile ("mv a0, a1");
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asm volatile ("jal RestoreCpusLockStatus");
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asm volatile (LoadDS " a7, 2 * " RegLengthS "(sp)");
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asm volatile ("csrw mstatus, a7");
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asm volatile ("j SwitchKTaskContextExit");
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}
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void __attribute__((naked)) SwitchKtaskContext(x_ubase from, x_ubase to, struct TaskDescriptor *to_task)
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{
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asm volatile ("addi sp, sp, -32 * " RegLengthS);
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asm volatile (StoreDS " sp, (a0)");
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asm volatile (StoreDS " x1, 0 * " RegLengthS "(sp)");
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asm volatile (StoreDS " x1, 1 * " RegLengthS "(sp)");
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asm volatile ("csrr a0, mstatus");
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#ifndef TASK_ISOLATION
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asm volatile ("andi a0, a0, 8");
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asm volatile ("beqz a0, SaveMpie");
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asm volatile ("li a0, 0x80");
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#endif
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asm volatile ("j SaveMpie");
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}
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void __attribute__((naked)) HwInterruptcontextSwitch(x_ubase from, x_ubase to, struct TaskDescriptor *to_task, void *context)
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{
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asm volatile (StoreDS " a3, 0(a0)");
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asm volatile (LoadDS " sp, 0(a1)");
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asm volatile ("move a0, a2");
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asm volatile ("call RestoreCpusLockStatus");
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asm volatile ("j SwitchKTaskContextExit");
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}
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