forked from xuos/xiuos
123 lines
4.6 KiB
C
123 lines
4.6 KiB
C
/*
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* Copyright (c) 2020 AIIT XUOS Lab
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* XiUOS is licensed under Mulan PSL v2.
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* You can use this software according to the terms and conditions of the Mulan PSL v2.
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* You may obtain a copy of Mulan PSL v2 at:
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* http://license.coscl.org.cn/MulanPSL2
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* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
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* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
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* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
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* See the Mulan PSL v2 for more details.
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*/
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/**
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* @file pagetable_level3.c
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* @brief page walk and L2 pagetable
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* @version 1.0
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* @author AIIT XUOS Lab
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* @date 2024.05.06
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*/
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/*************************************************
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File name: pagetable_level3.c
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Description: ok1028 image vector table
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Others:
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History:
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Author: AIIT XUOS Lab
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Modification:
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1. first version
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*************************************************/
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#include <stdint.h>
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#include "core.h"
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#include "memlayout.h"
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#include "assert.h"
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#include "buddy.h"
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#include "kalloc.h"
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#include "pagetable.h"
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uintptr_t* _page_walk(uintptr_t* pgdir, uintptr_t vaddr, bool alloc)
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{
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// get page table addr
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assert(pgdir != NULL);
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uintptr_t pde_attr = 0;
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_p_pgtbl_mmu_access->MmuPdeAttr(&pde_attr);
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uintptr_t* l2_pde_ptr = (uintptr_t*)&pgdir[(vaddr >> LEVEL2_PDE_SHIFT) & (NUM_LEVEL2_PDE - 1)];
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uintptr_t* l3_pde_vaddr;
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if (*l2_pde_ptr != 0) {
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uintptr_t l3_table_paddr = (*l2_pde_ptr) & ~pde_attr;
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l3_pde_vaddr = (uintptr_t*)P2V(l3_table_paddr);
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} else {
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if (!alloc || !(l3_pde_vaddr = (uintptr_t*)kalloc(sizeof(uintptr_t) * NUM_LEVEL3_PDE))) {
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return NULL;
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}
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memset(l3_pde_vaddr, 0, sizeof(uintptr_t) * NUM_LEVEL3_PDE);
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*l2_pde_ptr = V2P(l3_pde_vaddr) | pde_attr;
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}
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uintptr_t* l3_pde_ptr = (uintptr_t*)&l3_pde_vaddr[(vaddr >> LEVEL3_PDE_SHIFT) & (NUM_LEVEL3_PDE - 1)];
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uintptr_t* l4_pte_vaddr;
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if (*l3_pde_ptr != 0) {
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uintptr_t l4_table_paddr = (*l3_pde_ptr) & ~pde_attr;
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l4_pte_vaddr = (uintptr_t*)P2V(l4_table_paddr);
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} else {
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if (!alloc || !(l4_pte_vaddr = (uintptr_t*)kalloc(sizeof(uintptr_t) * NUM_LEVEL4_PTE))) {
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return NULL;
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}
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memset(l4_pte_vaddr, 0, sizeof(uintptr_t) * NUM_LEVEL4_PTE);
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*l3_pde_ptr = V2P(l4_pte_vaddr) | pde_attr;
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}
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return &l4_pte_vaddr[LEVEL4_PTE_IDX(vaddr)];
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}
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void _free_user_pgdir(struct TopLevelPageDirectory* pgdir)
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{
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if (pgdir->pd_addr == NULL) {
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return;
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}
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uintptr_t low_bound = kern_virtmem_buddy.mem_start, high_bound = kern_virtmem_buddy.mem_end;
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uintptr_t user_low_bound = user_phy_freemem_buddy.mem_start, user_high_bound = user_phy_freemem_buddy.mem_end;
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uintptr_t end_idx = (USER_MEM_TOP >> LEVEL2_PDE_SHIFT) & (NUM_LEVEL2_PDE - 1);
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for (uintptr_t l2_entry_idx = 0; l2_entry_idx < end_idx; l2_entry_idx++) {
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// free each level3 page table
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uintptr_t* l3_table_paddr = (uintptr_t*)ALIGNDOWN(pgdir->pd_addr[l2_entry_idx], PAGE_SIZE);
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if (l3_table_paddr != NULL) {
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uintptr_t* l3_table_vaddr = P2V(l3_table_paddr);
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for (uintptr_t l3_entry_idx = 0; l3_entry_idx < NUM_LEVEL3_PDE; l3_entry_idx++) {
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uintptr_t* l4_table_paddr = (uintptr_t*)LEVEL4_PTE_ADDR(l3_table_vaddr[l3_entry_idx]);
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if (l4_table_paddr != NULL) {
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uintptr_t* l4_table_vaddr = P2V(l4_table_paddr);
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for (uintptr_t page_entry_idx = 0; page_entry_idx < NUM_LEVEL4_PTE; page_entry_idx++) {
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uintptr_t vaddr = (l2_entry_idx << LEVEL2_PDE_SHIFT) | (l3_entry_idx << LEVEL3_PDE_SHIFT) | (page_entry_idx << LEVEL4_PTE_SHIFT);
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// get page paddr
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uintptr_t* page_paddr = (uintptr_t*)ALIGNDOWN((l4_table_vaddr)[page_entry_idx], PAGE_SIZE);
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if (page_paddr != NULL) {
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// Ensure the virtual address is not in the IPC address space
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assert(vaddr < USER_IPC_SPACE_BASE || vaddr >= USER_IPC_SPACE_TOP);
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if (LIKELY((uintptr_t)page_paddr >= low_bound && (uintptr_t)page_paddr < high_bound)) {
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kfree(P2V(page_paddr));
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} else if (LIKELY((uintptr_t)page_paddr >= user_low_bound && (uintptr_t)page_paddr < user_high_bound)) {
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raw_free((char*)page_paddr);
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}
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}
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}
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kfree(P2V(l4_table_paddr));
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}
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}
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kfree(P2V(l3_table_paddr));
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}
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}
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kfree((char*)pgdir->pd_addr);
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}
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