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43 Commits

Author SHA1 Message Date
buxue 70c80c0595 dock FloorMod GreaterEqual NotEqual ScatterNdUpdate 2020-04-27 19:48:16 +08:00
liuxiao b6e77e5178 Add ReluV2/ReluGradV2/ConfusionMulGrad for VM 2020-04-22 21:09:37 +08:00
liuxiao 5b6c8fade8 Add Erf\FillD operator for VM 2020-04-22 15:32:42 +08:00
liuxiao c874e2d484 Add L2Loss op for VM 2020-04-22 09:31:14 +08:00
VectorSL 4740c70fc3 gpu add testcases 2020-04-21 19:40:29 +08:00
mindspore-ci-bot 04df8a8921 !535 change hswish and hsigmoid accroding to primitive 
Merge pull request !535 from SanjayChan/hswish
 2020-04-21 18:37:02 +08:00
mindspore-ci-bot 7355113bc7 !537 GPU add akg kernel logical_and logical_or 
Merge pull request !537 from VectorSL/logical_and_or_new
 2020-04-21 18:24:55 +08:00
mindspore-ci-bot f462a37136 !538 GPU add akg kernel logical_not logical_sub 
Merge pull request !538 from VectorSL/logical_not_new
 2020-04-21 18:24:42 +08:00
mindspore-ci-bot c7278f77ce !539 GPU add akg kernel lessequal 
Merge pull request !539 from VectorSL/lessequal_new
 2020-04-21 18:24:29 +08:00
VectorSL 1c6a690a2d gpu add akg logialnot sub 2020-04-21 17:35:00 +08:00
VectorSL 5b5a56587e gpu add akg logical_and and logical_or 2020-04-21 17:32:16 +08:00
VectorSL 7947fc119b gpu add lessequal 2020-04-21 17:25:53 +08:00
chenzomi c0229fa951 change hswish and hsigmoid accroding to primitive 2020-04-21 15:38:33 +08:00
lvliang 0e4824cd89 pynative-support-topk-and-print 2020-04-21 11:58:48 +08:00
buxue 4f8fa79f33 fix attribute mapping when docking open source operators 2020-04-20 20:52:05 +08:00
liuxiao 5c9791a802 Add Abs\AbsGrad\Sign\SmoothL1Loss\SmoothL1LossGrad and modify TopKV2->TopK for VM 2020-04-18 15:21:44 +08:00
mindspore-ci-bot 7c06d292c8 !387 auto mix precision 
Merge pull request !387 from liubuyu/master
 2020-04-18 11:43:42 +08:00
buxue b600991cc3 dock DepthwiseConv2dBackprop DepthwiseConv2dBackpropFilter DepthwiseConv2dBackpropInput 2020-04-18 10:27:32 +08:00
liubuyu b1585f862d auto mix precision 2020-04-17 20:46:42 +08:00
mindspore-ci-bot ff464bbcba !397 [MS]support building and packaging on windows 10 
Merge pull request !397 from chenjianping/building-on-windows-3
 2020-04-16 22:07:04 +08:00
chenjianping c8da1cf8e9 support building on windows|support package 2020-04-16 13:44:20 +00:00
maoweiyong 257464ef7b fix gpu op register 2020-04-16 16:16:17 +08:00
zjun 5617143fb8 Fix arg_min_with_value bug 2020-04-15 14:39:05 +08:00
zjun 0099f0108e fix akg register bug 2020-04-14 22:15:44 +08:00
mindspore-ci-bot fb19655ea6 !214 modify GPU operator information registration 
Merge pull request !214 from Maoweiyong/modify-gpu-op-register
 2020-04-14 20:56:46 +08:00
maoweiyong a007e4812b modify gpu operator information registration 2020-04-14 19:17:59 +08:00
zjun 02aca06451 Add all other tbe op info register 2020-04-14 17:37:56 +08:00
mindspore-ci-bot 94589ce611 !226 expend conv stride and dilation to 2d 
Merge pull request !226 from wangnan39/expend_conv_stride_to_2d
 2020-04-14 14:58:22 +08:00
wangnan39@huawei.com 2604acedcb extend conv stride and dilation to 2d 2020-04-14 13:16:27 +08:00
mindspore-ci-bot 878a076dbd !200 Add quantization aware training related operators 
Merge pull request !200 from chengang/quant
 2020-04-13 22:06:28 +08:00
mindspore-ci-bot fe07c25d92 !224 Dock relu6 and relu6grad for open source process 
Merge pull request !224 from zhangbuxue/dock_relu6_for_open_source_processes
 2020-04-13 17:08:49 +08:00
panfengfeng cc80c76687 add quantizaiton gpu op 2020-04-13 16:51:41 +08:00
buxue 0db45147a4 dock relu6 for open source process and fix pow bprop 2020-04-13 15:25:04 +08:00
mindspore-ci-bot 50d8992177 !253 change adam output numbers adapter to tbe 
Merge pull request !253 from zhaoting/add-YOLOv3-infer-scipt-and-change-dataset-to-MindRecord
 2020-04-13 15:18:33 +08:00
zhaoting fa03a66433 change adam output numbers adapter to tbe 2020-04-13 11:09:23 +08:00
dinghao 37ba21c271 fix ref pass visit graph bug 2020-04-13 11:06:33 +08:00
zjun 16296da5c7 add aicpu opinfo register 2020-04-09 16:33:17 +08:00
buxue 7541d3b067 Develop op MaxPoolWithArgMax 2020-04-08 20:47:49 +08:00
mindspore-ci-bot 9f982b513d !129 fix bert precision bug 
Merge pull request !129 from wanghua/master
 2020-04-03 17:35:44 +08:00
zjun 651d9aae40 add new mode for operator info register 2020-04-03 15:54:12 +08:00
wanghua da123c5b3e fix bert precison bug 2020-04-03 14:55:25 +08:00
zhaoting 0c81759ae6 add YOLOv3 infer scipt and change dataset to MindRecord 2020-04-03 11:35:58 +08:00
zhunaipan 930a1fb0a8 initial version 
Signed-off-by: leonwanghui <leon.wanghui@huawei.com>
 2020-03-27 22:54:54 +08:00