937be2c97d
* feat[ADC V2]: add ADC V2 driver support add ADC V2 core APIs, session state management, and sequence read support add STM32 ADC V2 HAL backend with internal-channel and VREF handling add per-series STM32 ADC V2 default configuration headers wire ADC V2 Kconfig and SConscript integration for components and STM32 BSP drivers keep ADC V2 mutually exclusive with the legacy ADC driver path * feat[ADC V2]: add ADC V2 MSH special channel read support add generic ADC V2 MSH commands for probing, configuring, raw reads, voltage reads, and sequence reads add STM32 ADC V2 backend special commands for VREFINT, temperature sensor, and VBAT reads add STM32 helper APIs for special logical channels, sampling time, resolution, and temperature calculation wire ADC V2 MSH sources through Kconfig and SConscript * feat[ADC V2]: add ADC V2 stream DMA support add ADC V2 stream APIs with latest-frame and FIFO buffering policies wire STM32 ADC V2 to circular DMA stream mode with per-instance Kconfig options extend STM32 ADC config headers and DMA helpers for stream DMA configuration add FinSH stream commands for start, read, cancel, and stop operations handle Cortex-M7 cache-safe DMA buffers for STM32 stream sampling * feat[ADC V2]: add timer trigger support for ADC V2 streams add ADC V2 trigger configuration, validation, and lifecycle coordination add timer update trigger support through clock timer TRGO controls map STM32 ADC V2 timer update triggers to HAL external trigger selector fields add Kconfig, SConscript, and MSH entries for ADC trigger setup and inspection * feat[ADCV2]: add timer and comparator trigger selectors add ADC V2 timer compare and analog comparator trigger configuration support extend clock timer trigger config with compare event and channel fields wire STM32 ADC external trigger selector mappings for TIM update, TIM compare, and COMP output add FinSH trigger_set commands and Kconfig switches for timer and comparator trigger backends * fix[ADC V2]: resolve ADC V1 compatibility Kconfig loop * ci[ADC V2][stm32]: add ADC v2 peripheral config for stm32f407-rt-spark BSP |
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| .. | ||
| arch | ||
| Kconfig | ||
| README.md | ||
| README_zh.md | ||
| SConscript | ||
| clock_boottime.c | ||
| clock_hrtimer.c | ||
| clock_time_arm_arch.c | ||
| clock_time_core.c | ||
| clock_timer.c | ||
README.md
Clock Time Subsystem
The clock_time subsystem provides a unified time base and event scheduling for RT-Thread. It separates timekeeping (a monotonic counter) from event delivery (a programmable timer interrupt) so platforms can combine different hardware sources while the kernel sees consistent behavior.
Design Principles
- Monotonic time: time readings never go backward.
- Separation of roles: a clock source provides a counter, a clock event triggers deadlines.
- Scaled integer conversion: counters are converted to nanoseconds with a resolution scale factor, avoiding floating point.
- Graceful fallback: if a hardware event is unavailable, software timers keep the system functional.
Building Blocks
- Clock source: provides a stable counter and its frequency.
- Clock event: can be programmed to fire at the next deadline.
- Clock timer adapter: exposes a general timer peripheral as a clock source or event device.
- Clock hrtimer: software scheduler that orders high-resolution timeouts and programs the next event.
- Clock boottime helpers: translate the monotonic counter into common time formats for use by higher layers.
Time Flow
- Read path: counter -> scaled resolution -> nanoseconds.
- Timeout path: hrtimer queue -> next expiry -> program event -> interrupt -> dispatch callbacks.
BSP Integration Guidance
- Provide a stable counter or a programmable timer. One device can serve both roles.
- Select a default source and event device to enable accurate timekeeping and efficient scheduling.
- Keep ISRs minimal; the core handles conversion and scheduling.
- POSIX time APIs are layered on top of this subsystem and reuse its monotonic base.