Commit Graph

112 Commits

Author SHA1 Message Date
GUI a2c196d643
[dm][phye] Add Mode/State and MIPI D-PHY timing helper (#11675)
* [dm][phye] Add Mode/State and MIPI D-PHY timing helper

Extend the generic PHY framework with cached mode and submode state,
avoiding redundant hardware mode changes.
Add MIPI D-PHY default timing calculation helpers based on
pixel clock or lane high-speed clock, and expose the new API through rtdevice.h.

Signed-off-by: GuEe-GUI <2991707448@qq.com>

* style: format code with clang-format

* style: format complete changed files with clang-format

---------

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2026-08-07 21:31:43 +08:00
GuEe-GUI a7b0182817 [dm][tee] support Trusted Execution Environment (TEE)
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2026-07-27 17:53:20 +08:00
wdfk-prog 937be2c97d
feat[ADC]: 新增 ADC V2 驱动支持 (#11440)
* feat[ADC V2]: add ADC V2 driver support

add ADC V2 core APIs, session state management, and sequence read support
add STM32 ADC V2 HAL backend with internal-channel and VREF handling
add per-series STM32 ADC V2 default configuration headers
wire ADC V2 Kconfig and SConscript integration for components and STM32 BSP drivers
keep ADC V2 mutually exclusive with the legacy ADC driver path

* feat[ADC V2]: add ADC V2 MSH special channel read support

add generic ADC V2 MSH commands for probing, configuring, raw reads, voltage reads, and sequence reads
add STM32 ADC V2 backend special commands for VREFINT, temperature sensor, and VBAT reads
add STM32 helper APIs for special logical channels, sampling time, resolution, and temperature calculation
wire ADC V2 MSH sources through Kconfig and SConscript

* feat[ADC V2]: add ADC V2 stream DMA support

add ADC V2 stream APIs with latest-frame and FIFO buffering policies
wire STM32 ADC V2 to circular DMA stream mode with per-instance Kconfig options
extend STM32 ADC config headers and DMA helpers for stream DMA configuration
add FinSH stream commands for start, read, cancel, and stop operations
handle Cortex-M7 cache-safe DMA buffers for STM32 stream sampling

* feat[ADC V2]: add timer trigger support for ADC V2 streams

add ADC V2 trigger configuration, validation, and lifecycle coordination
add timer update trigger support through clock timer TRGO controls
map STM32 ADC V2 timer update triggers to HAL external trigger selector fields
add Kconfig, SConscript, and MSH entries for ADC trigger setup and inspection

* feat[ADCV2]: add timer and comparator trigger selectors

add ADC V2 timer compare and analog comparator trigger configuration support
extend clock timer trigger config with compare event and channel fields
wire STM32 ADC external trigger selector mappings for TIM update, TIM compare, and COMP output
add FinSH trigger_set commands and Kconfig switches for timer and comparator trigger backends

* fix[ADC V2]: resolve ADC V1 compatibility Kconfig loop

* ci[ADC V2][stm32]: add ADC v2 peripheral config for stm32f407-rt-spark BSP
2026-07-07 08:59:22 +08:00
GuEe-GUI 11ca166006 [dm][ptp] support Precision Time Protocol (PTP) IEEE 1588 clock
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2026-06-29 16:55:18 +08:00
GuEe-GUI e280f213bf [dm][dvfs] support Dynamic Voltage and Frequency Scaling (DVFS)
1. Support DVFS and finsh cmd, there are 6 governors:
   - conservative
   - freedom
   - performance
   - powersave
   - schedutil
2. Support DVFS for SCMI.
3. Port the Cooling device for DVFS.
4. Port the PM with DVFS.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2026-06-23 08:02:09 +08:00
GuEe-GUI 8517f2d086 [dm][virtio] support virtio dm
1. version for v1.2
2. support packed queue
1. support MMIO/PCI over bus
2. new virtio queue api with dma/cpu sync
3. update for virtio device drivers:
  - net
  - block
  - console
  - input
  - gpu
4. new virtio device drivers:
  - 9p
  - crypto
  - rng
  - scmi
  - scsi

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2026-06-15 10:00:57 +08:00
GuEe-GUI 46b90df247 [dm][rpmsg] support Remote Processor Messaging (RPMSG)
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2026-05-11 14:09:04 +08:00
GuEe-GUI ea13820c2c [dm][ufs] support Universal Flash Storage (UFS)
Support UFS over PCI, too.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2026-05-04 18:41:16 +08:00
Evlers 8be4b05af6
[drivers][power] add CLI helpers and current control support#11301
- add msh commands to inspect/operate power supplies and regulators
- expose snapshot/name helpers so shells and daemons can enumerate nodes safely
- add current support for regulator
- relax DM-only constraints in power/regulator stacks so basic builds work without DM/OFW
- solve the problem of enabling counting for regulator
2026-04-07 11:50:11 +08:00
Bernard Xiong 743b614875
[components][clock_time] Refactor time subsystem around clock_time (#11111)
* [components][clock_time] Refactor time subsystem around clock_time

Introduce the clock_time core with clock source/event separation, high-resolution scheduling, and boot-time helpers, plus clock_timer adapters for timer peripherals.

Remove legacy ktime/cputime/hwtimer implementations and migrate arch and BSP time paths to the new subsystem while keeping POSIX time integration functional.

Update drivers, Kconfig/SConscript wiring, documentation, and tests; add clock_time overview docs and align naming to clock_boottime/clock_hrtimer/clock_timer.

* [components][clock_time] Use BSP-provided clock timer frequency on riscv64

* [risc-v] Use runtime clock timer frequency for tick and delays

* [bsp] Add clock timer frequency hooks for riscv64 boards

* [bsp] Update Renesas RA driver doc clock_timer link

* [bsp] Sync zynqmp-r5-axu4ev rtconfig after config refresh

* [bsp][rk3500] Update rk3500 clock configuration

* [bsp][hpmicro] Add rt_hw_us_delay hook and update board delays

* [bsp][stm32l496-st-nucleo] enable clock_time for hwtimer sample in ci

* [bsp][hpmicro] Fix rtconfig include scope for hpm6750evk

Move rtconfig.h include outside the ENET_MULTIPLE_PORT guard for hpm6750evk and hpm6750evk2 so configuration macros are available regardless of ENET settings.

* [bsp][raspi3] select clock time for systimer

* [bsp][hpm5300evk] Trim trailing blank line

* [bsp][hpm5301evklite] Trim trailing blank line

* [bsp][hpm5e00evk] Trim trailing blank line

* [bsp][hpm6200evk] Trim trailing blank line

* [bsp][hpm6300evk] Trim trailing blank line

* [bsp][hpm6750evk] Trim trailing blank line

* [bsp][hpm6750evk2] Trim trailing blank line

* [bsp][hpm6750evkmini] Trim trailing blank line

* [bsp][hpm6800evk] Trim trailing blank line

* [bsp][hpm6e00evk] Trim trailing blank line

* [bsp][nxp] switch lpc178x to gcc and remove mcx timer source

* [bsp][stm32] fix the CONFIG_RT_USING_CLOCK_TIME issue.

* [docs][clock_time] add clock time documentation

* [docs][clock_time] Update clock time subsystem documentation

- Update device driver index to use correct page reference
- Clarify upper layer responsibilities in architecture overview
- Update README to describe POSIX/libc, Soft RTC, and device driver usage
- Refine architecture diagram with improved layout and color scheme
- Remove obsolete clock_timer.md file

* [kernel][utest] Trim trailing space

* [clock_time] Fix hrtimer wrap handling

* [clock_time] fix the static rt_inline issue

* [clock_time] fix the rt_clock_hrtimer_control result issue
2026-01-31 17:44:27 +08:00
GUI c6498b5f65
[sdio][dm] update for DM (#11078)
* [sdio][dm] import Kconfig for DM

Signed-off-by: GuEe-GUI <2991707448@qq.com>

* [sdio] fixup IRQ and mmcsd threads' stack size default

Signed-off-by: GuEe-GUI <2991707448@qq.com>

* [sdio][dm] Support DM mode

1. Support features read by DM.
2. Support regulator API in drivers.
3. Support send tuning option CMD.
4. Replace `switch_uhs_voltage` by `signal_voltage_switch`.

Signed-off-by: GuEe-GUI <2991707448@qq.com>

* [dm][sdhci] Cleanup the SDHCI

Signed-off-by: GuEe-GUI <2991707448@qq.com>

* [sdio][dm] add new SDIO/SDHCI drivers

1. SDHCI support on PCI bus
2. Synopsys DesignWare MMC Family(MMIO/PCI)

Signed-off-by: GuEe-GUI <2991707448@qq.com>

---------

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2025-12-26 21:04:42 +08:00
GuEe-GUI 9370f81ad7 [dm][include] fixup loss' header
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2025-12-22 13:24:41 +08:00
GUI 43733268c1
[dm][firmware][scmi] support ARM-SCMI interface #11069 2025-12-19 21:20:17 +08:00
GuEe-GUI b4d332706e [dm][power] add power reset and supply framework
1. Board level reset or poweroff
2. Power supply class

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2025-12-17 10:29:05 +08:00
GuEe-GUI 4913211409 [dm][core] add common machine power interface
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2025-12-16 11:35:35 +08:00
GUI d8709ba9fb
[dm][hwcache] support hwcache (#11049)
Some ARCH not has std cache ops, such as RISC-V

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2025-12-13 16:32:25 +08:00
GuEe-GUI dd20176cba [dm][hwspinlock] support hwspinlock
Hardware spinlock modules provide hardware assistance for
synchronization and mutual exclusion between heterogeneous processors
and those not operating under a single, shared operating system.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2025-12-11 11:08:33 +08:00
GuEe-GUI 22a77f2694 [dm][nvmem] support nvmem
Support for NVMEM(Non Volatile Memory) devices like EEPROM, EFUSES...

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2025-12-10 17:04:23 +08:00
GUI 3ff3fc3948
[dm][input] support input #11031 2025-12-10 16:58:10 +08:00
GuEe-GUI 62e1fe3699 [Drivers/phy] Fixup header include for v2
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2025-12-04 16:05:37 +08:00
rcitach ae50e406da
【SMART】【BSP】【allwinner】Fix smart serial_v2 bypass compile error issue (#10524)
* Modify the reference path of the header file in the middle section

* format

* Fix smart serial_v2 bypass compile error issue

* add allwinner/d1s ci
2025-08-01 20:59:08 +08:00
zhujiale e4760364f1 [serial] add bypass testcase in utest 2024-12-17 11:08:14 +08:00
zhujiale 27cf024585 [serial] add bypass hook to direct processing char when uart irq coming 2024-12-17 11:08:14 +08:00
GuEe-GUI d248a3a288 [DM/FIXUP] Fixup PCI build
1. Add PCI include in rtdevice.h
2. Fixup `RT_KEY_ENABLED` loss.
3. remove waring type of `dw_pcie_ep_get_func_from_ep` return.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-12-13 10:39:20 +08:00
GuEe-GUI 429c0c5257 [DM/FEATURE] Support thermal
Thermal drivers offer a generic mechanism for thermal management.
Usually it's made up of one or more thermal zones and cooling devices.
Each thermal zone contains its own temperature, trip points, and cooling devices.
All platforms with ACPI or OFW thermal support can use this driver.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-12-02 21:17:24 +08:00
GuEe-GUI 175a7d26bf [DM/FEATURE] Support LED
Provides general LED control API and drivers.
It can work on PWM, GPIO and Syscon...

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-28 09:46:02 +08:00
GuEe-GUI 56614a4cb9 [DM/FEATURE] Support regulator
1. Add the regulator driver framework.
2. Add the generic voltage and current regulator API support
  for drivers.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-27 18:02:23 +08:00
GUI d025072837
[DM/FEATURE] Support ATA AHCI (#9683)
Add ACHI drivers to support some old platform
driver such as SATA.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-26 11:22:09 +08:00
GUI 1a24ae06f3
[DM/FEATURE] Support reset controller (#9630)
* [DM/FEATURE] Support reset controller

Reset controllers are central units that control
the reset signals to multiple peripherals.
The reset controller API is split into two parts:
  1. The consumer driver interface, which allows
    peripheral drivers to request control over
    their reset input signals
  2. The reset controller driver interface
which is used by drivers for reset controller devices to
register their reset controls to provide them to the consumers.

* [RESET/SIMPLE] Support simple reset

Currently this driver supports:
 - Altera SoCFPGAs
 - ASPEED BMC SoCs
 - Bitmain BM1880 SoC
 - Realtek SoCs
 - RCC reset controller in STM32 MCUs
 - Allwinner SoCs
 - SiFive FU740 SoCs
 - Sophgo SoCs

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-26 10:02:50 +08:00
GUI f849afb5ca
[DM/FEATURE] Support hardware mailbox (#9599)
* [DM/FEATURE] Support hardware mailbox
* [MAILBOX/PIC] Add PIC Mailbox drivers.

The mailbox device(s) may be instantiated in one of three equivalent way:

Device Tree node, eg.:

```dts
interrupt-controller@0 {
	interrupt-controller;
	#interrupt-cells = <1>;
};

pic_mailbox@10000 {
	compatible = "rt-thread,pic-mailbox";
	reg = <0x10000 0x100>;
	position = <0>;
	interrupts = <34>;
	peer-interrupts = <35>;
	uid = <0>;
	#mbox-cells = <1>;
};
```
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-25 11:00:04 +08:00
GUI c2545cdd7b
[DM/FEATURE] Support PHY (external) (#9597)
This framework will be of use only to devices that use
external PHY (PHY functionality is not embedded within the controller).

Use in PCIE, USB, HDMI, DP...

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-25 10:23:01 +08:00
GUI 945114fd59
[DM/FEATURE] Support NVME (#9591)
* [DM/FEATURE] Support NVME

1. Support PRP and SGL (>= NVME v1.1) transport.
2. Support MSI/MSI-X for IO queues.
3. Support NVME on PCI.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-24 13:57:37 +08:00
GUI 42a41c696d
[DM/FEATURE] Support SCSI bus (#9592)
* [DM/FEATURE] Support block for SCSI
1. Support SD and CD-ROM.
2. SD will port to UFS and ATA device.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-22 16:59:37 +08:00
GUI c055261177
[DM/FEATURE] Support DMA management (#9682)
1. DMA pool management for platform.
2. DMA engine driver API.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-22 14:11:40 +08:00
GUI f797eccbf1
[DM/FEATURE] Support IIO (Industrial I/O) (#9598)
[DM/FEATURE] Support IIO (Industrial I/O)

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-21 20:44:25 +08:00
GuEe-GUI c424cb8186 [DM/FEATURE] Support simple block layer
1. Disk and blk device management.
2. Support partitions probe auto.
3. Support DFS and user mode fops, ioctl.
4. Add a cmd for blk info.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-20 16:11:10 +08:00
GuEe-GUI 10cac76d3b [DM/FEATURE] Support MFD syscon
MFD (Multifunction device) with System Controller Register Read/Write.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-20 15:53:23 +08:00
zhuzhuzhu bdf4da8ee1
[components][driver]add phy and mdio bus
old phy bus is too simple add phy_bus is not adapt rt_bus framework,so writer a stronger phy bus framework.

here is my commit message:
add mdio bus and phy bus to kernel,the phy bus use rt_bus framewok ,driver writer can write phy_driver first .when mac driver need to use phy they can register phy_device and pjhy_devie will serach for driver which match by uid and mask,if no driver match with the device that you register,phy_bus will return the genphy to you device,the genphy driver is the general driver for phy,so you can use it but it can not support the capcity of chip it may be cause performance is not up to peak
2024-11-19 21:34:03 -05:00
CXSforHPU bb91502465
[drivers] Specifies the name of the drivers driver file
https://github.com/RT-Thread/rt-thread/pull/9420
2024-09-13 17:40:40 -04:00
CXSforHPU 416ec66380
[device] add dev_ prefix for file names 2024-08-23 18:15:09 -04:00
GUI e7cddf3a52
[Feature] Support simple power domain API (#9005)
* [Feature] Power domain for device

1.Support device power on/off.
2.Support attach/detach device.
3.Support power domain driver api.

Signed-off-by: GuEe-GUI <2991707448@qq.com>

* [DM/platform] Enhanced platform bus

1.Add power domain for device.
2.Support `remove` and `shutdown` bus interface.

Signed-off-by: GuEe-GUI <2991707448@qq.com>

---------

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-05-30 15:30:40 +08:00
GUI 6f6b0c3ba0
[DM/feature] Simple NUMA (Non-Uniform Memory Access) (#9000)
For some CPU memory access devices, that the drivers
will find memory and CPU affinity to config device.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-05-28 14:08:33 +08:00
zms123456 4ffcbfef2a
[components][drivers]add ofw support i2c 2024-04-07 09:57:38 -04:00
Shell 83e95bdff4
sync smart & dfs (#8672)
Signed-off-by: xqyjlj <xqyjlj@126.com>
Signed-off-by: Shell <smokewood@qq.com>
Co-authored-by: xqyjlj <xqyjlj@126.com>
2024-03-28 23:42:56 +08:00
zms123456 6b5058ba5c
[components/drivers]update hwtimer (#8565) 2024-02-29 22:27:38 +08:00
zms123456 e1fdc13288
[component][drivers]add clk framework (#8213) 2023-12-24 19:53:12 +08:00
zms123456 d01dd05a0c
[kernel][dm]适配新的设备驱动模型 (#8075) 2023-10-18 20:50:30 +08:00
ErikChanHub 2f5e4ac27e
【dd2.0】Support the Core API for dd2.0 (#7791) 2023-07-13 14:49:35 +08:00
wusongjie 8aa4366cb2 Drivers: Support Open Firmware API and model of PIC
We support OFW API to replace fdt old API, and add
IRQ, IO, Platform-Bus, CPUs ... OFW node contorl.
To support work with Device Tree or ACPI in drivers
that use IRQ, we make a programmable interrupt
controller driver's model.

Signed-off-by: GuEe-GUI <GuEe-GUI@github.com>
2023-07-05 16:45:16 +08:00
wusongjie 179157f4e1 Components/drivers: support DM device id management
We add the device name and id set api in DM, now driver
could set name like sprintf without know how many devices
it is.
The misc.h and byteorder.h add some macros to developers
that they always use in drivers.

Signed-off-by: GuEe-GUI <GuEe-GUI@github.com>
2023-07-04 13:55:07 +08:00