forked from XS-MLVP/UnityChipForXiangShan
64 lines
1.5 KiB
C
64 lines
1.5 KiB
C
// control which privilege modes are available
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// MSU means that it can disassemble all instructions
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// M
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// MU: user = true
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// MSU: user = supervisor = true
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#define DEFAULT_PRIV "MSU"
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// XiangShan ISA
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#define CONFIG_DIFF_RVH
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#define CONFIG_DIFF_RVV
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#define CONFIG_DIFF_ZICOND
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#define CONFIG_DIFF_ZICNTR
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#define CONFIG_DIFF_ZIHPM
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// #define CONFIG_DIFF_SDTRIG
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#ifdef CONFIG_DIFF_RVH
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#define RVH_ISA_STRING "H"
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#else
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#define RVH_ISA_STRING ""
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#endif
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#ifdef CONFIG_DIFF_RVV
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#define RVV_ISA_STRING "V"
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#else
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#define RVV_ISA_STRING ""
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#endif
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#ifdef CONFIG_DIFF_ZICOND
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#define ZICOND_ISA_STRING "_zicond"
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#else
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#define ZICOND_ISA_STRING ""
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#endif
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#ifdef CONFIG_DIFF_ZICNTR
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#define ZICNTR_ISA_STRING "_zicntr"
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#else
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#define ZICNTR_ISA_STRING ""
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#endif
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#ifdef CONFIG_DIFF_ZIHPM
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#define ZIHPM_ISA_STRING "_zihpm"
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#else
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#define ZIHPM_ISA_STRING ""
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#endif
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#ifdef CONFIG_DIFF_SDTRIG
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#define SDTRIG_ISA_STRING "_sdtrig"
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#else
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#define SDTRIG_ISA_STRING ""
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#endif
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// Ensure that the isa string is consistent with the isa string of xiangshan.
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#define CONFIG_DIFF_ISA_STRING \
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"RV64IMAFDC" \
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RVV_ISA_STRING \
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RVH_ISA_STRING \
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ZICOND_ISA_STRING \
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ZICNTR_ISA_STRING \
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ZIHPM_ISA_STRING \
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SDTRIG_ISA_STRING \
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"_zba_zbb_zbc_zbs_zbkb_zbkc_zbkx" \
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"_zknd_zkne_zknh_zksed_zksh_zkt" \
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"_zfa_zfhmin" \
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"_svinval_sscofpmf" \
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"_zcb_zicbom_zicboz_zcmop_zimop" \
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"_zfh_zvfh"
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#define DEFAULT_ISA "RV64IMAFDC_zba_zbb_zbc_zbs_zbkb_zbkc_zbkx_zknd_zkne_zknh_zksed_zksh_svinval_zicbom_zicboz"
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