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50 Commits

Author SHA1 Message Date
yeximing 0183b43290
Add "receive prefetch request" testcase (#129) 
* Typo fix and add missing contents.

* Add English version for 03_add_test

* Typo fix

* Add icache submodules for eliminating warning casued by error script

* Add verilator arguments for initializing all interface

* Add 'receive prefetch quest' testcase and corresponding test environment code
 2025-05-20 14:26:48 +08:00
yeximing 78582e48f0
Add English version for "03_add_test" and Typo fix and add missing contents. (#127) 
* Typo fix and add missing contents.

* Add English version for 03_add_test

* Typo fix
 2025-05-12 12:54:55 +08:00
CharlesJunic d354b0077c
update makefile & itlb_env, add generate_dirmap() in functions.py (#121) 
* update makefile & itlb_env, add generate_dirmap() in functions.py

* Update build_ut_frontend_ftq_pc_mem.py

* Update build_ut_frontend_ftq_pd_mem.py

* Delete scripts/generate_dirmap.py

* Update Makefile
 2025-04-24 18:29:37 +08:00
whensungoesdown cd4e5c5e9e
merge instruncache env (#119) 
* add doc and testcases for InstrUncache module

* move instruncache testcases under ut_frontend directory

provides classic version and toffee version

* update README, clear commented code
 2025-04-18 17:35:39 +08:00
yeximing 904f80bc9a
ICache verify enviroment and docs added. (#111) 
* Add icache compile scripts, waylookup enviroment and revise dir_map.f

* Revise icache top compile script and dir_map.f for normal compiling

* Revise icache ctrlunit script and add ctrlunit test enviroment

* Delete unused script

* Add internal signal yaml and revise its responding code in compile script and iprefetchpipe test environment

* Revise internal signals yaml and its corresponding content in script

* Add mainpipe test environment

* Revise internal signals yaml and its corresponding content in script

* Add missunit test environment

* Add task.get_name

* Revise internal signals yaml and its corresponding content in script

* Revise dir_map for right mapping

* Add icache top test environment

* Add icache docs and its pics

* Add icache pic and interfaces

* Add icache _index.md

* Add icache pics

* Add icache submodule docs

* delete copy pic
 2025-04-03 10:10:56 +08:00
CharlesJunic 039e7f65fc
update itlb doc (#109) 2025-03-27 16:46:16 +08:00
FrankOu2001 9bb155dbf3 Adapt the code of ITTAGE to the latest RTL(2025022801 release) 2025-03-25 12:57:53 +08:00
FrankOu2001 dc4dd91fad Adapt the code of TAGE-SC to the latest RTL(2025022801 release) 2025-03-25 12:57:53 +08:00
Knight of Thunder de62e75549
Ftq env (#99) 
* add rtl dir, we don't want to delete this

* scripts

* fix xiangshan-kmh.yaml for ftq_redirect_mem

* scripts for ftq_pd_mem

* add ftq_pd_mem for scripts

* nothing

* change gitignore to push testfile under dut

* add dut dir

* add ftq so for test

* restore .gitignore

* ftq enviroment: scipts

* fix: ftq env scripts

* 删除被提交的dut目录

* restore  dut/__init__.py

* fix the scripts to fit th e latest rtl version which is 25/2/28

* 删除了脚本中一些无效注释
 2025-03-25 12:56:32 +08:00
CharlesJunic 2eb4fd1378
update itlb env (#92) 2025-03-18 14:38:21 +08:00
miceforrat ec9b2b3fda
Ifu top env (#91) 
* add ifu_top env initially

* del 2 files rebased

* modify env according to new rtl
 2025-03-17 10:14:19 +08:00
CharlesJunic 0ca85ce5ac
update makefile & /scripts/: rtl links & itlb funcov (#85) 2025-03-06 15:34:00 +08:00
miceforrat 8fcdd79da7
adapt to the new rtl and keep up with the pred checker changings (#86) 2025-03-06 09:59:17 +08:00
CharlesJunic 3baa11d910
add Itlb submodule (#82) 
* update itlb document, fix readme.md: typos

* add itlb: submodule tlbfa, tlbnonblock, tlbstoragewrapper, tlbuffer
 2025-03-03 14:23:59 +08:00
CharlesJunic 1bcaa98e96
add: itlb env, update /document/zh_cn/docs/verify_env.md & /document/README.md (#74) 2025-02-21 16:44:00 +08:00
FrankOu 2b52958395 Update README.md of BPU.TageSC 2025-02-10 08:17:59 +08:00
FrankOu 614d4d178c Reorganize the verification code of BPU.TageSC. 2025-02-10 08:17:59 +08:00
FrankOu 5ff4f0f0d7 Adapt verification code of BPU.Tage_SC to the latest RTL version(openxiangshan-kmh-ca892e73-25010301). 2025-02-10 08:17:59 +08:00
Frank OU 8e09f7c86a
Add frontend.bpu.ittage test code (#41) 2025-02-06 14:22:10 +08:00
miceforrat 9595c680af
Add submodule interface description (#59) 
* submodule interface docs

* comment added

---------

Co-authored-by: chenjinhua <cjh@DESKTOP-9RFHOPM>
 2025-02-01 19:57:23 +08:00
cjh a86b85e5c6 ifu fit 103 rtl change and doc fix 2025-01-13 20:47:17 +08:00
miceforrat 921282f36c
Merge branch 'main' into main 2024-12-23 21:29:49 +08:00
cjh bb9c6d6add add framework for predecode, f3predecoder, frontend_trigger; framwork includes: bundle, agent, env, test fixture 
predecode framework added

predecode test env constructed

f3predecoder env construction finished

add frontend trigger and some docs
 2024-12-23 17:00:44 +08:00
Zhicheng 187577e01d
Merge pull request #7 from XS-MLVP/wjy-development-branch 
Decoupled checkpoints, added version-tag for testcases, and README for TAGE-SC
 2024-12-20 14:05:54 +08:00
cjh a866912fc3 predecode: io description added in documents 2024-12-18 14:14:46 +08:00
cjh 53f30b46ed rvc expander markdown verified and code little verified 2024-12-17 17:55:13 +08:00
FrankOu2001 47401c5a86 Add README.md for TAGE-SC. 2024-12-17 15:37:24 +08:00
FrankOu2001 990d326f49 Fix some bugs of checkpoints and internal signals bundle of TAGE-SC. 2024-12-17 15:37:24 +08:00
FrankOu2001 e01de136f9 Add tag version for testcase and format code. 2024-12-17 15:37:24 +08:00
FrankOu2001 f7f5f17d67 Add requiring version to test cases of TAGE-SC. 2024-12-17 15:37:24 +08:00
FrankOu2001 efee21a4af Add a new bundle for internal signals of TAGE-SC. 2024-12-17 15:37:24 +08:00
FrankOu2001 38991746c6 Decoupling the functionality of `sc_predict` and `sc_train` from the raw DUT pins for TAGE-SC. 2024-12-17 15:37:24 +08:00
FrankOu2001 c9ef4856fb Initial encapsulation of internal signals for `Tage_SC`, and decoupling the functionality of `tage_predict` and `tage_train` from the raw DUT pins. 2024-12-17 15:37:24 +08:00
cjh 7d081626ce rvc expander doc finished 2024-12-16 12:42:04 +08:00
cjh 8c712c55c2 rvc_expander half 2024-12-16 12:42:04 +08:00
cjh d09f78a58c docs: update docs at 03_add_test/02_build_env; code style: remove some useless commented out code at rvc_expande 2024-12-13 10:51:32 +08:00
cjh 77de7d9748 feature: set up test envionment for pred checker under ifu; set up both 
kinds of environment for RVC expander under ifu; comment out test cases
for rvc expander under decode of ctrl block at backend
 2024-12-12 16:55:22 +08:00
yaozhicheng fcf5ad878b func: refine UT_FCOV 2024-11-22 18:35:48 +08:00
yaozhicheng 0c660054f4 tagesc: up2latest picker 2024-11-20 09:56:38 +08:00
FrankOu2001 961216fced Remove invalid grammar of typing hint for Python3.8. 2024-11-13 17:20:07 +08:00
FrankOu2001 9f15ef61d0 Spilt random test of Tage_SC into 8 subtests with different pc_range to reduce running time. 2024-11-12 16:34:53 +08:00
FrankOu2001 5909d896e6 Tidy up test code of Tage_SC. 2024-11-12 10:44:31 +08:00
FrankOu2001 ed6429973c Make sure that the task is canceled. 2024-11-11 20:19:55 +08:00
FrankOu2001 7205dd5310 Set `cp_lib` option as false. 2024-11-11 20:18:43 +08:00
FrankOu2001 efb11659f1 Change the name of CovGroup 2024-11-11 20:18:12 +08:00
FrankOu2001 8b4d4170c8 Fix error since coroutine task `__clock_loop` is not canceled. 2024-11-11 13:37:58 +08:00
FrankOu2001 770d222ee3 Add `LONG_TIME_RUN` tag for random test. 2024-11-10 21:47:51 +08:00
FrankOu2001 44d6f67283 Add test code for ut_frontend_bpu_tage_sc. 2024-11-10 11:23:02 +08:00
yaozhicheng 398d574af6 update 2024-10-09 20:01:48 +08:00
yaozhicheng 246b53b954 re struct repo 2024-09-19 11:27:43 +08:00