Commit Graph

3396 Commits

Author SHA1 Message Date
Oleg Pipikin 647ef4e701
Remove NGraphFunctions namespace (#23627)
### Details:
 - Remove NGraphFunctions namespace

### Tickets:
 - CVS-133379
2024-03-25 06:00:59 +00:00
Andrew Kwangwoong Park 6d7682c7f5
[GPU] Extend pattern for ClampFP16Output (#23592)
### Details:
- By PR(https://github.com/openvinotoolkit/openvino/pull/22245),
`clamp_fp16_output` opt pass was moved to ngraph
- Because nodes such as eltwise(`Add`, `Subtract`, `Multiply`, `Divide`)
that were fused into target node `gemm` are not supported in pattern,
corresponding pattern was extended for this purpose

### Tickets:
 - 135060
2024-03-25 05:11:56 +00:00
Andrew Kwangwoong Park 133b139292
[GPU] Extend gemm to fuse broadcast and reshape layers (#23513)
### Details:
- Fuse `broadcast` and `reshape` layers into `gemm` layer for LLM's 2nd
latency optimization
     - before : [`broadcast`] --> [`reshape`] --> `gemm`
     - after : `gemm`
- `gemm` is extended to have `input0_target_shape`,
`input1_target_shape`, `input0_output_pattern` and
`input1_output_pattern` from `broadcast` and `reshape` layers

### Tickets:
 - 128343

---------

Signed-off-by: Andrew Park <andrew.park@intel.com>
2024-03-25 01:23:27 +00:00
Irina Efode aebf81419b
[ IE TESTS ] Update tensor comparation function according plugin requirments (#23226)
### Details:
- *Comparation function was changed to compare tensors based on element
comparation*
- *`std::abs(ref_value - plugin_value) <= abs_threshold + rel_threshold
* ref_value`*
- *`abs_threshold ` =
std::max(std::numeric_limits::eps<plugin_element_type>(),
std::numeric_limits::eps<ref_element_type>())*
- *`ref_threshold = eps_by_expected_type()`, which is based on half `bit
length of mantissa`*

### Tickets:
 - [CVS-133173](https://jira.devtools.intel.com/browse/CVS-133173)
 - [CVS-135540](https://jira.devtools.intel.com/browse/CVS-135540)

---------

Co-authored-by: sbalandi <sofya.balandina@intel.com>
2024-03-23 18:08:25 +00:00
Maksim Kutakov 908dac9d5c
[CPU] Fix SDPA pattern matching (#23581)
### Details:
Limit the Concat layer to have maximum 3 children. The third one is
allowed to be a ShapeOf op only (to support Mixtral).

### Tickets:
 - 135375
2024-03-22 18:08:01 +00:00
Irina Efode 791feb469f
[API CONFORMANCE] Modify API conformance suite for SW plugins (#23557)
### Details:
 - *Move some properties from mandatory to optional for sw plugins*
 - *...*

### Tickets:
 - *[133459](https://jira.devtools.intel.com/browse/CVS-133459)*
2024-03-22 09:52:25 +00:00
Aleksandr Voron a47e3f6bdb
[CPU][ARM] Upgrade to ACL v24.02.1 (#22598)
oneDNN PR: https://github.com/openvinotoolkit/oneDNN/pull/227
2024-03-22 09:23:12 +00:00
Vladimir Paramuzov e4c7194cb3
[GPU] Fix count non zero for empty input (#23597)
### Details:
- Adds buffer reset to 0 in `count_nonzero` impl in case of empty input
tensor as currently we may try to allocate random amount of memory in
subsequent `gather_nonzero` call
2024-03-22 06:06:08 +00:00
Edward Shogulin e6f92ace0d
[CPU] [ARM64] jit equal (#23266)
### Details:
 - *[CPU] [AARCH64] jit eltwise Equal

### Tickets:
 - *CVS-134691*
2024-03-22 05:22:00 +00:00
Luo Cheng 1468630a00
[CPU] optimize PagedAttention's shape inference (#23603)
### Details:
 - *Specific shape inference for PagedAttention*
 - *...*

### Tickets:
 - *ticket-id*
2024-03-22 05:20:44 +00:00
Wanglei Shen f514412117
Enable new property model_distribution_policy for CPU inference (#23077)
### Details:
 - *Enable new property model_distribution_policy for CPU inference*
 -- *Add C++ interface and test cases*
 -- *Add Python interface and test cases*

### Tickets:
 - *CVS-127844*
2024-03-21 23:39:32 +00:00
Vladimir Paramuzov 778f280e3d
[GPU] Re-enable memory reuse for gemm (#23600)
### Details:
- Since #22726 gemm is derived from multi-stage impl which had memory
reuse flag enforced to false for all sub-classes.
- This patch enables memory reuse back for gemm kernel to reduce memory
consumption.

### Tickets:
 - *135361*
2024-03-21 20:29:43 +00:00
Edward Shogulin 578d692dad
[CPU] [ARM64] jit select (#23450)
### Details:
 - *[CPU] [AARCH64] jit select*

### Tickets:
 - *CVS-135445*
2024-03-21 17:21:43 +00:00
Zhang Yi 82021a3a17
[CPU]Fix GPT-J RoPE fusion (#23519)
### Details:
 - *Support new RoPE pattern of GPT-J*
- *Local test shows 17 % improvement for 2nd token latency for BF16 in
`Intel(R) Xeon(R) Platinum 8468`*

### Tickets:
 - *CVS-134949*
2024-03-21 10:33:57 +00:00
Bo Liu 12404fcc8b
[CPU] Enable concat nspc layout inplace for urlnet model cases (#23454)
### Details:
- *enable concat nspc layout inplace for channel only cases, with these
concat node use inplace impl, urlnet model gain performance benefits,
and this(intermediate concat node is nspc layout but actually is one
dimension) could be common case especially for models with 1D input*


### Tickets:
 - *130282*
2024-03-21 08:53:37 +00:00
Edward Shogulin c1223f9226
[CPU] [ARM64] jit eltwise: int8 support (#22687)
### Details:
 - *int8 support*

### Tickets:
 - *CVS-128643*
2024-03-21 06:52:45 +00:00
hyunback kim 85a670d868
[GPU] In gemm_tile_kernel, applied to use block read when N and K byte-size is aligned 4. (#23400)
### Details:
- *Element by element read is the bottle-neck in gemm_tiled kernel.
Enable block-read when N and K size are aligned 4byte with N and K are
leftover*.
- *Increasing tile_n_size has performance improvement when m_size and
n_size are not shallow and n_size is aligned at 32.*
 - *Add GEMM_TILE_M/N/K/SIMD environment variables for convenience.*

### Tickets:
 - *134279*

---------

Signed-off-by: hyunback <hyunback.kim@intel.com>
2024-03-21 06:47:35 +00:00
Luo Cheng 326200598a
[CPU] Add PagedAttention support (#23524)
### Details:
 - *Support PagedAttention support, depends on:*
- openvino_contrib:
https://github.com/openvinotoolkit/openvino_contrib/pull/867
    - vLLM: https://github.com/ilya-lavrenov/vllm/pull/4
 - *TODO*
    - Models with alibi feature
   
### Tickets:
 - *[134329](https://jira.devtools.intel.com/browse/CVS-134329)*
 - *[134327](https://jira.devtools.intel.com/browse/CVS-134327)*
2024-03-21 11:33:46 +04:00
Sergey Shlyapnikov 5a0d71a9ad
[GPU] Enable 8bit compression support on dGPU via oneDNN (#22740)
### Details:
 - Enable 8bit compression support on dGPU via oneDNN
 - Update oneDNN version
 - Enable oneDNN primitives cache

Ticket: 124115
2024-03-21 05:27:20 +00:00
Taylor Yeonbok Lee afd444a119
[GPU] Increase FC tile_b size for INT4 shape agnostic kernel (#23532)
### Details:
- Increased FC tile_B size for INT4 shape agnostic kernel for improving
context processing


### Tickets:
 - 133444
2024-03-21 00:20:40 +00:00
Eddy Kim 3d45a64496
[GPU] Fixed not to set GATHER_AXIS_SHAPE_INFO_INDEX when input0 is static (#23548)
### Details:
- This PR fixes `Gather` not to set GATHER_AXIS_SHAPE_INFO_INDEX when
input0 is static.
 - It enables some functional tests again.
2024-03-20 00:38:14 +00:00
Pavel Durandin 1516f6ec04
[GPU] Fix SIMD for non supporting platforms (#23540)
### Details:
 - Check is simd 8 is supported

### Tickets:
 - *[CVS-133769](https://jira.devtools.intel.com/browse/CVS-133769)*
2024-03-19 16:55:45 +00:00
Aleksandr Voron 93765bc121
[CPU][ARM] Make f16 precision as default for CNN (#22839) 2024-03-19 13:04:39 +00:00
Jade Cho 2e4e73393e
[GPU] Remove unused formats (#23431)
+ Most of them are in onednn weights format.

### Tickets:
 - *119476*
2024-03-19 12:57:59 +00:00
Kelvin Choi 7c6d29b6db
[GPU] Fix dynamic loop's not matched issue during multiple shapes are inferenced (#22806)
### Details:
- *Fix the issue which second infer with updated shape in dynamic loop
doesn't update sliced layout.*
- *Fix the issue that the optimized reshape doesn't reinterpret output
memory in update_output_layout()*

### Tickets:
 - *122739*
 - *131544*
2024-03-18 17:55:00 +00:00
Haiqi Pan d5b81f1c80
[API][AUTO] Fail to get PERF_COUNT from compiled_model (#23123)
### Details:
 - *Fail to get PERF_COUNT from compiled_model*

### Tickets:
 - *CVS-130349*
2024-03-18 10:09:30 +00:00
Pawel Raasz fd93e3b33f
[core] Low precision element iterator and `u2, u3, u6` types (#23279)
### Details:
 - Introduce new low precision types `u2`, `u3`, `u6`.
- Introduce `ov::element::Iterator` for low precision types like `u1,
u2, u3, u4, i4, u6`:
- Gives pointer like access to low precision values in Tensor,
containers etc.
- Can be used by STL algorithms to access data in unified algorithms for
data manipulation.
- Can be used in Constant, Convert operators to replace duplicate
implementations for accessing low precision data (bin-size reduction).
- Can be used for operator reference implementation or plugin if there
is no hardware specific solution.
   
   
     

### Tickets:
 - [CVS-126998](https://jira.devtools.intel.com/browse/CVS-126998)
- Part of
[CVS-128024](https://jira.devtools.intel.com/browse/CVS-128024)
2024-03-18 07:51:59 +00:00
Andrei Gorbachev 22bd6ff049
[GPU] Refactor (#23472)
### Details:
 - *experimental_detectron_prior_grid_generator*

### Tickets:
 - *CSV-131562*
2024-03-15 11:46:26 +00:00
Ivan Tikhonov 98dee95096
Move NopStridedSlice to Common transformation and disable it on GPU (#23385)
### Details:
NopStridedSlice in MOC caused accuracy issues on GPU because of
incorrect dynamic paddings handling in Unsqueeze operation.
As a temporary solution, we decided to move NopStridedSlice to Common
transformations and disable it for GPU:

### Tickets:
 - *CVS-135242*

Co-authored-by: Pavel Durandin <pavel.durandin@intel.com>
2024-03-15 10:42:46 +00:00
Vladislav Golubev 6f8b70f245
[CPU] MergeTransposeReorder extending (#18999)
### Details:
 - *MergeTransposeReorder: reverse operations order support*
- *MergeTransposeReorder: reshape between Transpose and Reorder is
supported with the following limitations:*
 
- Direct order (Transpose -> Reshape -> Reorder): reshape which
separates one of the dimension on 2 consecutive ones
- reverse order: (Reorder -> Reshape -> Transpose): reshape which fuses
2 consecutive dimensions into one

- Common code, which performs the fusion, is moved to a separate
function.


### Tickets:
 - *CVS-113363*
2024-03-15 09:39:14 +00:00
cecilia peng c04ed93342
[CPU] Optimize infer request outputs memory sharing (#22372)
### Details:
- *change the default case resolution policy so that it resolves cyclic
inplace to downstream instead of upstream for outputs.*
- *this is a more optimal decision as more cases are going to reuse
infer request's memory in PullOutputData.*

### Tickets:
 - *116823*
 - *120566*

This reopens legacy PR
https://github.com/openvinotoolkit/openvino/pull/19684 as more models
requires this feature.

---------

Co-authored-by: Maksim Kutakov <maxim.kutakov@gmail.com>
2024-03-15 08:59:53 +00:00
Eddy Kim 8da31d691c
[GPU] Fix several errors (#22923)
### Details:
- fixed `GatherCompressed` not to reshape to 2d if there is no reshape
layer
 - fixed a bug in `gemm_inst::transform_output_layout`
- updated to propagate dependent events to its users if it is in
`shape-of_subgraph`
2024-03-15 07:41:10 +00:00
Edward Shogulin 307d0fec6e
[CPU] [ARM64] jit clamp (#23086)
### Details:
 - *[CPU] [AARCH64] jit eltwise Clamp

### Tickets:
 - *CVS-133829*
2024-03-15 05:36:30 +00:00
Fang Xu 3a4d1ff4dd
enable CMAKE_COMPILE_WARNING_AS_ERROR on windows (#23267)
### Details:
 - *enable CMAKE_COMPILE_WARNING_AS_ERROR on windows*

### Tickets:
 - *CVS-120604*
2024-03-15 05:34:54 +00:00
Egor Duplenskii bd734284bf
[CPU] Fix primitive attributes creation for 1x1 Convolution as FC executor (#23272)
### Details:
 - By providing correct output dimensions.

### Tickets:
 - 134466

---------

Co-authored-by: Maksim Kutakov <maksim.kutakov@intel.com>
2024-03-14 14:21:15 +00:00
Nesterov Alexander 5dc22c1c18
[ARM CPU] Fix AUGRU layer in dien.xml model (#21925)
### Details:
 - *Fixed problem with precision in RNN and TensorIterator layers*
 - *Corrected shape calculation of current layers in ACL Scheduler*

### Tickets:
 - CVS-123900
 - CVS-134520
2024-03-14 14:19:31 +00:00
Edward Shogulin 8aac23bac1
[CPU] [ARM64] jit divide (#23286)
### Details:
 - *[CPU] [AARCH64] jit divide*

### Tickets:
 - *CVS-134747*
2024-03-14 14:18:05 +00:00
Xuejun Zhai 7b26e5b799
[CPU Plugin] Clean legacy name (#23035)
### Details:
 - *item1*
 - *...*

### Tickets:
 - *CVS-132085*

---------

Signed-off-by: Zhai, Xuejun <xuejun.zhai@intel.com>
2024-03-14 12:43:50 +00:00
Piotr Krzemiński fa611231be
[Coverity] Fix Inverse uninitialized variable (#23133)
### Details:
 - set m_adjoint false
 - set element_type to fp32

### Tickets:
 - 133875

Co-authored-by: Michal Lukaszewski <michal.lukaszewski@intel.com>
2024-03-14 11:35:52 +00:00
Przemyslaw Wysocki e9cfa05b0b
[Core] Add MaxPool-14 and AvgPool-14 (#22796)
### Details:
 - Core implementation of MaxPool-14 and AvgPool-14
- They both introduce a new ceil mode:
`ov::op::RoundingType::CEIL_TORCH`
- The new ceiling mode does not allow the last pooling in a Dimension to
start in the padding area
 - No changes to reference implementation were necessary

### Related PRs
-
[Specification](https://github.com/openvinotoolkit/openvino/pull/22930)
 - [Python API](https://github.com/openvinotoolkit/openvino/pull/22966)
 - [PT FE](https://github.com/openvinotoolkit/openvino/pull/23027)
- [Downgrade
transformations](https://github.com/openvinotoolkit/openvino/pull/23381)

### Tickets:
 - 131961

### Context
https://github.com/openvinotoolkit/openvino/issues/18731

---------

Co-authored-by: Pawel Raasz <pawel.raasz@intel.com>
2024-03-14 10:00:52 +00:00
Jacek Pawlak 239466ca5d
copyright year update (#23370)
New PR due to merge
conflicts(https://github.com/openvinotoolkit/openvino/pull/22917)

Updated the copyright year from 2018-2023 to 2018-2024 in all openvino
files

Ref. to script: CVS-101144

Command used:
```bash
git grep -lz '2018-2023 Intel Corporation' | xargs -0 sed -i '' -e 's/2018-2023 Intel Corporation/2018-2024 Intel Corporation/g'
```
2024-03-14 09:37:02 +00:00
Alexandra Sidorova 8ba1ae39ef
[Snippets][CPU] Fixed isSuitableChildForFusingMatMul (#23182)
### Details:
- *The pass `isSuitableChildForFusingMatMul` first checked that the
`node` has constant inputs, without checking what the `node` type is and
what parent is. It leaded to infinity checks for constant path for the
node which cannot be even fused to `MatMul`. Thus, no make sense to
check that parent `MatMul` has `constant` path.*
 - *The PR refactored check `isSuitableChildForFusingMatMul`*:
- *Firstly, we check for possible fusion `MatMul (FC)` with `Bias` and
`DQScales` based on node type;*
- *Secondly, we add specific checks from `MatMul::CanFuse` for binary
`Eltwise` and `FQ`. Moreover, this code has been updated for the first
time since Snippets support!*
- *Thirdly, we check that the node is supported for fusion with `MatMul`
(is `Eltwise` op at least) and only after that (!) we check for constant
input paths for inputs that are not `MatMul` path to avoid endless
searches.*
- *Added additional `NodeFusingType` for `FullyConnected` to make the
code clearer: now we can init `channelAxis` correctly and separate
additional checks in `MatMul::CanFuse`*

### Tickets:
 - *CVS-134292*


### TODO:
- [x] *Performance Validation (Passed - the report is attached to the
ticket)*
2024-03-14 09:07:19 +00:00
Alexandra Sidorova 3a3f323167
[Snippets] Added dynamism support to lowered passes (#21895)
### Details:
 - *Added dynamism support to lowered passes*
- *Brgemm related passes aren't affected (will be updated in the
corresponding tasks to dynamic brgemm support)*

### Tickets:
 - *123272*

### Prerequisites:
- https://github.com/openvinotoolkit/openvino/pull/21934
- https://github.com/openvinotoolkit/openvino/pull/21881
2024-03-14 09:06:58 +00:00
Roman Lyamin 953e6a0325
[GPU] Remove use of legacy names (#23386)
### Tickets:
 - *132084*
2024-03-14 07:08:09 +00:00
Alexandra Sidorova 9003d04998
[Snippets][CPU] Adjusted BF16 | INT8 MHA tokenization condition (#22942)
### Details:
- *Adjusted BF16 | INT8 MHA tokenization condition : removed this
condition. The performance validation results are attached to the
ticket*

### Tickets:
 - *130837*
2024-03-13 19:26:53 +00:00
Egor Duplenskii e8b30887cd
[CPU] Fix caching executors in factory (#23423)
### Details:
 - Put executor into the cache after it is created
2024-03-13 15:43:57 +00:00
Vladislav Golubev dfc39c0d17
[Snippets][AMX] Perform amx_tile_configure only when necessary (#23016)
### Details:
- Currently, `amx_tile_configure` in brgemm emitter is called for each
inference whereas reconfiguration can be called only when input shapes
are differ from previous inference. This PR introduces `amx_tile_config`
structure with the latest used dimensions. The structure is passed as a
runtime argument in compiled kernel. Brgemm emitter gets the structure
and checks if the current shapes are the same as previous. If they are
the same, `amx_tile_configure` is skipped. Otherwise, the
reconfiguration is called, and `amx_tile_config` is updated with new
shapes.

### Tickets:
 - *CVS-125676*
2024-03-13 15:32:24 +00:00
Eddy Kim be0c954fd2
[GPU] Skip broadcast when input and output shapes are identical (#23331)
### Details:
- This PR makes some `Broadcast` layers to be skipped if input and
output shapes are same.

### Tickets:
 - 135100
2024-03-13 02:18:06 +00:00
Wilson Seok 1a769ce499
[GPU] Move event completion wait to first of execute_impl (#23363)
### Details:
 - Move event completion wait to first of execute_impl

### Tickets:
 - 129373
2024-03-13 01:27:01 +00:00
Edward Shogulin 5d032b1524
[CPU] [ARM64] jit prelu (#23115)
### Details:
 - *[CPU] [AARCH64] jit eltwise PReLU

### Tickets:
 - *CVS-134011*
2024-03-13 00:43:01 +00:00