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Merge pull request #10 from lebrush/flash-infomem 

Implementation of FCTL4 and infomem flash registers
This commit is contained in:
Joakim Eriksson 2013-08-12 00:17:37 -07:00
parent d19bfb1493 6d758eada5
commit a2b60e1cf8
1 changed files with 29 additions and 1 deletions
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30
se/sics/mspsim/core/Flash.java
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@ -32,6 +32,7 @@
*/
/**
* @author Klaus Stengel <siklsten@informatik.stud.uni-erlangen.de>
* @author Víctor Ariño <victor.arino@tado.com>
*/
package se.sics.mspsim.core;
@ -47,6 +48,9 @@ public class Flash extends IOUnit {
private static final int FCTL2 = 0x02;
private static final int FCTL3 = 0x04;
private static final int FCTL4 = 0x06;
/* Size of the flash controller */
public static final int SIZE = 8;
private static final int FRKEY = 0x9600;
private static final int FWKEY = 0xA500;
@ -100,6 +104,7 @@ public class Flash extends IOUnit {
private static final int BLOCKWRITE_END_TIME = 6;
private static final int FN_MASK = 0x3f;
private static final int LOCKINFO = 0x80;
private FlashRange main_range;
private FlashRange info_range;
@ -115,6 +120,15 @@ public class Flash extends IOUnit {
private WriteMode currentWriteMode;
private int blockwriteCount;
/**
* Infomem Configurations
*/
private int infomemcfg = 0;
/**
* Whether the infomem is locked or not
*/
private boolean lockInfo = true;
private TimeEvent end_process = new TimeEvent(0) {
public void execute(long t) {
blocked_cpu = false;
@ -252,6 +266,12 @@ public class Flash extends IOUnit {
return;
}
if (lockInfo && info_range.isInRange(address)) {
if (DEBUG) {
log("Write to infomem blocked because of LOCKINFO flag.");
}
}
if (cpu.isFlashBusy || wait == false) {
if (!((mode & BLKWRT) != 0 && wait)) {
triggerAccessViolation("Flash write prohbited while BUSY=1 or WAIT=0");
@ -400,6 +420,9 @@ public class Flash extends IOUnit {
return retval;
}
if (address == FCTL4) {
return infomemcfg | FRKEY;
}
return 0;
}
@ -496,7 +519,8 @@ public class Flash extends IOUnit {
return;
}
if (!(address == FCTL1 || address == FCTL2 || address == FCTL3)) {
if (!(address == FCTL1 || address == FCTL2 || address == FCTL3
|| address == FCTL4)) {
return;
}
@ -573,6 +597,10 @@ public class Flash extends IOUnit {
statusreg ^= ACCVIFG;
}
break;
case FCTL4:
lockInfo = (regdata & LOCKINFO) > 0;
infomemcfg = regdata;
break;
}
}