natas_hw
/
mspsim
mirror of https://github.com/contiki-ng/mspsim
0
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Moved the cpu reference to IOUnit as it is needed by most IO units

This commit is contained in:
Niclas Finne 2012-05-25 17:29:55 +02:00
parent d551aa7d06
commit 15539b97fd
19 changed files with 103 additions and 148 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
se/sics/mspsim/config/MSP430f1611Config.java
View File

@ -92,7 +92,7 @@ public class MSP430f1611Config extends MSP430Config {
ioUnits.add(usart0);
ioUnits.add(usart1);
DMA dma = new DMA("dma", cpu.memory, 0, cpu);
DMA dma = new DMA("dma", cpu, cpu.memory, 0);
for (int i = 0, n = 24; i < n; i++) {
cpu.memOut[0x1E0 + i] = dma;
cpu.memIn[0x1E0 + i] = dma;

15
se/sics/mspsim/core/ADC12.java
View File

@ -103,8 +103,6 @@ public class ADC12 extends IOUnit {
public static final int CONSEQ_REPEAT_SEQUENCE = 0x03;
public static final int CONSEQ_SEQUENCE_MASK = 0x01;
private final MSP430Core core;
private int adc12ctl0 = 0;
private int adc12ctl1 = 0;
private int[] adc12mctl = new int[16];
@ -134,15 +132,14 @@ public class ADC12 extends IOUnit {
private TimeEvent adcTrigger = new TimeEvent(0) {
public void execute(long t) {
// System.out.println(getName() + " **** executing update timers at " + t + " cycles=" + core.cycles);
// System.out.println(getName() + " **** executing update timers at " + t + " cycles=" + cpu.cycles);
convert();
}
};
public ADC12(MSP430Core cpu) {
super("ADC12", cpu.memory, 0);
core = cpu;
super("ADC12", cpu, cpu.memory, 0);
}
public void reset(int type) {
@ -193,7 +190,7 @@ public class ADC12 extends IOUnit {
isConverting = true;
adc12Pos = startMem;
int delay = adcDiv * ((adc12Pos < 8 ? shTime0 : shTime1) + 13);
core.scheduleTimeEvent(adcTrigger, core.getTime() + delay);
cpu.scheduleTimeEvent(adcTrigger, cpu.getTime() + delay);
}
break;
case ADC12CTL1:
@ -251,7 +248,7 @@ public class ADC12 extends IOUnit {
adc12ifg &= ~(1 << reg);
// System.out.println("Read ADCMEM" + (reg / 2));
if (adc12iv == reg * 2 + 6) {
core.flagInterrupt(adc12Vector, this, false);
cpu.flagInterrupt(adc12Vector, this, false);
adc12iv = 0;
// System.out.println("** de-Trigger ADC12 IRQ for ADCMEM" + adc12Pos);
}
@ -278,7 +275,7 @@ public class ADC12 extends IOUnit {
// This should check if there already is an higher iv!
adc12iv = adc12Pos * 2 + 6;
//System.out.println("** Trigger ADC12 IRQ for ADCMEM" + adc12Pos);
core.flagInterrupt(adc12Vector, this, true);
cpu.flagInterrupt(adc12Vector, this, true);
}
if ((conSeq & CONSEQ_SEQUENCE_MASK) != 0) {
// Increase
@ -296,7 +293,7 @@ public class ADC12 extends IOUnit {
isConverting = false;
} else {
int delay = adcDiv * ((adc12Pos < 8 ? shTime0 : shTime1) + 13);
core.scheduleTimeEvent(adcTrigger, adcTrigger.time + delay);
cpu.scheduleTimeEvent(adcTrigger, adcTrigger.time + delay);
}
}

15
se/sics/mspsim/core/BasicClockModule.java
View File

@ -61,8 +61,6 @@ public class BasicClockModule extends ClockSystem {
private static final int MIN_DCO_FRQ = 1000;
private static final int DCO_FACTOR = (MAX_DCO_FRQ - MIN_DCO_FRQ) / 2048;
private MSP430Core core;
private Timer[] timers;
private int dcoFrequency;
@ -84,8 +82,7 @@ public class BasicClockModule extends ClockSystem {
*
*/
public BasicClockModule(MSP430Core core, int[] memory, int offset, Timer[] timers) {
super("BasicClockModule", memory, offset);
this.core = core;
super("BasicClockModule", core, memory, offset);
this.timers = timers;
// reset(0);
}
@ -103,9 +100,9 @@ public class BasicClockModule extends ClockSystem {
}
public void reset(int type) {
write(DCOCTL, 0x60, false, core.cycles);
write(BCSCTL1, 0x84, false, core.cycles);
write(BCSCTL2, 0, false, core.cycles);
write(DCOCTL, 0x60, false, cpu.cycles);
write(BCSCTL1, 0x84, false, cpu.cycles);
write(BCSCTL2, 0, false, cpu.cycles);
}
// do nothing?
@ -141,7 +138,7 @@ public class BasicClockModule extends ClockSystem {
if (DEBUG) log("Write: BCM BCSCTL1: RSel:" + resistorSel +
" DivACLK:" + divAclk + " ACLKFrq: " +
ACLK_FRQ / divAclk);
core.setACLKFrq(ACLK_FRQ / divAclk);
cpu.setACLKFrq(ACLK_FRQ / divAclk);
updateTimers(cycles);
break;
case BCSCTL2:
@ -164,7 +161,7 @@ public class BasicClockModule extends ClockSystem {
if (newcalcDCOFrq != calcDCOFrq) {
calcDCOFrq = newcalcDCOFrq;
if (DEBUG) log("BCM DCO_Speed: " + calcDCOFrq);
core.setDCOFrq(calcDCOFrq, calcDCOFrq / divSMclk);
cpu.setDCOFrq(calcDCOFrq, calcDCOFrq / divSMclk);
updateTimers(cycles);
}
}

4
se/sics/mspsim/core/ClockSystem.java
View File

@ -47,8 +47,8 @@ public abstract class ClockSystem extends IOUnit {
public abstract int getAddressRangeMin();
public abstract int getAddressRangeMax();
public ClockSystem(String type, int[] memory, int offset) {
super(type, memory, offset);
public ClockSystem(String type, MSP430Core cpu, int[] memory, int offset) {
super(type, cpu, memory, offset);
}
}

9
se/sics/mspsim/core/DMA.java
View File

@ -176,19 +176,16 @@ public class DMA extends IOUnit {
private Channel channels[] = new Channel[3];
private int dmactl0;
private int dmactl1;
MSP430Core cpu;
/* MAX 16 triggers ? */
private DMATrigger[] dmaTrigger = new DMATrigger[16];
private int[] dmaTriggerIndex = new int[16];
public DMA(String id, int[] memory, int offset, MSP430Core msp430Core) {
super(id, memory, offset);
public DMA(String id, MSP430Core cpu, int[] memory, int offset) {
super(id, cpu, memory, offset);
channels[0] = new Channel(0);
channels[1] = new Channel(1);
channels[2] = new Channel(2);
this.cpu = msp430Core;
}
public void setInterruptMultiplexer(InterruptMultiplexer interruptMultiplexer) {

6
se/sics/mspsim/core/Flash.java
View File

@ -100,10 +100,8 @@ public class Flash extends IOUnit {
private static final int FN_MASK = 0x3f;
private final MSP430Core cpu;
private FlashRange main_range;
private FlashRange info_range;
private int[] memory;
private int mode; /* FCTL1 */
private int clockcfg; /* FCTL2 */
@ -167,9 +165,7 @@ public class Flash extends IOUnit {
public Flash(MSP430Core cpu, int[] memory, FlashRange main_range,
FlashRange info_range, int offset) {
super("Flash", "Internal Flash", memory, offset);
this.cpu = cpu;
this.memory = memory;
super("Flash", "Internal Flash", cpu, memory, offset);
this.main_range = main_range;
this.info_range = info_range;
locked = true;

9
se/sics/mspsim/core/GenericUSCI.java
View File

@ -61,9 +61,8 @@ public class GenericUSCI extends IOUnit implements DMATrigger, USARTSource {
/* always on for now - but SWRST controls it */
private boolean moduleEnabled = true;
protected MSP430Core cpu;
private int uartIndex;
private int vector;
private final int uartIndex;
private final int vector;
private TimeEvent txTrigger = new TimeEvent(0) {
public void execute(long t) {
@ -74,11 +73,9 @@ public class GenericUSCI extends IOUnit implements DMATrigger, USARTSource {
public GenericUSCI(MSP430Core cpu, int uartIndex, int[] memory, MSP430Config config) {
super(config.uartConfig[uartIndex].name, config.uartConfig[uartIndex].name, memory,
config.uartConfig[uartIndex].offset);
super(config.uartConfig[uartIndex].name, cpu, memory, config.uartConfig[uartIndex].offset);
/* do some stuff ? */
this.cpu = cpu;
this.uartIndex = uartIndex;
MSP430Config.UARTConfig uartConfig = config.uartConfig[uartIndex];

4
se/sics/mspsim/core/IOPort.java
View File

@ -45,7 +45,6 @@ public class IOPort extends IOUnit {
private final int port;
private final int interrupt;
private final MSP430Core cpu;
// External pin state!
private int pinState[] = new int[8];
@ -115,12 +114,11 @@ public class IOPort extends IOUnit {
*/
public IOPort(MSP430Core cpu, int port,
int interrupt, int[] memory, int offset) {
super("P" + port, "Port " + port, memory, offset);
super("P" + port, "Port " + port, cpu, memory, offset);
this.port = port;
this.interrupt = interrupt;
this.ie = 0;
this.ifg = 0;
this.cpu = cpu;
if (interrupt == 0) {
portMap = PORTMAP_NO_INTERRUPT;

18
se/sics/mspsim/core/IOUnit.java
View File

@ -27,16 +27,12 @@
*
* This file is part of MSPSim.
*
* $Id$
*
* -----------------------------------------------------------------
*
* IOUnit
*
* Author : Joakim Eriksson
* Created : Sun Oct 21 22:00:00 2007
* Updated : $Date$
* $Revision$
*/
package se.sics.mspsim.core;
@ -45,26 +41,28 @@ import java.io.PrintStream;
public abstract class IOUnit implements InterruptHandler, Loggable {
int[] memory;
int offset;
protected final MSP430Core cpu;
protected final int[] memory;
protected final int offset;
protected final String id;
protected final String name;
private StateChangeListener stateListener;
private int ioState;
protected EmulationLogger logger;
private PrintStream log;
protected boolean DEBUG = false;
public IOUnit(String id, int[] memory, int offset) {
this(id, id, memory, offset);
public IOUnit(String id, MSP430Core cpu, int[] memory, int offset) {
this(id, id, cpu, memory, offset);
}
public IOUnit(String id, String name, int[] memory, int offset) {
public IOUnit(String id, String name, MSP430Core cpu, int[] memory, int offset) {
this.id = id;
this.name = name;
this.cpu = cpu;
this.memory = memory;
this.offset = offset;
}

8
se/sics/mspsim/core/InterruptMultiplexer.java
View File

@ -2,11 +2,11 @@ package se.sics.mspsim.core;
public class InterruptMultiplexer implements InterruptHandler {
private final MSP430Core cpu;
private final int vector;
int interruptBits;
MSP430Core cpu;
int vector;
public InterruptMultiplexer(MSP430Core cpu, int vector) {
this.cpu = cpu;
this.vector = vector;

2
se/sics/mspsim/core/MSP430Core.java
View File

@ -200,7 +200,7 @@ public class MSP430Core extends Chip implements MSP430Constants {
System.out.println("Set up MSP430 Core with " + MAX_MEM + " bytes memory");
/* this is for detecting writes/read to/from non-existing IO */
IOUnit voidIO = new IOUnit(id, memory, 0) {
IOUnit voidIO = new IOUnit(id, cpu, memory, 0) {
public void interruptServiced(int vector) {
}
public void write(int address, int value, boolean word, long cycles) {

20
se/sics/mspsim/core/Multiplier.java
View File

@ -64,8 +64,6 @@ public class Multiplier extends IOUnit {
private int sumext;
private int op1;
MSP430Core core;
private boolean signed = false;
private boolean accumulating = false;
@ -73,9 +71,8 @@ public class Multiplier extends IOUnit {
* Creates a new <code>Multiplier</code> instance.
*
*/
public Multiplier(MSP430Core core, int memory[], int offset) {
super("Multiplier", "Hardware Multiplier", memory, offset);
this.core = core;
public Multiplier(MSP430Core cpu, int memory[], int offset) {
super("Multiplier", "Hardware Multiplier", cpu, memory, offset);
}
public int read(int address, boolean word, long cycles) {
@ -99,19 +96,15 @@ public class Multiplier extends IOUnit {
case SUMEXT:
if (DEBUG) log("read sumext: " + sumext);
return sumext;
default:
logw("read unhandled address: 0x" + Utils.hex(address, 4));
return 0;
}
logw("read other address:" + address);
return 0;
}
public void write(int address, int data, boolean word, long cycles) {
if (DEBUG) {
log("write to: " + Utils.hex16(address) + " data = " + data + " word = " + word);
}
if (MSP430Constants.DEBUGGING_LEVEL > 0) {
System.out.println("Write to HW Multiplier: " +
Integer.toString(address, 16) +
" = " + data);
log("write to: $" + Utils.hex(address, 4) + " data = " + data + " word = " + word);
}
switch(address) {
case MPY:
@ -181,6 +174,7 @@ public class Multiplier extends IOUnit {
}
}
@Override
public void interruptServiced(int vector) {
}
}

4
se/sics/mspsim/core/Multiplier32.java
View File

@ -101,8 +101,8 @@ public class Multiplier32 extends IOUnit {
* Creates a new <code>Multiplier32</code> instance.
*
*/
public Multiplier32(MSP430Core core, int memory[], int offset) {
super("Multiplier32", "Hardware Multiplier 32", memory, offset);
public Multiplier32(MSP430Core cpu, int memory[], int offset) {
super("Multiplier32", "Hardware Multiplier 32", cpu, memory, offset);
}
@Override

9
se/sics/mspsim/core/SFR.java
View File

@ -60,20 +60,15 @@ public class SFR extends IOUnit {
private int me1 = 0;
private int me2 = 0;
private int[] memory;
private MSP430Core cpu;
/* 64 = max number of interrupts */
private SFRModule[] sfrModule = new SFRModule[64];
private int[] irqVector = new int[64];
private boolean[] irqTriggered = new boolean[64];
private boolean[] autoclear = new boolean[64];
private int[] irqTriggeredPos = new int[64];
public SFR(MSP430Core cpu, int[] memory) {
super("SFR", "Special Function Register", memory, 0);
this.cpu = cpu;
this.memory = memory;
super("SFR", "Special Function Register", cpu, memory, 0);
reset(0);
}

70
se/sics/mspsim/core/Timer.java
View File

@ -198,8 +198,7 @@ public class Timer extends IOUnit {
private final int ccr1Vector;
private final int ccr0Vector;
private final MSP430Core core;
// Support variables Max 7 compare regs for now (timer b)
private final int noCompare;
@ -238,7 +237,7 @@ public class Timer extends IOUnit {
//System.out.println("**** IGNORING EXECUTION OF CCR - timer stopped!!!");
return;
}
long cycles = core.cycles;
long cycles = cpu.cycles;
updateCounter(cycles);
if (expCaptureTime != -1 && cycles >= expCaptureTime) {
@ -290,11 +289,11 @@ public class Timer extends IOUnit {
if ((tcctl & CC_TRIGGER_INT) == CC_TRIGGER_INT) {
if (index == 0) {
log("triggering interrupt");
core.flagInterrupt(interruptVector, Timer.this, true);
cpu.flagInterrupt(interruptVector, Timer.this, true);
} else if (lastTIV == 0) {
lastTIV = index * 2;
log("triggering interrupt TIV: " + lastTIV);
core.flagInterrupt(interruptVector, Timer.this, true);
cpu.flagInterrupt(interruptVector, Timer.this, true);
} else if (lastTIV > index * 2) {
/* interrupt already triggered, but set to this lower IRQ */
lastTIV = index * 2;
@ -311,21 +310,21 @@ public class Timer extends IOUnit {
boolean clkSource = false;
if (clockSource == SRC_SMCLK) {
frqClk = core.smclkFrq / inputDivider;
frqClk = cpu.smclkFrq / inputDivider;
} else if (clockSource == SRC_ACLK) {
frqClk = core.aclkFrq / inputDivider;
frqClk = cpu.aclkFrq / inputDivider;
}
// Handle the captures...
if (captureOn) {
if (inputSrc == SRC_ACLK) {
divisor = core.aclkFrq;
divisor = cpu.aclkFrq;
clkSource = true;
}
if (DEBUG) {
log("expCapInterval[" + index + "] frq = " +
frqClk + " div = " + divisor + " SMCLK_FRQ: " + core.smclkFrq);
frqClk + " div = " + divisor + " SMCLK_FRQ: " + cpu.smclkFrq);
}
// This is used to calculate expected time before next capture of
@ -355,9 +354,9 @@ public class Timer extends IOUnit {
public void update() {
/* schedule this capture register for update*/
if (expCaptureTime != -1 && expCaptureTime != time) {
if (DEBUG) log(core.cycles + ":" + ">> SCHEDULING " + getName() + " = " + tccr +
if (DEBUG) log(cpu.cycles + ":" + ">> SCHEDULING " + getName() + " = " + tccr +
" TR: " + counter + " at: " + expCaptureTime);
core.scheduleCycleEvent(this, expCaptureTime);
cpu.scheduleCycleEvent(this, expCaptureTime);
}
}
@ -397,12 +396,12 @@ public class Timer extends IOUnit {
// This should be updated whenever clockspeed changes...
nextTimerTrigger = (long) (nextTimerTrigger + 0x10000 * cyclesMultiplicator);
// System.out.println("*** scheduling counter trigger..." + nextTimerTrigger + " now = " + t);
core.scheduleCycleEvent(this, nextTimerTrigger);
cpu.scheduleCycleEvent(this, nextTimerTrigger);
if (lastTIV == 0 && interruptEnable) {
lastTIV = memory[tiv] = timerOverflow;
core.flagInterrupt(ccr1Vector, Timer.this, true);
cpu.flagInterrupt(ccr1Vector, Timer.this, true);
} else {
// System.out.println("*** Did not trigger interrupt: " + interruptEnable);
}
@ -420,10 +419,9 @@ public class Timer extends IOUnit {
*
*/
public Timer(MSP430Core core, int[] memory, MSP430Config.TimerConfig config) {
super(config.name, config.name, memory, config.offset);
public Timer(MSP430Core cpu, int[] memory, MSP430Config.TimerConfig config) {
super(config.name, config.name, cpu, memory, config.offset);
this.srcMap = config.srcMap;
this.core = core;
// noCompare = (srcMap.length / 4) - 1;
noCompare = config.ccrCount;
if (srcMap == TIMER_Ax149) {
@ -566,7 +564,7 @@ public class Timer extends IOUnit {
/* if ACLK we can calculate edge... */
if (ccr[cctl].inputSrc == SRC_ACLK) {
/* needs the TimerA clock speed here... */
int aTicks = clockSpeed / core.aclkFrq;
int aTicks = clockSpeed / cpu.aclkFrq;
updateCounter(cycles);
/* only calculate this if clock runs faster then ACLK - otherwise it
@ -587,14 +585,14 @@ public class Timer extends IOUnit {
}
} else if (lastTIV / 2 < noCompare) {
if (DEBUG) {
log(core.cycles + ": Clearing IFG for CCR" + (lastTIV/2));
log(cpu.cycles + ": Clearing IFG for CCR" + (lastTIV/2));
}
// Clear interrupt flags!
ccr[lastTIV / 2].tcctl &= ~CC_IFG;
}
/* flag this interrupt off */
core.flagInterrupt(ccr1Vector, this, false);
cpu.flagInterrupt(ccr1Vector, this, false);
lastTIV = 0;
/* reevaluate interrupts for the ccr1 vector - possibly flag on again... */
@ -603,7 +601,7 @@ public class Timer extends IOUnit {
}
/* if the timer overflow interrupt is triggering - lowest priority => signal! */
if (lastTIV == 0 && interruptEnable & interruptPending) {
core.flagInterrupt(ccr1Vector, this, true);
cpu.flagInterrupt(ccr1Vector, this, true);
}
}
@ -664,7 +662,7 @@ public class Timer extends IOUnit {
ccr[i].timerStarted(cycles);
}
if (DEBUG) log(core.cycles + ": Timer started: " + counter + " CCR1:" + ccr[1].expCaptureTime);
if (DEBUG) log(cpu.cycles + ": Timer started: " + counter + " CCR1:" + ccr[1].expCaptureTime);
}
if (mode != STOP && newMode == STOP) {
@ -673,7 +671,7 @@ public class Timer extends IOUnit {
for (int i = 0; i < noCompare; i++) {
ccr[i].timerStopped(cycles);
}
if (DEBUG) log(core.cycles + ": Timer stopped: " + counter + " CCR1:" + ccr[1].expCaptureTime);
if (DEBUG) log(cpu.cycles + ": Timer stopped: " + counter + " CCR1:" + ccr[1].expCaptureTime);
}
mode = newMode;
@ -727,7 +725,7 @@ public class Timer extends IOUnit {
if (!oldCapture && reg.captureOn && (src & SRC_PORT) != 0) {
int port = (src & 0xff) >> 4;
int pin = src & 0x0f;
IOPort ioPort = core.getIOUnit(IOPort.class, "P" + port);
IOPort ioPort = cpu.getIOUnit(IOPort.class, "P" + port);
if (DEBUG) log("Assigning Port: " + port + " pin: " + pin +
" for capture");
ioPort.setTimerCapture(this, pin);
@ -801,20 +799,20 @@ public class Timer extends IOUnit {
void updateCyclesMultiplicator() {
cyclesMultiplicator = inputDivider;
if (clockSource == SRC_ACLK) {
cyclesMultiplicator = (cyclesMultiplicator * core.smclkFrq) /
core.aclkFrq;
cyclesMultiplicator = (cyclesMultiplicator * cpu.smclkFrq) /
cpu.aclkFrq;
if (DEBUG) {
log("setting multiplicator to: " + cyclesMultiplicator);
}
}
clockSpeed = (int) (core.smclkFrq / cyclesMultiplicator);
clockSpeed = (int) (cpu.smclkFrq / cyclesMultiplicator);
}
void resetCounter(long cycles) {
double divider = 1.0;
if (clockSource == SRC_ACLK) {
// Should later be divided with DCO clock?
divider = 1.0 * core.smclkFrq / core.aclkFrq;
divider = 1.0 * cpu.smclkFrq / cpu.aclkFrq;
}
divider = divider * inputDivider;
@ -835,7 +833,7 @@ public class Timer extends IOUnit {
log("Counter reset at " + cycles + " cycMul: " + cyclesMultiplicator);
}
core.scheduleCycleEvent(counterTrigger, cycles + (long)((0x10000 - counter) * cyclesMultiplicator));
cpu.scheduleCycleEvent(counterTrigger, cycles + (long)((0x10000 - counter) * cyclesMultiplicator));
// System.out.println("(re)Scheduling counter trigger..." + counterTrigger.time + " now = " + cycles + " ctr: " + counter);
}
@ -854,7 +852,7 @@ public class Timer extends IOUnit {
double divider = 1;
if (clockSource == SRC_ACLK) {
// Should later be divided with DCO clock?
divider = 1.0 * core.smclkFrq / core.aclkFrq;
divider = 1.0 * cpu.smclkFrq / cpu.aclkFrq;
}
divider = divider * inputDivider;
@ -935,13 +933,13 @@ public class Timer extends IOUnit {
// System.out.println("*** Capture on CCR_" + ccrIndex + " " + " value: " +
// value);
// update counter values and compare register
updateCounter(core.cycles);
updateCounter(cpu.cycles);
reg.tccr = counter;
// Set the interrupt flag...
reg.tcctl |= CC_IFG;
reg.triggerInterrupt(core.cycles);
/* triggerInterrupts(core.cycles); */
reg.triggerInterrupt(cpu.cycles);
/* triggerInterrupts(cpu.cycles); */
}
}
}
@ -951,16 +949,16 @@ public class Timer extends IOUnit {
public void interruptServiced(int vector) {
if (vector == ccr0Vector) {
// Reset the interrupt trigger in "core".
core.flagInterrupt(ccr0Vector, this, false);
cpu.flagInterrupt(ccr0Vector, this, false);
// Remove the flag also - but only for the dedicated vector (CCR0)
ccr[0].tcctl &= ~CC_IFG;
}
if (MSP430Core.debugInterrupts) {
System.out.println(getName() + " >>>> interrupt Serviced " + lastTIV +
" at cycles: " + core.cycles + " servicing delay: " + (core.cycles - triggerTime));
" at cycles: " + cpu.cycles + " servicing delay: " + (cpu.cycles - triggerTime));
}
/* old method is replaced */
/* triggerInterrupts(core.cycles); */
/* triggerInterrupts(cpu.cycles); */
}
public int getModeMax() {
@ -981,7 +979,7 @@ public class Timer extends IOUnit {
sb.append(" Source: " + getSourceName(clockSource) + " Speed: " + clockSpeed
+ " Hz inDiv: " + inputDivider + " Multiplyer: " + cyclesMultiplicator + '\n'
+ " Mode: " + modeNames[mode] + " IEn: " + interruptEnable
+ " IFG: " + interruptPending + " TR: " + updateCounter(core.cycles) + '\n');
+ " IFG: " + interruptPending + " TR: " + updateCounter(cpu.cycles) + '\n');
for (CCR reg : ccr) {
if (reg != null) sb.append(" ").append(reg.info()).append('\n');
}

6
se/sics/mspsim/core/USART.java
View File

@ -94,8 +94,7 @@ public class USART extends IOUnit implements SFRModule, DMATrigger, USARTSource
private int nextRXByte = -1;
private boolean receiving = false;
private MSP430Core cpu;
private SFR sfr;
private final SFR sfr;
private int uctl;
private int utctl;
@ -132,8 +131,7 @@ public class USART extends IOUnit implements SFRModule, DMATrigger, USARTSource
*
*/
public USART(MSP430Core cpu, int uartID, int[] memory, int offset) {
super("USART" + uartID, "USART " + uartID, memory, offset);
this.cpu = cpu;
super("USART" + uartID, "USART " + uartID, cpu, memory, offset);
this.uartID = uartID;
sfr = cpu.getSFR();

17
se/sics/mspsim/core/USCI.java
View File

@ -27,16 +27,12 @@
*
* This file is part of MSPSim.
*
* $Id$
*
* -----------------------------------------------------------------
*
* USCI Module for the MSP430xf2xxx series.
*
* Author : Joakim Eriksson
* Created : Sun Oct 21 22:00:00 2007
* Updated : $Date$
* $Revision$
*/
package se.sics.mspsim.core;
@ -100,10 +96,9 @@ public class USCI extends IOUnit implements SFRModule, DMATrigger, USARTSource {
private int nextTXByte = -1;
private int txShiftReg = -1;
private boolean transmitting = false;
private MSP430Core cpu;
private SFR sfr;
private int sfrAddress;
private final SFR sfr;
private final int sfrAddress;
/* ifg and ie if not in sfr... - assume IE in sfraddr and IFG in addr + 1*/
private int ifgAddress = 0;
@ -141,9 +136,7 @@ public class USCI extends IOUnit implements SFRModule, DMATrigger, USARTSource {
*
*/
public USCI(MSP430Core cpu, int uartID, int[] memory, MSP430Config config) {
super(config.uartConfig[uartID].name, config.uartConfig[uartID].name, memory, config.uartConfig[uartID].offset);
System.out.println("NAME: " + config.uartConfig[uartID].name);
this.cpu = cpu;
super(config.uartConfig[uartID].name, cpu, memory, config.uartConfig[uartID].offset);
this.uartID = uartID;
MSP430Config.UARTConfig uartConfig = config.uartConfig[uartID];
@ -155,6 +148,8 @@ public class USCI extends IOUnit implements SFRModule, DMATrigger, USARTSource {
sfr.registerSFDModule(uartConfig.sfrAddr, uartConfig.rxBit, this, uartConfig.rxVector);
sfr.registerSFDModule(uartConfig.sfrAddr, uartConfig.txBit, this, uartConfig.txVector);
} else {
sfr = null;
sfrAddress = 0;
ieAddress = uartConfig.sfrAddr;
ifgAddress = uartConfig.sfrAddr + 1;
}

29
se/sics/mspsim/core/UnifiedClockSystem.java
View File

@ -291,9 +291,7 @@ public class UnifiedClockSystem extends ClockSystem {
private static final int ACLK_FRQ = 32768;
private static final int MAX_DCO_FRQ = 16000000;
private MSP430Core core;
private Timer[] timers;
private final Timer[] timers;
private int currentDcoFrequency;
@ -301,9 +299,8 @@ public class UnifiedClockSystem extends ClockSystem {
* Creates a new <code>UnifiedClockSystem</code> instance.
*
*/
public UnifiedClockSystem(MSP430Core core, int[] memory, int offset, Timer[] timers) {
super("UnifiedClockSystem", memory, offset);
this.core = core;
public UnifiedClockSystem(MSP430Core cpu, int[] memory, int offset, Timer[] timers) {
super("UnifiedClockSystem", cpu, memory, offset);
this.timers = timers;
}
@ -321,15 +318,15 @@ public class UnifiedClockSystem extends ClockSystem {
public void reset(int type) {
// Set the reset states, according to the SLAU208h data sheet.
write(UCSCTL0, 0x0000, true, core.cycles);
write(UCSCTL1, 0x0020, true, core.cycles);
write(UCSCTL2, 0x101f, true, core.cycles);
write(UCSCTL3, 0x0000, true, core.cycles);
write(UCSCTL4, 0x0044, true, core.cycles);
write(UCSCTL5, 0x0000, true, core.cycles);
write(UCSCTL6, 0xc1cd, true, core.cycles);
write(UCSCTL7, 0x0703, true, core.cycles);
write(UCSCTL8, 0x0707, true, core.cycles);
write(UCSCTL0, 0x0000, true, cpu.cycles);
write(UCSCTL1, 0x0020, true, cpu.cycles);
write(UCSCTL2, 0x101f, true, cpu.cycles);
write(UCSCTL3, 0x0000, true, cpu.cycles);
write(UCSCTL4, 0x0044, true, cpu.cycles);
write(UCSCTL5, 0x0000, true, cpu.cycles);
write(UCSCTL6, 0xc1cd, true, cpu.cycles);
write(UCSCTL7, 0x0703, true, cpu.cycles);
write(UCSCTL8, 0x0707, true, cpu.cycles);
}
// do nothing?
@ -384,7 +381,7 @@ public class UnifiedClockSystem extends ClockSystem {
if (newDcoFrequency != currentDcoFrequency) {
currentDcoFrequency = newDcoFrequency;
core.setDCOFrq(currentDcoFrequency, currentDcoFrequency / (1 << divSMclk));
cpu.setDCOFrq(currentDcoFrequency, currentDcoFrequency / (1 << divSMclk));
if (timers != null) {
for(int i = 0; i < timers.length; i++) {

4
se/sics/mspsim/core/Watchdog.java
View File

@ -68,7 +68,6 @@ public class Watchdog extends IOUnit implements SFRModule {
private int wdtctl;
public boolean wdtOn = true;
private boolean hold = false;
private MSP430Core cpu;
// The current "delay" when started/clered (or hold)
private int delay;
@ -88,8 +87,7 @@ public class Watchdog extends IOUnit implements SFRModule {
};
public Watchdog(MSP430Core cpu) {
super("Watchdog", cpu.memory, 0x120);
this.cpu = cpu;
super("Watchdog", cpu, cpu.memory, 0x120);
cpu.getSFR().registerSFDModule(0, WATCHDOG_INTERRUPT_BIT, this, WATCHDOG_VECTOR);
}