4e03dbe013
code format & enable code format checking in ci ( #677 )
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Signed-off-by: doujiang24 <doujiang24@gmail.com>
2025-08-02 15:50:25 +08:00
68893affcf
feat(transfer_engine_bench): Add multi-GPU support ( #675 )
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* feat(transfer_engine_bench): add multi-GPU support and improve memory allocation logic
- Added support for using all available GPUs when gpu_id=-1
- Improved memory allocation logic with dynamic buffer_num
- Enhanced logging for GPU memory allocation
- Refactored buffer naming convention
Signed-off-by: staryxchen <staryxchen@tencent.com>
* replace thread array with vector
Signed-off-by: staryxchen <staryxchen@tencent.com>
* move DRAM log messages to initialization blocks
Signed-off-by: staryxchen <staryxchen@tencent.com>
* fix typo
Signed-off-by: staryxchen <staryxchen@tencent.com>
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Signed-off-by: staryxchen <staryxchen@tencent.com>
2025-07-28 09:47:52 +08:00
8df778e4c3
fix: use correct GPU ID in memory registration ( #661 )
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Update memory registration logic to consistently use FLAGS_gpu_id for VRAM buffers across all test and benchmark files.
Signed-off-by: staryxchen <staryxchen@tencent.com>
2025-07-24 09:59:11 +08:00
cd3d3340f6
[TransferEngine] Add support to force MNNVL transport by MC_FORCE_MNNVL ( #572 )
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* [TransferEngine] Add support to force MNNVL transport by MC_FORCE_MNNVL
* Change default parameters in test code
2025-07-01 11:17:40 +08:00
f96a591295
[TransferEngine] Change option use_nvlink to use_mnnvl to clarify the usage ( #525 )
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Signed-off-by: Shangming Cai <caishangming@linux.alibaba.com>
2025-06-19 20:51:52 +08:00
b6b95f0e27
[TransferEngine] Fix protection problem when multiple GPU devices are used ( #475 )
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* [TransferEngine] Fix compilation bug in NVLink xport
* [TransferEngine] Fix cross-device access problem
* fix typo
* remove restriction of bench code
* fix bug in transfer engine bench
2025-06-11 19:58:31 +08:00
38c435fcc6
Revert "[TransferEngine] Fix minor bugs in NVLink transport and benchmark ( #468 )" ( #469 )
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This reverts commit ffaad6aa18
2025-06-11 16:50:29 +08:00
ffaad6aa18
[TransferEngine] Fix minor bugs in NVLink transport and benchmark ( #468 )
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* [TransferEngine] Fix compilation bug in NVLink xport
* [TransferEngine] Fix minor bugs in nvlink benchmark
2025-06-11 16:02:41 +08:00
c5cdf8b8f5
[TransferEngine] hotfix bench program ( #466 )
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* [TransferEngine] Fix compilation bug in NVLink xport
* [TransferEngine] hotfix bench program
2025-06-10 16:34:28 +08:00
f4ad8c16f7
[TransferEngine] Fix registration and relocating problem when requested size smaller than physical page size ( #462 )
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* [TransferEngine] Add debug information in NVLink xport register
* [TransferEngine] Fix cuMem registration base_address and size in NVLink transport
* fix typo
* change bench alloc/free
2025-06-10 11:21:28 +08:00
5b70626874
[TransferEngine] Enable NVLink transport across multiple processes ( #442 )
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* [TransferEngine]Enable NVLINK transport across multiple processes in the same machine
Signed-off-by: Feng Ren <alogfans@gmail.com>
* update locking stragegy and fix minor problems
* removing thread pool in nvlink transport
* add the support of fabric
* add include
* fix compile bugs
* fix bug
* fix bugs
* add test code in nvlink transport
* minor fix
* enable cuda memory allocation in pywrapper
* extract supportFabricMem()
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Signed-off-by: Feng Ren <alogfans@gmail.com>
2025-06-06 13:21:37 +08:00
2d67e3990a
[TransferEngine] Reduce duplicated code ( #425 )
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Signed-off-by: swj <1186093704@qq.com>
2025-05-30 20:08:30 +08:00
8d0c7b8c27
[Benchmark] add VRAM support in server side ( #413 )
2025-05-28 00:28:02 +08:00
20a2033844
[CI] Add spell check process to CI ( #165 )
2025-03-25 09:50:29 +08:00
515afcde6b
[Fix]: Handle SIGINT & SIGTERM for graceful shutdown ( #153 )
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* [FIX]Ensure the resources are released
* add space between #include and <signal.h>
2025-03-20 16:16:39 +08:00
20a94fc946
[TransferEngine] Support Status return value ( #125 )
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Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
2025-03-15 13:02:37 +08:00
36cacd20b5
Fix compilation error with clang toolchain
2025-03-12 03:20:56 +00:00
136391c288
[TransferEngine] feature: introduce USE_NVMEOF to enable NVMe-oF separately. ( #106 )
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Signed-off-by: doujiang24 <doujiang24@gmail.com>
2025-02-20 14:18:27 +08:00
0e47414aa8
[TransferEngine] BenchMark: Introduce report gflags for enhanced configurability ( #111 )
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* [TransferEngine] Introduce report gflags for enhanced configurability
Signed-off-by: fengquyoumo <1455117463@qq.com>
* adjust include order
Signed-off-by: fengquyoumo <1455117463@qq.com>
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Signed-off-by: fengquyoumo <1455117463@qq.com>
2025-02-20 09:48:21 +08:00
ca0f5423c3
[TransferEngine] fix: wrong numa number in example. ( #99 )
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Signed-off-by: doujiang24 <doujiang24@gmail.com>
2025-02-13 14:53:54 +08:00
ab8021d6f7
[TransferEngine] change: auto discover topology & install transport. ( #73 )
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* [TransferEngine] change: auto discover topology & install transport.
Signed-off-by: doujiang24 <doujiang24@gmail.com>
2025-01-17 21:40:36 +08:00
bedd1c3c6e
[TransferEngine] adjust transfer_engine_bench: 1.Introduce the gflag buffer_size for enhanced configurability. 2. Utilize uint64_t for block_size to prevent overflow. ( #72 )
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Signed-off-by: fengquyoumo <1455117463@qq.com>
2025-01-09 13:29:43 +08:00
64ddda46d4
[TransferEngine] Refactor code to hide transport logics from user APIs ( #51 )
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Co-authored-by: doujiang24 <doujiang24@gmail.com>
2025-01-02 16:38:24 +08:00
bf5f56de73
[TransferEngine][feature] add the http metadata server. ( #37 )
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* [TransferEngine][feature] add the http metadata server.
* add doc & golang http server demo.
2024-12-26 11:00:30 +08:00
5e9e494447
[Bugfix] build error when USE_CUDA
2024-12-11 16:38:39 +08:00
0514bf2d6a
[TransferEngine][feature] support multiple metadata servers ( #21 )
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* feature: support multiple metadata protocols
Signed-off-by: Feng Ren <alogfans@gmail.com>
2024-12-10 15:12:22 +08:00
348afd7531
Squashed commits related to transfer engine
2024-11-27 13:02:39 +08:00
doujiang24