mirror of https://github.com/XS-MLVP/picker.git
26 lines
630 B
Systemverilog
26 lines
630 B
Systemverilog
// Transaction for Adder DUT
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// 128-bit adder with carry in/out
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class adder_trans extends uvm_sequence_item;
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// Input signals
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rand bit [127:0] a;
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rand bit [127:0] b;
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rand bit cin;
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// Output signals
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bit [127:0] sum;
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bit cout;
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`uvm_object_utils_begin(adder_trans)
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`uvm_field_int(a, UVM_ALL_ON)
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`uvm_field_int(b, UVM_ALL_ON)
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`uvm_field_int(cin, UVM_ALL_ON)
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`uvm_field_int(sum, UVM_ALL_ON)
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`uvm_field_int(cout, UVM_ALL_ON)
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`uvm_object_utils_end
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function new(string name = "adder_trans");
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super.new(name);
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endfunction
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endclass
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