XS-MLVP
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picker
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15 Commits

Author SHA1 Message Date
J. Wang fa9c9bfe63
Adopt slang as default SystemVerilog frontend and clean up codegen (#80) 
* feat(parser): adopt slang as the default SystemVerilog frontend

- replace export RTL parsing with slang elaboration
- replace pack transaction parsing with slang
- remove Verible from normal parser and packaging flows
- fetch pinned slang and fmt releases via make init
- refresh tests and docs for the slang-based workflow

* fix(codegen): resolve filelist-relative inputs and quiet false missing-file logs

* refact(codegen): tidy up content about `_with_slang`

* feat(verible): Remove content about verible

* fix(gcc): Fix ignored attributes in gcc

* fix(parser): avoid gcc ambiguous overload in uvm parse_sv_transactions
 2026-03-27 11:04:20 +08:00
SFangYy 4a2271254d feat(pack): refactor pack structure and support DUT abstraction generation 
- Update pack function structure for better maintainability:
	- Refactored `src/codegen/uvm.cpp` by modularizing directory setup and template rendering logic.

- Implement automated DUT abstraction generation:
    - Introduced `-d` flag to generate DUT abstraction classes.
	- Added support for parsing RTL module ports directly via `--from-rtl`.

- Revamp UVM and Python template architecture:
	- Introduced `dut.py`, `xagent.py` and `utils_pkg.sv` to decouple logic.
	- Standardized template output structure for easier integration.

- Reduced file duplication and cleaner project structure:
	- Removed legacy example files and unified generated output directories.
 2026-01-04 14:47:01 +08:00
J. Wang 4b5842336d
Add support for macOS (#64) 
Add support for macOS:

* bugfix(exprtk): Upgrade verison of exprtk to fix compile error in clang.

* refact: Remove `bits/stdc++.h` and move `src/codegen/cpp.cpp::replace_all` to `include/picker.hpp::str_replace_all`

* feat: Use `dlopen` for non-linux platform.

* fix: Add missing headers

* fix(nproc): Fix bug of missing `nproc` in MacOS

* refactor(python): Adapt python template to macOS

* refactor(mem_direct): Adapt mem_direct template to macOS

* refactor(lib_suffix): Add shared library suffix in code generator

* refactor(dut_base.cpp): Use code generator to set library suffix

* add(cpp): Add cpp support for macOS

* add(java): Add java support for macOS

* refactor(nproc): Set $NPROC to support macOS

* fix(parser/sv): Add missing header file `unordered_set`

* fix(python_macos): fix the wrong suffix of module-type library

* refactor(codegen/lib): generator template use absolute path

* fix(mem_direct): fix link error in macOS

* feat: Use LLVM Clang to compile instead of AppleClang

* feat(golang): Add golang support for macOS

* fix(rpath): fix CMAKE_BUILD_RPATH for macOS

* feat(lua): Add lua support for macOS

* fix(scala): Fix wrong use of static method in scala

* feat(scala): Add scala support for macOS

* refactor(cmake): Upgrade cmake version to 3.15

* feat(doc): Add doc about installing picker on macOS
 2025-11-03 10:38:10 +08:00
Zhicheng 0063b63f58
Add backend simulator GSIM support (#50) 
New features:

- add firrtl parser
- add gsim example
- support gsim complete
- support internal signal parse for gsim
- test gsim Nutshell success
- readme: update gsim info

---------
Co-authored-by: Makiras <xieyunlonglong@gmail.com>
Co-authored-by: Copilot <175728472+Copilot@users.noreply.github.com>
 2025-08-13 15:16:15 +08:00
Makiras 4a7efd9701 feat: verilator direct memory access for internal 2025-04-30 11:23:00 +08:00
Makiras 3af0f4f195 fix #24 : remove dpi set function for output signal, which case multi-driven 
change clang-format line break from 80 characters to 120, and reformat the project cpp/hpp
 2024-12-12 06:11:36 +00:00
yaozhicheng 2dc1901e60 support static multi-rtl-module 2024-09-18 15:20:00 +08:00
yaozhicheng cc532efb36 fix options 2024-06-25 19:16:25 +08:00
SFangYy eebad90ff0 add parse uvm transaction 2024-06-12 16:52:11 +08:00
Makiras 9055071c58 change cli library for pack function 2024-06-07 06:47:50 +00:00
Makiras 731eb34b90 rename mcv to picker 2024-01-16 02:05:56 +00:00
Makiras 7c275b40ce add quick start example 2023-12-29 10:05:07 +00:00
Makiras 06751a12f8 optimize mcv output content 
add verbose mode and example project mode
todo: add python support ,finetune vcs support
 2023-12-11 08:36:32 +00:00
Makiras c673f03c13 add support for internal signal configured by yaml 
refacted code
 2023-11-17 07:56:14 +00:00
Makiras 46c5adbf03 optimize code organization, add trace&dump waves for verilator 2023-10-31 09:22:32 +00:00