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improve risc-v context switch

This commit is contained in:
acevest 2019-09-27 17:27:59 +08:00
parent ca133a077a
commit e4038592b9
1 changed files with 2 additions and 11 deletions
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13
arch/risc-v/rv32i/gcc/port_s.S
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@ -136,11 +136,6 @@ port_systick_pending_reset:
addi sp, sp, 32*REGBYTES
.endm
.align 2
context_switch_return:
irq_context_return:
ret
.align 2
.type port_sched_start, %function
port_sched_start:
@ -167,9 +162,7 @@ port_sched_start:
port_context_switch:
SAVE_CONTEXT
// return from port_context_switch as return from a function
la t0, context_switch_return
sw t0, 0*REGBYTES(sp)
sw ra, 0*REGBYTES(sp)
csrr t0, mstatus
li t1, MSTATUS_MPP
@ -200,9 +193,7 @@ port_context_switch:
port_irq_context_switch:
SAVE_CONTEXT
la t0, irq_context_return
sw t0, 0*REGBYTES(sp)
sw ra, 0*REGBYTES(sp)
li t0, MSTATUS_MPP
sw t0, 1*REGBYTES(sp)