fix board keil compile

This commit is contained in:
daishengdong 2019-10-28 17:20:08 +08:00
parent 7e11e4f009
commit bd613af56e
271 changed files with 158648 additions and 31918 deletions

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<pre>
<h1>µVision Build Log</h1>
<h2>Tool Versions:</h2>
IDE-Version: ¦ÌVision V5.26.2.0
Copyright (C) 2018 ARM Ltd and ARM Germany GmbH. All rights reserved.
License Information: sheldon dai, tencent, LIC=AK1CX-H5HPV-SGF7K-ZGDWF-QC6LB-GRJE8
Tool Versions:
Toolchain: MDK-ARM Professional Version: 5.26.2.0
Toolchain Path: C:\Keil_v5\ARM\ARMCC\Bin
C Compiler: Armcc.exe V5.06 update 6 (build 750)
Assembler: Armasm.exe V5.06 update 6 (build 750)
Linker/Locator: ArmLink.exe V5.06 update 6 (build 750)
Library Manager: ArmAr.exe V5.06 update 6 (build 750)
Hex Converter: FromElf.exe V5.06 update 6 (build 750)
CPU DLL: SARMCM3.DLL V5.26.2.0
Dialog DLL: DCM.DLL V1.17.2.0
Target DLL: STLink\ST-LINKIII-KEIL_SWO.dll V3.0.5.0
Dialog DLL: TCM.DLL V1.36.1.0
<h2>Project:</h2>
D:\github\master\TencentOS-tiny\board\ALIENTEK-MiniSTM32F103RCT6\KEIL\hello_world\ALIENTEK-MiniSTM32F103RCT6.uvprojx
Project File Date: 10/28/2019
<h2>Output:</h2>
*** Using Compiler 'V5.06 update 6 (build 750)', folder: 'C:\Keil_v5\ARM\ARMCC\Bin'
Build target 'ALIENTEK-MiniSTM32F103RCT6'
assembling startup_stm32f103xe.s...
compiling main.c...
compiling stm32f1xx_hal_msp.c...
compiling usart.c...
compiling gpio.c...
compiling stm32f1xx_it.c...
compiling stm32f1xx_hal.c...
compiling mcu_init.c...
compiling stm32f1xx_hal_cortex.c...
compiling stm32f1xx_hal_exti.c...
compiling stm32f1xx_hal_dma.c...
compiling stm32f1xx_hal_flash.c...
compiling stm32f1xx_hal_flash_ex.c...
compiling stm32f1xx_hal_gpio_ex.c...
compiling stm32f1xx_hal_gpio.c...
compiling stm32f1xx_hal_pwr.c...
compiling stm32f1xx_hal_rcc.c...
compiling stm32f1xx_hal_rcc_ex.c...
assembling port_s.S...
compiling stm32f1xx_hal_tim.c...
compiling stm32f1xx_hal_tim_ex.c...
compiling system_stm32f1xx.c...
compiling stm32f1xx_hal_uart.c...
compiling tos_cpu.c...
compiling port_c.c...
compiling tos_event.c...
compiling tos_global.c...
compiling tos_mmblk.c...
compiling tos_mutex.c...
compiling tos_pend.c...
compiling tos_robin.c...
compiling tos_mmheap.c...
compiling tos_sched.c...
compiling tos_sys.c...
compiling tos_sem.c...
compiling tos_time.c...
compiling tos_task.c...
compiling tos_tick.c...
compiling tos_timer.c...
compiling tos_binary_heap.c...
compiling tos_char_fifo.c...
compiling tos_countdownlatch.c...
compiling tos_completion.c...
compiling tos_mail_queue.c...
compiling tos_message_queue.c...
compiling tos_priority_mail_queue.c...
compiling tos_priority_message_queue.c...
compiling tos_priority_queue.c...
compiling tos_ring_queue.c...
compiling hello_world.c...
compiling cmsis_os.c...
linking...
Program Size: Code=8492 RO-data=500 RW-data=92 ZI-data=31508
"ALIENTEK-MiniSTM32F103RCT6\ALIENTEK-MiniSTM32F103RCT6.axf" - 0 Error(s), 0 Warning(s).
<h2>Software Packages used:</h2>
Package Vendor: ARM
http://www.keil.com/pack/ARM.CMSIS.5.6.0.pack
ARM.CMSIS.5.6.0
CMSIS (Cortex Microcontroller Software Interface Standard)
* Component: CORE Version: 5.3.0
Package Vendor: Keil
http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.2.0.pack
Keil.STM32F1xx_DFP.2.2.0
STMicroelectronics STM32F1 Series Device Support, Drivers and Examples
<h2>Collection of Component include folders:</h2>
.\RTE\_ALIENTEK-MiniSTM32F103RCT6
C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.6.0\CMSIS\Core\Include
C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include
<h2>Collection of Component Files used:</h2>
* Component: ARM::CMSIS:CORE:5.3.0
Build Time Elapsed: 00:00:08
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// <<< Use Configuration Wizard in Context Menu >>>
// <h> Debug MCU Configuration
// <o0.0> DBG_SLEEP
// <i> Debug Sleep Mode
// <i> 0: (FCLK=On, HCLK=Off) FCLK is clocked by the system clock as previously configured by the software while HCLK is disabled
// <i> 1: (FCLK=On, HCLK=On) HCLK is fed by the same clock that is provided to FCLK
// <o0.1> DBG_STOP
// <i> Debug Stop Mode
// <i> 0: (FCLK=Off, HCLK=Off) Clock controller disables all clocks
// <i> 1: (FCLK=On, HCLK=On) FCLK and HCLK are provided by the internal RC oscillator which remains active
// <o0.2> DBG_STANDBY
// <i> Debug Standby Mode
// <i> 0: (FCLK=Off, HCLK=Off) The whole digital part is unpowered.
// <i> 1: (FCLK=On, HCLK=On) Digital part is powered and FCLK and HCLK are provided by the internal RC oscillator which remains active
// <o0.8> DBG_IWDG_STOP
// <i> Debug independent watchdog stopped when core is halted
// <i> 0: The watchdog counter clock continues even if the core is halted
// <i> 1: The watchdog counter clock is stopped when the core is halted
// <o0.9> DBG_WWDG_STOP
// <i> Debug window watchdog stopped when core is halted
// <i> 0: The window watchdog counter clock continues even if the core is halted
// <i> 1: The window watchdog counter clock is stopped when the core is halted
// <o0.10> DBG_TIM1_STOP
// <i> Timer 1 counter stopped when core is halted
// <i> 0: The clock of the involved Timer Counter is fed even if the core is halted
// <i> 1: The clock of the involved Timer counter is stopped when the core is halted
// <o0.11> DBG_TIM2_STOP
// <i> Timer 2 counter stopped when core is halted
// <i> 0: The clock of the involved Timer Counter is fed even if the core is halted
// <i> 1: The clock of the involved Timer counter is stopped when the core is halted
// <o0.12> DBG_TIM3_STOP
// <i> Timer 3 counter stopped when core is halted
// <i> 0: The clock of the involved Timer Counter is fed even if the core is halted
// <i> 1: The clock of the involved Timer counter is stopped when the core is halted
// <o0.13> DBG_TIM4_STOP
// <i> Timer 4 counter stopped when core is halted
// <i> 0: The clock of the involved Timer Counter is fed even if the core is halted
// <i> 1: The clock of the involved Timer counter is stopped when the core is halted
// <o0.14> DBG_CAN1_STOP
// <i> Debug CAN1 stopped when Core is halted
// <i> 0: Same behavior as in normal mode
// <i> 1: CAN1 receive registers are frozen
// <o0.15> DBG_I2C1_SMBUS_TIMEOUT
// <i> I2C1 SMBUS timeout mode stopped when Core is halted
// <i> 0: Same behavior as in normal mode
// <i> 1: The SMBUS timeout is frozen
// <o0.16> DBG_I2C2_SMBUS_TIMEOUT
// <i> I2C2 SMBUS timeout mode stopped when Core is halted
// <i> 0: Same behavior as in normal mode
// <i> 1: The SMBUS timeout is frozen
// <o0.17> DBG_TIM8_STOP
// <i> Timer 8 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.18> DBG_TIM5_STOP
// <i> Timer 5 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.19> DBG_TIM6_STOP
// <i> Timer 6 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.20> DBG_TIM7_STOP
// <i> Timer 7 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.21> DBG_CAN2_STOP
// <i> Debug CAN2 stopped when Core is halted
// <i> 0: Same behavior as in normal mode
// <i> 1: CAN2 receive registers are frozen
// <o0.25> DBG_TIM12_STOP
// <i> Timer 12 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.26> DBG_TIM13_STOP
// <i> Timer 13 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.27> DBG_TIM14_STOP
// <i> Timer 14 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
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// <o0.28> DBG_TIM9_STOP
// <i> Timer 9 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.29> DBG_TIM10_STOP
// <i> Timer 10 counter stopped when core is halted
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// <i> Timer 11 counter stopped when core is halted
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// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// </h>
DbgMCU_CR = 0x00000007;
// <<< end of configuration section >>>

View File

@ -0,0 +1,20 @@
/*
* Auto generated Run-Time-Environment Component Configuration File
* *** Do not modify ! ***
*
* Project: 'ALIENTEK-MiniSTM32F103RCT6'
* Target: 'ALIENTEK-MiniSTM32F103RCT6'
*/
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#define RTE_COMPONENTS_H
/*
* Define the Device Header File:
*/
#define CMSIS_device_header "stm32f10x.h"
#endif /* RTE_COMPONENTS_H */

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<pre>
<h1>µVision Build Log</h1>
<h2>Tool Versions:</h2>
IDE-Version: ¦ÌVision V5.26.2.0
Copyright (C) 2018 ARM Ltd and ARM Germany GmbH. All rights reserved.
License Information: sheldon dai, tencent, LIC=AK1CX-H5HPV-SGF7K-ZGDWF-QC6LB-GRJE8
Tool Versions:
Toolchain: MDK-ARM Professional Version: 5.26.2.0
Toolchain Path: C:\Keil_v5\ARM\ARMCC\Bin
C Compiler: Armcc.exe V5.06 update 6 (build 750)
Assembler: Armasm.exe V5.06 update 6 (build 750)
Linker/Locator: ArmLink.exe V5.06 update 6 (build 750)
Library Manager: ArmAr.exe V5.06 update 6 (build 750)
Hex Converter: FromElf.exe V5.06 update 6 (build 750)
CPU DLL: SARMCM3.DLL V5.26.2.0
Dialog DLL: DCM.DLL V1.17.2.0
Target DLL: STLink\ST-LINKIII-KEIL_SWO.dll V3.0.5.0
Dialog DLL: TCM.DLL V1.36.1.0
<h2>Project:</h2>
D:\github\master\TencentOS-tiny\board\ALIENTEK_EXPLORER_STM32F407ZGT6\KEIL\hello_world\ALIENTEK_EXPLORER_STM32F407ZGT6.uvprojx
Project File Date: 10/28/2019
<h2>Output:</h2>
*** Using Compiler 'V5.06 update 6 (build 750)', folder: 'C:\Keil_v5\ARM\ARMCC\Bin'
Build target 'ALIENTEK_EXPLORER_STM32F407ZGT6'
assembling startup_stm32f407xx.s...
compiling gpio.c...
compiling stm32f4xx_hal_msp.c...
compiling main.c...
compiling stm32f4xx_it.c...
compiling usart.c...
compiling mcu_init.c...
compiling stm32f4xx_hal.c...
compiling stm32f4xx_hal_cortex.c...
compiling stm32f4xx_hal_dma.c...
compiling stm32f4xx_hal_exti.c...
compiling stm32f4xx_hal_flash.c...
compiling stm32f4xx_hal_dma_ex.c...
compiling stm32f4xx_hal_flash_ex.c...
compiling stm32f4xx_hal_flash_ramfunc.c...
compiling stm32f4xx_hal_gpio.c...
compiling stm32f4xx_hal_rcc.c...
compiling stm32f4xx_hal_pwr.c...
compiling stm32f4xx_hal_rcc_ex.c...
compiling stm32f4xx_hal_pwr_ex.c...
compiling stm32f4xx_hal_tim.c...
compiling stm32f4xx_hal_uart.c...
compiling stm32f4xx_hal_tim_ex.c...
assembling port_s.S...
compiling system_stm32f4xx.c...
compiling tos_cpu.c...
compiling port_c.c...
compiling tos_event.c...
compiling tos_global.c...
compiling tos_mmblk.c...
compiling tos_mutex.c...
compiling tos_mmheap.c...
compiling tos_pend.c...
compiling tos_robin.c...
compiling tos_sched.c...
compiling tos_sys.c...
compiling tos_tick.c...
compiling tos_sem.c...
compiling tos_task.c...
compiling tos_timer.c...
compiling tos_binary_heap.c...
compiling tos_time.c...
compiling tos_completion.c...
compiling tos_countdownlatch.c...
compiling tos_char_fifo.c...
compiling tos_mail_queue.c...
compiling tos_message_queue.c...
compiling tos_priority_message_queue.c...
compiling tos_priority_mail_queue.c...
compiling tos_priority_queue.c...
compiling tos_ring_queue.c...
compiling hello_world.c...
compiling cmsis_os.c...
linking...
Program Size: Code=9716 RO-data=588 RW-data=92 ZI-data=7620
"ALIENTEK_EXPLORER_STM32F407ZGT6\ALIENTEK_EXPLORER_STM32F407ZGT6.axf" - 0 Error(s), 0 Warning(s).
<h2>Software Packages used:</h2>
Package Vendor: ARM
http://www.keil.com/pack/ARM.CMSIS.5.6.0.pack
ARM.CMSIS.5.6.0
CMSIS (Cortex Microcontroller Software Interface Standard)
* Component: CORE Version: 5.3.0
Package Vendor: Keil
http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.13.0.pack
Keil.STM32F4xx_DFP.2.13.0
STMicroelectronics STM32F4 Series Device Support, Drivers and Examples
<h2>Collection of Component include folders:</h2>
.\RTE\_ALIENTEK_EXPLORER_STM32F407ZGT6
C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.6.0\CMSIS\Core\Include
C:\Keil_v5\ARM\PACK\Keil\STM32F4xx_DFP\2.13.0\Drivers\CMSIS\Device\ST\STM32F4xx\Include
<h2>Collection of Component Files used:</h2>
* Component: ARM::CMSIS:CORE:5.3.0
Build Time Elapsed: 00:00:09
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; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************
LR_IROM1 0x08000000 0x00100000 { ; load region size_region
ER_IROM1 0x08000000 0x00100000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
.ANY (+XO)
}
RW_IRAM1 0x20000000 0x00020000 { ; RW data
.ANY (+RW +ZI)
}
}

View File

@ -0,0 +1,48 @@
// File: STM32F405_415_407_417_427_437_429_439.dbgconf
// Version: 1.0.0
// Note: refer to STM32F405/415 STM32F407/417 STM32F427/437 STM32F429/439 reference manual (RM0090)
// refer to STM32F40x STM32F41x datasheets
// refer to STM32F42x STM32F43x datasheets
// <<< Use Configuration Wizard in Context Menu >>>
// <h> Debug MCU configuration register (DBGMCU_CR)
// <o.2> DBG_STANDBY <i> Debug Standby Mode
// <o.1> DBG_STOP <i> Debug Stop Mode
// <o.0> DBG_SLEEP <i> Debug Sleep Mode
// </h>
DbgMCU_CR = 0x00000007;
// <h> Debug MCU APB1 freeze register (DBGMCU_APB1_FZ)
// <i> Reserved bits must be kept at reset value
// <o.26> DBG_CAN2_STOP <i> CAN2 stopped when core is halted
// <o.25> DBG_CAN1_STOP <i> CAN2 stopped when core is halted
// <o.23> DBG_I2C3_SMBUS_TIMEOUT <i> I2C3 SMBUS timeout mode stopped when core is halted
// <o.22> DBG_I2C2_SMBUS_TIMEOUT <i> I2C2 SMBUS timeout mode stopped when core is halted
// <o.21> DBG_I2C1_SMBUS_TIMEOUT <i> I2C1 SMBUS timeout mode stopped when core is halted
// <o.12> DBG_IWDG_STOP <i> Independent watchdog stopped when core is halted
// <o.11> DBG_WWDG_STOP <i> Window watchdog stopped when core is halted
// <o.10> DBG_RTC_STOP <i> RTC stopped when core is halted
// <o.8> DBG_TIM14_STOP <i> TIM14 counter stopped when core is halted
// <o.7> DBG_TIM13_STOP <i> TIM13 counter stopped when core is halted
// <o.6> DBG_TIM12_STOP <i> TIM12 counter stopped when core is halted
// <o.5> DBG_TIM7_STOP <i> TIM7 counter stopped when core is halted
// <o.4> DBG_TIM6_STOP <i> TIM6 counter stopped when core is halted
// <o.3> DBG_TIM5_STOP <i> TIM5 counter stopped when core is halted
// <o.2> DBG_TIM4_STOP <i> TIM4 counter stopped when core is halted
// <o.1> DBG_TIM3_STOP <i> TIM3 counter stopped when core is halted
// <o.0> DBG_TIM2_STOP <i> TIM2 counter stopped when core is halted
// </h>
DbgMCU_APB1_Fz = 0x00000000;
// <h> Debug MCU APB2 freeze register (DBGMCU_APB2_FZ)
// <i> Reserved bits must be kept at reset value
// <o.18> DBG_TIM11_STOP <i> TIM11 counter stopped when core is halted
// <o.17> DBG_TIM10_STOP <i> TIM10 counter stopped when core is halted
// <o.16> DBG_TIM9_STOP <i> TIM9 counter stopped when core is halted
// <o.1> DBG_TIM8_STOP <i> TIM8 counter stopped when core is halted
// <o.0> DBG_TIM1_STOP <i> TIM1 counter stopped when core is halted
// </h>
DbgMCU_APB2_Fz = 0x00000000;
// <<< end of configuration section >>>

View File

@ -0,0 +1,20 @@
/*
* Auto generated Run-Time-Environment Component Configuration File
* *** Do not modify ! ***
*
* Project: 'ALIENTEK_EXPLORER_STM32F407ZGT6'
* Target: 'ALIENTEK_EXPLORER_STM32F407ZGT6'
*/
#ifndef RTE_COMPONENTS_H
#define RTE_COMPONENTS_H
/*
* Define the Device Header File:
*/
#define CMSIS_device_header "stm32f4xx.h"
#endif /* RTE_COMPONENTS_H */

File diff suppressed because one or more lines are too long

View File

@ -77,7 +77,7 @@
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>0</CpuCode>
<CpuCode>18</CpuCode>
<DebugOpt>
<uSim>0</uSim>
<uTrg>1</uTrg>
@ -546,18 +546,6 @@
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\kernel\core\tos_fifo.c</PathWithFileName>
<FilenameWithoutPath>tos_fifo.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>28</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\kernel\core\tos_global.c</PathWithFileName>
<FilenameWithoutPath>tos_global.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
@ -565,7 +553,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>29</FileNumber>
<FileNumber>28</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -577,7 +565,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>30</FileNumber>
<FileNumber>29</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -589,19 +577,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>31</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\kernel\core\tos_msg.c</PathWithFileName>
<FilenameWithoutPath>tos_msg.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>32</FileNumber>
<FileNumber>30</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -613,7 +589,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>33</FileNumber>
<FileNumber>31</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -625,19 +601,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>34</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\kernel\core\tos_queue.c</PathWithFileName>
<FilenameWithoutPath>tos_queue.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>35</FileNumber>
<FileNumber>32</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -649,7 +613,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>36</FileNumber>
<FileNumber>33</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -661,7 +625,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>37</FileNumber>
<FileNumber>34</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -673,7 +637,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>38</FileNumber>
<FileNumber>35</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -685,7 +649,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>39</FileNumber>
<FileNumber>36</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -697,7 +661,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>40</FileNumber>
<FileNumber>37</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -709,7 +673,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>41</FileNumber>
<FileNumber>38</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -721,7 +685,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>42</FileNumber>
<FileNumber>39</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -731,6 +695,126 @@
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>40</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\kernel\core\tos_binary_heap.c</PathWithFileName>
<FilenameWithoutPath>tos_binary_heap.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>41</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\kernel\core\tos_char_fifo.c</PathWithFileName>
<FilenameWithoutPath>tos_char_fifo.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>42</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\kernel\core\tos_completion.c</PathWithFileName>
<FilenameWithoutPath>tos_completion.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>43</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\kernel\core\tos_countdownlatch.c</PathWithFileName>
<FilenameWithoutPath>tos_countdownlatch.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>44</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\kernel\core\tos_mail_queue.c</PathWithFileName>
<FilenameWithoutPath>tos_mail_queue.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>45</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\kernel\core\tos_message_queue.c</PathWithFileName>
<FilenameWithoutPath>tos_message_queue.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>46</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\kernel\core\tos_priority_mail_queue.c</PathWithFileName>
<FilenameWithoutPath>tos_priority_mail_queue.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>47</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\kernel\core\tos_priority_message_queue.c</PathWithFileName>
<FilenameWithoutPath>tos_priority_message_queue.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>48</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\kernel\core\tos_priority_queue.c</PathWithFileName>
<FilenameWithoutPath>tos_priority_queue.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>49</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\kernel\core\tos_ring_queue.c</PathWithFileName>
<FilenameWithoutPath>tos_ring_queue.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group>
<Group>
@ -741,7 +825,7 @@
<RteFlg>0</RteFlg>
<File>
<GroupNumber>7</GroupNumber>
<FileNumber>43</FileNumber>
<FileNumber>50</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -761,7 +845,7 @@
<RteFlg>0</RteFlg>
<File>
<GroupNumber>8</GroupNumber>
<FileNumber>44</FileNumber>
<FileNumber>51</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>

View File

@ -537,11 +537,6 @@
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_event.c</FilePath>
</File>
<File>
<FileName>tos_fifo.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_fifo.c</FilePath>
</File>
<File>
<FileName>tos_global.c</FileName>
<FileType>1</FileType>
@ -557,11 +552,6 @@
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_mmheap.c</FilePath>
</File>
<File>
<FileName>tos_msg.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_msg.c</FilePath>
</File>
<File>
<FileName>tos_mutex.c</FileName>
<FileType>1</FileType>
@ -572,11 +562,6 @@
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_pend.c</FilePath>
</File>
<File>
<FileName>tos_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_queue.c</FilePath>
</File>
<File>
<FileName>tos_robin.c</FileName>
<FileType>1</FileType>
@ -617,6 +602,56 @@
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_timer.c</FilePath>
</File>
<File>
<FileName>tos_binary_heap.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_binary_heap.c</FilePath>
</File>
<File>
<FileName>tos_char_fifo.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_char_fifo.c</FilePath>
</File>
<File>
<FileName>tos_completion.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_completion.c</FilePath>
</File>
<File>
<FileName>tos_countdownlatch.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_countdownlatch.c</FilePath>
</File>
<File>
<FileName>tos_mail_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_mail_queue.c</FilePath>
</File>
<File>
<FileName>tos_message_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_message_queue.c</FilePath>
</File>
<File>
<FileName>tos_priority_mail_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_priority_mail_queue.c</FilePath>
</File>
<File>
<FileName>tos_priority_message_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_priority_message_queue.c</FilePath>
</File>
<File>
<FileName>tos_priority_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_priority_queue.c</FilePath>
</File>
<File>
<FileName>tos_ring_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_ring_queue.c</FilePath>
</File>
</Files>
</Group>
<Group>

View File

@ -0,0 +1,109 @@
<html>
<body>
<pre>
<h1>µVision Build Log</h1>
<h2>Tool Versions:</h2>
IDE-Version: ¦ÌVision V5.26.2.0
Copyright (C) 2018 ARM Ltd and ARM Germany GmbH. All rights reserved.
License Information: sheldon dai, tencent, LIC=AK1CX-H5HPV-SGF7K-ZGDWF-QC6LB-GRJE8
Tool Versions:
Toolchain: MDK-ARM Professional Version: 5.26.2.0
Toolchain Path: C:\Keil_v5\ARM\ARMCC\Bin
C Compiler: Armcc.exe V5.06 update 6 (build 750)
Assembler: Armasm.exe V5.06 update 6 (build 750)
Linker/Locator: ArmLink.exe V5.06 update 6 (build 750)
Library Manager: ArmAr.exe V5.06 update 6 (build 750)
Hex Converter: FromElf.exe V5.06 update 6 (build 750)
CPU DLL: SARMCM3.DLL V5.26.2.0
Dialog DLL: DCM.DLL V1.17.2.0
Target DLL: STLink\ST-LINKIII-KEIL_SWO.dll V3.0.5.0
Dialog DLL: TCM.DLL V1.36.1.0
<h2>Project:</h2>
D:\github\master\TencentOS-tiny\board\ALIENTEK_Elite_STM32F103ZET6\KEIL\hello_world\ALIENTEK_Elite_STM32F103.uvprojx
Project File Date: 10/28/2019
<h2>Output:</h2>
*** Using Compiler 'V5.06 update 6 (build 750)', folder: 'C:\Keil_v5\ARM\ARMCC\Bin'
Build target 'ALIENTEK_Elite_STM32F103'
assembling startup_stm32f103xe.s...
compiling gpio.c...
compiling stm32f1xx_hal_msp.c...
compiling stm32f1xx_it.c...
compiling usart.c...
compiling mcu_init.c...
compiling main.c...
compiling stm32f1xx_hal.c...
compiling stm32f1xx_hal_cortex.c...
compiling stm32f1xx_hal_dma.c...
compiling stm32f1xx_hal_exti.c...
compiling stm32f1xx_hal_flash.c...
compiling stm32f1xx_hal_gpio.c...
compiling stm32f1xx_hal_gpio_ex.c...
compiling stm32f1xx_hal_flash_ex.c...
compiling stm32f1xx_hal_pwr.c...
compiling stm32f1xx_hal_rcc.c...
compiling stm32f1xx_hal_rcc_ex.c...
compiling stm32f1xx_hal_tim.c...
compiling stm32f1xx_hal_tim_ex.c...
compiling system_stm32f1xx.c...
compiling tos_cpu.c...
compiling port_c.c...
compiling stm32f1xx_hal_uart.c...
assembling port_s.S...
compiling tos_event.c...
compiling tos_global.c...
compiling tos_mmblk.c...
compiling tos_mmheap.c...
compiling tos_mutex.c...
compiling tos_robin.c...
compiling tos_pend.c...
compiling tos_sched.c...
compiling tos_sem.c...
compiling tos_sys.c...
compiling tos_task.c...
compiling tos_tick.c...
compiling tos_time.c...
compiling tos_timer.c...
compiling tos_binary_heap.c...
compiling tos_char_fifo.c...
compiling tos_completion.c...
compiling tos_countdownlatch.c...
compiling tos_mail_queue.c...
compiling tos_message_queue.c...
compiling tos_priority_mail_queue.c...
compiling tos_priority_message_queue.c...
compiling tos_priority_queue.c...
compiling tos_ring_queue.c...
compiling cmsis_os.c...
compiling hello_world.c...
linking...
Program Size: Code=9444 RO-data=500 RW-data=92 ZI-data=31508
"ALIENTEK_Elite_STM32F103\ALIENTEK_Elite_STM32F103.axf" - 0 Error(s), 0 Warning(s).
<h2>Software Packages used:</h2>
Package Vendor: ARM
http://www.keil.com/pack/ARM.CMSIS.5.6.0.pack
ARM.CMSIS.5.6.0
CMSIS (Cortex Microcontroller Software Interface Standard)
* Component: CORE Version: 5.3.0
Package Vendor: Keil
http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.2.0.pack
Keil.STM32F1xx_DFP.2.2.0
STMicroelectronics STM32F1 Series Device Support, Drivers and Examples
<h2>Collection of Component include folders:</h2>
.\RTE\_ALIENTEK_Elite_STM32F103
C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.6.0\CMSIS\Core\Include
C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include
<h2>Collection of Component Files used:</h2>
* Component: ARM::CMSIS:CORE:5.3.0
Build Time Elapsed: 00:00:09
</pre>
</body>
</html>

View File

@ -0,0 +1,16 @@
; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************
LR_IROM1 0x08000000 0x00080000 { ; load region size_region
ER_IROM1 0x08000000 0x00080000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
.ANY (+XO)
}
RW_IRAM1 0x20000000 0x00010000 { ; RW data
.ANY (+RW +ZI)
}
}

View File

@ -0,0 +1,97 @@
// <<< Use Configuration Wizard in Context Menu >>>
// <h> Debug MCU Configuration
// <o0.0> DBG_SLEEP
// <i> Debug Sleep Mode
// <i> 0: (FCLK=On, HCLK=Off) FCLK is clocked by the system clock as previously configured by the software while HCLK is disabled
// <i> 1: (FCLK=On, HCLK=On) HCLK is fed by the same clock that is provided to FCLK
// <o0.1> DBG_STOP
// <i> Debug Stop Mode
// <i> 0: (FCLK=Off, HCLK=Off) Clock controller disables all clocks
// <i> 1: (FCLK=On, HCLK=On) FCLK and HCLK are provided by the internal RC oscillator which remains active
// <o0.2> DBG_STANDBY
// <i> Debug Standby Mode
// <i> 0: (FCLK=Off, HCLK=Off) The whole digital part is unpowered.
// <i> 1: (FCLK=On, HCLK=On) Digital part is powered and FCLK and HCLK are provided by the internal RC oscillator which remains active
// <o0.8> DBG_IWDG_STOP
// <i> Debug independent watchdog stopped when core is halted
// <i> 0: The watchdog counter clock continues even if the core is halted
// <i> 1: The watchdog counter clock is stopped when the core is halted
// <o0.9> DBG_WWDG_STOP
// <i> Debug window watchdog stopped when core is halted
// <i> 0: The window watchdog counter clock continues even if the core is halted
// <i> 1: The window watchdog counter clock is stopped when the core is halted
// <o0.10> DBG_TIM1_STOP
// <i> Timer 1 counter stopped when core is halted
// <i> 0: The clock of the involved Timer Counter is fed even if the core is halted
// <i> 1: The clock of the involved Timer counter is stopped when the core is halted
// <o0.11> DBG_TIM2_STOP
// <i> Timer 2 counter stopped when core is halted
// <i> 0: The clock of the involved Timer Counter is fed even if the core is halted
// <i> 1: The clock of the involved Timer counter is stopped when the core is halted
// <o0.12> DBG_TIM3_STOP
// <i> Timer 3 counter stopped when core is halted
// <i> 0: The clock of the involved Timer Counter is fed even if the core is halted
// <i> 1: The clock of the involved Timer counter is stopped when the core is halted
// <o0.13> DBG_TIM4_STOP
// <i> Timer 4 counter stopped when core is halted
// <i> 0: The clock of the involved Timer Counter is fed even if the core is halted
// <i> 1: The clock of the involved Timer counter is stopped when the core is halted
// <o0.14> DBG_CAN1_STOP
// <i> Debug CAN1 stopped when Core is halted
// <i> 0: Same behavior as in normal mode
// <i> 1: CAN1 receive registers are frozen
// <o0.15> DBG_I2C1_SMBUS_TIMEOUT
// <i> I2C1 SMBUS timeout mode stopped when Core is halted
// <i> 0: Same behavior as in normal mode
// <i> 1: The SMBUS timeout is frozen
// <o0.16> DBG_I2C2_SMBUS_TIMEOUT
// <i> I2C2 SMBUS timeout mode stopped when Core is halted
// <i> 0: Same behavior as in normal mode
// <i> 1: The SMBUS timeout is frozen
// <o0.17> DBG_TIM8_STOP
// <i> Timer 8 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.18> DBG_TIM5_STOP
// <i> Timer 5 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.19> DBG_TIM6_STOP
// <i> Timer 6 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.20> DBG_TIM7_STOP
// <i> Timer 7 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.21> DBG_CAN2_STOP
// <i> Debug CAN2 stopped when Core is halted
// <i> 0: Same behavior as in normal mode
// <i> 1: CAN2 receive registers are frozen
// <o0.25> DBG_TIM12_STOP
// <i> Timer 12 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.26> DBG_TIM13_STOP
// <i> Timer 13 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.27> DBG_TIM14_STOP
// <i> Timer 14 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.28> DBG_TIM9_STOP
// <i> Timer 9 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.29> DBG_TIM10_STOP
// <i> Timer 10 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.30> DBG_TIM11_STOP
// <i> Timer 11 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// </h>
DbgMCU_CR = 0x00000007;
// <<< end of configuration section >>>

View File

@ -0,0 +1,20 @@
/*
* Auto generated Run-Time-Environment Component Configuration File
* *** Do not modify ! ***
*
* Project: 'ALIENTEK_Elite_STM32F103'
* Target: 'ALIENTEK_Elite_STM32F103'
*/
#ifndef RTE_COMPONENTS_H
#define RTE_COMPONENTS_H
/*
* Define the Device Header File:
*/
#define CMSIS_device_header "stm32f10x.h"
#endif /* RTE_COMPONENTS_H */

File diff suppressed because one or more lines are too long

View File

@ -223,7 +223,7 @@
<Group>
<GroupName>Application/User</GroupName>
<tvExp>1</tvExp>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
@ -650,18 +650,6 @@
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\kernel\core\tos_fifo.c</PathWithFileName>
<FilenameWithoutPath>tos_fifo.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>35</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\kernel\core\tos_global.c</PathWithFileName>
<FilenameWithoutPath>tos_global.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
@ -669,7 +657,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>36</FileNumber>
<FileNumber>35</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -681,7 +669,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>37</FileNumber>
<FileNumber>36</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -693,19 +681,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>38</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\kernel\core\tos_msg.c</PathWithFileName>
<FilenameWithoutPath>tos_msg.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>39</FileNumber>
<FileNumber>37</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -717,7 +693,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>40</FileNumber>
<FileNumber>38</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -729,19 +705,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>41</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\kernel\core\tos_queue.c</PathWithFileName>
<FilenameWithoutPath>tos_queue.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>42</FileNumber>
<FileNumber>39</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -753,7 +717,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>43</FileNumber>
<FileNumber>40</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -765,7 +729,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>44</FileNumber>
<FileNumber>41</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -777,7 +741,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>45</FileNumber>
<FileNumber>42</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -789,7 +753,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>46</FileNumber>
<FileNumber>43</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -801,7 +765,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>47</FileNumber>
<FileNumber>44</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -813,7 +777,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>48</FileNumber>
<FileNumber>45</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -825,7 +789,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>49</FileNumber>
<FileNumber>46</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -835,6 +799,126 @@
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>47</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\kernel\core\tos_binary_heap.c</PathWithFileName>
<FilenameWithoutPath>tos_binary_heap.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>48</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\kernel\core\tos_char_fifo.c</PathWithFileName>
<FilenameWithoutPath>tos_char_fifo.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>49</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\kernel\core\tos_completion.c</PathWithFileName>
<FilenameWithoutPath>tos_completion.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>50</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\kernel\core\tos_countdownlatch.c</PathWithFileName>
<FilenameWithoutPath>tos_countdownlatch.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>51</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\kernel\core\tos_mail_queue.c</PathWithFileName>
<FilenameWithoutPath>tos_mail_queue.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>52</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\kernel\core\tos_message_queue.c</PathWithFileName>
<FilenameWithoutPath>tos_message_queue.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>53</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\kernel\core\tos_priority_mail_queue.c</PathWithFileName>
<FilenameWithoutPath>tos_priority_mail_queue.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>54</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\kernel\core\tos_priority_message_queue.c</PathWithFileName>
<FilenameWithoutPath>tos_priority_message_queue.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>55</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\kernel\core\tos_priority_queue.c</PathWithFileName>
<FilenameWithoutPath>tos_priority_queue.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>56</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\kernel\core\tos_ring_queue.c</PathWithFileName>
<FilenameWithoutPath>tos_ring_queue.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group>
<Group>
@ -845,7 +929,7 @@
<RteFlg>0</RteFlg>
<File>
<GroupNumber>7</GroupNumber>
<FileNumber>50</FileNumber>
<FileNumber>57</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -865,7 +949,7 @@
<RteFlg>0</RteFlg>
<File>
<GroupNumber>8</GroupNumber>
<FileNumber>51</FileNumber>
<FileNumber>58</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -885,7 +969,7 @@
<RteFlg>0</RteFlg>
<File>
<GroupNumber>9</GroupNumber>
<FileNumber>52</FileNumber>
<FileNumber>59</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>

View File

@ -16,7 +16,7 @@
<TargetCommonOption>
<Device>STM32L475VETx</Device>
<Vendor>STMicroelectronics</Vendor>
<PackID>Keil.STM32L4xx_DFP.2.1.0</PackID>
<PackID>Keil.STM32L4xx_DFP.2.0.0</PackID>
<PackURL>http://www.keil.com/pack</PackURL>
<Cpu>IRAM(0x20000000-0x20017FFF) IRAM2(0x10000000-0x10007FFF) IROM(0x8000000-0x807FFFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@ -572,11 +572,6 @@
<FileType>1</FileType>
<FilePath>..\..\..\kernel\core\tos_event.c</FilePath>
</File>
<File>
<FileName>tos_fifo.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\kernel\core\tos_fifo.c</FilePath>
</File>
<File>
<FileName>tos_global.c</FileName>
<FileType>1</FileType>
@ -592,11 +587,6 @@
<FileType>1</FileType>
<FilePath>..\..\..\kernel\core\tos_mmheap.c</FilePath>
</File>
<File>
<FileName>tos_msg.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\kernel\core\tos_msg.c</FilePath>
</File>
<File>
<FileName>tos_mutex.c</FileName>
<FileType>1</FileType>
@ -607,11 +597,6 @@
<FileType>1</FileType>
<FilePath>..\..\..\kernel\core\tos_pend.c</FilePath>
</File>
<File>
<FileName>tos_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\kernel\core\tos_queue.c</FilePath>
</File>
<File>
<FileName>tos_robin.c</FileName>
<FileType>1</FileType>
@ -652,6 +637,56 @@
<FileType>1</FileType>
<FilePath>..\..\..\kernel\core\tos_timer.c</FilePath>
</File>
<File>
<FileName>tos_binary_heap.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\kernel\core\tos_binary_heap.c</FilePath>
</File>
<File>
<FileName>tos_char_fifo.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\kernel\core\tos_char_fifo.c</FilePath>
</File>
<File>
<FileName>tos_completion.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\kernel\core\tos_completion.c</FilePath>
</File>
<File>
<FileName>tos_countdownlatch.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\kernel\core\tos_countdownlatch.c</FilePath>
</File>
<File>
<FileName>tos_mail_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\kernel\core\tos_mail_queue.c</FilePath>
</File>
<File>
<FileName>tos_message_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\kernel\core\tos_message_queue.c</FilePath>
</File>
<File>
<FileName>tos_priority_mail_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\kernel\core\tos_priority_mail_queue.c</FilePath>
</File>
<File>
<FileName>tos_priority_message_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\kernel\core\tos_priority_message_queue.c</FilePath>
</File>
<File>
<FileName>tos_priority_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\kernel\core\tos_priority_queue.c</FilePath>
</File>
<File>
<FileName>tos_ring_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\kernel\core\tos_ring_queue.c</FilePath>
</File>
</Files>
</Group>
<Group>

View File

@ -0,0 +1,125 @@
// File: STM32L4x5_4x6.dbgconf
// Version: 1.0.0
// Note: refer to STM32L4x5 and STM32L4x6 Reference manual (RM0351)
// refer to STM32L475xx, STM32L476xx, STM32L486xx, STM32L496xx and STM32L4A6xx datasheets
// <<< Use Configuration Wizard in Context Menu >>>
// <h> Debug MCU configuration register (DBGMCU_CR)
// <o0.2> DBG_STANDBY
// <i> Debug Standby mode
// <i> 0: (FCLK=Off, HCLK=Off) The whole digital part is unpowered.
// <i> 1: (FCLK=On, HCLK=On) The digital part is not unpowered and FCLK and HCLK are provided by the internal RC oscillator which remains active
// <o0.1> DBG_STOP
// <i> Debug Stop mode
// <i> 0: (FCLK=Off, HCLK=Off) In STOP mode, the clock controller disables all clocks (including HCLK and FCLK).
// <i> 1: (FCLK=On, HCLK=On) When entering STOP mode, FCLK and HCLK are provided by the internal RC oscillator which remains active in STOP mode.
// <o0.0> DBG_SLEEP
// <i> Debug Sleep mode
// <i> 0: (FCLK=On, HCLK=Off) In Sleep mode, FCLK is clocked by the system clock as previously configured by the software while HCLK is disabled.
// <i> 1: (FCLK=On, HCLK=On) When entering Sleep mode, HCLK is fed by the same clock that is provided to FCLK (system clock as previously configured by the software).
// </h>
DbgMCU_CR = 0x00000007;
// <h> Debug MCU APB1 freeze register1 (DBGMCU_APB1FZR1)
// <o0.31> DBG_LPTIM1_STOP
// <i> LPTIM1 counter stopped when core is halted
// <i> 0: The counter clock of LPTIM1 is fed even if the core is halted
// <i> 1: The counter clock of LPTIM1 is stopped when the core is halted
// <o0.26> DBG_CAN2_STOP
// <i> bxCAN2 stopped when core is halted (Reserved on STM32L475xx/476xx/486xx devices)
// <i> 0: Same behavior as in normal mode
// <i> 1: The bxCAN2 receive registers are frozen
// <o0.25> DBG_CAN_STOP
// <i> bxCAN1 stopped when core is halted
// <i> 0: Same behavior as in normal mode
// <i> 1: The bxCAN1 receive registers are frozen
// <o0.23> DBG_I2C3_STOP
// <i> I2C3 SMBUS timeout counter stopped when core is halted
// <i> 0: Same behavior as in normal mode
// <i> 1: The I2C3 SMBus timeout is frozen
// <o0.22> DBG_I2C2_STOP
// <i> I2C2 SMBUS timeout counter stopped when core is halted
// <i> 0: Same behavior as in normal mode
// <i> 1: The I2C2 SMBus timeout is frozen
// <o0.21> DBG_I2C1_STOP
// <i> I2C1 SMBUS timeout counter stopped when core is halted
// <i> 0: Same behavior as in normal mode
// <i> 1: The I2C1 SMBus timeout is frozen
// <o0.12> DBG_IWDG_STOP
// <i> Independent watchdog counter stopped when core is halted
// <i> 0: The independent watchdog counter clock continues even if the core is halted
// <i> 1: The independent watchdog counter clock is stopped when the core is halted
// <o0.11> DBG_WWDG_STOP
// <i> Window watchdog counter stopped when core is halted
// <i> 0: The window watchdog counter clock continues even if the core is halted
// <i> 1: The window watchdog counter clock is stopped when the core is halted
// <o0.10> DBG_RTC_STOP
// <i> RTC counter stopped when core is halted
// <i> 0: The clock of the RTC counter is fed even if the core is halted
// <i> 1: The clock of the RTC counter is stopped when the core is halted
// <o0.5> DBG_TIM7_STOP
// <i> TIM7 counter stopped when core is halted
// <i> 0: The counter clock of TIM7 is fed even if the core is halted
// <i> 1: The counter clock of TIM7 is stopped when the core is halted
// <o0.4> DBG_TIM6_STOP
// <i> TIM6 counter stopped when core is halted
// <i> 0: The counter clock of TIM6 is fed even if the core is halted
// <i> 1: The counter clock of TIM6 is stopped when the core is halted
// <o0.3> DBG_TIM5_STOP
// <i> TIM5 counter stopped when core is halted
// <i> 0: The counter clock of TIM5 is fed even if the core is halted
// <i> 1: The counter clock of TIM5 is stopped when the core is halted
// <o0.2> DBG_TIM4_STOP
// <i> TIM4 counter stopped when core is halted
// <i> 0: The counter clock of TIM4 is fed even if the core is halted
// <i> 1: The counter clock of TIM4 is stopped when the core is halted
// <o0.1> DBG_TIM3_STOP
// <i> TIM3 counter stopped when core is halted
// <i> 0: The counter clock of TIM3 is fed even if the core is halted
// <i> 1: The counter clock of TIM3 is stopped when the core is halted
// <o0.0> DBG_TIM2_STOP
// <i> TIM2 counter stopped when core is halted
// <i> 0: The counter clock of TIM2 is fed even if the core is halted
// <i> 1: The counter clock of TIM2 is stopped when the core is halted
// </h>
DbgMCU_APB1_Fz1 = 0x00000000;
// <h> Debug MCU APB1 freeze register 2 (DBGMCU_APB1FZR2)
// <o0.5> DBG_LPTIM2_STOP
// <i> LPTIM2 counter stopped when core is halted
// <i> 0: The counter clock of LPTIM2 is fed even if the core is halted
// <i> 1: The counter clock of LPTIM2 is stopped when the core is halted
// <o0.1> DBG_I2C4_STOP
// <i> I2C4 SMBUS timeout counter stopped when core is halted (Reserved on STM32L475xx/476xx/486xx devices)
// <i> 0: Same behavior as in normal mode
// <i> 1: The I2C4 SMBus timeout is frozen
// </h>
DbgMCU_APB1_Fz2 = 0x00000000;
// <h> Debug MCU APB2 freeze register (DBGMCU_APB2FZR)
// <o0.18> DBG_TIM17_STOP
// <i> TIM17 counter stopped when core is halted
// <i> 0: The clock of the TIM17 counter is fed even if the core is halted
// <i> 1: The clock of the TIM17 counter is stopped when the core is halted
// <o0.17> DBG_TIM16_STOP
// <i> TIM16 counter stopped when core is halted
// <i> 0: The clock of the TIM16 counter is fed even if the core is halted
// <i> 1: The clock of the TIM16 counter is stopped when the core is halted
// <o0.16> DBG_TIM15_STOP
// <i> TIM15 counter stopped when core is halted
// <i> 0: The clock of the TIM15 counter is fed even if the core is halted
// <i> 1: The clock of the TIM15 counter is stopped when the core is halted
// <o0.13> DBG_TIM8_STOP
// <i> TIM8 counter stopped when core is halted
// <i> 0: The clock of the TIM8 counter is fed even if the core is halted
// <i> 1: The clock of the TIM8 counter is stopped when the core is halted
// <o0.11> DBG_TIM1_STOP
// <i> TIM1 counter stopped when core is halted
// <i> 0: The clock of the TIM1 counter is fed even if the core is halted
// <i> 1: The clock of the TIM1 counter is stopped when the core is halted
// </h>
DbgMCU_APB2_Fz = 0x00000000;
// </h>
// <<< end of configuration section >>>

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@ -0,0 +1,118 @@
<html>
<body>
<pre>
<h1>µVision Build Log</h1>
<h2>Tool Versions:</h2>
IDE-Version: ¦ÌVision V5.26.2.0
Copyright (C) 2018 ARM Ltd and ARM Germany GmbH. All rights reserved.
License Information: sheldon dai, tencent, LIC=AK1CX-H5HPV-SGF7K-ZGDWF-QC6LB-GRJE8
Tool Versions:
Toolchain: MDK-ARM Professional Version: 5.26.2.0
Toolchain Path: C:\Keil_v5\ARM\ARMCC\Bin
C Compiler: Armcc.exe V5.06 update 6 (build 750)
Assembler: Armasm.exe V5.06 update 6 (build 750)
Linker/Locator: ArmLink.exe V5.06 update 6 (build 750)
Library Manager: ArmAr.exe V5.06 update 6 (build 750)
Hex Converter: FromElf.exe V5.06 update 6 (build 750)
CPU DLL: SARMCM3.DLL V5.26.2.0
Dialog DLL: DCM.DLL V1.17.2.0
Target DLL: STLink\ST-LINKIII-KEIL_SWO.dll V3.0.5.0
Dialog DLL: TCM.DLL V1.36.1.0
<h2>Project:</h2>
D:\github\master\TencentOS-tiny\board\ALIENTEK_Pandora_STM32L475\Keil\ALIENTEK_Pandora_STM32L475.uvprojx
Project File Date: 10/28/2019
<h2>Output:</h2>
*** Using Compiler 'V5.06 update 6 (build 750)', folder: 'C:\Keil_v5\ARM\ARMCC\Bin'
Build target 'ALIENTEK_Pandora_STM32L475'
assembling startup_stm32l475xx.s...
compiling usart.c...
compiling stm32l4xx_hal_msp.c...
compiling mcu_init.c...
compiling stm32l4xx_it.c...
compiling gpio.c...
compiling spi.c...
compiling main.c...
compiling stm32l4xx_hal_dma_ex.c...
compiling stm32l4xx_hal_flash_ramfunc.c...
compiling stm32l4xx_hal.c...
compiling stm32l4xx_hal_flash_ex.c...
compiling stm32l4xx_hal_cortex.c...
compiling stm32l4xx_hal_dma.c...
compiling stm32l4xx_hal_flash.c...
compiling stm32l4xx_hal_i2c_ex.c...
compiling stm32l4xx_hal_i2c.c...
compiling stm32l4xx_hal_rcc.c...
compiling stm32l4xx_hal_gpio.c...
compiling stm32l4xx_hal_rcc_ex.c...
compiling stm32l4xx_hal_pwr.c...
compiling stm32l4xx_hal_pwr_ex.c...
compiling stm32l4xx_hal_spi.c...
compiling stm32l4xx_hal_tim.c...
assembling port_s.S...
compiling stm32l4xx_hal_uart.c...
compiling system_stm32l4xx.c...
compiling stm32l4xx_hal_spi_ex.c...
compiling stm32l4xx_hal_tim_ex.c...
compiling stm32l4xx_hal_uart_ex.c...
compiling port_c.c...
compiling tos_global.c...
compiling tos_cpu.c...
compiling tos_mmblk.c...
compiling tos_mutex.c...
compiling tos_mmheap.c...
compiling tos_event.c...
compiling tos_pend.c...
compiling tos_robin.c...
compiling tos_sched.c...
compiling tos_task.c...
compiling tos_sys.c...
compiling tos_tick.c...
compiling tos_sem.c...
compiling tos_timer.c...
compiling tos_binary_heap.c...
compiling tos_countdownlatch.c...
compiling tos_time.c...
compiling tos_char_fifo.c...
compiling tos_completion.c...
compiling tos_mail_queue.c...
compiling tos_priority_mail_queue.c...
compiling tos_message_queue.c...
compiling lcd.c...
compiling tos_ring_queue.c...
compiling tos_priority_message_queue.c...
compiling tos_priority_queue.c...
compiling hello_world.c...
compiling cmsis_os.c...
linking...
Program Size: Code=20228 RO-data=42016 RW-data=144 ZI-data=45312
FromELF: creating hex file...
".\OBJ\TencentOS_tiny.axf" - 0 Error(s), 0 Warning(s).
<h2>Software Packages used:</h2>
Package Vendor: ARM
http://www.keil.com/pack/ARM.CMSIS.5.6.0.pack
ARM.CMSIS.5.6.0
CMSIS (Cortex Microcontroller Software Interface Standard)
* Component: CORE Version: 5.3.0
Package Vendor: Keil
http://www.keil.com/pack/Keil.STM32L4xx_DFP.2.0.0.pack
Keil.STM32L4xx_DFP.2.0.0
STMicroelectronics STM32L4 Series Device Support, Drivers and Examples
<h2>Collection of Component include folders:</h2>
.\RTE\_ALIENTEK_Pandora_STM32L475
C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.6.0\CMSIS\Core\Include
C:\Keil_v5\ARM\PACK\Keil\STM32L4xx_DFP\2.0.0\Drivers\CMSIS\Device\ST\STM32L4xx\Include
<h2>Collection of Component Files used:</h2>
* Component: ARM::CMSIS:CORE:5.3.0
Build Time Elapsed: 00:01:46
</pre>
</body>
</html>

File diff suppressed because it is too large Load Diff

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@ -0,0 +1,16 @@
; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************
LR_IROM1 0x08000000 0x00080000 { ; load region size_region
ER_IROM1 0x08000000 0x00080000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
.ANY (+XO)
}
RW_IRAM1 0x20000000 0x00018000 { ; RW data
.ANY (+RW +ZI)
}
}

View File

@ -0,0 +1,20 @@
/*
* Auto generated Run-Time-Environment Component Configuration File
* *** Do not modify ! ***
*
* Project: 'ALIENTEK_Pandora_STM32L475'
* Target: 'ALIENTEK_Pandora_STM32L475'
*/
#ifndef RTE_COMPONENTS_H
#define RTE_COMPONENTS_H
/*
* Define the Device Header File:
*/
#define CMSIS_device_header "stm32l4xx.h"
#endif /* RTE_COMPONENTS_H */

View File

@ -0,0 +1,48 @@
// File: STM32F405_415_407_417_427_437_429_439.dbgconf
// Version: 1.0.0
// Note: refer to STM32F405/415 STM32F407/417 STM32F427/437 STM32F429/439 reference manual (RM0090)
// refer to STM32F40x STM32F41x datasheets
// refer to STM32F42x STM32F43x datasheets
// <<< Use Configuration Wizard in Context Menu >>>
// <h> Debug MCU configuration register (DBGMCU_CR)
// <o.2> DBG_STANDBY <i> Debug Standby Mode
// <o.1> DBG_STOP <i> Debug Stop Mode
// <o.0> DBG_SLEEP <i> Debug Sleep Mode
// </h>
DbgMCU_CR = 0x00000007;
// <h> Debug MCU APB1 freeze register (DBGMCU_APB1_FZ)
// <i> Reserved bits must be kept at reset value
// <o.26> DBG_CAN2_STOP <i> CAN2 stopped when core is halted
// <o.25> DBG_CAN1_STOP <i> CAN2 stopped when core is halted
// <o.23> DBG_I2C3_SMBUS_TIMEOUT <i> I2C3 SMBUS timeout mode stopped when core is halted
// <o.22> DBG_I2C2_SMBUS_TIMEOUT <i> I2C2 SMBUS timeout mode stopped when core is halted
// <o.21> DBG_I2C1_SMBUS_TIMEOUT <i> I2C1 SMBUS timeout mode stopped when core is halted
// <o.12> DBG_IWDG_STOP <i> Independent watchdog stopped when core is halted
// <o.11> DBG_WWDG_STOP <i> Window watchdog stopped when core is halted
// <o.10> DBG_RTC_STOP <i> RTC stopped when core is halted
// <o.8> DBG_TIM14_STOP <i> TIM14 counter stopped when core is halted
// <o.7> DBG_TIM13_STOP <i> TIM13 counter stopped when core is halted
// <o.6> DBG_TIM12_STOP <i> TIM12 counter stopped when core is halted
// <o.5> DBG_TIM7_STOP <i> TIM7 counter stopped when core is halted
// <o.4> DBG_TIM6_STOP <i> TIM6 counter stopped when core is halted
// <o.3> DBG_TIM5_STOP <i> TIM5 counter stopped when core is halted
// <o.2> DBG_TIM4_STOP <i> TIM4 counter stopped when core is halted
// <o.1> DBG_TIM3_STOP <i> TIM3 counter stopped when core is halted
// <o.0> DBG_TIM2_STOP <i> TIM2 counter stopped when core is halted
// </h>
DbgMCU_APB1_Fz = 0x00000000;
// <h> Debug MCU APB2 freeze register (DBGMCU_APB2_FZ)
// <i> Reserved bits must be kept at reset value
// <o.18> DBG_TIM11_STOP <i> TIM11 counter stopped when core is halted
// <o.17> DBG_TIM10_STOP <i> TIM10 counter stopped when core is halted
// <o.16> DBG_TIM9_STOP <i> TIM9 counter stopped when core is halted
// <o.1> DBG_TIM8_STOP <i> TIM8 counter stopped when core is halted
// <o.0> DBG_TIM1_STOP <i> TIM1 counter stopped when core is halted
// </h>
DbgMCU_APB2_Fz = 0x00000000;
// <<< end of configuration section >>>

View File

@ -0,0 +1,135 @@
<html>
<body>
<pre>
<h1>µVision Build Log</h1>
<h2>Tool Versions:</h2>
IDE-Version: ¦ÌVision V5.26.2.0
Copyright (C) 2018 ARM Ltd and ARM Germany GmbH. All rights reserved.
License Information: sheldon dai, tencent, LIC=AK1CX-H5HPV-SGF7K-ZGDWF-QC6LB-GRJE8
Tool Versions:
Toolchain: MDK-ARM Professional Version: 5.26.2.0
Toolchain Path: C:\Keil_v5\ARM\ARMCC\Bin
C Compiler: Armcc.exe V5.06 update 6 (build 750)
Assembler: Armasm.exe V5.06 update 6 (build 750)
Linker/Locator: ArmLink.exe V5.06 update 6 (build 750)
Library Manager: ArmAr.exe V5.06 update 6 (build 750)
Hex Converter: FromElf.exe V5.06 update 6 (build 750)
CPU DLL: SARMCM3.DLL V5.26.2.0
Dialog DLL: DCM.DLL V1.17.2.0
Target DLL: STLink\ST-LINKIII-KEIL_SWO.dll V3.0.5.0
Dialog DLL: TCM.DLL V1.36.1.0
<h2>Project:</h2>
D:\github\master\TencentOS-tiny\board\ALIENTEK_STM32F429\KEIL\fatfs\TencentOS_tiny.uvprojx
Project File Date: 10/28/2019
<h2>Output:</h2>
*** Using Compiler 'V5.06 update 6 (build 750)', folder: 'C:\Keil_v5\ARM\ARMCC\Bin'
Build target 'TencentOS_tiny'
compiling main.c...
assembling startup_stm32f429xx.s...
compiling gpio.c...
compiling led.c...
compiling spi.c...
compiling stm32f4xx_hal_msp.c...
compiling rng.c...
compiling stm32f4xx_it.c...
compiling usart.c...
compiling mcu_init.c...
compiling sdio.c...
compiling dwt.c...
compiling stm32f4xx_hal.c...
compiling fatfs_sample.c...
compiling stm32f4xx_hal_cortex.c...
compiling stm32f4xx_hal_dma.c...
compiling stm32f4xx_hal_dma_ex.c...
compiling stm32f4xx_hal_flash.c...
compiling stm32f4xx_hal_flash_ramfunc.c...
compiling stm32f4xx_hal_flash_ex.c...
compiling stm32f4xx_hal_gpio.c...
compiling stm32f4xx_hal_pwr.c...
compiling stm32f4xx_hal_pwr_ex.c...
compiling stm32f4xx_hal_rcc.c...
compiling stm32f4xx_hal_rcc_ex.c...
compiling stm32f4xx_hal_tim.c...
compiling stm32f4xx_hal_tim_ex.c...
compiling stm32f4xx_hal_rng.c...
compiling stm32f4xx_hal_uart.c...
compiling stm32f4xx_hal_rtc_ex.c...
compiling stm32f4xx_hal_rtc.c...
compiling stm32f4xx_hal_mmc.c...
compiling stm32f4xx_hal_spi.c...
compiling stm32f4xx_hal_sd.c...
compiling stm32f4xx_ll_sdmmc.c...
compiling system_stm32f4xx.c...
compiling tos_event.c...
compiling tos_global.c...
compiling tos_mmblk.c...
compiling tos_mutex.c...
compiling tos_mmheap.c...
compiling tos_pend.c...
compiling tos_robin.c...
compiling tos_sched.c...
compiling tos_sem.c...
compiling tos_sys.c...
compiling tos_tick.c...
compiling tos_task.c...
compiling tos_time.c...
compiling tos_timer.c...
compiling tos_binary_heap.c...
compiling tos_char_fifo.c...
compiling tos_completion.c...
compiling tos_countdownlatch.c...
compiling tos_mail_queue.c...
compiling tos_message_queue.c...
compiling tos_priority_mail_queue.c...
compiling tos_priority_message_queue.c...
compiling tos_priority_queue.c...
compiling tos_ring_queue.c...
compiling tos_cpu.c...
compiling tos_fault.c...
assembling port_s.S...
compiling port_c.c...
compiling cmsis_os.c...
compiling tos_vfs.c...
compiling tos_vfs_device.c...
compiling tos_vfs_file.c...
compiling tos_vfs_fs.c...
compiling tos_vfs_inode.c...
compiling diskio.c...
compiling ffunicode.c...
compiling ffsystem.c...
compiling ff.c...
compiling tos_hal_sd.c...
compiling fatfs_drv.c...
linking...
Program Size: Code=30568 RO-data=175644 RW-data=108 ZI-data=38148
FromELF: creating hex file...
".\Obj\TencentOS_tiny.axf" - 0 Error(s), 0 Warning(s).
<h2>Software Packages used:</h2>
Package Vendor: ARM
http://www.keil.com/pack/ARM.CMSIS.5.6.0.pack
ARM.CMSIS.5.6.0
CMSIS (Cortex Microcontroller Software Interface Standard)
* Component: CORE Version: 5.3.0
Package Vendor: Keil
http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.13.0.pack
Keil.STM32F4xx_DFP.2.13.0
STMicroelectronics STM32F4 Series Device Support, Drivers and Examples
<h2>Collection of Component include folders:</h2>
.\RTE\_TencentOS_tiny
C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.6.0\CMSIS\Core\Include
C:\Keil_v5\ARM\PACK\Keil\STM32F4xx_DFP\2.13.0\Drivers\CMSIS\Device\ST\STM32F4xx\Include
<h2>Collection of Component Files used:</h2>
* Component: ARM::CMSIS:CORE:5.3.0
Build Time Elapsed: 00:00:14
</pre>
</body>
</html>

File diff suppressed because it is too large Load Diff

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@ -0,0 +1,16 @@
; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************
LR_IROM1 0x08000000 0x00100000 { ; load region size_region
ER_IROM1 0x08000000 0x00100000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
.ANY (+XO)
}
RW_IRAM1 0x20000000 0x00030000 { ; RW data
.ANY (+RW +ZI)
}
}

View File

@ -0,0 +1,20 @@
/*
* Auto generated Run-Time-Environment Component Configuration File
* *** Do not modify ! ***
*
* Project: 'TencentOS_tiny'
* Target: 'TencentOS_tiny'
*/
#ifndef RTE_COMPONENTS_H
#define RTE_COMPONENTS_H
/*
* Define the Device Header File:
*/
#define CMSIS_device_header "stm32f4xx.h"
#endif /* RTE_COMPONENTS_H */

File diff suppressed because one or more lines are too long

View File

@ -720,18 +720,6 @@
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\kernel\core\tos_fifo.c</PathWithFileName>
<FilenameWithoutPath>tos_fifo.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>39</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\kernel\core\tos_global.c</PathWithFileName>
<FilenameWithoutPath>tos_global.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
@ -739,7 +727,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>40</FileNumber>
<FileNumber>39</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -751,7 +739,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>41</FileNumber>
<FileNumber>40</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -763,19 +751,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>42</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\kernel\core\tos_msg.c</PathWithFileName>
<FilenameWithoutPath>tos_msg.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>43</FileNumber>
<FileNumber>41</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -787,7 +763,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>44</FileNumber>
<FileNumber>42</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -799,19 +775,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>45</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\kernel\core\tos_queue.c</PathWithFileName>
<FilenameWithoutPath>tos_queue.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>46</FileNumber>
<FileNumber>43</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -823,7 +787,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>47</FileNumber>
<FileNumber>44</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -835,7 +799,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>48</FileNumber>
<FileNumber>45</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -847,7 +811,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>49</FileNumber>
<FileNumber>46</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -859,7 +823,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>50</FileNumber>
<FileNumber>47</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -871,7 +835,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>51</FileNumber>
<FileNumber>48</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -883,7 +847,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>52</FileNumber>
<FileNumber>49</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -895,7 +859,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>53</FileNumber>
<FileNumber>50</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -905,6 +869,126 @@
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>51</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\kernel\core\tos_binary_heap.c</PathWithFileName>
<FilenameWithoutPath>tos_binary_heap.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>52</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\kernel\core\tos_char_fifo.c</PathWithFileName>
<FilenameWithoutPath>tos_char_fifo.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>53</FileNumber>
<FileType>1</FileType>
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@ -592,11 +592,6 @@
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<File>
<FileName>tos_global.c</FileName>
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View File

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// File: STM32F405_415_407_417_427_437_429_439.dbgconf
// Version: 1.0.0
// Note: refer to STM32F405/415 STM32F407/417 STM32F427/437 STM32F429/439 reference manual (RM0090)
// refer to STM32F40x STM32F41x datasheets
// refer to STM32F42x STM32F43x datasheets
// <<< Use Configuration Wizard in Context Menu >>>
// <h> Debug MCU configuration register (DBGMCU_CR)
// <o.2> DBG_STANDBY <i> Debug Standby Mode
// <o.1> DBG_STOP <i> Debug Stop Mode
// <o.0> DBG_SLEEP <i> Debug Sleep Mode
// </h>
DbgMCU_CR = 0x00000007;
// <h> Debug MCU APB1 freeze register (DBGMCU_APB1_FZ)
// <i> Reserved bits must be kept at reset value
// <o.26> DBG_CAN2_STOP <i> CAN2 stopped when core is halted
// <o.25> DBG_CAN1_STOP <i> CAN2 stopped when core is halted
// <o.23> DBG_I2C3_SMBUS_TIMEOUT <i> I2C3 SMBUS timeout mode stopped when core is halted
// <o.22> DBG_I2C2_SMBUS_TIMEOUT <i> I2C2 SMBUS timeout mode stopped when core is halted
// <o.21> DBG_I2C1_SMBUS_TIMEOUT <i> I2C1 SMBUS timeout mode stopped when core is halted
// <o.12> DBG_IWDG_STOP <i> Independent watchdog stopped when core is halted
// <o.11> DBG_WWDG_STOP <i> Window watchdog stopped when core is halted
// <o.10> DBG_RTC_STOP <i> RTC stopped when core is halted
// <o.8> DBG_TIM14_STOP <i> TIM14 counter stopped when core is halted
// <o.7> DBG_TIM13_STOP <i> TIM13 counter stopped when core is halted
// <o.6> DBG_TIM12_STOP <i> TIM12 counter stopped when core is halted
// <o.5> DBG_TIM7_STOP <i> TIM7 counter stopped when core is halted
// <o.4> DBG_TIM6_STOP <i> TIM6 counter stopped when core is halted
// <o.3> DBG_TIM5_STOP <i> TIM5 counter stopped when core is halted
// <o.2> DBG_TIM4_STOP <i> TIM4 counter stopped when core is halted
// <o.1> DBG_TIM3_STOP <i> TIM3 counter stopped when core is halted
// <o.0> DBG_TIM2_STOP <i> TIM2 counter stopped when core is halted
// </h>
DbgMCU_APB1_Fz = 0x00000000;
// <h> Debug MCU APB2 freeze register (DBGMCU_APB2_FZ)
// <i> Reserved bits must be kept at reset value
// <o.18> DBG_TIM11_STOP <i> TIM11 counter stopped when core is halted
// <o.17> DBG_TIM10_STOP <i> TIM10 counter stopped when core is halted
// <o.16> DBG_TIM9_STOP <i> TIM9 counter stopped when core is halted
// <o.1> DBG_TIM8_STOP <i> TIM8 counter stopped when core is halted
// <o.0> DBG_TIM1_STOP <i> TIM1 counter stopped when core is halted
// </h>
DbgMCU_APB2_Fz = 0x00000000;
// <<< end of configuration section >>>

View File

@ -0,0 +1,136 @@
<html>
<body>
<pre>
<h1>µVision Build Log</h1>
<h2>Tool Versions:</h2>
IDE-Version: ¦ÌVision V5.26.2.0
Copyright (C) 2018 ARM Ltd and ARM Germany GmbH. All rights reserved.
License Information: sheldon dai, tencent, LIC=AK1CX-H5HPV-SGF7K-ZGDWF-QC6LB-GRJE8
Tool Versions:
Toolchain: MDK-ARM Professional Version: 5.26.2.0
Toolchain Path: C:\Keil_v5\ARM\ARMCC\Bin
C Compiler: Armcc.exe V5.06 update 6 (build 750)
Assembler: Armasm.exe V5.06 update 6 (build 750)
Linker/Locator: ArmLink.exe V5.06 update 6 (build 750)
Library Manager: ArmAr.exe V5.06 update 6 (build 750)
Hex Converter: FromElf.exe V5.06 update 6 (build 750)
CPU DLL: SARMCM3.DLL V5.26.2.0
Dialog DLL: DCM.DLL V1.17.2.0
Target DLL: STLink\ST-LINKIII-KEIL_SWO.dll V3.0.5.0
Dialog DLL: TCM.DLL V1.36.1.0
<h2>Project:</h2>
D:\github\master\TencentOS-tiny\board\ALIENTEK_STM32F429\KEIL\fatfs_through_vfs\TencentOS_tiny.uvprojx
Project File Date: 10/28/2019
<h2>Output:</h2>
*** Using Compiler 'V5.06 update 6 (build 750)', folder: 'C:\Keil_v5\ARM\ARMCC\Bin'
Build target 'TencentOS_tiny'
compiling rng.c...
compiling gpio.c...
compiling led.c...
assembling startup_stm32f429xx.s...
compiling main.c...
compiling spi.c...
compiling stm32f4xx_hal_msp.c...
compiling stm32f4xx_it.c...
compiling usart.c...
compiling sdio.c...
compiling mcu_init.c...
compiling dwt.c...
compiling fatfs_through_vfs_sample.c...
compiling stm32f4xx_hal.c...
compiling stm32f4xx_hal_cortex.c...
compiling stm32f4xx_hal_flash.c...
compiling stm32f4xx_hal_dma.c...
compiling stm32f4xx_hal_dma_ex.c...
compiling stm32f4xx_hal_flash_ex.c...
compiling stm32f4xx_hal_flash_ramfunc.c...
compiling stm32f4xx_hal_gpio.c...
compiling stm32f4xx_hal_pwr.c...
compiling stm32f4xx_hal_tim.c...
compiling stm32f4xx_hal_pwr_ex.c...
compiling stm32f4xx_hal_rcc.c...
compiling stm32f4xx_hal_rcc_ex.c...
compiling stm32f4xx_hal_tim_ex.c...
compiling stm32f4xx_hal_uart.c...
compiling stm32f4xx_hal_rng.c...
compiling stm32f4xx_hal_rtc.c...
compiling stm32f4xx_hal_rtc_ex.c...
compiling stm32f4xx_hal_mmc.c...
compiling stm32f4xx_hal_spi.c...
compiling stm32f4xx_hal_sd.c...
compiling stm32f4xx_ll_sdmmc.c...
compiling tos_event.c...
compiling tos_mmblk.c...
compiling tos_global.c...
compiling system_stm32f4xx.c...
compiling tos_pend.c...
compiling tos_mutex.c...
compiling tos_mmheap.c...
compiling tos_robin.c...
compiling tos_sched.c...
compiling tos_sem.c...
compiling tos_sys.c...
compiling tos_task.c...
compiling tos_tick.c...
compiling tos_time.c...
compiling tos_timer.c...
compiling tos_binary_heap.c...
compiling tos_char_fifo.c...
compiling tos_completion.c...
compiling tos_mail_queue.c...
compiling tos_countdownlatch.c...
compiling tos_message_queue.c...
compiling tos_priority_mail_queue.c...
compiling tos_priority_message_queue.c...
compiling tos_priority_queue.c...
compiling tos_ring_queue.c...
compiling tos_cpu.c...
compiling tos_fault.c...
assembling port_s.S...
compiling port_c.c...
compiling cmsis_os.c...
compiling tos_vfs.c...
compiling tos_vfs_device.c...
compiling tos_vfs_file.c...
compiling tos_vfs_fs.c...
compiling tos_vfs_inode.c...
compiling tos_fatfs_vfs.c...
compiling tos_ffsystem.c...
compiling tos_diskio.c...
compiling tos_fatfs_drv.c...
compiling tos_hal_sd.c...
compiling tos_ffunicode.c...
compiling tos_ff.c...
linking...
Program Size: Code=36048 RO-data=175628 RW-data=252 ZI-data=38972
FromELF: creating hex file...
".\Obj\TencentOS_tiny.axf" - 0 Error(s), 0 Warning(s).
<h2>Software Packages used:</h2>
Package Vendor: ARM
http://www.keil.com/pack/ARM.CMSIS.5.6.0.pack
ARM.CMSIS.5.6.0
CMSIS (Cortex Microcontroller Software Interface Standard)
* Component: CORE Version: 5.3.0
Package Vendor: Keil
http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.13.0.pack
Keil.STM32F4xx_DFP.2.13.0
STMicroelectronics STM32F4 Series Device Support, Drivers and Examples
<h2>Collection of Component include folders:</h2>
.\RTE\_TencentOS_tiny
C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.6.0\CMSIS\Core\Include
C:\Keil_v5\ARM\PACK\Keil\STM32F4xx_DFP\2.13.0\Drivers\CMSIS\Device\ST\STM32F4xx\Include
<h2>Collection of Component Files used:</h2>
* Component: ARM::CMSIS:CORE:5.3.0
Build Time Elapsed: 00:00:14
</pre>
</body>
</html>

File diff suppressed because it is too large Load Diff

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@ -0,0 +1,16 @@
; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************
LR_IROM1 0x08000000 0x00100000 { ; load region size_region
ER_IROM1 0x08000000 0x00100000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
.ANY (+XO)
}
RW_IRAM1 0x20000000 0x00030000 { ; RW data
.ANY (+RW +ZI)
}
}

View File

@ -0,0 +1,20 @@
/*
* Auto generated Run-Time-Environment Component Configuration File
* *** Do not modify ! ***
*
* Project: 'TencentOS_tiny'
* Target: 'TencentOS_tiny'
*/
#ifndef RTE_COMPONENTS_H
#define RTE_COMPONENTS_H
/*
* Define the Device Header File:
*/
#define CMSIS_device_header "stm32f4xx.h"
#endif /* RTE_COMPONENTS_H */

File diff suppressed because one or more lines are too long

View File

@ -737,18 +737,6 @@
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<tvExpOptDlg>0</tvExpOptDlg>
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<PathWithFileName>..\..\..\..\kernel\core\tos_fifo.c</PathWithFileName>
<FilenameWithoutPath>tos_fifo.c</FilenameWithoutPath>
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<FilenameWithoutPath>tos_msg.c</FilenameWithoutPath>
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View File

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// File: STM32F405_415_407_417_427_437_429_439.dbgconf
// Version: 1.0.0
// Note: refer to STM32F405/415 STM32F407/417 STM32F427/437 STM32F429/439 reference manual (RM0090)
// refer to STM32F40x STM32F41x datasheets
// refer to STM32F42x STM32F43x datasheets
// <<< Use Configuration Wizard in Context Menu >>>
// <h> Debug MCU configuration register (DBGMCU_CR)
// <o.2> DBG_STANDBY <i> Debug Standby Mode
// <o.1> DBG_STOP <i> Debug Stop Mode
// <o.0> DBG_SLEEP <i> Debug Sleep Mode
// </h>
DbgMCU_CR = 0x00000007;
// <h> Debug MCU APB1 freeze register (DBGMCU_APB1_FZ)
// <i> Reserved bits must be kept at reset value
// <o.26> DBG_CAN2_STOP <i> CAN2 stopped when core is halted
// <o.25> DBG_CAN1_STOP <i> CAN2 stopped when core is halted
// <o.23> DBG_I2C3_SMBUS_TIMEOUT <i> I2C3 SMBUS timeout mode stopped when core is halted
// <o.22> DBG_I2C2_SMBUS_TIMEOUT <i> I2C2 SMBUS timeout mode stopped when core is halted
// <o.21> DBG_I2C1_SMBUS_TIMEOUT <i> I2C1 SMBUS timeout mode stopped when core is halted
// <o.12> DBG_IWDG_STOP <i> Independent watchdog stopped when core is halted
// <o.11> DBG_WWDG_STOP <i> Window watchdog stopped when core is halted
// <o.10> DBG_RTC_STOP <i> RTC stopped when core is halted
// <o.8> DBG_TIM14_STOP <i> TIM14 counter stopped when core is halted
// <o.7> DBG_TIM13_STOP <i> TIM13 counter stopped when core is halted
// <o.6> DBG_TIM12_STOP <i> TIM12 counter stopped when core is halted
// <o.5> DBG_TIM7_STOP <i> TIM7 counter stopped when core is halted
// <o.4> DBG_TIM6_STOP <i> TIM6 counter stopped when core is halted
// <o.3> DBG_TIM5_STOP <i> TIM5 counter stopped when core is halted
// <o.2> DBG_TIM4_STOP <i> TIM4 counter stopped when core is halted
// <o.1> DBG_TIM3_STOP <i> TIM3 counter stopped when core is halted
// <o.0> DBG_TIM2_STOP <i> TIM2 counter stopped when core is halted
// </h>
DbgMCU_APB1_Fz = 0x00000000;
// <h> Debug MCU APB2 freeze register (DBGMCU_APB2_FZ)
// <i> Reserved bits must be kept at reset value
// <o.18> DBG_TIM11_STOP <i> TIM11 counter stopped when core is halted
// <o.17> DBG_TIM10_STOP <i> TIM10 counter stopped when core is halted
// <o.16> DBG_TIM9_STOP <i> TIM9 counter stopped when core is halted
// <o.1> DBG_TIM8_STOP <i> TIM8 counter stopped when core is halted
// <o.0> DBG_TIM1_STOP <i> TIM1 counter stopped when core is halted
// </h>
DbgMCU_APB2_Fz = 0x00000000;
// <<< end of configuration section >>>

View File

@ -0,0 +1,128 @@
<html>
<body>
<pre>
<h1>µVision Build Log</h1>
<h2>Tool Versions:</h2>
IDE-Version: ¦ÌVision V5.26.2.0
Copyright (C) 2018 ARM Ltd and ARM Germany GmbH. All rights reserved.
License Information: sheldon dai, tencent, LIC=AK1CX-H5HPV-SGF7K-ZGDWF-QC6LB-GRJE8
Tool Versions:
Toolchain: MDK-ARM Professional Version: 5.26.2.0
Toolchain Path: C:\Keil_v5\ARM\ARMCC\Bin
C Compiler: Armcc.exe V5.06 update 6 (build 750)
Assembler: Armasm.exe V5.06 update 6 (build 750)
Linker/Locator: ArmLink.exe V5.06 update 6 (build 750)
Library Manager: ArmAr.exe V5.06 update 6 (build 750)
Hex Converter: FromElf.exe V5.06 update 6 (build 750)
CPU DLL: SARMCM3.DLL V5.26.2.0
Dialog DLL: DCM.DLL V1.17.2.0
Target DLL: Segger\JL2CM3.dll V2.99.31.0
Dialog DLL: TCM.DLL V1.36.1.0
<h2>Project:</h2>
D:\github\master\TencentOS-tiny\board\ALIENTEK_STM32F429\KEIL\hello_world\TencentOS_tiny.uvprojx
Project File Date: 10/28/2019
<h2>Output:</h2>
*** Using Compiler 'V5.06 update 6 (build 750)', folder: 'C:\Keil_v5\ARM\ARMCC\Bin'
Build target 'TencentOS_tiny'
compiling stm32f4xx_hal_msp.c...
compiling spi.c...
assembling startup_stm32f429xx.s...
compiling main.c...
compiling led.c...
compiling gpio.c...
compiling rng.c...
compiling stm32f4xx_it.c...
compiling usart.c...
compiling dwt.c...
compiling hello_world.c...
compiling mcu_init.c...
compiling stm32f4xx_hal.c...
compiling stm32f4xx_hal_cortex.c...
compiling stm32f4xx_hal_dma.c...
compiling stm32f4xx_hal_dma_ex.c...
compiling stm32f4xx_hal_flash_ex.c...
compiling stm32f4xx_hal_flash.c...
compiling stm32f4xx_hal_flash_ramfunc.c...
compiling stm32f4xx_hal_pwr.c...
compiling stm32f4xx_hal_gpio.c...
compiling stm32f4xx_hal_pwr_ex.c...
compiling stm32f4xx_hal_rcc.c...
compiling stm32f4xx_hal_rcc_ex.c...
compiling stm32f4xx_hal_tim_ex.c...
compiling stm32f4xx_hal_rtc.c...
compiling stm32f4xx_hal_tim.c...
compiling stm32f4xx_hal_rng.c...
compiling stm32f4xx_hal_uart.c...
compiling stm32f4xx_hal_rtc_ex.c...
compiling system_stm32f4xx.c...
compiling stm32f4xx_hal_spi.c...
compiling tos_event.c...
compiling tos_global.c...
compiling tos_mmblk.c...
compiling tos_mutex.c...
compiling tos_mmheap.c...
compiling tos_pend.c...
compiling tos_robin.c...
compiling tos_sched.c...
compiling tos_sem.c...
compiling tos_sys.c...
compiling tos_task.c...
compiling tos_tick.c...
compiling tos_time.c...
compiling tos_pm.c...
compiling tos_tickless.c...
compiling tos_timer.c...
compiling tos_binary_heap.c...
compiling tos_char_fifo.c...
compiling tos_completion.c...
compiling tos_countdownlatch.c...
compiling tos_mail_queue.c...
compiling tos_message_queue.c...
compiling tos_priority_message_queue.c...
compiling tos_priority_mail_queue.c...
compiling tos_priority_queue.c...
compiling tos_cpu.c...
compiling tos_ring_queue.c...
assembling port_s.S...
compiling cmsis_os.c...
compiling bsp_pwr_mgr.c...
..\..\BSP\Src\tickless\bsp_pwr_mgr.c(24): warning: #940-D: missing return statement at end of non-void function "tos_bsp_tickless_setup"
}
..\..\BSP\Src\tickless\bsp_pwr_mgr.c: 1 warning, 0 errors
compiling bsp_tickless_alarm.c...
compiling bsp_pm_device.c...
compiling port_c.c...
compiling tos_fault.c...
linking...
Program Size: Code=13424 RO-data=624 RW-data=100 ZI-data=34596
FromELF: creating hex file...
".\Obj\TencentOS_tiny.axf" - 0 Error(s), 1 Warning(s).
<h2>Software Packages used:</h2>
Package Vendor: ARM
http://www.keil.com/pack/ARM.CMSIS.5.6.0.pack
ARM.CMSIS.5.6.0
CMSIS (Cortex Microcontroller Software Interface Standard)
* Component: CORE Version: 5.3.0
Package Vendor: Keil
http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.13.0.pack
Keil.STM32F4xx_DFP.2.13.0
STMicroelectronics STM32F4 Series Device Support, Drivers and Examples
<h2>Collection of Component include folders:</h2>
.\RTE\_TencentOS_tiny
C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.6.0\CMSIS\Core\Include
C:\Keil_v5\ARM\PACK\Keil\STM32F4xx_DFP\2.13.0\Drivers\CMSIS\Device\ST\STM32F4xx\Include
<h2>Collection of Component Files used:</h2>
* Component: ARM::CMSIS:CORE:5.3.0
Build Time Elapsed: 00:00:12
</pre>
</body>
</html>

File diff suppressed because it is too large Load Diff

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@ -0,0 +1,16 @@
; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************
LR_IROM1 0x08000000 0x00100000 { ; load region size_region
ER_IROM1 0x08000000 0x00100000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
.ANY (+XO)
}
RW_IRAM1 0x20000000 0x00030000 { ; RW data
.ANY (+RW +ZI)
}
}

View File

@ -0,0 +1,20 @@
/*
* Auto generated Run-Time-Environment Component Configuration File
* *** Do not modify ! ***
*
* Project: 'TencentOS_tiny'
* Target: 'TencentOS_tiny'
*/
#ifndef RTE_COMPONENTS_H
#define RTE_COMPONENTS_H
/*
* Define the Device Header File:
*/
#define CMSIS_device_header "stm32f4xx.h"
#endif /* RTE_COMPONENTS_H */

File diff suppressed because one or more lines are too long

View File

@ -630,18 +630,6 @@
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// File: STM32F405_415_407_417_427_437_429_439.dbgconf
// Version: 1.0.0
// Note: refer to STM32F405/415 STM32F407/417 STM32F427/437 STM32F429/439 reference manual (RM0090)
// refer to STM32F40x STM32F41x datasheets
// refer to STM32F42x STM32F43x datasheets
// <<< Use Configuration Wizard in Context Menu >>>
// <h> Debug MCU configuration register (DBGMCU_CR)
// <o.2> DBG_STANDBY <i> Debug Standby Mode
// <o.1> DBG_STOP <i> Debug Stop Mode
// <o.0> DBG_SLEEP <i> Debug Sleep Mode
// </h>
DbgMCU_CR = 0x00000007;
// <h> Debug MCU APB1 freeze register (DBGMCU_APB1_FZ)
// <i> Reserved bits must be kept at reset value
// <o.26> DBG_CAN2_STOP <i> CAN2 stopped when core is halted
// <o.25> DBG_CAN1_STOP <i> CAN2 stopped when core is halted
// <o.23> DBG_I2C3_SMBUS_TIMEOUT <i> I2C3 SMBUS timeout mode stopped when core is halted
// <o.22> DBG_I2C2_SMBUS_TIMEOUT <i> I2C2 SMBUS timeout mode stopped when core is halted
// <o.21> DBG_I2C1_SMBUS_TIMEOUT <i> I2C1 SMBUS timeout mode stopped when core is halted
// <o.12> DBG_IWDG_STOP <i> Independent watchdog stopped when core is halted
// <o.11> DBG_WWDG_STOP <i> Window watchdog stopped when core is halted
// <o.10> DBG_RTC_STOP <i> RTC stopped when core is halted
// <o.8> DBG_TIM14_STOP <i> TIM14 counter stopped when core is halted
// <o.7> DBG_TIM13_STOP <i> TIM13 counter stopped when core is halted
// <o.6> DBG_TIM12_STOP <i> TIM12 counter stopped when core is halted
// <o.5> DBG_TIM7_STOP <i> TIM7 counter stopped when core is halted
// <o.4> DBG_TIM6_STOP <i> TIM6 counter stopped when core is halted
// <o.3> DBG_TIM5_STOP <i> TIM5 counter stopped when core is halted
// <o.2> DBG_TIM4_STOP <i> TIM4 counter stopped when core is halted
// <o.1> DBG_TIM3_STOP <i> TIM3 counter stopped when core is halted
// <o.0> DBG_TIM2_STOP <i> TIM2 counter stopped when core is halted
// </h>
DbgMCU_APB1_Fz = 0x00000000;
// <h> Debug MCU APB2 freeze register (DBGMCU_APB2_FZ)
// <i> Reserved bits must be kept at reset value
// <o.18> DBG_TIM11_STOP <i> TIM11 counter stopped when core is halted
// <o.17> DBG_TIM10_STOP <i> TIM10 counter stopped when core is halted
// <o.16> DBG_TIM9_STOP <i> TIM9 counter stopped when core is halted
// <o.1> DBG_TIM8_STOP <i> TIM8 counter stopped when core is halted
// <o.0> DBG_TIM1_STOP <i> TIM1 counter stopped when core is halted
// </h>
DbgMCU_APB2_Fz = 0x00000000;
// <<< end of configuration section >>>

View File

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<html>
<body>
<pre>
<h1>µVision Build Log</h1>
<h2>Tool Versions:</h2>
IDE-Version: ¦ÌVision V5.26.2.0
Copyright (C) 2018 ARM Ltd and ARM Germany GmbH. All rights reserved.
License Information: sheldon dai, tencent, LIC=AK1CX-H5HPV-SGF7K-ZGDWF-QC6LB-GRJE8
Tool Versions:
Toolchain: MDK-ARM Professional Version: 5.26.2.0
Toolchain Path: C:\Keil_v5\ARM\ARMCC\Bin
C Compiler: Armcc.exe V5.06 update 6 (build 750)
Assembler: Armasm.exe V5.06 update 6 (build 750)
Linker/Locator: ArmLink.exe V5.06 update 6 (build 750)
Library Manager: ArmAr.exe V5.06 update 6 (build 750)
Hex Converter: FromElf.exe V5.06 update 6 (build 750)
CPU DLL: SARMCM3.DLL V5.26.2.0
Dialog DLL: DCM.DLL V1.17.2.0
Target DLL: Segger\JL2CM3.dll V2.99.31.0
Dialog DLL: TCM.DLL V1.36.1.0
<h2>Project:</h2>
D:\github\master\TencentOS-tiny\board\ALIENTEK_STM32F429\KEIL\tcp_server_base_lwip\TencentOS_tiny.uvprojx
Project File Date: 10/28/2019
<h2>Output:</h2>
*** Using Compiler 'V5.06 update 6 (build 750)', folder: 'C:\Keil_v5\ARM\ARMCC\Bin'
Build target 'TencentOS_tiny'
".\Obj\TencentOS_tiny.axf" - 0 Error(s), 0 Warning(s).
<h2>Software Packages used:</h2>
Package Vendor: ARM
http://www.keil.com/pack/ARM.CMSIS.5.6.0.pack
ARM.CMSIS.5.6.0
CMSIS (Cortex Microcontroller Software Interface Standard)
* Component: CORE Version: 5.3.0
Package Vendor: Keil
http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.13.0.pack
Keil.STM32F4xx_DFP.2.13.0
STMicroelectronics STM32F4 Series Device Support, Drivers and Examples
<h2>Collection of Component include folders:</h2>
.\RTE\_TencentOS_tiny
C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.6.0\CMSIS\Core\Include
C:\Keil_v5\ARM\PACK\Keil\STM32F4xx_DFP\2.13.0\Drivers\CMSIS\Device\ST\STM32F4xx\Include
<h2>Collection of Component Files used:</h2>
* Component: ARM::CMSIS:CORE:5.3.0
Build Time Elapsed: 00:00:02
</pre>
</body>
</html>

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; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************
LR_IROM1 0x08000000 0x00100000 { ; load region size_region
ER_IROM1 0x08000000 0x00100000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
.ANY (+XO)
}
RW_IRAM1 0x20000000 0x00030000 { ; RW data
.ANY (+RW +ZI)
}
}

View File

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/*
* Auto generated Run-Time-Environment Component Configuration File
* *** Do not modify ! ***
*
* Project: 'TencentOS_tiny'
* Target: 'TencentOS_tiny'
*/
#ifndef RTE_COMPONENTS_H
#define RTE_COMPONENTS_H
/*
* Define the Device Header File:
*/
#define CMSIS_device_header "stm32f4xx.h"
#endif /* RTE_COMPONENTS_H */

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<FilePath>..\..\..\..\kernel\core\tos_binary_heap.c</FilePath>
</File>
<File>
<FileName>tos_char_fifo.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_char_fifo.c</FilePath>
</File>
<File>
<FileName>tos_completion.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_completion.c</FilePath>
</File>
<File>
<FileName>tos_countdownlatch.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_countdownlatch.c</FilePath>
</File>
<File>
<FileName>tos_mail_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_mail_queue.c</FilePath>
</File>
<File>
<FileName>tos_message_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_message_queue.c</FilePath>
</File>
<File>
<FileName>tos_priority_mail_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_priority_mail_queue.c</FilePath>
</File>
<File>
<FileName>tos_priority_message_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_priority_message_queue.c</FilePath>
</File>
<File>
<FileName>tos_priority_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_priority_queue.c</FilePath>
</File>
<File>
<FileName>tos_ring_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_ring_queue.c</FilePath>
</File>
</Files>
</Group>
<Group>

View File

@ -0,0 +1,48 @@
// File: STM32F405_415_407_417_427_437_429_439.dbgconf
// Version: 1.0.0
// Note: refer to STM32F405/415 STM32F407/417 STM32F427/437 STM32F429/439 reference manual (RM0090)
// refer to STM32F40x STM32F41x datasheets
// refer to STM32F42x STM32F43x datasheets
// <<< Use Configuration Wizard in Context Menu >>>
// <h> Debug MCU configuration register (DBGMCU_CR)
// <o.2> DBG_STANDBY <i> Debug Standby Mode
// <o.1> DBG_STOP <i> Debug Stop Mode
// <o.0> DBG_SLEEP <i> Debug Sleep Mode
// </h>
DbgMCU_CR = 0x00000007;
// <h> Debug MCU APB1 freeze register (DBGMCU_APB1_FZ)
// <i> Reserved bits must be kept at reset value
// <o.26> DBG_CAN2_STOP <i> CAN2 stopped when core is halted
// <o.25> DBG_CAN1_STOP <i> CAN2 stopped when core is halted
// <o.23> DBG_I2C3_SMBUS_TIMEOUT <i> I2C3 SMBUS timeout mode stopped when core is halted
// <o.22> DBG_I2C2_SMBUS_TIMEOUT <i> I2C2 SMBUS timeout mode stopped when core is halted
// <o.21> DBG_I2C1_SMBUS_TIMEOUT <i> I2C1 SMBUS timeout mode stopped when core is halted
// <o.12> DBG_IWDG_STOP <i> Independent watchdog stopped when core is halted
// <o.11> DBG_WWDG_STOP <i> Window watchdog stopped when core is halted
// <o.10> DBG_RTC_STOP <i> RTC stopped when core is halted
// <o.8> DBG_TIM14_STOP <i> TIM14 counter stopped when core is halted
// <o.7> DBG_TIM13_STOP <i> TIM13 counter stopped when core is halted
// <o.6> DBG_TIM12_STOP <i> TIM12 counter stopped when core is halted
// <o.5> DBG_TIM7_STOP <i> TIM7 counter stopped when core is halted
// <o.4> DBG_TIM6_STOP <i> TIM6 counter stopped when core is halted
// <o.3> DBG_TIM5_STOP <i> TIM5 counter stopped when core is halted
// <o.2> DBG_TIM4_STOP <i> TIM4 counter stopped when core is halted
// <o.1> DBG_TIM3_STOP <i> TIM3 counter stopped when core is halted
// <o.0> DBG_TIM2_STOP <i> TIM2 counter stopped when core is halted
// </h>
DbgMCU_APB1_Fz = 0x00000000;
// <h> Debug MCU APB2 freeze register (DBGMCU_APB2_FZ)
// <i> Reserved bits must be kept at reset value
// <o.18> DBG_TIM11_STOP <i> TIM11 counter stopped when core is halted
// <o.17> DBG_TIM10_STOP <i> TIM10 counter stopped when core is halted
// <o.16> DBG_TIM9_STOP <i> TIM9 counter stopped when core is halted
// <o.1> DBG_TIM8_STOP <i> TIM8 counter stopped when core is halted
// <o.0> DBG_TIM1_STOP <i> TIM1 counter stopped when core is halted
// </h>
DbgMCU_APB2_Fz = 0x00000000;
// <<< end of configuration section >>>

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@ -0,0 +1,61 @@
<html>
<body>
<pre>
<h1>µVision Build Log</h1>
<h2>Tool Versions:</h2>
IDE-Version: ¦ÌVision V5.26.2.0
Copyright (C) 2018 ARM Ltd and ARM Germany GmbH. All rights reserved.
License Information: sheldon dai, tencent, LIC=AK1CX-H5HPV-SGF7K-ZGDWF-QC6LB-GRJE8
Tool Versions:
Toolchain: MDK-ARM Professional Version: 5.26.2.0
Toolchain Path: C:\Keil_v5\ARM\ARMCC\Bin
C Compiler: Armcc.exe V5.06 update 6 (build 750)
Assembler: Armasm.exe V5.06 update 6 (build 750)
Linker/Locator: ArmLink.exe V5.06 update 6 (build 750)
Library Manager: ArmAr.exe V5.06 update 6 (build 750)
Hex Converter: FromElf.exe V5.06 update 6 (build 750)
CPU DLL: SARMCM3.DLL V5.26.2.0
Dialog DLL: DCM.DLL V1.17.2.0
Target DLL: Segger\JL2CM3.dll V2.99.31.0
Dialog DLL: TCM.DLL V1.36.1.0
<h2>Project:</h2>
D:\github\master\TencentOS-tiny\board\ALIENTEK_STM32F429\KEIL\tencent_cloud_sdk_coap_base_lwip\TencentOS_tiny.uvprojx
Project File Date: 10/28/2019
<h2>Output:</h2>
*** Using Compiler 'V5.06 update 6 (build 750)', folder: 'C:\Keil_v5\ARM\ARMCC\Bin'
Build target 'TencentOS_tiny'
compiling tencent_cloud_sdk_coap.c...
..\..\..\..\examples\tencent_cloud_sdk_coap\tencent_cloud_sdk_coap.c(17): error: #5: cannot open source input file "esp8266.h": No such file or directory
#include "esp8266.h"
..\..\..\..\examples\tencent_cloud_sdk_coap\tencent_cloud_sdk_coap.c: 0 warnings, 1 error
".\Obj\TencentOS_tiny.axf" - 1 Error(s), 0 Warning(s).
<h2>Software Packages used:</h2>
Package Vendor: ARM
http://www.keil.com/pack/ARM.CMSIS.5.6.0.pack
ARM.CMSIS.5.6.0
CMSIS (Cortex Microcontroller Software Interface Standard)
* Component: CORE Version: 5.3.0
Package Vendor: Keil
http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.13.0.pack
Keil.STM32F4xx_DFP.2.13.0
STMicroelectronics STM32F4 Series Device Support, Drivers and Examples
<h2>Collection of Component include folders:</h2>
.\RTE\_TencentOS_tiny
C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.6.0\CMSIS\Core\Include
C:\Keil_v5\ARM\PACK\Keil\STM32F4xx_DFP\2.13.0\Drivers\CMSIS\Device\ST\STM32F4xx\Include
<h2>Collection of Component Files used:</h2>
* Component: ARM::CMSIS:CORE:5.3.0
Target not created.
Build Time Elapsed: 00:00:02
</pre>
</body>
</html>

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@ -0,0 +1,16 @@
; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************
LR_IROM1 0x08000000 0x00100000 { ; load region size_region
ER_IROM1 0x08000000 0x00100000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
.ANY (+XO)
}
RW_IRAM1 0x20000000 0x00030000 { ; RW data
.ANY (+RW +ZI)
}
}

View File

@ -0,0 +1,20 @@
/*
* Auto generated Run-Time-Environment Component Configuration File
* *** Do not modify ! ***
*
* Project: 'TencentOS_tiny'
* Target: 'TencentOS_tiny'
*/
#ifndef RTE_COMPONENTS_H
#define RTE_COMPONENTS_H
/*
* Define the Device Header File:
*/
#define CMSIS_device_header "stm32f4xx.h"
#endif /* RTE_COMPONENTS_H */

File diff suppressed because one or more lines are too long

View File

@ -827,11 +827,6 @@
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_event.c</FilePath>
</File>
<File>
<FileName>tos_fifo.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_fifo.c</FilePath>
</File>
<File>
<FileName>tos_global.c</FileName>
<FileType>1</FileType>
@ -847,11 +842,6 @@
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_mmheap.c</FilePath>
</File>
<File>
<FileName>tos_msg.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_msg.c</FilePath>
</File>
<File>
<FileName>tos_mutex.c</FileName>
<FileType>1</FileType>
@ -862,11 +852,6 @@
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_pend.c</FilePath>
</File>
<File>
<FileName>tos_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_queue.c</FilePath>
</File>
<File>
<FileName>tos_robin.c</FileName>
<FileType>1</FileType>
@ -917,6 +902,56 @@
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\pm\tos_tickless.c</FilePath>
</File>
<File>
<FileName>tos_binary_heap.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_binary_heap.c</FilePath>
</File>
<File>
<FileName>tos_char_fifo.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_char_fifo.c</FilePath>
</File>
<File>
<FileName>tos_completion.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_completion.c</FilePath>
</File>
<File>
<FileName>tos_countdownlatch.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_countdownlatch.c</FilePath>
</File>
<File>
<FileName>tos_mail_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_mail_queue.c</FilePath>
</File>
<File>
<FileName>tos_message_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_message_queue.c</FilePath>
</File>
<File>
<FileName>tos_priority_mail_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_priority_mail_queue.c</FilePath>
</File>
<File>
<FileName>tos_priority_message_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_priority_message_queue.c</FilePath>
</File>
<File>
<FileName>tos_priority_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_priority_queue.c</FilePath>
</File>
<File>
<FileName>tos_ring_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_ring_queue.c</FilePath>
</File>
</Files>
</Group>
<Group>

View File

@ -0,0 +1,48 @@
// File: STM32F405_415_407_417_427_437_429_439.dbgconf
// Version: 1.0.0
// Note: refer to STM32F405/415 STM32F407/417 STM32F427/437 STM32F429/439 reference manual (RM0090)
// refer to STM32F40x STM32F41x datasheets
// refer to STM32F42x STM32F43x datasheets
// <<< Use Configuration Wizard in Context Menu >>>
// <h> Debug MCU configuration register (DBGMCU_CR)
// <o.2> DBG_STANDBY <i> Debug Standby Mode
// <o.1> DBG_STOP <i> Debug Stop Mode
// <o.0> DBG_SLEEP <i> Debug Sleep Mode
// </h>
DbgMCU_CR = 0x00000007;
// <h> Debug MCU APB1 freeze register (DBGMCU_APB1_FZ)
// <i> Reserved bits must be kept at reset value
// <o.26> DBG_CAN2_STOP <i> CAN2 stopped when core is halted
// <o.25> DBG_CAN1_STOP <i> CAN2 stopped when core is halted
// <o.23> DBG_I2C3_SMBUS_TIMEOUT <i> I2C3 SMBUS timeout mode stopped when core is halted
// <o.22> DBG_I2C2_SMBUS_TIMEOUT <i> I2C2 SMBUS timeout mode stopped when core is halted
// <o.21> DBG_I2C1_SMBUS_TIMEOUT <i> I2C1 SMBUS timeout mode stopped when core is halted
// <o.12> DBG_IWDG_STOP <i> Independent watchdog stopped when core is halted
// <o.11> DBG_WWDG_STOP <i> Window watchdog stopped when core is halted
// <o.10> DBG_RTC_STOP <i> RTC stopped when core is halted
// <o.8> DBG_TIM14_STOP <i> TIM14 counter stopped when core is halted
// <o.7> DBG_TIM13_STOP <i> TIM13 counter stopped when core is halted
// <o.6> DBG_TIM12_STOP <i> TIM12 counter stopped when core is halted
// <o.5> DBG_TIM7_STOP <i> TIM7 counter stopped when core is halted
// <o.4> DBG_TIM6_STOP <i> TIM6 counter stopped when core is halted
// <o.3> DBG_TIM5_STOP <i> TIM5 counter stopped when core is halted
// <o.2> DBG_TIM4_STOP <i> TIM4 counter stopped when core is halted
// <o.1> DBG_TIM3_STOP <i> TIM3 counter stopped when core is halted
// <o.0> DBG_TIM2_STOP <i> TIM2 counter stopped when core is halted
// </h>
DbgMCU_APB1_Fz = 0x00000000;
// <h> Debug MCU APB2 freeze register (DBGMCU_APB2_FZ)
// <i> Reserved bits must be kept at reset value
// <o.18> DBG_TIM11_STOP <i> TIM11 counter stopped when core is halted
// <o.17> DBG_TIM10_STOP <i> TIM10 counter stopped when core is halted
// <o.16> DBG_TIM9_STOP <i> TIM9 counter stopped when core is halted
// <o.1> DBG_TIM8_STOP <i> TIM8 counter stopped when core is halted
// <o.0> DBG_TIM1_STOP <i> TIM1 counter stopped when core is halted
// </h>
DbgMCU_APB2_Fz = 0x00000000;
// <<< end of configuration section >>>

View File

@ -0,0 +1,61 @@
<html>
<body>
<pre>
<h1>µVision Build Log</h1>
<h2>Tool Versions:</h2>
IDE-Version: ¦ÌVision V5.26.2.0
Copyright (C) 2018 ARM Ltd and ARM Germany GmbH. All rights reserved.
License Information: sheldon dai, tencent, LIC=AK1CX-H5HPV-SGF7K-ZGDWF-QC6LB-GRJE8
Tool Versions:
Toolchain: MDK-ARM Professional Version: 5.26.2.0
Toolchain Path: C:\Keil_v5\ARM\ARMCC\Bin
C Compiler: Armcc.exe V5.06 update 6 (build 750)
Assembler: Armasm.exe V5.06 update 6 (build 750)
Linker/Locator: ArmLink.exe V5.06 update 6 (build 750)
Library Manager: ArmAr.exe V5.06 update 6 (build 750)
Hex Converter: FromElf.exe V5.06 update 6 (build 750)
CPU DLL: SARMCM3.DLL V5.26.2.0
Dialog DLL: DCM.DLL V1.17.2.0
Target DLL: Segger\JL2CM3.dll V2.99.31.0
Dialog DLL: TCM.DLL V1.36.1.0
<h2>Project:</h2>
D:\github\master\TencentOS-tiny\board\ALIENTEK_STM32F429\KEIL\tencent_cloud_sdk_data_template_base_lwip\TencentOS_tiny.uvprojx
Project File Date: 10/28/2019
<h2>Output:</h2>
*** Using Compiler 'V5.06 update 6 (build 750)', folder: 'C:\Keil_v5\ARM\ARMCC\Bin'
Build target 'TencentOS_tiny'
compiling tencent_cloud_sdk_explorer.c...
..\..\..\..\examples\tencent_cloud_sdk_data_template\tencent_cloud_sdk_explorer.c(17): error: #5: cannot open source input file "esp8266.h": No such file or directory
#include "esp8266.h"
..\..\..\..\examples\tencent_cloud_sdk_data_template\tencent_cloud_sdk_explorer.c: 0 warnings, 1 error
".\Obj\TencentOS_tiny.axf" - 1 Error(s), 0 Warning(s).
<h2>Software Packages used:</h2>
Package Vendor: ARM
http://www.keil.com/pack/ARM.CMSIS.5.6.0.pack
ARM.CMSIS.5.6.0
CMSIS (Cortex Microcontroller Software Interface Standard)
* Component: CORE Version: 5.3.0
Package Vendor: Keil
http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.13.0.pack
Keil.STM32F4xx_DFP.2.13.0
STMicroelectronics STM32F4 Series Device Support, Drivers and Examples
<h2>Collection of Component include folders:</h2>
.\RTE\_TencentOS_tiny
C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.6.0\CMSIS\Core\Include
C:\Keil_v5\ARM\PACK\Keil\STM32F4xx_DFP\2.13.0\Drivers\CMSIS\Device\ST\STM32F4xx\Include
<h2>Collection of Component Files used:</h2>
* Component: ARM::CMSIS:CORE:5.3.0
Target not created.
Build Time Elapsed: 00:00:02
</pre>
</body>
</html>

View File

@ -0,0 +1,16 @@
; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************
LR_IROM1 0x08000000 0x00100000 { ; load region size_region
ER_IROM1 0x08000000 0x00100000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
.ANY (+XO)
}
RW_IRAM1 0x20000000 0x00030000 { ; RW data
.ANY (+RW +ZI)
}
}

View File

@ -0,0 +1,20 @@
/*
* Auto generated Run-Time-Environment Component Configuration File
* *** Do not modify ! ***
*
* Project: 'TencentOS_tiny'
* Target: 'TencentOS_tiny'
*/
#ifndef RTE_COMPONENTS_H
#define RTE_COMPONENTS_H
/*
* Define the Device Header File:
*/
#define CMSIS_device_header "stm32f4xx.h"
#endif /* RTE_COMPONENTS_H */

File diff suppressed because one or more lines are too long

View File

@ -827,11 +827,6 @@
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_event.c</FilePath>
</File>
<File>
<FileName>tos_fifo.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_fifo.c</FilePath>
</File>
<File>
<FileName>tos_global.c</FileName>
<FileType>1</FileType>
@ -847,11 +842,6 @@
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_mmheap.c</FilePath>
</File>
<File>
<FileName>tos_msg.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_msg.c</FilePath>
</File>
<File>
<FileName>tos_mutex.c</FileName>
<FileType>1</FileType>
@ -862,11 +852,6 @@
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_pend.c</FilePath>
</File>
<File>
<FileName>tos_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_queue.c</FilePath>
</File>
<File>
<FileName>tos_robin.c</FileName>
<FileType>1</FileType>
@ -917,6 +902,56 @@
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\pm\tos_tickless.c</FilePath>
</File>
<File>
<FileName>tos_binary_heap.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_binary_heap.c</FilePath>
</File>
<File>
<FileName>tos_char_fifo.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_char_fifo.c</FilePath>
</File>
<File>
<FileName>tos_completion.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_completion.c</FilePath>
</File>
<File>
<FileName>tos_countdownlatch.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_countdownlatch.c</FilePath>
</File>
<File>
<FileName>tos_mail_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_mail_queue.c</FilePath>
</File>
<File>
<FileName>tos_message_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_message_queue.c</FilePath>
</File>
<File>
<FileName>tos_priority_mail_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_priority_mail_queue.c</FilePath>
</File>
<File>
<FileName>tos_priority_message_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_priority_message_queue.c</FilePath>
</File>
<File>
<FileName>tos_priority_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_priority_queue.c</FilePath>
</File>
<File>
<FileName>tos_ring_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_ring_queue.c</FilePath>
</File>
</Files>
</Group>
<Group>

View File

@ -0,0 +1,48 @@
// File: STM32F405_415_407_417_427_437_429_439.dbgconf
// Version: 1.0.0
// Note: refer to STM32F405/415 STM32F407/417 STM32F427/437 STM32F429/439 reference manual (RM0090)
// refer to STM32F40x STM32F41x datasheets
// refer to STM32F42x STM32F43x datasheets
// <<< Use Configuration Wizard in Context Menu >>>
// <h> Debug MCU configuration register (DBGMCU_CR)
// <o.2> DBG_STANDBY <i> Debug Standby Mode
// <o.1> DBG_STOP <i> Debug Stop Mode
// <o.0> DBG_SLEEP <i> Debug Sleep Mode
// </h>
DbgMCU_CR = 0x00000007;
// <h> Debug MCU APB1 freeze register (DBGMCU_APB1_FZ)
// <i> Reserved bits must be kept at reset value
// <o.26> DBG_CAN2_STOP <i> CAN2 stopped when core is halted
// <o.25> DBG_CAN1_STOP <i> CAN2 stopped when core is halted
// <o.23> DBG_I2C3_SMBUS_TIMEOUT <i> I2C3 SMBUS timeout mode stopped when core is halted
// <o.22> DBG_I2C2_SMBUS_TIMEOUT <i> I2C2 SMBUS timeout mode stopped when core is halted
// <o.21> DBG_I2C1_SMBUS_TIMEOUT <i> I2C1 SMBUS timeout mode stopped when core is halted
// <o.12> DBG_IWDG_STOP <i> Independent watchdog stopped when core is halted
// <o.11> DBG_WWDG_STOP <i> Window watchdog stopped when core is halted
// <o.10> DBG_RTC_STOP <i> RTC stopped when core is halted
// <o.8> DBG_TIM14_STOP <i> TIM14 counter stopped when core is halted
// <o.7> DBG_TIM13_STOP <i> TIM13 counter stopped when core is halted
// <o.6> DBG_TIM12_STOP <i> TIM12 counter stopped when core is halted
// <o.5> DBG_TIM7_STOP <i> TIM7 counter stopped when core is halted
// <o.4> DBG_TIM6_STOP <i> TIM6 counter stopped when core is halted
// <o.3> DBG_TIM5_STOP <i> TIM5 counter stopped when core is halted
// <o.2> DBG_TIM4_STOP <i> TIM4 counter stopped when core is halted
// <o.1> DBG_TIM3_STOP <i> TIM3 counter stopped when core is halted
// <o.0> DBG_TIM2_STOP <i> TIM2 counter stopped when core is halted
// </h>
DbgMCU_APB1_Fz = 0x00000000;
// <h> Debug MCU APB2 freeze register (DBGMCU_APB2_FZ)
// <i> Reserved bits must be kept at reset value
// <o.18> DBG_TIM11_STOP <i> TIM11 counter stopped when core is halted
// <o.17> DBG_TIM10_STOP <i> TIM10 counter stopped when core is halted
// <o.16> DBG_TIM9_STOP <i> TIM9 counter stopped when core is halted
// <o.1> DBG_TIM8_STOP <i> TIM8 counter stopped when core is halted
// <o.0> DBG_TIM1_STOP <i> TIM1 counter stopped when core is halted
// </h>
DbgMCU_APB2_Fz = 0x00000000;
// <<< end of configuration section >>>

View File

@ -0,0 +1,338 @@
<html>
<body>
<pre>
<h1>µVision Build Log</h1>
<h2>Tool Versions:</h2>
IDE-Version: ¦ÌVision V5.26.2.0
Copyright (C) 2018 ARM Ltd and ARM Germany GmbH. All rights reserved.
License Information: sheldon dai, tencent, LIC=AK1CX-H5HPV-SGF7K-ZGDWF-QC6LB-GRJE8
Tool Versions:
Toolchain: MDK-ARM Professional Version: 5.26.2.0
Toolchain Path: C:\Keil_v5\ARM\ARMCC\Bin
C Compiler: Armcc.exe V5.06 update 6 (build 750)
Assembler: Armasm.exe V5.06 update 6 (build 750)
Linker/Locator: ArmLink.exe V5.06 update 6 (build 750)
Library Manager: ArmAr.exe V5.06 update 6 (build 750)
Hex Converter: FromElf.exe V5.06 update 6 (build 750)
CPU DLL: SARMCM3.DLL V5.26.2.0
Dialog DLL: DCM.DLL V1.17.2.0
Target DLL: Segger\JL2CM3.dll V2.99.31.0
Dialog DLL: TCM.DLL V1.36.1.0
<h2>Project:</h2>
D:\github\master\TencentOS-tiny\board\ALIENTEK_STM32F429\KEIL\tencent_cloud_sdk_mqtt_base_lwip\TencentOS_tiny.uvprojx
Project File Date: 10/28/2019
<h2>Output:</h2>
*** Using Compiler 'V5.06 update 6 (build 750)', folder: 'C:\Keil_v5\ARM\ARMCC\Bin'
Build target 'TencentOS_tiny'
assembling startup_stm32f429xx.s...
compiling led.c...
compiling lwip.c...
compiling dwt.c...
compiling bsp_eth.c...
compiling gpio.c...
compiling main.c...
compiling mcu_init.c...
compiling myiic.c...
compiling rng.c...
compiling sdio.c...
compiling pcf8574.c...
compiling stm32f4xx_hal_msp.c...
compiling spi.c...
compiling stm32f4xx_it.c...
compiling usart.c...
compiling stm32f4xx_hal.c...
compiling stm32f4xx_hal_cortex.c...
compiling stm32f4xx_hal_dma.c...
compiling stm32f4xx_hal_dma_ex.c...
compiling stm32f4xx_hal_flash.c...
compiling stm32f4xx_hal_flash_ex.c...
compiling stm32f4xx_hal_flash_ramfunc.c...
compiling stm32f4xx_hal_pwr.c...
compiling stm32f4xx_hal_pwr_ex.c...
compiling stm32f4xx_hal_gpio.c...
compiling stm32f4xx_hal_rcc.c...
compiling stm32f4xx_hal_tim.c...
compiling stm32f4xx_hal_rcc_ex.c...
compiling stm32f4xx_hal_tim_ex.c...
compiling stm32f4xx_hal_rng.c...
compiling stm32f4xx_hal_uart.c...
compiling stm32f4xx_hal_rtc.c...
compiling stm32f4xx_hal_rtc_ex.c...
compiling stm32f4xx_hal_adc.c...
compiling stm32f4xx_hal_spi.c...
compiling stm32f4xx_hal_adc_ex.c...
compiling stm32f4xx_hal_can.c...
compiling stm32f4xx_hal_crc.c...
compiling stm32f4xx_hal_cec.c...
compiling stm32f4xx_hal_cryp_ex.c...
compiling stm32f4xx_hal_cryp.c...
compiling stm32f4xx_hal_dac.c...
compiling stm32f4xx_hal_dac_ex.c...
compiling stm32f4xx_hal_dcmi.c...
compiling stm32f4xx_hal_dma2d.c...
compiling stm32f4xx_hal_dcmi_ex.c...
compiling stm32f4xx_hal_dsi.c...
compiling stm32f4xx_hal_dfsdm.c...
compiling stm32f4xx_hal_eth.c...
compiling stm32f4xx_hal_fmpi2c.c...
compiling stm32f4xx_hal_fmpi2c_ex.c...
compiling stm32f4xx_hal_hash.c...
compiling stm32f4xx_hal_hash_ex.c...
compiling stm32f4xx_hal_hcd.c...
compiling stm32f4xx_hal_i2c.c...
compiling stm32f4xx_hal_i2c_ex.c...
compiling stm32f4xx_hal_i2s.c...
compiling stm32f4xx_hal_i2s_ex.c...
compiling stm32f4xx_hal_iwdg.c...
compiling stm32f4xx_hal_irda.c...
compiling stm32f4xx_hal_lptim.c...
compiling stm32f4xx_hal_ltdc.c...
compiling stm32f4xx_hal_ltdc_ex.c...
compiling stm32f4xx_hal_mmc.c...
compiling stm32f4xx_hal_nand.c...
compiling stm32f4xx_hal_nor.c...
compiling stm32f4xx_hal_pcd.c...
compiling stm32f4xx_hal_pccard.c...
compiling stm32f4xx_hal_pcd_ex.c...
compiling stm32f4xx_hal_qspi.c...
compiling stm32f4xx_hal_sai.c...
compiling stm32f4xx_hal_sai_ex.c...
compiling stm32f4xx_hal_sd.c...
compiling stm32f4xx_hal_sdram.c...
compiling stm32f4xx_hal_smartcard.c...
compiling stm32f4xx_hal_sram.c...
compiling stm32f4xx_hal_spdifrx.c...
compiling stm32f4xx_hal_usart.c...
compiling stm32f4xx_hal_wwdg.c...
compiling stm32f4xx_ll_fmc.c...
compiling stm32f4xx_ll_sdmmc.c...
compiling stm32f4xx_ll_usb.c...
compiling system_stm32f4xx.c...
compiling tos_event.c...
compiling tos_mmblk.c...
compiling tos_global.c...
compiling tos_mmheap.c...
compiling tos_mutex.c...
compiling tos_pend.c...
compiling tos_robin.c...
compiling tos_sched.c...
compiling tos_sem.c...
compiling tos_sys.c...
compiling tos_tick.c...
compiling tos_task.c...
compiling tos_time.c...
compiling tos_timer.c...
compiling tos_pm.c...
compiling tos_tickless.c...
compiling tos_binary_heap.c...
compiling tos_char_fifo.c...
compiling tos_completion.c...
compiling tos_countdownlatch.c...
compiling tos_mail_queue.c...
compiling tos_priority_mail_queue.c...
compiling tos_message_queue.c...
assembling port_s.S...
compiling tos_priority_message_queue.c...
compiling tos_priority_queue.c...
compiling tos_cpu.c...
compiling tos_fault.c...
compiling port_c.c...
compiling tos_ring_queue.c...
compiling cmsis_os.c...
compiling bsp_pm_device.c...
compiling bsp_tickless_alarm.c...
compiling bsp_pwr_mgr.c...
..\..\BSP\Src\tickless\bsp_pwr_mgr.c(24): warning: #940-D: missing return statement at end of non-void function "tos_bsp_tickless_setup"
}
..\..\BSP\Src\tickless\bsp_pwr_mgr.c: 1 warning, 0 errors
compiling netbuf.c...
compiling err.c...
compiling netifapi.c...
compiling api_msg.c...
compiling api_lib.c...
compiling if_api.c...
compiling netdb.c...
compiling altcp.c...
compiling altcp_alloc.c...
compiling altcp_tcp.c...
compiling def.c...
compiling inet_chksum.c...
compiling dns.c...
compiling tcpip.c...
compiling sockets.c...
compiling ip.c...
compiling raw.c...
compiling stats.c...
compiling init.c...
compiling mem.c...
compiling memp.c...
compiling netif.c...
compiling pbuf.c...
compiling tcp_in.c...
compiling tcp_out.c...
compiling tcp.c...
compiling udp.c...
compiling autoip.c...
compiling etharp.c...
compiling ip4_addr.c...
compiling ip4.c...
compiling dhcp.c...
compiling igmp.c...
compiling icmp.c...
compiling sys.c...
compiling timeouts.c...
compiling ip4_frag.c...
compiling lowpan6_ble.c...
compiling ethernet.c...
compiling lowpan6_common.c...
compiling lowpan6.c...
compiling zepif.c...
compiling tencent_cloud_sdk_mqtt.c...
..\..\..\..\examples\tencent_cloud_sdk_mqtt\tencent_cloud_sdk_mqtt.c(17): error: #5: cannot open source input file "esp8266.h": No such file or directory
#include "esp8266.h"
..\..\..\..\examples\tencent_cloud_sdk_mqtt\tencent_cloud_sdk_mqtt.c: 0 warnings, 1 error
compiling bridgeif_fdb.c...
compiling qcloud_device.c...
compiling bridgeif.c...
compiling qcloud_tls.c...
compiling qcloud_log.c...
compiling qcloud_mqtt_connect.c...
compiling qcloud_network.c...
compiling qcloud_mqtt_common.c...
compiling ethernetif.c...
compiling sys_arch.c...
compiling qcloud_mqtt_client.c...
compiling mqtt_sample.c...
compiling osal_dtls.c...
compiling qcloud_mqtt_yield.c...
compiling qcloud_mqtt_unsubscribe.c...
compiling qcloud_mqtt_subscribe.c...
compiling qcloud_mqtt_glue.c...
compiling qcloud_mqtt_publish.c...
compiling qcloud_aes.c...
compiling osal_os.c...
compiling qcloud_base64.c...
compiling qcloud_hmac.c...
compiling qcloud_json_token.c...
compiling osal_udp_socket.c...
compiling osal_tcp_socket.c...
compiling qcloud_httpc.c...
compiling osal_tls.c...
compiling qcloud_json_parser.c...
compiling osal_timer.c...
compiling qcloud_string_utils.c...
compiling asn1parse.c...
compiling aria.c...
compiling qcloud_md5.c...
compiling aes.c...
compiling qcloud_sha1.c...
compiling arc4.c...
compiling aesni.c...
compiling base64.c...
compiling asn1write.c...
compiling bignum.c...
compiling blowfish.c...
compiling certs.c...
compiling ccm.c...
compiling chacha20.c...
compiling camellia.c...
compiling chachapoly.c...
compiling cipher_wrap.c...
compiling cmac.c...
compiling cipher.c...
compiling ctr_drbg.c...
compiling debug.c...
compiling dhm.c...
compiling ecdh.c...
compiling des.c...
compiling ecdsa.c...
compiling ecp.c...
compiling ecjpake.c...
compiling ecp_curves.c...
compiling entropy.c...
compiling entropy_poll.c...
compiling error.c...
compiling havege.c...
compiling hkdf.c...
compiling gcm.c...
compiling hmac_drbg.c...
compiling md2.c...
compiling md4.c...
compiling md_wrap.c...
compiling md.c...
compiling memory_buffer_alloc.c...
compiling md5.c...
compiling net_sockets.c...
compiling nist_kw.c...
compiling oid.c...
compiling padlock.c...
compiling pem.c...
compiling pk.c...
compiling pk_wrap.c...
compiling pkcs5.c...
compiling pkcs11.c...
compiling pkparse.c...
compiling pkcs12.c...
compiling pkwrite.c...
compiling platform.c...
compiling platform_util.c...
compiling poly1305.c...
compiling ripemd160.c...
compiling rsa.c...
compiling rsa_internal.c...
compiling sha512.c...
compiling sha1.c...
compiling sha256.c...
compiling ssl_ciphersuites.c...
compiling ssl_cookie.c...
compiling ssl_srv.c...
compiling ssl_cache.c...
compiling ssl_ticket.c...
compiling ssl_cli.c...
compiling threading.c...
compiling version_features.c...
compiling version.c...
compiling timing.c...
compiling x509.c...
compiling x509_crl.c...
compiling x509_create.c...
compiling ssl_tls.c...
compiling x509_crt.c...
compiling x509_csr.c...
compiling x509write_crt.c...
compiling x509write_csr.c...
compiling xtea.c...
compiling entropy_hardware_alt.c...
compiling timing_alt.c...
compiling net_sockets_alt.c...
".\Obj\TencentOS_tiny.axf" - 1 Error(s), 1 Warning(s).
<h2>Software Packages used:</h2>
Package Vendor: ARM
http://www.keil.com/pack/ARM.CMSIS.5.6.0.pack
ARM.CMSIS.5.6.0
CMSIS (Cortex Microcontroller Software Interface Standard)
* Component: CORE Version: 5.3.0
Package Vendor: Keil
http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.13.0.pack
Keil.STM32F4xx_DFP.2.13.0
STMicroelectronics STM32F4 Series Device Support, Drivers and Examples
<h2>Collection of Component include folders:</h2>
.\RTE\_TencentOS_tiny
C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.6.0\CMSIS\Core\Include
C:\Keil_v5\ARM\PACK\Keil\STM32F4xx_DFP\2.13.0\Drivers\CMSIS\Device\ST\STM32F4xx\Include
<h2>Collection of Component Files used:</h2>
* Component: ARM::CMSIS:CORE:5.3.0
Target not created.
Build Time Elapsed: 00:00:38
</pre>
</body>
</html>

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@ -0,0 +1,16 @@
; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************
LR_IROM1 0x08000000 0x00100000 { ; load region size_region
ER_IROM1 0x08000000 0x00100000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
.ANY (+XO)
}
RW_IRAM1 0x20000000 0x00030000 { ; RW data
.ANY (+RW +ZI)
}
}

View File

@ -0,0 +1,20 @@
/*
* Auto generated Run-Time-Environment Component Configuration File
* *** Do not modify ! ***
*
* Project: 'TencentOS_tiny'
* Target: 'TencentOS_tiny'
*/
#ifndef RTE_COMPONENTS_H
#define RTE_COMPONENTS_H
/*
* Define the Device Header File:
*/
#define CMSIS_device_header "stm32f4xx.h"
#endif /* RTE_COMPONENTS_H */

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@ -827,11 +827,6 @@
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_event.c</FilePath>
</File>
<File>
<FileName>tos_fifo.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_fifo.c</FilePath>
</File>
<File>
<FileName>tos_global.c</FileName>
<FileType>1</FileType>
@ -847,11 +842,6 @@
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_mmheap.c</FilePath>
</File>
<File>
<FileName>tos_msg.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_msg.c</FilePath>
</File>
<File>
<FileName>tos_mutex.c</FileName>
<FileType>1</FileType>
@ -862,11 +852,6 @@
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_pend.c</FilePath>
</File>
<File>
<FileName>tos_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_queue.c</FilePath>
</File>
<File>
<FileName>tos_robin.c</FileName>
<FileType>1</FileType>
@ -917,6 +902,56 @@
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\pm\tos_tickless.c</FilePath>
</File>
<File>
<FileName>tos_binary_heap.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_binary_heap.c</FilePath>
</File>
<File>
<FileName>tos_char_fifo.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_char_fifo.c</FilePath>
</File>
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<FileName>tos_completion.c</FileName>
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<FilePath>..\..\..\..\kernel\core\tos_countdownlatch.c</FilePath>
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<File>
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<FilePath>..\..\..\..\kernel\core\tos_mail_queue.c</FilePath>
</File>
<File>
<FileName>tos_message_queue.c</FileName>
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<FileName>tos_priority_mail_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_priority_mail_queue.c</FilePath>
</File>
<File>
<FileName>tos_priority_message_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_priority_message_queue.c</FilePath>
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<File>
<FileName>tos_priority_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_priority_queue.c</FilePath>
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<FileName>tos_ring_queue.c</FileName>
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<FilePath>..\..\..\..\kernel\core\tos_ring_queue.c</FilePath>
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</Group>
<Group>

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@ -25,6 +25,14 @@
#define TOS_CFG_TIMER_EN 1u
#define TOS_CFG_MESSAGE_QUEUE_EN 1u
#define TOS_CFG_MAIL_QUEUE_EN 0u
#define TOS_CFG_PRIORITY_MESSAGE_QUEUE_EN 1u
#define TOS_CFG_PRIORITY_MAIL_QUEUE_EN 0u
#define TOS_CFG_SEM_EN 1u
#define TOS_CFG_PWR_MGR_EN 0u

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@ -0,0 +1,100 @@
<html>
<body>
<pre>
<h1>礦ision Build Log</h1>
<h2>Tool Versions:</h2>
IDE-Version: μVision V5.26.2.0
Copyright (C) 2018 ARM Ltd and ARM Germany GmbH. All rights reserved.
License Information: sheldon dai, tencent, LIC=AK1CX-H5HPV-SGF7K-ZGDWF-QC6LB-GRJE8
Tool Versions:
Toolchain: MDK-ARM Professional Version: 5.26.2.0
Toolchain Path: C:\Keil_v5\ARM\ARMCC\Bin
C Compiler: Armcc.exe V5.06 update 6 (build 750)
Assembler: Armasm.exe V5.06 update 6 (build 750)
Linker/Locator: ArmLink.exe V5.06 update 6 (build 750)
Library Manager: ArmAr.exe V5.06 update 6 (build 750)
Hex Converter: FromElf.exe V5.06 update 6 (build 750)
CPU DLL: SARMCM3.DLL V5.26.2.0
Dialog DLL: DCM.DLL V1.17.2.0
Target DLL: STLink\ST-LINKIII-KEIL_SWO.dll V3.0.5.0
Dialog DLL: TCM.DLL V1.36.1.0
<h2>Project:</h2>
D:\github\master\TencentOS-tiny\board\ALIENTEK_W601\KEIL\hello_world\TencentOS_tiny.uvprojx
Project File Date: 10/28/2019
<h2>Output:</h2>
*** Using Compiler 'V5.06 update 6 (build 750)', folder: 'C:\Keil_v5\ARM\ARMCC\Bin'
Build target 'TencentOS_tiny'
compiling beep.c...
compiling usart.c...
compiling key.c...
compiling dwt.c...
compiling main.c...
compiling sys.c...
compiling led.c...
assembling startup.s...
compiling misc.c...
compiling wm_gpio.c...
compiling wm_cpu.c...
compiling wm_gpio_afsel.c...
compiling wm_io.c...
compiling wm_timer.c...
compiling wm_pmu.c...
compiling wm_irq.c...
compiling tos_cpu.c...
assembling port_s.S...
compiling tos_event.c...
compiling port_c.c...
compiling tos_global.c...
compiling tos_mmblk.c...
compiling tos_mutex.c...
compiling tos_mmheap.c...
compiling tos_pend.c...
compiling tos_robin.c...
compiling tos_sched.c...
compiling tos_sem.c...
compiling tos_sys.c...
compiling tos_tick.c...
compiling tos_time.c...
compiling tos_task.c...
compiling tos_timer.c...
compiling tos_binary_heap.c...
compiling tos_completion.c...
compiling tos_char_fifo.c...
compiling tos_countdownlatch.c...
compiling tos_message_queue.c...
compiling tos_mail_queue.c...
compiling tos_priority_mail_queue.c...
compiling tos_priority_message_queue.c...
compiling tos_priority_queue.c...
compiling tos_ring_queue.c...
compiling hello_world.c...
compiling cmsis_os.c...
linking...
Program Size: Code=9164 RO-data=408 RW-data=120 ZI-data=11304
FromELF: creating hex file...
After Build - User command #1: fromelf.exe --bin -o "..\OBJ\TencentOS_tiny.bin" "..\OBJ\TencentOS_tiny.axf"
After Build - User command #2: makeimg.bat
已复制 1 个文件。
已复制 1 个文件。
secboot_len:4948, app_imglen:2614, total:10614
"..\OBJ\TencentOS_tiny.axf" - 0 Error(s), 0 Warning(s).
<h2>Software Packages used:</h2>
Package Vendor: ARM
http://www.keil.com/pack/ARM.CMSIS.5.6.0.pack
ARM.CMSIS.5.6.0
CMSIS (Cortex Microcontroller Software Interface Standard)
<h2>Collection of Component include folders:</h2>
.\RTE\_TencentOS_tiny
C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.6.0\Device\ARM\ARMCM3\Include
<h2>Collection of Component Files used:</h2>
Build Time Elapsed: 00:00:07
</pre>
</body>
</html>

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; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************
LR_IROM1 0x08010100 0x000EFF00 { ; load region size_region
ER_IROM1 0x08010100 0x000EFF00 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
.ANY (+XO)
}
RW_IRAM1 0x20000000 0x00028000 { ; RW data
.ANY (+RW +ZI)
}
}

File diff suppressed because one or more lines are too long

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@ -181,7 +181,7 @@
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<GroupName>USER</GroupName>
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@ -273,7 +273,7 @@
<Group>
<GroupName>WMLIB</GroupName>
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<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
@ -456,18 +456,6 @@
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\kernel\core\tos_fifo.c</PathWithFileName>
<FilenameWithoutPath>tos_fifo.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
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@ -475,7 +463,7 @@
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<tvExpOptDlg>0</tvExpOptDlg>
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<PathWithFileName>..\..\..\..\kernel\core\tos_msg.c</PathWithFileName>
<FilenameWithoutPath>tos_msg.c</FilenameWithoutPath>
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<bShared>0</bShared>
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@ -523,7 +499,7 @@
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@ -535,19 +511,7 @@
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<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\kernel\core\tos_queue.c</PathWithFileName>
<FilenameWithoutPath>tos_queue.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
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<File>
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<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -559,7 +523,7 @@
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<File>
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<FileNumber>30</FileNumber>
<FileNumber>27</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -571,7 +535,7 @@
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<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -583,7 +547,7 @@
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<File>
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<FileNumber>29</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -595,7 +559,7 @@
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<File>
<GroupNumber>4</GroupNumber>
<FileNumber>33</FileNumber>
<FileNumber>30</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -607,7 +571,7 @@
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<File>
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<FileNumber>31</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -619,7 +583,7 @@
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<File>
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<FileNumber>35</FileNumber>
<FileNumber>32</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -631,7 +595,7 @@
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<File>
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<FileNumber>33</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@ -641,6 +605,126 @@
<RteFlg>0</RteFlg>
<bShared>0</bShared>
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<FileNumber>34</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\kernel\core\tos_binary_heap.c</PathWithFileName>
<FilenameWithoutPath>tos_binary_heap.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
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<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\kernel\core\tos_char_fifo.c</PathWithFileName>
<FilenameWithoutPath>tos_char_fifo.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
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<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\kernel\core\tos_completion.c</PathWithFileName>
<FilenameWithoutPath>tos_completion.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
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<PathWithFileName>..\..\..\..\kernel\core\tos_countdownlatch.c</PathWithFileName>
<FilenameWithoutPath>tos_countdownlatch.c</FilenameWithoutPath>
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<tvExpOptDlg>0</tvExpOptDlg>
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<PathWithFileName>..\..\..\..\kernel\core\tos_mail_queue.c</PathWithFileName>
<FilenameWithoutPath>tos_mail_queue.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
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<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
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<PathWithFileName>..\..\..\..\kernel\core\tos_message_queue.c</PathWithFileName>
<FilenameWithoutPath>tos_message_queue.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
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<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\kernel\core\tos_priority_mail_queue.c</PathWithFileName>
<FilenameWithoutPath>tos_priority_mail_queue.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
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<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\kernel\core\tos_priority_message_queue.c</PathWithFileName>
<FilenameWithoutPath>tos_priority_message_queue.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
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<bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\kernel\core\tos_priority_queue.c</PathWithFileName>
<FilenameWithoutPath>tos_priority_queue.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
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<GroupNumber>4</GroupNumber>
<FileNumber>43</FileNumber>
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<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\kernel\core\tos_ring_queue.c</PathWithFileName>
<FilenameWithoutPath>tos_ring_queue.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
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@ -651,7 +735,7 @@
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@ -671,7 +755,7 @@
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<tvExpOptDlg>0</tvExpOptDlg>

View File

@ -16,7 +16,7 @@
<TargetCommonOption>
<Device>ARMCM3</Device>
<Vendor>ARM</Vendor>
<PackID>ARM.CMSIS.5.4.0</PackID>
<PackID>ARM.CMSIS.5.6.0</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@ -497,11 +497,6 @@
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_event.c</FilePath>
</File>
<File>
<FileName>tos_fifo.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_fifo.c</FilePath>
</File>
<File>
<FileName>tos_global.c</FileName>
<FileType>1</FileType>
@ -517,11 +512,6 @@
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_mmheap.c</FilePath>
</File>
<File>
<FileName>tos_msg.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_msg.c</FilePath>
</File>
<File>
<FileName>tos_mutex.c</FileName>
<FileType>1</FileType>
@ -532,11 +522,6 @@
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_pend.c</FilePath>
</File>
<File>
<FileName>tos_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_queue.c</FilePath>
</File>
<File>
<FileName>tos_robin.c</FileName>
<FileType>1</FileType>
@ -577,6 +562,56 @@
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_timer.c</FilePath>
</File>
<File>
<FileName>tos_binary_heap.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_binary_heap.c</FilePath>
</File>
<File>
<FileName>tos_char_fifo.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_char_fifo.c</FilePath>
</File>
<File>
<FileName>tos_completion.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_completion.c</FilePath>
</File>
<File>
<FileName>tos_countdownlatch.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_countdownlatch.c</FilePath>
</File>
<File>
<FileName>tos_mail_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_mail_queue.c</FilePath>
</File>
<File>
<FileName>tos_message_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_message_queue.c</FilePath>
</File>
<File>
<FileName>tos_priority_mail_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_priority_mail_queue.c</FilePath>
</File>
<File>
<FileName>tos_priority_message_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_priority_message_queue.c</FilePath>
</File>
<File>
<FileName>tos_priority_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_priority_queue.c</FilePath>
</File>
<File>
<FileName>tos_ring_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_ring_queue.c</FilePath>
</File>
</Files>
</Group>
<Group>

View File

@ -0,0 +1,61 @@
<html>
<body>
<pre>
<h1>µVision Build Log</h1>
<h2>Tool Versions:</h2>
IDE-Version: ¦ÌVision V5.26.2.0
Copyright (C) 2018 ARM Ltd and ARM Germany GmbH. All rights reserved.
License Information: sheldon dai, tencent, LIC=AK1CX-H5HPV-SGF7K-ZGDWF-QC6LB-GRJE8
Tool Versions:
Toolchain: MDK-ARM Professional Version: 5.26.2.0
Toolchain Path: C:\Keil_v5\ARM\ARMCC\Bin
C Compiler: Armcc.exe V5.06 update 6 (build 750)
Assembler: Armasm.exe V5.06 update 6 (build 750)
Linker/Locator: ArmLink.exe V5.06 update 6 (build 750)
Library Manager: ArmAr.exe V5.06 update 6 (build 750)
Hex Converter: FromElf.exe V5.06 update 6 (build 750)
CPU DLL: SARMCM3.DLL V5.26.2.0
Dialog DLL: DCM.DLL V1.17.2.0
Target DLL: STLink\ST-LINKIII-KEIL_SWO.dll V3.0.5.0
Dialog DLL: TCM.DLL V1.36.1.0
<h2>Project:</h2>
D:\github\master\TencentOS-tiny\board\ALIENTEK_WarShip_STM32F103ZET6\KEIL\hello_world\TencentOS_tiny.uvprojx
Project File Date: 10/28/2019
<h2>Output:</h2>
*** Using Compiler 'V5.06 update 6 (build 750)', folder: 'C:\Keil_v5\ARM\ARMCC\Bin'
Build target 'ALIENTEK_WarShip_STM32F103ZET6'
compiling cmsis_os.c...
compiling hello_world.c...
compiling main.c...
linking...
Program Size: Code=9444 RO-data=500 RW-data=92 ZI-data=31508
".\ALIENTEK_WarShip_STM32F103\TencentOS_tiny.axf" - 0 Error(s), 0 Warning(s).
<h2>Software Packages used:</h2>
Package Vendor: ARM
http://www.keil.com/pack/ARM.CMSIS.5.6.0.pack
ARM.CMSIS.5.6.0
CMSIS (Cortex Microcontroller Software Interface Standard)
* Component: CORE Version: 5.3.0
Package Vendor: Keil
http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.2.0.pack
Keil.STM32F1xx_DFP.2.2.0
STMicroelectronics STM32F1 Series Device Support, Drivers and Examples
<h2>Collection of Component include folders:</h2>
.\RTE\_ALIENTEK_WarShip_STM32F103ZET6
C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.6.0\CMSIS\Core\Include
C:\Keil_v5\ARM\PACK\Keil\STM32F1xx_DFP\2.2.0\Device\Include
<h2>Collection of Component Files used:</h2>
* Component: ARM::CMSIS:CORE:5.3.0
Build Time Elapsed: 00:00:01
</pre>
</body>
</html>

View File

@ -0,0 +1,16 @@
; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************
LR_IROM1 0x08000000 0x00080000 { ; load region size_region
ER_IROM1 0x08000000 0x00080000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
.ANY (+XO)
}
RW_IRAM1 0x20000000 0x00010000 { ; RW data
.ANY (+RW +ZI)
}
}

View File

@ -0,0 +1,97 @@
// <<< Use Configuration Wizard in Context Menu >>>
// <h> Debug MCU Configuration
// <o0.0> DBG_SLEEP
// <i> Debug Sleep Mode
// <i> 0: (FCLK=On, HCLK=Off) FCLK is clocked by the system clock as previously configured by the software while HCLK is disabled
// <i> 1: (FCLK=On, HCLK=On) HCLK is fed by the same clock that is provided to FCLK
// <o0.1> DBG_STOP
// <i> Debug Stop Mode
// <i> 0: (FCLK=Off, HCLK=Off) Clock controller disables all clocks
// <i> 1: (FCLK=On, HCLK=On) FCLK and HCLK are provided by the internal RC oscillator which remains active
// <o0.2> DBG_STANDBY
// <i> Debug Standby Mode
// <i> 0: (FCLK=Off, HCLK=Off) The whole digital part is unpowered.
// <i> 1: (FCLK=On, HCLK=On) Digital part is powered and FCLK and HCLK are provided by the internal RC oscillator which remains active
// <o0.8> DBG_IWDG_STOP
// <i> Debug independent watchdog stopped when core is halted
// <i> 0: The watchdog counter clock continues even if the core is halted
// <i> 1: The watchdog counter clock is stopped when the core is halted
// <o0.9> DBG_WWDG_STOP
// <i> Debug window watchdog stopped when core is halted
// <i> 0: The window watchdog counter clock continues even if the core is halted
// <i> 1: The window watchdog counter clock is stopped when the core is halted
// <o0.10> DBG_TIM1_STOP
// <i> Timer 1 counter stopped when core is halted
// <i> 0: The clock of the involved Timer Counter is fed even if the core is halted
// <i> 1: The clock of the involved Timer counter is stopped when the core is halted
// <o0.11> DBG_TIM2_STOP
// <i> Timer 2 counter stopped when core is halted
// <i> 0: The clock of the involved Timer Counter is fed even if the core is halted
// <i> 1: The clock of the involved Timer counter is stopped when the core is halted
// <o0.12> DBG_TIM3_STOP
// <i> Timer 3 counter stopped when core is halted
// <i> 0: The clock of the involved Timer Counter is fed even if the core is halted
// <i> 1: The clock of the involved Timer counter is stopped when the core is halted
// <o0.13> DBG_TIM4_STOP
// <i> Timer 4 counter stopped when core is halted
// <i> 0: The clock of the involved Timer Counter is fed even if the core is halted
// <i> 1: The clock of the involved Timer counter is stopped when the core is halted
// <o0.14> DBG_CAN1_STOP
// <i> Debug CAN1 stopped when Core is halted
// <i> 0: Same behavior as in normal mode
// <i> 1: CAN1 receive registers are frozen
// <o0.15> DBG_I2C1_SMBUS_TIMEOUT
// <i> I2C1 SMBUS timeout mode stopped when Core is halted
// <i> 0: Same behavior as in normal mode
// <i> 1: The SMBUS timeout is frozen
// <o0.16> DBG_I2C2_SMBUS_TIMEOUT
// <i> I2C2 SMBUS timeout mode stopped when Core is halted
// <i> 0: Same behavior as in normal mode
// <i> 1: The SMBUS timeout is frozen
// <o0.17> DBG_TIM8_STOP
// <i> Timer 8 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.18> DBG_TIM5_STOP
// <i> Timer 5 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.19> DBG_TIM6_STOP
// <i> Timer 6 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.20> DBG_TIM7_STOP
// <i> Timer 7 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.21> DBG_CAN2_STOP
// <i> Debug CAN2 stopped when Core is halted
// <i> 0: Same behavior as in normal mode
// <i> 1: CAN2 receive registers are frozen
// <o0.25> DBG_TIM12_STOP
// <i> Timer 12 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.26> DBG_TIM13_STOP
// <i> Timer 13 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.27> DBG_TIM14_STOP
// <i> Timer 14 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.28> DBG_TIM9_STOP
// <i> Timer 9 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.29> DBG_TIM10_STOP
// <i> Timer 10 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.30> DBG_TIM11_STOP
// <i> Timer 11 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// </h>
DbgMCU_CR = 0x00000007;
// <<< end of configuration section >>>

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