814 lines
28 KiB
C++
814 lines
28 KiB
C++
//===- SparseTensorDialect.cpp - Sparse tensor dialect implementation -----===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include <utility>
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#include "mlir/Dialect/SparseTensor/IR/SparseTensor.h"
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#include "mlir/Dialect/Arith/IR/Arith.h"
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#include "mlir/IR/Builders.h"
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#include "mlir/IR/DialectImplementation.h"
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#include "mlir/IR/Matchers.h"
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#include "mlir/IR/OpImplementation.h"
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#include "llvm/ADT/TypeSwitch.h"
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#include "llvm/Support/FormatVariadic.h"
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using namespace mlir;
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using namespace mlir::sparse_tensor;
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//===----------------------------------------------------------------------===//
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// TensorDialect Attribute Methods.
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//===----------------------------------------------------------------------===//
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#define GET_ATTRDEF_CLASSES
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#include "mlir/Dialect/SparseTensor/IR/SparseTensorAttrDefs.cpp.inc"
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static bool acceptBitWidth(unsigned bitWidth) {
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switch (bitWidth) {
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case 0:
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case 8:
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case 16:
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case 32:
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case 64:
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return true;
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default:
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return false;
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}
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}
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Type SparseTensorEncodingAttr::getPointerType() const {
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unsigned ptrWidth = getPointerBitWidth();
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Type indexType = IndexType::get(getContext());
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return ptrWidth ? IntegerType::get(getContext(), ptrWidth) : indexType;
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}
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Type SparseTensorEncodingAttr::getIndexType() const {
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unsigned idxWidth = getIndexBitWidth();
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Type indexType = IndexType::get(getContext());
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return idxWidth ? IntegerType::get(getContext(), idxWidth) : indexType;
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}
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Attribute SparseTensorEncodingAttr::parse(AsmParser &parser, Type type) {
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if (failed(parser.parseLess()))
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return {};
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// Parse the data as a dictionary.
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DictionaryAttr dict;
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if (failed(parser.parseAttribute(dict)))
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return {};
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if (failed(parser.parseGreater()))
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return {};
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// Process the data from the parsed dictionary value into struct-like data.
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SmallVector<DimLevelType> dlt;
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AffineMap dimOrd = {};
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AffineMap higherOrd = {};
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unsigned ptr = 0;
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unsigned ind = 0;
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for (const NamedAttribute &attr : dict) {
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if (attr.getName() == "dimLevelType") {
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auto arrayAttr = attr.getValue().dyn_cast<ArrayAttr>();
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if (!arrayAttr) {
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parser.emitError(parser.getNameLoc(),
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"expected an array for dimension level types");
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return {};
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}
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for (auto i : arrayAttr) {
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auto strAttr = i.dyn_cast<StringAttr>();
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if (!strAttr) {
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parser.emitError(parser.getNameLoc(),
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"expected a string value in dimension level types");
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return {};
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}
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auto strVal = strAttr.getValue();
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if (strVal == "dense") {
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dlt.push_back(DimLevelType::Dense);
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} else if (strVal == "compressed") {
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dlt.push_back(DimLevelType::Compressed);
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} else if (strVal == "compressed-nu") {
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dlt.push_back(DimLevelType::CompressedNu);
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} else if (strVal == "compressed-no") {
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dlt.push_back(DimLevelType::CompressedNo);
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} else if (strVal == "compressed-nu-no") {
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dlt.push_back(DimLevelType::CompressedNuNo);
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} else if (strVal == "singleton") {
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dlt.push_back(DimLevelType::Singleton);
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} else if (strVal == "singleton-nu") {
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dlt.push_back(DimLevelType::SingletonNu);
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} else if (strVal == "singleton-no") {
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dlt.push_back(DimLevelType::SingletonNo);
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} else if (strVal == "singleton-nu-no") {
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dlt.push_back(DimLevelType::SingletonNuNo);
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} else {
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parser.emitError(parser.getNameLoc(),
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"unexpected dimension level type: ")
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<< strVal;
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return {};
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}
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}
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} else if (attr.getName() == "dimOrdering") {
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auto affineAttr = attr.getValue().dyn_cast<AffineMapAttr>();
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if (!affineAttr) {
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parser.emitError(parser.getNameLoc(),
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"expected an affine map for dimension ordering");
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return {};
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}
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dimOrd = affineAttr.getValue();
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} else if (attr.getName() == "higherOrdering") {
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auto affineAttr = attr.getValue().dyn_cast<AffineMapAttr>();
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if (!affineAttr) {
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parser.emitError(parser.getNameLoc(),
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"expected an affine map for higher ordering");
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return {};
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}
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higherOrd = affineAttr.getValue();
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} else if (attr.getName() == "pointerBitWidth") {
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auto intAttr = attr.getValue().dyn_cast<IntegerAttr>();
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if (!intAttr) {
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parser.emitError(parser.getNameLoc(),
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"expected an integral pointer bitwidth");
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return {};
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}
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ptr = intAttr.getInt();
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} else if (attr.getName() == "indexBitWidth") {
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auto intAttr = attr.getValue().dyn_cast<IntegerAttr>();
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if (!intAttr) {
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parser.emitError(parser.getNameLoc(),
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"expected an integral index bitwidth");
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return {};
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}
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ind = intAttr.getInt();
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} else {
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parser.emitError(parser.getNameLoc(), "unexpected key: ")
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<< attr.getName().strref();
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return {};
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}
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}
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// Construct struct-like storage for attribute.
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return parser.getChecked<SparseTensorEncodingAttr>(
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parser.getContext(), dlt, dimOrd, higherOrd, ptr, ind);
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}
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void SparseTensorEncodingAttr::print(AsmPrinter &printer) const {
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// Print the struct-like storage in dictionary fashion.
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printer << "<{ dimLevelType = [ ";
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for (unsigned i = 0, e = getDimLevelType().size(); i < e; i++) {
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switch (getDimLevelType()[i]) {
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case DimLevelType::Undef:
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// TODO: should probably raise an error instead of printing it...
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printer << "\"undef\"";
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break;
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case DimLevelType::Dense:
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printer << "\"dense\"";
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break;
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case DimLevelType::Compressed:
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printer << "\"compressed\"";
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break;
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case DimLevelType::CompressedNu:
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printer << "\"compressed-nu\"";
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break;
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case DimLevelType::CompressedNo:
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printer << "\"compressed-no\"";
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break;
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case DimLevelType::CompressedNuNo:
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printer << "\"compressed-nu-no\"";
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break;
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case DimLevelType::Singleton:
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printer << "\"singleton\"";
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break;
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case DimLevelType::SingletonNu:
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printer << "\"singleton-nu\"";
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break;
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case DimLevelType::SingletonNo:
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printer << "\"singleton-no\"";
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break;
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case DimLevelType::SingletonNuNo:
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printer << "\"singleton-nu-no\"";
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break;
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}
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if (i != e - 1)
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printer << ", ";
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}
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printer << " ]";
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// Print remaining members only for non-default values.
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if (getDimOrdering() && !getDimOrdering().isIdentity())
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printer << ", dimOrdering = affine_map<" << getDimOrdering() << ">";
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if (getHigherOrdering())
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printer << ", higherOrdering = affine_map<" << getHigherOrdering() << ">";
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if (getPointerBitWidth())
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printer << ", pointerBitWidth = " << getPointerBitWidth();
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if (getIndexBitWidth())
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printer << ", indexBitWidth = " << getIndexBitWidth();
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printer << " }>";
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}
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LogicalResult SparseTensorEncodingAttr::verify(
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function_ref<InFlightDiagnostic()> emitError,
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ArrayRef<DimLevelType> dimLevelType, AffineMap dimOrdering,
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AffineMap higherOrdering, unsigned pointerBitWidth,
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unsigned indexBitWidth) {
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if (!acceptBitWidth(pointerBitWidth))
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return emitError() << "unexpected pointer bitwidth: " << pointerBitWidth;
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if (!acceptBitWidth(indexBitWidth))
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return emitError() << "unexpected index bitwidth: " << indexBitWidth;
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if (dimOrdering) {
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if (!dimOrdering.isPermutation())
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return emitError()
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<< "expected a permutation affine map for dimension ordering";
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if (dimOrdering.getNumResults() != dimLevelType.size())
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return emitError() << "unexpected mismatch in ordering and dimension "
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"level types size";
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}
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if (higherOrdering) {
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if (higherOrdering.getNumDims() >= higherOrdering.getNumResults())
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return emitError() << "unexpected higher ordering mapping from "
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<< higherOrdering.getNumDims() << " to "
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<< higherOrdering.getNumResults();
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if (higherOrdering.getNumResults() != dimLevelType.size())
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return emitError() << "unexpected mismatch in higher ordering and "
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"dimension level types size";
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}
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return success();
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}
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LogicalResult SparseTensorEncodingAttr::verifyEncoding(
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ArrayRef<int64_t> shape, Type elementType,
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function_ref<InFlightDiagnostic()> emitError) const {
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// Check structural integrity.
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if (failed(verify(emitError, getDimLevelType(), getDimOrdering(),
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getHigherOrdering(), getPointerBitWidth(),
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getIndexBitWidth())))
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return failure();
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// Check integrity with tensor type specifics. Dimension ordering is optional,
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// but we always should have dimension level types for the full rank.
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unsigned size = shape.size();
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if (size == 0)
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return emitError() << "expected non-scalar sparse tensor";
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if (getHigherOrdering()) {
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if (getHigherOrdering().getNumDims() != size)
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return emitError() << "expected an affine map of size " << size
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<< " for higher ordering";
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// TODO: verification of higher ordering contents
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size = getHigherOrdering().getNumResults(); // higher-order size!
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}
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if (getDimOrdering() && getDimOrdering().getNumResults() != size)
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return emitError() << "expected an affine map of size " << size
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<< " for dimension ordering";
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if (getDimLevelType().size() != size)
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return emitError() << "expected an array of size " << size
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<< " for dimension level types";
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return success();
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}
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//===----------------------------------------------------------------------===//
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// Convenience Methods.
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//===----------------------------------------------------------------------===//
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SparseTensorEncodingAttr
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mlir::sparse_tensor::getSparseTensorEncoding(Type type) {
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if (auto ttp = type.dyn_cast<RankedTensorType>())
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return ttp.getEncoding().dyn_cast_or_null<SparseTensorEncodingAttr>();
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return nullptr;
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}
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bool mlir::sparse_tensor::isUniqueCOOType(RankedTensorType tp) {
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SparseTensorEncodingAttr enc = getSparseTensorEncoding(tp);
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if (!enc)
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return false;
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if (!isCompressedDim(tp, 0))
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return false;
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for (uint64_t i = 1, e = tp.getRank(); i < e; ++i)
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if (!isSingletonDim(tp, i))
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return false;
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// This works for rank == 1 (unique the only compressed) and rank > 1 (unique
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// on the last singleton).
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return isUniqueDim(tp, tp.getRank() - 1);
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}
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uint64_t mlir::sparse_tensor::toOrigDim(const SparseTensorEncodingAttr &enc,
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uint64_t d) {
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if (enc) {
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auto order = enc.getDimOrdering();
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if (order) {
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assert(order.isPermutation());
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return order.getDimPosition(d);
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}
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}
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return d;
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}
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uint64_t mlir::sparse_tensor::toStoredDim(const SparseTensorEncodingAttr &enc,
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uint64_t d) {
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if (enc) {
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auto order = enc.getDimOrdering();
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if (order) {
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assert(order.isPermutation());
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auto maybePos =
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order.getResultPosition(getAffineDimExpr(d, enc.getContext()));
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assert(maybePos.has_value());
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return *maybePos;
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}
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}
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return d;
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}
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uint64_t mlir::sparse_tensor::toOrigDim(RankedTensorType type, uint64_t d) {
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assert(d < static_cast<uint64_t>(type.getRank()));
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return toOrigDim(getSparseTensorEncoding(type), d);
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}
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uint64_t mlir::sparse_tensor::toStoredDim(RankedTensorType type, uint64_t d) {
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assert(d < static_cast<uint64_t>(type.getRank()));
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return toStoredDim(getSparseTensorEncoding(type), d);
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}
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//===----------------------------------------------------------------------===//
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// TensorDialect Operations.
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//===----------------------------------------------------------------------===//
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static LogicalResult isInBounds(uint64_t dim, Value tensor) {
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uint64_t rank = tensor.getType().cast<RankedTensorType>().getRank();
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if (dim >= rank)
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return failure();
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return success(); // in bounds
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}
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static LogicalResult isMatchingWidth(Value result, unsigned width) {
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Type etp = result.getType().cast<MemRefType>().getElementType();
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if ((width == 0 && etp.isIndex()) || (width > 0 && etp.isInteger(width)))
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return success();
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return failure();
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}
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LogicalResult NewOp::verify() {
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if (getExpandSymmetry() &&
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getResult().getType().cast<RankedTensorType>().getRank() != 2)
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return emitOpError("expand_symmetry can only be used for 2D tensors");
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return success();
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}
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LogicalResult ConvertOp::verify() {
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if (auto tp1 = getSource().getType().dyn_cast<RankedTensorType>()) {
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if (auto tp2 = getDest().getType().dyn_cast<RankedTensorType>()) {
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if (tp1.getRank() != tp2.getRank())
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return emitError("unexpected conversion mismatch in rank");
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auto shape1 = tp1.getShape();
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auto shape2 = tp2.getShape();
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// Accept size matches between the source and the destination type
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// (e.g. 10 vs. 10, 10 vs. ?, or ? vs. ?), but reject direct mismatches or
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// matches that would need a runtime assert (e.g. 10 vs. 20 or ? vs. 10).
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for (unsigned d = 0, rank = tp1.getRank(); d < rank; d++)
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if (shape1[d] != shape2[d] && shape2[d] != ShapedType::kDynamic)
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return emitError("unexpected conversion mismatch in dimension ") << d;
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return success();
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}
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}
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return emitError("unexpected type in convert");
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}
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OpFoldResult ConvertOp::fold(ArrayRef<Attribute> operands) {
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Type dstType = getType();
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// Fold trivial dense-to-dense convert and leave trivial sparse-to-sparse
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// convert for codegen to remove. This is because we use trivial
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// sparse-to-sparse convert to tell bufferization that the sparse codegen
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// will expand the tensor buffer into sparse tensor storage.
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if (!getSparseTensorEncoding(dstType) && dstType == getSource().getType())
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return getSource();
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return {};
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}
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LogicalResult ToPointersOp::verify() {
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auto e = getSparseTensorEncoding(getTensor().getType());
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if (failed(isInBounds(getDimension().getZExtValue(), getTensor())))
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return emitError("requested pointers dimension out of bounds");
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if (failed(isMatchingWidth(getResult(), e.getPointerBitWidth())))
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return emitError("unexpected type for pointers");
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return success();
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}
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LogicalResult ToIndicesOp::verify() {
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auto e = getSparseTensorEncoding(getTensor().getType());
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if (failed(isInBounds(getDimension().getZExtValue(), getTensor())))
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return emitError("requested indices dimension out of bounds");
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if (failed(isMatchingWidth(getResult(), e.getIndexBitWidth())))
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return emitError("unexpected type for indices");
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return success();
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}
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LogicalResult ToValuesOp::verify() {
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RankedTensorType ttp = getTensor().getType().cast<RankedTensorType>();
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MemRefType mtp = getResult().getType().cast<MemRefType>();
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if (ttp.getElementType() != mtp.getElementType())
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return emitError("unexpected mismatch in element types");
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return success();
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}
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//===----------------------------------------------------------------------===//
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// TensorDialect Linalg.Generic Operations.
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//===----------------------------------------------------------------------===//
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template <class T>
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static LogicalResult verifyNumBlockArgs(T *op, Region ®ion,
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const char *regionName,
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TypeRange inputTypes, Type outputType) {
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unsigned numArgs = region.getNumArguments();
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unsigned expectedNum = inputTypes.size();
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if (numArgs != expectedNum)
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return op->emitError() << regionName << " region must have exactly "
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<< expectedNum << " arguments";
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for (unsigned i = 0; i < numArgs; i++) {
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Type typ = region.getArgument(i).getType();
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if (typ != inputTypes[i])
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return op->emitError() << regionName << " region argument " << (i + 1)
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<< " type mismatch";
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}
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Operation *term = region.front().getTerminator();
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YieldOp yield = dyn_cast<YieldOp>(term);
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if (!yield)
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return op->emitError() << regionName
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<< " region must end with sparse_tensor.yield";
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if (!yield.getResult() || yield.getResult().getType() != outputType)
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return op->emitError() << regionName << " region yield type mismatch";
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return success();
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}
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LogicalResult BinaryOp::verify() {
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NamedAttrList attrs = (*this)->getAttrs();
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Type leftType = getX().getType();
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Type rightType = getY().getType();
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Type outputType = getOutput().getType();
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Region &overlap = getOverlapRegion();
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Region &left = getLeftRegion();
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Region &right = getRightRegion();
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// Check correct number of block arguments and return type for each
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// non-empty region.
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LogicalResult regionResult = success();
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if (!overlap.empty()) {
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regionResult = verifyNumBlockArgs(
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this, overlap, "overlap", TypeRange{leftType, rightType}, outputType);
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if (failed(regionResult))
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return regionResult;
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}
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if (!left.empty()) {
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regionResult =
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verifyNumBlockArgs(this, left, "left", TypeRange{leftType}, outputType);
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if (failed(regionResult))
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return regionResult;
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} else if (getLeftIdentity()) {
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if (leftType != outputType)
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return emitError("left=identity requires first argument to have the same "
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"type as the output");
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}
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if (!right.empty()) {
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regionResult = verifyNumBlockArgs(this, right, "right",
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TypeRange{rightType}, outputType);
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if (failed(regionResult))
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return regionResult;
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} else if (getRightIdentity()) {
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if (rightType != outputType)
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return emitError("right=identity requires second argument to have the "
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"same type as the output");
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}
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return success();
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}
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LogicalResult UnaryOp::verify() {
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Type inputType = getX().getType();
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Type outputType = getOutput().getType();
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LogicalResult regionResult = success();
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// Check correct number of block arguments and return type for each
|
|
// non-empty region.
|
|
Region &present = getPresentRegion();
|
|
if (!present.empty()) {
|
|
regionResult = verifyNumBlockArgs(this, present, "present",
|
|
TypeRange{inputType}, outputType);
|
|
if (failed(regionResult))
|
|
return regionResult;
|
|
}
|
|
Region &absent = getAbsentRegion();
|
|
if (!absent.empty()) {
|
|
regionResult =
|
|
verifyNumBlockArgs(this, absent, "absent", TypeRange{}, outputType);
|
|
if (failed(regionResult))
|
|
return regionResult;
|
|
}
|
|
|
|
return success();
|
|
}
|
|
|
|
LogicalResult ConcatenateOp::verify() {
|
|
auto dstTp = getType().cast<RankedTensorType>();
|
|
uint64_t concatDim = getDimension().getZExtValue();
|
|
unsigned rank = dstTp.getRank();
|
|
|
|
if (getInputs().size() <= 1)
|
|
return emitError("Need at least two tensors to concatenate.");
|
|
|
|
for (auto type : getInputs().getTypes()) {
|
|
auto shape = type.cast<RankedTensorType>().getShape();
|
|
for (auto dim : shape) {
|
|
if (ShapedType::isDynamic(dim))
|
|
return emitError("Only statically-sized input tensors are supported.");
|
|
}
|
|
}
|
|
|
|
if (concatDim >= rank)
|
|
return emitError(llvm::formatv(
|
|
"Failed to concatentate tensors with rank={0} on dimension={1}.", rank,
|
|
concatDim));
|
|
|
|
for (size_t i = 0, e = getInputs().size(); i < e; i++) {
|
|
Value input = getInputs()[i];
|
|
auto inputRank = input.getType().cast<RankedTensorType>().getRank();
|
|
if (inputRank != rank)
|
|
return emitError(
|
|
llvm::formatv("The input tensor ${0} has a different rank (rank={1}) "
|
|
"from the output tensor (rank={2}).",
|
|
i, inputRank, rank));
|
|
}
|
|
|
|
for (unsigned i = 0; i < rank; i++) {
|
|
auto dstDim = dstTp.getShape()[i];
|
|
if (i == concatDim) {
|
|
if (!ShapedType::isDynamic(dstDim)) {
|
|
unsigned sumDim = 0;
|
|
for (auto src : getInputs()) {
|
|
// If we reach here, all inputs should have static shapes.
|
|
auto d = src.getType().cast<RankedTensorType>().getShape()[i];
|
|
sumDim += d;
|
|
}
|
|
// If all dimension are statically known, the sum of all the input
|
|
// dimensions should be equal to the output dimension.
|
|
if (sumDim != dstDim)
|
|
return emitError(
|
|
"The concatenation dimension of the output tensor should be the "
|
|
"sum of all the concatenation dimensions of the input tensors.");
|
|
}
|
|
} else {
|
|
int64_t prev = dstDim;
|
|
for (auto src : getInputs()) {
|
|
auto d = src.getType().cast<RankedTensorType>().getShape()[i];
|
|
if (!ShapedType::isDynamic(prev) && d != prev)
|
|
return emitError("All dimensions (expect for the concatenating one) "
|
|
"should be equal.");
|
|
prev = d;
|
|
}
|
|
}
|
|
}
|
|
|
|
return success();
|
|
}
|
|
|
|
LogicalResult InsertOp::verify() {
|
|
RankedTensorType ttp = getTensor().getType().cast<RankedTensorType>();
|
|
if (ttp.getRank() != static_cast<int64_t>(getIndices().size()))
|
|
return emitOpError("incorrect number of indices");
|
|
return success();
|
|
}
|
|
|
|
void PushBackOp::build(OpBuilder &builder, OperationState &result,
|
|
Type outBuffer, Value bufferSizes, Value inBuffer,
|
|
Value value, APInt idx) {
|
|
build(builder, result, outBuffer, bufferSizes, inBuffer, value,
|
|
std::move(idx), Value());
|
|
}
|
|
|
|
LogicalResult PushBackOp::verify() {
|
|
Value n = getN();
|
|
if (n) {
|
|
auto nValue = dyn_cast_or_null<arith::ConstantIndexOp>(n.getDefiningOp());
|
|
if (nValue && nValue.value() < 1)
|
|
return emitOpError("n must be not less than 1");
|
|
}
|
|
return success();
|
|
}
|
|
|
|
LogicalResult CompressOp::verify() {
|
|
RankedTensorType ttp = getTensor().getType().cast<RankedTensorType>();
|
|
if (ttp.getRank() != 1 + static_cast<int64_t>(getIndices().size()))
|
|
return emitOpError("incorrect number of indices");
|
|
return success();
|
|
}
|
|
|
|
void ForeachOp::build(
|
|
OpBuilder &builder, OperationState &result, Value tensor,
|
|
function_ref<void(OpBuilder &, Location, ValueRange, Value, ValueRange)>
|
|
bodyBuilder) {
|
|
build(builder, result, tensor, std::nullopt, bodyBuilder);
|
|
}
|
|
|
|
void ForeachOp::build(
|
|
OpBuilder &builder, OperationState &result, Value tensor,
|
|
ValueRange initArgs,
|
|
function_ref<void(OpBuilder &, Location, ValueRange, Value, ValueRange)>
|
|
bodyBuilder) {
|
|
build(builder, result, initArgs.getTypes(), tensor, initArgs);
|
|
// Builds foreach body.
|
|
if (!bodyBuilder)
|
|
return;
|
|
auto rtp = tensor.getType().cast<RankedTensorType>();
|
|
int64_t rank = rtp.getRank();
|
|
|
|
SmallVector<Type> blockArgTypes;
|
|
// Starts with n index.
|
|
std::fill_n(std::back_inserter(blockArgTypes), rank, builder.getIndexType());
|
|
// Followed by one value.
|
|
blockArgTypes.push_back(rtp.getElementType());
|
|
// Followed by reduction variable.
|
|
blockArgTypes.append(initArgs.getTypes().begin(), initArgs.getTypes().end());
|
|
|
|
SmallVector<Location> blockArgLocs;
|
|
std::fill_n(std::back_inserter(blockArgLocs), blockArgTypes.size(),
|
|
tensor.getLoc());
|
|
|
|
OpBuilder::InsertionGuard guard(builder);
|
|
auto ®ion = *result.regions.front();
|
|
Block *bodyBlock =
|
|
builder.createBlock(®ion, region.end(), blockArgTypes, blockArgLocs);
|
|
bodyBuilder(builder, result.location,
|
|
bodyBlock->getArguments().slice(0, rank),
|
|
bodyBlock->getArguments()[rank],
|
|
bodyBlock->getArguments().drop_front(rank + 1));
|
|
}
|
|
|
|
LogicalResult ForeachOp::verify() {
|
|
auto t = getTensor().getType().cast<RankedTensorType>();
|
|
auto args = getBody()->getArguments();
|
|
|
|
if (static_cast<size_t>(t.getRank()) + 1 + getInitArgs().size() !=
|
|
args.size())
|
|
return emitError("Unmatched number of arguments in the block");
|
|
|
|
if (getNumResults() != getInitArgs().size())
|
|
return emitError("Mismatch in number of init arguments and results");
|
|
|
|
if (getResultTypes() != getInitArgs().getTypes())
|
|
return emitError("Mismatch in types of init arguments and results");
|
|
|
|
auto yield = cast<YieldOp>(getBody()->getTerminator());
|
|
if (yield.getNumOperands() != getNumResults() ||
|
|
yield.getOperands().getTypes() != getResultTypes())
|
|
return emitError("Mismatch in types of yield values and results");
|
|
|
|
for (int64_t i = 0, e = t.getRank(); i < e; i++)
|
|
if (args[i].getType() != IndexType::get(getContext()))
|
|
emitError(
|
|
llvm::formatv("Expecting Index type for argument at index {0}", i));
|
|
|
|
auto elemTp = t.getElementType();
|
|
auto valueTp = args[t.getRank()].getType();
|
|
if (elemTp != valueTp)
|
|
emitError(llvm::formatv("Unmatched element type between input tensor and "
|
|
"block argument, expected:{0}, got: {1}",
|
|
elemTp, valueTp));
|
|
return success();
|
|
}
|
|
|
|
LogicalResult ReduceOp::verify() {
|
|
Type inputType = getX().getType();
|
|
LogicalResult regionResult = success();
|
|
|
|
// Check correct number of block arguments and return type.
|
|
Region &formula = getRegion();
|
|
regionResult = verifyNumBlockArgs(this, formula, "reduce",
|
|
TypeRange{inputType, inputType}, inputType);
|
|
if (failed(regionResult))
|
|
return regionResult;
|
|
|
|
return success();
|
|
}
|
|
|
|
LogicalResult SelectOp::verify() {
|
|
Builder b(getContext());
|
|
|
|
Type inputType = getX().getType();
|
|
Type boolType = b.getI1Type();
|
|
LogicalResult regionResult = success();
|
|
|
|
// Check correct number of block arguments and return type.
|
|
Region &formula = getRegion();
|
|
regionResult = verifyNumBlockArgs(this, formula, "select",
|
|
TypeRange{inputType}, boolType);
|
|
if (failed(regionResult))
|
|
return regionResult;
|
|
|
|
return success();
|
|
}
|
|
|
|
LogicalResult SortOp::verify() {
|
|
if (getXs().empty())
|
|
return emitError("need at least one xs buffer.");
|
|
|
|
auto n = getN().getDefiningOp<arith::ConstantIndexOp>();
|
|
|
|
Type xtp = getXs().front().getType().cast<MemRefType>().getElementType();
|
|
auto checkTypes = [&](ValueRange operands,
|
|
bool checkEleType = true) -> LogicalResult {
|
|
for (Value opnd : operands) {
|
|
MemRefType mtp = opnd.getType().cast<MemRefType>();
|
|
int64_t dim = mtp.getShape()[0];
|
|
// We can't check the size of dynamic dimension at compile-time, but all
|
|
// xs and ys should have a dimension not less than n at runtime.
|
|
if (n && !ShapedType::isDynamic(dim) && dim < n.value())
|
|
return emitError(llvm::formatv("xs and ys need to have a dimension >= n"
|
|
": {0} < {1}",
|
|
dim, n.value()));
|
|
|
|
if (checkEleType && xtp != mtp.getElementType())
|
|
return emitError("mismatch xs element types");
|
|
}
|
|
return success();
|
|
};
|
|
|
|
LogicalResult result = checkTypes(getXs());
|
|
if (failed(result))
|
|
return result;
|
|
|
|
if (n)
|
|
return checkTypes(getYs(), false);
|
|
|
|
return success();
|
|
}
|
|
|
|
LogicalResult SortCooOp::verify() {
|
|
auto cn = getN().getDefiningOp<arith::ConstantIndexOp>();
|
|
// We can't check the size of the buffers when n or buffer dimensions aren't
|
|
// compile-time constants.
|
|
if (!cn)
|
|
return success();
|
|
|
|
uint64_t n = cn.value();
|
|
uint64_t nx = 1;
|
|
if (auto nxAttr = getNxAttr()) {
|
|
nx = nxAttr.getInt();
|
|
if (nx < 1)
|
|
emitError(llvm::formatv("Expected nx > 1, got {0}", nx));
|
|
}
|
|
uint64_t ny = 0;
|
|
if (auto nyAttr = getNyAttr()) {
|
|
ny = nyAttr.getInt();
|
|
}
|
|
|
|
auto checkDim = [&](Value v, uint64_t min, const char *message) {
|
|
MemRefType tp = v.getType().cast<MemRefType>();
|
|
int64_t dim = tp.getShape()[0];
|
|
if (!ShapedType::isDynamic(dim) && dim < (int64_t)min) {
|
|
emitError(llvm::formatv("{0} got {1} < {2}", message, dim, min));
|
|
}
|
|
};
|
|
|
|
checkDim(getXy(), n * (nx + ny), "Expected dimension(xy) >= n * (nx + ny)");
|
|
|
|
for (Value opnd : getYs()) {
|
|
checkDim(opnd, n, "Expected dimension(y) >= n");
|
|
}
|
|
|
|
return success();
|
|
}
|
|
|
|
LogicalResult YieldOp::verify() {
|
|
// Check for compatible parent.
|
|
auto *parentOp = (*this)->getParentOp();
|
|
if (isa<BinaryOp>(parentOp) || isa<UnaryOp>(parentOp) ||
|
|
isa<ReduceOp>(parentOp) || isa<SelectOp>(parentOp) ||
|
|
isa<ForeachOp>(parentOp))
|
|
return success();
|
|
|
|
return emitOpError("expected parent op to be sparse_tensor unary, binary, "
|
|
"reduce, select or foreach");
|
|
}
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
// TensorDialect Methods.
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
void SparseTensorDialect::initialize() {
|
|
addAttributes<
|
|
#define GET_ATTRDEF_LIST
|
|
#include "mlir/Dialect/SparseTensor/IR/SparseTensorAttrDefs.cpp.inc"
|
|
>();
|
|
addOperations<
|
|
#define GET_OP_LIST
|
|
#include "mlir/Dialect/SparseTensor/IR/SparseTensorOps.cpp.inc"
|
|
>();
|
|
}
|
|
|
|
#define GET_OP_CLASSES
|
|
#include "mlir/Dialect/SparseTensor/IR/SparseTensorOps.cpp.inc"
|
|
|
|
#include "mlir/Dialect/SparseTensor/IR/SparseTensorOpsDialect.cpp.inc"
|