32 lines
1.0 KiB
YAML
32 lines
1.0 KiB
YAML
# REQUIRES: riscv-registered-target
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# RUN: llvm-reduce -abort-on-invalid-reduction --delta-passes=instructions -mtriple=riscv32 --test FileCheck --test-arg --check-prefix=CHECK-INTERESTINGNESS --test-arg %s --test-arg --input-file %s -o %t
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# RUN: FileCheck --match-full-lines %s < %t
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# CHECK-INTERESTINGNESS: %{{[0-9]+}}:gpr = ADDI %{{[0-9]+}}, 5
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# Verify that after reduction the following instruction sequence remains. The
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# interestingness-test 'instr-reduce.py' matches a '%[0-9]+:gpr = ADDI %[0-9]+, 5'
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# pattern in the output and that combined with that the MIR has to be valid
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# (pass verify) results in the given sequence.
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# CHECK: [[IMPDEF:%[0-9]+]]:gpr = IMPLICIT_DEF
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# CHECK-NEXT: %{{[0-9]+}}:gpr = ADDI [[IMPDEF]], 5
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# CHECK-NEXT: PseudoRET implicit $x10
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...
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---
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name: f
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x10
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%10:gpr = COPY $x10
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%20:gpr = ADDI %10, 1
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%30:gpr = ADDI %20, 5
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%40:gpr = ADDI %30, 9
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$x10 = COPY %40
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PseudoRET implicit $x10
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...
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---
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