53 lines
1.9 KiB
Plaintext
53 lines
1.9 KiB
Plaintext
# RUN: yaml2obj %s | llvm-objdump --no-print-imm-hex -d --mcpu=cortex-a8 - | FileCheck %s
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# Test that unrecognized instructions are skipped in a way that makes
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# sense for the Arm instruction set encoding.
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#
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# The first three instructions in this file are marked by the mapping
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# symbols as in Arm state, with the one in the middle unknown, and we
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# expect the disassembler to skip 4 bytes because that's the width of
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# any Arm instruction.
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#
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# At address 0xc there's a mapping symbol that says we're now in Thumb
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# mode, and in that mode we include both a 16-bit and a 32-bit unknown
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# Thumb instruction, which the disassembler will identify by the simple
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# encoding criterion that tells you the instruction length without
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# having to recognize it specifically.
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#
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# Finally we end with a single byte, to ensure nothing gets confused
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# when the Thumb instruction stream doesn't contain enough data to
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# even do that check.
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# CHECK: 0: e3a00064 mov r0, #100
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# CHECK-NEXT: 4: ffffffff <unknown>
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# CHECK-NEXT: 8: e0810312 add r0, r1, r2, lsl r3
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# CHECK: c: 2064 movs r0, #100
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# CHECK-NEXT: e: b80e <unknown>
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# CHECK-NEXT: 10: 1840 adds r0, r0, r1
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# CHECK-NEXT: 12: f04f 0064 mov.w r0, #100
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# CHECK-NEXT: 16: ffee ddcc <unknown>
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# CHECK-NEXT: 1a: eb01 00c2 add.w r0, r1, r2, lsl #3
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# CHECK-NEXT: 1e: 9a <unknown>
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--- !ELF
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FileHeader:
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Class: ELFCLASS32
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Data: ELFDATA2LSB
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Type: ET_REL
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Machine: EM_ARM
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Flags: [ EF_ARM_EABI_VER5 ]
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Sections:
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- Name: .text
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Type: SHT_PROGBITS
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Flags: [ SHF_ALLOC, SHF_EXECINSTR ]
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AddressAlign: 0x4
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Content: 6400a0e3ffffffff120381e064200eb840184ff06400eeffccdd01ebc2009a
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Symbols:
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- Name: '$a'
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Section: .text
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- Name: '$t'
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Section: .text
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Value: 0x0c
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...
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