591 lines
22 KiB
ArmAsm
591 lines
22 KiB
ArmAsm
# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
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# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=haswell --json -all-views < %s | FileCheck %s
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# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=haswell --json -all-views -o %t.json < %s
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# RUN: cat %t.json \
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# RUN: | %python -c 'import json, sys; json.dump(json.loads(sys.stdin.read()), sys.stdout, sort_keys=True, indent=2)' \
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# RUN: | FileCheck %s
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# LLVM-MCA-BEGIN
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add %eax, %eax
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# LLVM-MCA-END
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# LLVM-MCA-BEGIN
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add %ebx, %ebx
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add %ecx, %ecx
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# LLVM-MCA-END
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# LLVM-MCA-BEGIN
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add %edx, %edx
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# LLVM-MCA-END
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# CHECK: {
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# CHECK-NEXT: "CodeRegions": [
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# CHECK-NEXT: {
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# CHECK-NEXT: "DispatchStatistics": {
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# CHECK-NEXT: "GROUP": 0,
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# CHECK-NEXT: "LQ": 0,
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# CHECK-NEXT: "RAT": 0,
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# CHECK-NEXT: "RCU": 0,
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# CHECK-NEXT: "SCHEDQ": 21,
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# CHECK-NEXT: "SQ": 0,
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# CHECK-NEXT: "USH": 0
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# CHECK-NEXT: },
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# CHECK-NEXT: "InstructionInfoView": {
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# CHECK-NEXT: "InstructionList": [
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# CHECK-NEXT: {
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# CHECK-NEXT: "Instruction": 0,
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# CHECK-NEXT: "Latency": 1,
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# CHECK-NEXT: "NumMicroOpcodes": 1,
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# CHECK-NEXT: "RThroughput": 0.25,
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# CHECK-NEXT: "hasUnmodeledSideEffects": false,
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# CHECK-NEXT: "mayLoad": false,
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# CHECK-NEXT: "mayStore": false
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# CHECK-NEXT: }
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# CHECK-NEXT: ]
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# CHECK-NEXT: },
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# CHECK-NEXT: "Instructions": [
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# CHECK-NEXT: "addl\t%eax, %eax"
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# CHECK-NEXT: ],
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# CHECK-NEXT: "Name": "",
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# CHECK-NEXT: "ResourcePressureView": {
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# CHECK-NEXT: "ResourcePressureInfo": [
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# CHECK-NEXT: {
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# CHECK-NEXT: "InstructionIndex": 0,
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# CHECK-NEXT: "ResourceIndex": 2,
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# CHECK-NEXT: "ResourceUsage": 0.25
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "InstructionIndex": 0,
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# CHECK-NEXT: "ResourceIndex": 3,
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# CHECK-NEXT: "ResourceUsage": 0.25
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "InstructionIndex": 0,
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# CHECK-NEXT: "ResourceIndex": 7,
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# CHECK-NEXT: "ResourceUsage": 0.25
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "InstructionIndex": 0,
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# CHECK-NEXT: "ResourceIndex": 8,
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# CHECK-NEXT: "ResourceUsage": 0.25
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "InstructionIndex": 1,
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# CHECK-NEXT: "ResourceIndex": 2,
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# CHECK-NEXT: "ResourceUsage": 0.25
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "InstructionIndex": 1,
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# CHECK-NEXT: "ResourceIndex": 3,
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# CHECK-NEXT: "ResourceUsage": 0.25
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "InstructionIndex": 1,
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# CHECK-NEXT: "ResourceIndex": 7,
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# CHECK-NEXT: "ResourceUsage": 0.25
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "InstructionIndex": 1,
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# CHECK-NEXT: "ResourceIndex": 8,
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# CHECK-NEXT: "ResourceUsage": 0.25
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# CHECK-NEXT: }
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# CHECK-NEXT: ]
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# CHECK-NEXT: },
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# CHECK-NEXT: "SummaryView": {
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# CHECK-NEXT: "BlockRThroughput": 0.25,
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# CHECK-NEXT: "DispatchWidth": 4,
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# CHECK-NEXT: "IPC": 0.970873786407767,
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# CHECK-NEXT: "Instructions": 100,
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# CHECK-NEXT: "Iterations": 100,
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# CHECK-NEXT: "TotalCycles": 103,
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# CHECK-NEXT: "TotaluOps": 100,
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# CHECK-NEXT: "uOpsPerCycle": 0.970873786407767
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# CHECK-NEXT: },
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# CHECK-NEXT: "TimelineView": {
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# CHECK-NEXT: "TimelineInfo": [
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# CHECK-NEXT: {
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# CHECK-NEXT: "CycleDispatched": 0,
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# CHECK-NEXT: "CycleExecuted": 2,
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# CHECK-NEXT: "CycleIssued": 1,
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# CHECK-NEXT: "CycleReady": 0,
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# CHECK-NEXT: "CycleRetired": 3
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "CycleDispatched": 0,
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# CHECK-NEXT: "CycleExecuted": 3,
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# CHECK-NEXT: "CycleIssued": 2,
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# CHECK-NEXT: "CycleReady": 2,
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# CHECK-NEXT: "CycleRetired": 4
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "CycleDispatched": 0,
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# CHECK-NEXT: "CycleExecuted": 4,
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# CHECK-NEXT: "CycleIssued": 3,
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# CHECK-NEXT: "CycleReady": 3,
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# CHECK-NEXT: "CycleRetired": 5
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "CycleDispatched": 0,
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# CHECK-NEXT: "CycleExecuted": 5,
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# CHECK-NEXT: "CycleIssued": 4,
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# CHECK-NEXT: "CycleReady": 4,
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# CHECK-NEXT: "CycleRetired": 6
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "CycleDispatched": 1,
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# CHECK-NEXT: "CycleExecuted": 6,
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# CHECK-NEXT: "CycleIssued": 5,
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# CHECK-NEXT: "CycleReady": 5,
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# CHECK-NEXT: "CycleRetired": 7
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "CycleDispatched": 1,
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# CHECK-NEXT: "CycleExecuted": 7,
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# CHECK-NEXT: "CycleIssued": 6,
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# CHECK-NEXT: "CycleReady": 6,
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# CHECK-NEXT: "CycleRetired": 8
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "CycleDispatched": 1,
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# CHECK-NEXT: "CycleExecuted": 8,
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# CHECK-NEXT: "CycleIssued": 7,
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# CHECK-NEXT: "CycleReady": 7,
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# CHECK-NEXT: "CycleRetired": 9
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "CycleDispatched": 1,
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# CHECK-NEXT: "CycleExecuted": 9,
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# CHECK-NEXT: "CycleIssued": 8,
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# CHECK-NEXT: "CycleReady": 8,
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# CHECK-NEXT: "CycleRetired": 10
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "CycleDispatched": 2,
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# CHECK-NEXT: "CycleExecuted": 10,
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# CHECK-NEXT: "CycleIssued": 9,
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# CHECK-NEXT: "CycleReady": 9,
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# CHECK-NEXT: "CycleRetired": 11
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "CycleDispatched": 2,
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# CHECK-NEXT: "CycleExecuted": 11,
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# CHECK-NEXT: "CycleIssued": 10,
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# CHECK-NEXT: "CycleReady": 10,
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# CHECK-NEXT: "CycleRetired": 12
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# CHECK-NEXT: }
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# CHECK-NEXT: ]
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# CHECK-NEXT: }
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "DispatchStatistics": {
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# CHECK-NEXT: "GROUP": 0,
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# CHECK-NEXT: "LQ": 0,
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# CHECK-NEXT: "RAT": 0,
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# CHECK-NEXT: "RCU": 0,
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# CHECK-NEXT: "SCHEDQ": 41,
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# CHECK-NEXT: "SQ": 0,
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# CHECK-NEXT: "USH": 0
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# CHECK-NEXT: },
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# CHECK-NEXT: "InstructionInfoView": {
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# CHECK-NEXT: "InstructionList": [
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# CHECK-NEXT: {
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# CHECK-NEXT: "Instruction": 0,
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# CHECK-NEXT: "Latency": 1,
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# CHECK-NEXT: "NumMicroOpcodes": 1,
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# CHECK-NEXT: "RThroughput": 0.25,
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# CHECK-NEXT: "hasUnmodeledSideEffects": false,
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# CHECK-NEXT: "mayLoad": false,
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# CHECK-NEXT: "mayStore": false
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "Instruction": 1,
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# CHECK-NEXT: "Latency": 1,
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# CHECK-NEXT: "NumMicroOpcodes": 1,
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# CHECK-NEXT: "RThroughput": 0.25,
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# CHECK-NEXT: "hasUnmodeledSideEffects": false,
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# CHECK-NEXT: "mayLoad": false,
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# CHECK-NEXT: "mayStore": false
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# CHECK-NEXT: }
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# CHECK-NEXT: ]
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# CHECK-NEXT: },
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# CHECK-NEXT: "Instructions": [
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# CHECK-NEXT: "addl\t%ebx, %ebx",
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# CHECK-NEXT: "addl\t%ecx, %ecx"
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# CHECK-NEXT: ],
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# CHECK-NEXT: "Name": "",
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# CHECK-NEXT: "ResourcePressureView": {
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# CHECK-NEXT: "ResourcePressureInfo": [
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# CHECK-NEXT: {
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# CHECK-NEXT: "InstructionIndex": 0,
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# CHECK-NEXT: "ResourceIndex": 3,
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# CHECK-NEXT: "ResourceUsage": 0.5
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "InstructionIndex": 0,
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# CHECK-NEXT: "ResourceIndex": 8,
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# CHECK-NEXT: "ResourceUsage": 0.5
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "InstructionIndex": 1,
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# CHECK-NEXT: "ResourceIndex": 2,
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# CHECK-NEXT: "ResourceUsage": 0.5
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "InstructionIndex": 1,
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# CHECK-NEXT: "ResourceIndex": 7,
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# CHECK-NEXT: "ResourceUsage": 0.5
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "InstructionIndex": 2,
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# CHECK-NEXT: "ResourceIndex": 2,
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# CHECK-NEXT: "ResourceUsage": 0.5
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "InstructionIndex": 2,
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# CHECK-NEXT: "ResourceIndex": 3,
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# CHECK-NEXT: "ResourceUsage": 0.5
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "InstructionIndex": 2,
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# CHECK-NEXT: "ResourceIndex": 7,
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# CHECK-NEXT: "ResourceUsage": 0.5
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "InstructionIndex": 2,
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# CHECK-NEXT: "ResourceIndex": 8,
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# CHECK-NEXT: "ResourceUsage": 0.5
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# CHECK-NEXT: }
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# CHECK-NEXT: ]
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# CHECK-NEXT: },
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# CHECK-NEXT: "SummaryView": {
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# CHECK-NEXT: "BlockRThroughput": 0.5,
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# CHECK-NEXT: "DispatchWidth": 4,
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# CHECK-NEXT: "IPC": 1.941747572815534,
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# CHECK-NEXT: "Instructions": 200,
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# CHECK-NEXT: "Iterations": 100,
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# CHECK-NEXT: "TotalCycles": 103,
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# CHECK-NEXT: "TotaluOps": 200,
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# CHECK-NEXT: "uOpsPerCycle": 1.941747572815534
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# CHECK-NEXT: },
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# CHECK-NEXT: "TimelineView": {
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# CHECK-NEXT: "TimelineInfo": [
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# CHECK-NEXT: {
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# CHECK-NEXT: "CycleDispatched": 0,
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# CHECK-NEXT: "CycleExecuted": 2,
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# CHECK-NEXT: "CycleIssued": 1,
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# CHECK-NEXT: "CycleReady": 0,
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# CHECK-NEXT: "CycleRetired": 3
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "CycleDispatched": 0,
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# CHECK-NEXT: "CycleExecuted": 2,
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# CHECK-NEXT: "CycleIssued": 1,
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# CHECK-NEXT: "CycleReady": 0,
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# CHECK-NEXT: "CycleRetired": 3
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "CycleDispatched": 0,
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# CHECK-NEXT: "CycleExecuted": 3,
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# CHECK-NEXT: "CycleIssued": 2,
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# CHECK-NEXT: "CycleReady": 2,
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# CHECK-NEXT: "CycleRetired": 4
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "CycleDispatched": 0,
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# CHECK-NEXT: "CycleExecuted": 3,
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# CHECK-NEXT: "CycleIssued": 2,
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# CHECK-NEXT: "CycleReady": 2,
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# CHECK-NEXT: "CycleRetired": 4
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "CycleDispatched": 1,
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# CHECK-NEXT: "CycleExecuted": 4,
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# CHECK-NEXT: "CycleIssued": 3,
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# CHECK-NEXT: "CycleReady": 3,
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# CHECK-NEXT: "CycleRetired": 5
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "CycleDispatched": 1,
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# CHECK-NEXT: "CycleExecuted": 4,
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# CHECK-NEXT: "CycleIssued": 3,
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# CHECK-NEXT: "CycleReady": 3,
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# CHECK-NEXT: "CycleRetired": 5
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "CycleDispatched": 1,
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# CHECK-NEXT: "CycleExecuted": 5,
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# CHECK-NEXT: "CycleIssued": 4,
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# CHECK-NEXT: "CycleReady": 4,
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# CHECK-NEXT: "CycleRetired": 6
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "CycleDispatched": 1,
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# CHECK-NEXT: "CycleExecuted": 5,
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# CHECK-NEXT: "CycleIssued": 4,
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# CHECK-NEXT: "CycleReady": 4,
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# CHECK-NEXT: "CycleRetired": 6
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "CycleDispatched": 2,
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# CHECK-NEXT: "CycleExecuted": 6,
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# CHECK-NEXT: "CycleIssued": 5,
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# CHECK-NEXT: "CycleReady": 5,
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# CHECK-NEXT: "CycleRetired": 7
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "CycleDispatched": 2,
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# CHECK-NEXT: "CycleExecuted": 6,
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# CHECK-NEXT: "CycleIssued": 5,
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# CHECK-NEXT: "CycleReady": 5,
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# CHECK-NEXT: "CycleRetired": 7
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "CycleDispatched": 2,
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# CHECK-NEXT: "CycleExecuted": 7,
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# CHECK-NEXT: "CycleIssued": 6,
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# CHECK-NEXT: "CycleReady": 6,
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# CHECK-NEXT: "CycleRetired": 8
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "CycleDispatched": 2,
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# CHECK-NEXT: "CycleExecuted": 7,
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# CHECK-NEXT: "CycleIssued": 6,
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# CHECK-NEXT: "CycleReady": 6,
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# CHECK-NEXT: "CycleRetired": 8
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "CycleDispatched": 3,
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# CHECK-NEXT: "CycleExecuted": 8,
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# CHECK-NEXT: "CycleIssued": 7,
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# CHECK-NEXT: "CycleReady": 7,
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# CHECK-NEXT: "CycleRetired": 9
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "CycleDispatched": 3,
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# CHECK-NEXT: "CycleExecuted": 8,
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# CHECK-NEXT: "CycleIssued": 7,
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# CHECK-NEXT: "CycleReady": 7,
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# CHECK-NEXT: "CycleRetired": 9
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "CycleDispatched": 3,
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# CHECK-NEXT: "CycleExecuted": 9,
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# CHECK-NEXT: "CycleIssued": 8,
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# CHECK-NEXT: "CycleReady": 8,
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# CHECK-NEXT: "CycleRetired": 10
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "CycleDispatched": 3,
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# CHECK-NEXT: "CycleExecuted": 9,
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# CHECK-NEXT: "CycleIssued": 8,
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# CHECK-NEXT: "CycleReady": 8,
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# CHECK-NEXT: "CycleRetired": 10
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "CycleDispatched": 4,
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# CHECK-NEXT: "CycleExecuted": 10,
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# CHECK-NEXT: "CycleIssued": 9,
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# CHECK-NEXT: "CycleReady": 9,
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# CHECK-NEXT: "CycleRetired": 11
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "CycleDispatched": 4,
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# CHECK-NEXT: "CycleExecuted": 10,
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# CHECK-NEXT: "CycleIssued": 9,
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# CHECK-NEXT: "CycleReady": 9,
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# CHECK-NEXT: "CycleRetired": 11
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "CycleDispatched": 4,
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# CHECK-NEXT: "CycleExecuted": 11,
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# CHECK-NEXT: "CycleIssued": 10,
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# CHECK-NEXT: "CycleReady": 10,
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# CHECK-NEXT: "CycleRetired": 12
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "CycleDispatched": 4,
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# CHECK-NEXT: "CycleExecuted": 11,
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# CHECK-NEXT: "CycleIssued": 10,
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# CHECK-NEXT: "CycleReady": 10,
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# CHECK-NEXT: "CycleRetired": 12
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# CHECK-NEXT: }
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# CHECK-NEXT: ]
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# CHECK-NEXT: }
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# CHECK-NEXT: },
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# CHECK-NEXT: {
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# CHECK-NEXT: "DispatchStatistics": {
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# CHECK-NEXT: "GROUP": 0,
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# CHECK-NEXT: "LQ": 0,
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# CHECK-NEXT: "RAT": 0,
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# CHECK-NEXT: "RCU": 0,
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# CHECK-NEXT: "SCHEDQ": 21,
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# CHECK-NEXT: "SQ": 0,
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# CHECK-NEXT: "USH": 0
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# CHECK-NEXT: },
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# CHECK-NEXT: "InstructionInfoView": {
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# CHECK-NEXT: "InstructionList": [
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# CHECK-NEXT: {
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# CHECK-NEXT: "Instruction": 0,
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# CHECK-NEXT: "Latency": 1,
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# CHECK-NEXT: "NumMicroOpcodes": 1,
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# CHECK-NEXT: "RThroughput": 0.25,
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# CHECK-NEXT: "hasUnmodeledSideEffects": false,
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# CHECK-NEXT: "mayLoad": false,
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# CHECK-NEXT: "mayStore": false
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# CHECK-NEXT: }
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# CHECK-NEXT: ]
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# CHECK-NEXT: },
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# CHECK-NEXT: "Instructions": [
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# CHECK-NEXT: "addl\t%edx, %edx"
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# CHECK-NEXT: ],
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# CHECK-NEXT: "Name": "",
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# CHECK-NEXT: "ResourcePressureView": {
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# CHECK-NEXT: "ResourcePressureInfo": [
|
|
# CHECK-NEXT: {
|
|
# CHECK-NEXT: "InstructionIndex": 0,
|
|
# CHECK-NEXT: "ResourceIndex": 2,
|
|
# CHECK-NEXT: "ResourceUsage": 0.25
|
|
# CHECK-NEXT: },
|
|
# CHECK-NEXT: {
|
|
# CHECK-NEXT: "InstructionIndex": 0,
|
|
# CHECK-NEXT: "ResourceIndex": 3,
|
|
# CHECK-NEXT: "ResourceUsage": 0.25
|
|
# CHECK-NEXT: },
|
|
# CHECK-NEXT: {
|
|
# CHECK-NEXT: "InstructionIndex": 0,
|
|
# CHECK-NEXT: "ResourceIndex": 7,
|
|
# CHECK-NEXT: "ResourceUsage": 0.25
|
|
# CHECK-NEXT: },
|
|
# CHECK-NEXT: {
|
|
# CHECK-NEXT: "InstructionIndex": 0,
|
|
# CHECK-NEXT: "ResourceIndex": 8,
|
|
# CHECK-NEXT: "ResourceUsage": 0.25
|
|
# CHECK-NEXT: },
|
|
# CHECK-NEXT: {
|
|
# CHECK-NEXT: "InstructionIndex": 1,
|
|
# CHECK-NEXT: "ResourceIndex": 2,
|
|
# CHECK-NEXT: "ResourceUsage": 0.25
|
|
# CHECK-NEXT: },
|
|
# CHECK-NEXT: {
|
|
# CHECK-NEXT: "InstructionIndex": 1,
|
|
# CHECK-NEXT: "ResourceIndex": 3,
|
|
# CHECK-NEXT: "ResourceUsage": 0.25
|
|
# CHECK-NEXT: },
|
|
# CHECK-NEXT: {
|
|
# CHECK-NEXT: "InstructionIndex": 1,
|
|
# CHECK-NEXT: "ResourceIndex": 7,
|
|
# CHECK-NEXT: "ResourceUsage": 0.25
|
|
# CHECK-NEXT: },
|
|
# CHECK-NEXT: {
|
|
# CHECK-NEXT: "InstructionIndex": 1,
|
|
# CHECK-NEXT: "ResourceIndex": 8,
|
|
# CHECK-NEXT: "ResourceUsage": 0.25
|
|
# CHECK-NEXT: }
|
|
# CHECK-NEXT: ]
|
|
# CHECK-NEXT: },
|
|
# CHECK-NEXT: "SummaryView": {
|
|
# CHECK-NEXT: "BlockRThroughput": 0.25,
|
|
# CHECK-NEXT: "DispatchWidth": 4,
|
|
# CHECK-NEXT: "IPC": 0.970873786407767,
|
|
# CHECK-NEXT: "Instructions": 100,
|
|
# CHECK-NEXT: "Iterations": 100,
|
|
# CHECK-NEXT: "TotalCycles": 103,
|
|
# CHECK-NEXT: "TotaluOps": 100,
|
|
# CHECK-NEXT: "uOpsPerCycle": 0.970873786407767
|
|
# CHECK-NEXT: },
|
|
# CHECK-NEXT: "TimelineView": {
|
|
# CHECK-NEXT: "TimelineInfo": [
|
|
# CHECK-NEXT: {
|
|
# CHECK-NEXT: "CycleDispatched": 0,
|
|
# CHECK-NEXT: "CycleExecuted": 2,
|
|
# CHECK-NEXT: "CycleIssued": 1,
|
|
# CHECK-NEXT: "CycleReady": 0,
|
|
# CHECK-NEXT: "CycleRetired": 3
|
|
# CHECK-NEXT: },
|
|
# CHECK-NEXT: {
|
|
# CHECK-NEXT: "CycleDispatched": 0,
|
|
# CHECK-NEXT: "CycleExecuted": 3,
|
|
# CHECK-NEXT: "CycleIssued": 2,
|
|
# CHECK-NEXT: "CycleReady": 2,
|
|
# CHECK-NEXT: "CycleRetired": 4
|
|
# CHECK-NEXT: },
|
|
# CHECK-NEXT: {
|
|
# CHECK-NEXT: "CycleDispatched": 0,
|
|
# CHECK-NEXT: "CycleExecuted": 4,
|
|
# CHECK-NEXT: "CycleIssued": 3,
|
|
# CHECK-NEXT: "CycleReady": 3,
|
|
# CHECK-NEXT: "CycleRetired": 5
|
|
# CHECK-NEXT: },
|
|
# CHECK-NEXT: {
|
|
# CHECK-NEXT: "CycleDispatched": 0,
|
|
# CHECK-NEXT: "CycleExecuted": 5,
|
|
# CHECK-NEXT: "CycleIssued": 4,
|
|
# CHECK-NEXT: "CycleReady": 4,
|
|
# CHECK-NEXT: "CycleRetired": 6
|
|
# CHECK-NEXT: },
|
|
# CHECK-NEXT: {
|
|
# CHECK-NEXT: "CycleDispatched": 1,
|
|
# CHECK-NEXT: "CycleExecuted": 6,
|
|
# CHECK-NEXT: "CycleIssued": 5,
|
|
# CHECK-NEXT: "CycleReady": 5,
|
|
# CHECK-NEXT: "CycleRetired": 7
|
|
# CHECK-NEXT: },
|
|
# CHECK-NEXT: {
|
|
# CHECK-NEXT: "CycleDispatched": 1,
|
|
# CHECK-NEXT: "CycleExecuted": 7,
|
|
# CHECK-NEXT: "CycleIssued": 6,
|
|
# CHECK-NEXT: "CycleReady": 6,
|
|
# CHECK-NEXT: "CycleRetired": 8
|
|
# CHECK-NEXT: },
|
|
# CHECK-NEXT: {
|
|
# CHECK-NEXT: "CycleDispatched": 1,
|
|
# CHECK-NEXT: "CycleExecuted": 8,
|
|
# CHECK-NEXT: "CycleIssued": 7,
|
|
# CHECK-NEXT: "CycleReady": 7,
|
|
# CHECK-NEXT: "CycleRetired": 9
|
|
# CHECK-NEXT: },
|
|
# CHECK-NEXT: {
|
|
# CHECK-NEXT: "CycleDispatched": 1,
|
|
# CHECK-NEXT: "CycleExecuted": 9,
|
|
# CHECK-NEXT: "CycleIssued": 8,
|
|
# CHECK-NEXT: "CycleReady": 8,
|
|
# CHECK-NEXT: "CycleRetired": 10
|
|
# CHECK-NEXT: },
|
|
# CHECK-NEXT: {
|
|
# CHECK-NEXT: "CycleDispatched": 2,
|
|
# CHECK-NEXT: "CycleExecuted": 10,
|
|
# CHECK-NEXT: "CycleIssued": 9,
|
|
# CHECK-NEXT: "CycleReady": 9,
|
|
# CHECK-NEXT: "CycleRetired": 11
|
|
# CHECK-NEXT: },
|
|
# CHECK-NEXT: {
|
|
# CHECK-NEXT: "CycleDispatched": 2,
|
|
# CHECK-NEXT: "CycleExecuted": 11,
|
|
# CHECK-NEXT: "CycleIssued": 10,
|
|
# CHECK-NEXT: "CycleReady": 10,
|
|
# CHECK-NEXT: "CycleRetired": 12
|
|
# CHECK-NEXT: }
|
|
# CHECK-NEXT: ]
|
|
# CHECK-NEXT: }
|
|
# CHECK-NEXT: }
|
|
# CHECK-NEXT: ],
|
|
# CHECK-NEXT: "SimulationParameters": {
|
|
# CHECK-NEXT: "-march": "x86_64",
|
|
# CHECK-NEXT: "-mcpu": "haswell",
|
|
# CHECK-NEXT: "-mtriple": "x86_64-unknown-unknown"
|
|
# CHECK-NEXT: },
|
|
# CHECK-NEXT: "TargetInfo": {
|
|
# CHECK-NEXT: "CPUName": "haswell",
|
|
# CHECK-NEXT: "Resources": [
|
|
# CHECK-NEXT: "HWDivider",
|
|
# CHECK-NEXT: "HWFPDivider",
|
|
# CHECK-NEXT: "HWPort0",
|
|
# CHECK-NEXT: "HWPort1",
|
|
# CHECK-NEXT: "HWPort2",
|
|
# CHECK-NEXT: "HWPort3",
|
|
# CHECK-NEXT: "HWPort4",
|
|
# CHECK-NEXT: "HWPort5",
|
|
# CHECK-NEXT: "HWPort6",
|
|
# CHECK-NEXT: "HWPort7"
|
|
# CHECK-NEXT: ]
|
|
# CHECK-NEXT: }
|
|
# CHECK-NEXT: }
|