362 lines
14 KiB
LLVM
362 lines
14 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -passes=sroa -S | FileCheck %s
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target datalayout = "e-p:64:64:64-p1:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n8:16:32:64"
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declare void @llvm.memcpy.p0.p1.i32(ptr nocapture writeonly, ptr addrspace(1) nocapture readonly, i32, i1 immarg) #0
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declare void @llvm.memcpy.p1.p0.i32(ptr addrspace(1) nocapture writeonly, ptr nocapture readonly, i32, i1 immarg) #0
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define i64 @alloca_addrspacecast_bitcast(i64 %X) {
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; CHECK-LABEL: @alloca_addrspacecast_bitcast(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: ret i64 [[X:%.*]]
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;
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entry:
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%A = alloca [8 x i8]
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%A.cast = addrspacecast ptr %A to ptr addrspace(1)
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store i64 %X, ptr addrspace(1) %A.cast
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%Z = load i64, ptr addrspace(1) %A.cast
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ret i64 %Z
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}
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define i64 @alloca_bitcast_addrspacecast(i64 %X) {
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; CHECK-LABEL: @alloca_bitcast_addrspacecast(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: ret i64 [[X:%.*]]
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;
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entry:
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%A = alloca [8 x i8]
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%B = addrspacecast ptr %A to ptr addrspace(1)
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store i64 %X, ptr addrspace(1) %B
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%Z = load i64, ptr addrspace(1) %B
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ret i64 %Z
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}
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define i64 @alloca_addrspacecast_gep(i64 %X) {
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; CHECK-LABEL: @alloca_addrspacecast_gep(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: ret i64 [[X:%.*]]
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;
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entry:
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%A.as0 = alloca [256 x i8], align 4
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%gepA.as0 = getelementptr [256 x i8], ptr %A.as0, i16 0, i16 32
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store i64 %X, ptr %gepA.as0, align 4
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%A.as1 = addrspacecast ptr %A.as0 to ptr addrspace(1)
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%gepA.as1 = getelementptr [256 x i8], ptr addrspace(1) %A.as1, i16 0, i16 32
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%Z = load i64, ptr addrspace(1) %gepA.as1, align 4
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ret i64 %Z
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}
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define i64 @alloca_gep_addrspacecast(i64 %X) {
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; CHECK-LABEL: @alloca_gep_addrspacecast(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: ret i64 [[X:%.*]]
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;
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entry:
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%A.as0 = alloca [256 x i8], align 4
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%gepA.as0 = getelementptr [256 x i8], ptr %A.as0, i16 0, i16 32
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store i64 %X, ptr %gepA.as0, align 4
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%gepA.as1.bc = addrspacecast ptr %gepA.as0 to ptr addrspace(1)
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%Z = load i64, ptr addrspace(1) %gepA.as1.bc, align 4
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ret i64 %Z
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}
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define i64 @alloca_gep_addrspacecast_gep(i64 %X) {
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; CHECK-LABEL: @alloca_gep_addrspacecast_gep(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: ret i64 [[X:%.*]]
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;
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entry:
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%A.as0 = alloca [256 x i8], align 4
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%gepA.as0 = getelementptr [256 x i8], ptr %A.as0, i16 0, i16 32
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store i64 %X, ptr %gepA.as0, align 4
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%gepB.as0 = getelementptr [256 x i8], ptr %A.as0, i16 0, i16 16
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%gepB.as1 = addrspacecast ptr %gepB.as0 to ptr addrspace(1)
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%gepC.as1 = getelementptr i8, ptr addrspace(1) %gepB.as1, i16 16
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%Z = load i64, ptr addrspace(1) %gepC.as1, align 4
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ret i64 %Z
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}
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define i64 @getAdjustedPtr_addrspacecast_gep(ptr %x) {
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; CHECK-LABEL: @getAdjustedPtr_addrspacecast_gep(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CAST1:%.*]] = addrspacecast ptr [[X:%.*]] to ptr addrspace(1)
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; CHECK-NEXT: [[A_SROA_0_0_COPYLOAD:%.*]] = load i64, ptr addrspace(1) [[CAST1]], align 1
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; CHECK-NEXT: [[A_SROA_2_0_CAST1_SROA_IDX:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[CAST1]], i16 8
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; CHECK-NEXT: [[A_SROA_2_0_COPYLOAD:%.*]] = load i64, ptr addrspace(1) [[A_SROA_2_0_CAST1_SROA_IDX]], align 1
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; CHECK-NEXT: ret i64 [[A_SROA_0_0_COPYLOAD]]
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;
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entry:
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%a = alloca [32 x i8], align 8
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%cast1 = addrspacecast ptr %x to ptr addrspace(1)
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call void @llvm.memcpy.p0.p1.i32(ptr %a, ptr addrspace(1) %cast1, i32 16, i1 false)
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%val = load i64, ptr %a
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ret i64 %val
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}
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define i64 @getAdjustedPtr_gep_addrspacecast(ptr %x) {
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; CHECK-LABEL: @getAdjustedPtr_gep_addrspacecast(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[GEP_X:%.*]] = getelementptr [32 x i8], ptr [[X:%.*]], i32 0, i32 16
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; CHECK-NEXT: [[CAST1:%.*]] = addrspacecast ptr [[GEP_X]] to ptr addrspace(1)
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; CHECK-NEXT: [[A_SROA_0_0_COPYLOAD:%.*]] = load i64, ptr addrspace(1) [[CAST1]], align 1
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; CHECK-NEXT: [[A_SROA_2_0_CAST1_SROA_IDX:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[CAST1]], i16 8
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; CHECK-NEXT: [[A_SROA_2_0_COPYLOAD:%.*]] = load i64, ptr addrspace(1) [[A_SROA_2_0_CAST1_SROA_IDX]], align 1
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; CHECK-NEXT: ret i64 [[A_SROA_0_0_COPYLOAD]]
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;
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entry:
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%a = alloca [32 x i8], align 8
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%gep.x = getelementptr [32 x i8], ptr %x, i32 0, i32 16
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%cast1 = addrspacecast ptr %gep.x to ptr addrspace(1)
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call void @llvm.memcpy.p0.p1.i32(ptr %a, ptr addrspace(1) %cast1, i32 16, i1 false)
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%val = load i64, ptr %a
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ret i64 %val
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}
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define i64 @getAdjustedPtr_gep_addrspacecast_gep(ptr %x) {
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; CHECK-LABEL: @getAdjustedPtr_gep_addrspacecast_gep(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[GEP0_X:%.*]] = getelementptr [32 x i8], ptr [[X:%.*]], i32 0, i32 8
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; CHECK-NEXT: [[CAST1:%.*]] = addrspacecast ptr [[GEP0_X]] to ptr addrspace(1)
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; CHECK-NEXT: [[GEP1_X:%.*]] = getelementptr i8, ptr addrspace(1) [[CAST1]], i32 8
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; CHECK-NEXT: [[A_SROA_0_0_COPYLOAD:%.*]] = load i64, ptr addrspace(1) [[GEP1_X]], align 1
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; CHECK-NEXT: [[A_SROA_2_0_GEP1_X_SROA_IDX:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[GEP1_X]], i16 8
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; CHECK-NEXT: [[A_SROA_2_0_COPYLOAD:%.*]] = load i64, ptr addrspace(1) [[A_SROA_2_0_GEP1_X_SROA_IDX]], align 1
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; CHECK-NEXT: ret i64 [[A_SROA_0_0_COPYLOAD]]
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;
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entry:
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%a = alloca [32 x i8], align 8
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%gep0.x = getelementptr [32 x i8], ptr %x, i32 0, i32 8
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%cast1 = addrspacecast ptr %gep0.x to ptr addrspace(1)
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%gep1.x = getelementptr i8, ptr addrspace(1) %cast1, i32 8
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call void @llvm.memcpy.p0.p1.i32(ptr %a, ptr addrspace(1) %gep1.x, i32 16, i1 false)
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%val = load i64, ptr %a
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ret i64 %val
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}
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; Don't change the address space of a volatile operation
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define i64 @alloca_addrspacecast_bitcast_volatile_store(i64 %X) {
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; CHECK-LABEL: @alloca_addrspacecast_bitcast_volatile_store(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[A_SROA_0:%.*]] = alloca i64, align 8
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; CHECK-NEXT: [[TMP0:%.*]] = addrspacecast ptr [[A_SROA_0]] to ptr addrspace(1)
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; CHECK-NEXT: store volatile i64 [[X:%.*]], ptr addrspace(1) [[TMP0]], align 8
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; CHECK-NEXT: [[A_SROA_0_0_A_SROA_0_0_Z:%.*]] = load i64, ptr [[A_SROA_0]], align 8
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; CHECK-NEXT: ret i64 [[A_SROA_0_0_A_SROA_0_0_Z]]
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;
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entry:
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%A = alloca [8 x i8]
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%A.cast = addrspacecast ptr %A to ptr addrspace(1)
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store volatile i64 %X, ptr addrspace(1) %A.cast
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%Z = load i64, ptr addrspace(1) %A.cast
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ret i64 %Z
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}
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%struct = type { [256 x i8], i32 }
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define i65 @volatile_store_addrspacecast_slice(i65 %X, i16 %idx) {
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; CHECK-LABEL: @volatile_store_addrspacecast_slice(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[A_SROA_0:%.*]] = alloca [9 x i8], align 4
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; CHECK-NEXT: [[A_SROA_1:%.*]] = alloca [9 x i8], align 8
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; CHECK-NEXT: [[A_SROA_1_0_GEPB_SROA_CAST:%.*]] = addrspacecast ptr [[A_SROA_1]] to ptr addrspace(1)
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; CHECK-NEXT: store volatile i65 [[X:%.*]], ptr addrspace(1) [[A_SROA_1_0_GEPB_SROA_CAST]], align 8
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; CHECK-NEXT: br label [[L2:%.*]]
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; CHECK: L2:
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; CHECK-NEXT: [[A_SROA_0_0_A_SROA_0_20_Z:%.*]] = load i65, ptr [[A_SROA_0]], align 4
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; CHECK-NEXT: ret i65 [[A_SROA_0_0_A_SROA_0_20_Z]]
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;
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entry:
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%A = alloca %struct
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%B = addrspacecast ptr %A to ptr addrspace(1)
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%gepA = getelementptr %struct, ptr %A, i32 0, i32 0, i16 20
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%gepB = getelementptr i65, ptr addrspace(1) %B, i16 6
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store volatile i65 %X, ptr addrspace(1) %gepB, align 1
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br label %L2
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L2:
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%Z = load i65, ptr %gepA, align 1
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ret i65 %Z
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}
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; Don't change the address space of a volatile operation
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define i64 @alloca_addrspacecast_bitcast_volatile_load(i64 %X) {
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; CHECK-LABEL: @alloca_addrspacecast_bitcast_volatile_load(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[A_SROA_0:%.*]] = alloca i64, align 8
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; CHECK-NEXT: store i64 [[X:%.*]], ptr [[A_SROA_0]], align 8
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; CHECK-NEXT: [[TMP0:%.*]] = addrspacecast ptr [[A_SROA_0]] to ptr addrspace(1)
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; CHECK-NEXT: [[A_SROA_0_0_A_SROA_0_0_Z:%.*]] = load volatile i64, ptr addrspace(1) [[TMP0]], align 8
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; CHECK-NEXT: ret i64 [[A_SROA_0_0_A_SROA_0_0_Z]]
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;
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entry:
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%A = alloca [8 x i8]
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%A.cast = addrspacecast ptr %A to ptr addrspace(1)
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store i64 %X, ptr addrspace(1) %A.cast
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%Z = load volatile i64, ptr addrspace(1) %A.cast
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ret i64 %Z
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}
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declare void @llvm.memset.p1.i32(ptr addrspace(1) nocapture, i8, i32, i1) nounwind
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define i65 @volatile_load_addrspacecast_slice(i65 %X, i16 %idx) {
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; CHECK-LABEL: @volatile_load_addrspacecast_slice(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[A_SROA_0:%.*]] = alloca [9 x i8], align 4
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; CHECK-NEXT: [[A_SROA_1:%.*]] = alloca [9 x i8], align 8
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; CHECK-NEXT: [[A_SROA_1_0_GEPB_SROA_CAST:%.*]] = addrspacecast ptr [[A_SROA_1]] to ptr addrspace(1)
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; CHECK-NEXT: store i65 [[X:%.*]], ptr addrspace(1) [[A_SROA_1_0_GEPB_SROA_CAST]], align 8
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; CHECK-NEXT: br label [[L2:%.*]]
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; CHECK: L2:
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; CHECK-NEXT: [[A_SROA_0_0_A_SROA_0_20_Z:%.*]] = load volatile i65, ptr [[A_SROA_0]], align 4
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; CHECK-NEXT: ret i65 [[A_SROA_0_0_A_SROA_0_20_Z]]
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;
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entry:
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%A = alloca %struct
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%B = addrspacecast ptr %A to ptr addrspace(1)
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%gepA = getelementptr %struct, ptr %A, i32 0, i32 0, i16 20
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%gepB = getelementptr i65, ptr addrspace(1) %B, i16 6
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store i65 %X, ptr addrspace(1) %gepB, align 1
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br label %L2
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L2:
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%Z = load volatile i65, ptr %gepA, align 1
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ret i65 %Z
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}
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; Don't change the address space of a volatile operation
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define i32 @volatile_memset() {
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; CHECK-LABEL: @volatile_memset(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[A_SROA_0:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[TMP0:%.*]] = addrspacecast ptr [[A_SROA_0]] to ptr addrspace(1)
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; CHECK-NEXT: store volatile i32 707406378, ptr addrspace(1) [[TMP0]], align 4
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; CHECK-NEXT: [[A_SROA_0_0_A_SROA_0_0_VAL:%.*]] = load i32, ptr [[A_SROA_0]], align 4
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; CHECK-NEXT: ret i32 [[A_SROA_0_0_A_SROA_0_0_VAL]]
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;
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entry:
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%a = alloca [4 x i8]
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%asc = addrspacecast ptr %a to ptr addrspace(1)
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call void @llvm.memset.p1.i32(ptr addrspace(1) %asc, i8 42, i32 4, i1 true)
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%val = load i32, ptr %a
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ret i32 %val
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}
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; Don't change the address space of a volatile operation
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define void @volatile_memcpy(ptr %src, ptr %dst) {
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; CHECK-LABEL: @volatile_memcpy(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[A_SROA_0:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[A_SROA_0_0_COPYLOAD:%.*]] = load volatile i32, ptr [[SRC:%.*]], align 1, !tbaa [[TBAA0:![0-9]+]]
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; CHECK-NEXT: [[TMP0:%.*]] = addrspacecast ptr [[A_SROA_0]] to ptr addrspace(1)
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; CHECK-NEXT: store volatile i32 [[A_SROA_0_0_COPYLOAD]], ptr addrspace(1) [[TMP0]], align 4, !tbaa [[TBAA0]]
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; CHECK-NEXT: [[TMP1:%.*]] = addrspacecast ptr [[A_SROA_0]] to ptr addrspace(1)
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; CHECK-NEXT: [[A_SROA_0_0_A_SROA_0_0_COPYLOAD1:%.*]] = load volatile i32, ptr addrspace(1) [[TMP1]], align 4, !tbaa [[TBAA3:![0-9]+]]
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; CHECK-NEXT: store volatile i32 [[A_SROA_0_0_A_SROA_0_0_COPYLOAD1]], ptr [[DST:%.*]], align 1, !tbaa [[TBAA3]]
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; CHECK-NEXT: ret void
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;
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entry:
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%a = alloca [4 x i8]
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%asc = addrspacecast ptr %a to ptr addrspace(1)
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call void @llvm.memcpy.p1.p0.i32(ptr addrspace(1) %asc, ptr %src, i32 4, i1 true), !tbaa !0
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call void @llvm.memcpy.p0.p1.i32(ptr %dst, ptr addrspace(1) %asc, i32 4, i1 true), !tbaa !3
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ret void
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}
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define void @select_addrspacecast(i1 %a, i1 %b) {
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; CHECK-LABEL: @select_addrspacecast(
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; CHECK-NEXT: ret void
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;
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%c = alloca i64, align 8
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%p.0.c = select i1 %a, ptr %c, ptr %c
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%asc = addrspacecast ptr %p.0.c to ptr addrspace(1)
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%cond.in = select i1 %b, ptr addrspace(1) %asc, ptr addrspace(1) %asc
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%cond = load i64, ptr addrspace(1) %cond.in, align 8
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ret void
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}
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define void @select_addrspacecast_const_op(i1 %a, i1 %b) {
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; CHECK-LABEL: @select_addrspacecast_const_op(
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; CHECK-NEXT: [[C:%.*]] = alloca i64, align 8
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; CHECK-NEXT: [[C_0_ASC_SROA_CAST:%.*]] = addrspacecast ptr [[C]] to ptr addrspace(1)
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; CHECK-NEXT: [[COND_IN:%.*]] = select i1 [[B:%.*]], ptr addrspace(1) [[C_0_ASC_SROA_CAST]], ptr addrspace(1) null
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; CHECK-NEXT: [[COND:%.*]] = load i64, ptr addrspace(1) [[COND_IN]], align 8
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; CHECK-NEXT: ret void
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;
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%c = alloca i64, align 8
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%p.0.c = select i1 %a, ptr %c, ptr %c
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%asc = addrspacecast ptr %p.0.c to ptr addrspace(1)
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%cond.in = select i1 %b, ptr addrspace(1) %asc, ptr addrspace(1) null
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%cond = load i64, ptr addrspace(1) %cond.in, align 8
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ret void
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}
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;; If this was external, we wouldn't be able to prove dereferenceability
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;; of the location.
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@gv = addrspace(1) global i64 zeroinitializer
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define void @select_addrspacecast_gv(i1 %a, i1 %b) {
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; CHECK-LABEL: @select_addrspacecast_gv(
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; CHECK-NEXT: [[COND_SROA_SPECULATE_LOAD_FALSE:%.*]] = load i64, ptr addrspace(1) @gv, align 8
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; CHECK-NEXT: [[COND_SROA_SPECULATED:%.*]] = select i1 [[B:%.*]], i64 undef, i64 [[COND_SROA_SPECULATE_LOAD_FALSE]]
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; CHECK-NEXT: ret void
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;
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%c = alloca i64, align 8
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%p.0.c = select i1 %a, ptr %c, ptr %c
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%asc = addrspacecast ptr %p.0.c to ptr addrspace(1)
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%cond.in = select i1 %b, ptr addrspace(1) %asc, ptr addrspace(1) @gv
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%cond = load i64, ptr addrspace(1) %cond.in, align 8
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ret void
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}
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define void @select_addrspacecast_gv_constexpr(i1 %a, i1 %b) {
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; CHECK-LABEL: @select_addrspacecast_gv_constexpr(
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; CHECK-NEXT: [[COND_SROA_SPECULATE_LOAD_FALSE:%.*]] = load i64, ptr addrspace(2) addrspacecast (ptr addrspace(1) @gv to ptr addrspace(2)), align 8
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; CHECK-NEXT: [[COND_SROA_SPECULATED:%.*]] = select i1 [[B:%.*]], i64 undef, i64 [[COND_SROA_SPECULATE_LOAD_FALSE]]
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; CHECK-NEXT: ret void
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;
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%c = alloca i64, align 8
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%p.0.c = select i1 %a, ptr %c, ptr %c
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%asc = addrspacecast ptr %p.0.c to ptr addrspace(2)
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%cond.in = select i1 %b, ptr addrspace(2) %asc, ptr addrspace(2) addrspacecast (ptr addrspace(1) @gv to ptr addrspace(2))
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%cond = load i64, ptr addrspace(2) %cond.in, align 8
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ret void
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}
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define i8 @select_addrspacecast_i8(i1 %c) {
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; CHECK-LABEL: @select_addrspacecast_i8(
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; CHECK-NEXT: [[RET_SROA_SPECULATED:%.*]] = select i1 [[C:%.*]], i8 undef, i8 undef
|
|
; CHECK-NEXT: ret i8 [[RET_SROA_SPECULATED]]
|
|
;
|
|
%a = alloca i8
|
|
%b = alloca i8
|
|
|
|
%a.ptr = addrspacecast ptr %a to ptr addrspace(1)
|
|
%b.ptr = addrspacecast ptr %b to ptr addrspace(1)
|
|
|
|
%ptr = select i1 %c, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr
|
|
%ret = load i8, ptr addrspace(1) %ptr
|
|
ret i8 %ret
|
|
}
|
|
|
|
!0 = !{!1, !1, i64 0, i64 1}
|
|
!1 = !{!2, i64 1, !"type_0"}
|
|
!2 = !{!"root"}
|
|
!3 = !{!4, !4, i64 0, i64 1}
|
|
!4 = !{!2, i64 1, !"type_3"}
|