75 lines
2.6 KiB
LLVM
75 lines
2.6 KiB
LLVM
; REQUIRES: asserts
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; RUN: opt -loop-vectorize -enable-vplan-native-path -debug -disable-output %s 2>&1 | FileCheck %s
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@arr2 = external global [8 x i64], align 16
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@arr = external global [8 x [8 x i64]], align 16
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define void @foo(i64 %n) {
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; CHECK: VPlan 'HCFGBuilder: Plain CFG
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; CHECK-NEXT: {
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; CHECK-NEXT: vector.ph:
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; CHECK-NEXT: Successor(s): outer.header
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; CHECK-EMPTY:
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; CHECK-NEXT: <x1> outer.header: {
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; CHECK-NEXT: vector.body:
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; CHECK-NEXT: WIDEN-PHI ir<%outer.iv> = phi ir<0>, ir<%outer.iv.next>
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; CHECK-NEXT: EMIT ir<%gep.1> = getelementptr ir<@arr2> ir<0> ir<%outer.iv>
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; CHECK-NEXT: EMIT store ir<%outer.iv> ir<%gep.1>
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; CHECK-NEXT: EMIT ir<%add> = add ir<%outer.iv> ir<%n>
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; CHECK-NEXT: Successor(s): inner
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; CHECK-EMPTY:
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; CHECK-NEXT: <x1> inner: {
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; CHECK-NEXT: inner:
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; CHECK-NEXT: WIDEN-PHI ir<%inner.iv> = phi ir<0>, ir<%inner.iv.next>
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; CHECK-NEXT: EMIT ir<%gep.2> = getelementptr ir<@arr> ir<0> ir<%inner.iv> ir<%outer.iv>
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; CHECK-NEXT: EMIT store ir<%add> ir<%gep.2>
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; CHECK-NEXT: EMIT ir<%inner.iv.next> = add ir<%inner.iv> ir<1>
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; CHECK-NEXT: EMIT ir<%inner.ec> = icmp ir<%inner.iv.next> ir<8>
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; CHECK-NEXT: EMIT branch-on-cond ir<%inner.ec>
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; CHECK-NEXT: No successors
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; CHECK-NEXT: }
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; CHECK-NEXT: Successor(s): outer.latch
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; CHECK-EMPTY:
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; CHECK-NEXT: outer.latch:
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; CHECK-NEXT: EMIT ir<%outer.iv.next> = add ir<%outer.iv> ir<1>
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; CHECK-NEXT: EMIT ir<%outer.ec> = icmp ir<%outer.iv.next> ir<8>
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; CHECK-NEXT: EMIT branch-on-cond ir<%outer.ec>
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; CHECK-NEXT: No successors
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; CHECK-NEXT: }
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; CHECK-NEXT: Successor(s): exit
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; CHECK-EMPTY:
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; CHECK-NEXT: exit:
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; CHECK-NEXT: No successors
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; CHECK-NEXT: }
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entry:
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br label %outer.header
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outer.header:
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%outer.iv = phi i64 [ 0, %entry ], [ %outer.iv.next, %outer.latch ]
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%gep.1 = getelementptr inbounds [8 x i64], [8 x i64]* @arr2, i64 0, i64 %outer.iv
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store i64 %outer.iv, i64* %gep.1, align 4
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%add = add nsw i64 %outer.iv, %n
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br label %inner
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inner:
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%inner.iv = phi i64 [ 0, %outer.header ], [ %inner.iv.next, %inner ]
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%gep.2 = getelementptr inbounds [8 x [8 x i64]], [8 x [8 x i64]]* @arr, i64 0, i64 %inner.iv, i64 %outer.iv
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store i64 %add, i64* %gep.2, align 4
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%inner.iv.next = add nuw nsw i64 %inner.iv, 1
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%inner.ec = icmp eq i64 %inner.iv.next, 8
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br i1 %inner.ec, label %outer.latch, label %inner
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outer.latch:
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%outer.iv.next = add nuw nsw i64 %outer.iv, 1
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%outer.ec = icmp eq i64 %outer.iv.next, 8
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br i1 %outer.ec, label %exit, label %outer.header, !llvm.loop !1
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exit:
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ret void
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}
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!1 = distinct !{!1, !2, !3}
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!2 = !{!"llvm.loop.vectorize.width", i32 4}
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!3 = !{!"llvm.loop.vectorize.enable", i1 true}
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