211 lines
6.7 KiB
LLVM
211 lines
6.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -passes='loop(indvars,loop-deletion)' -verify-scev -S %s | FileCheck %s
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; Make sure indvarsimplify properly forgets the exit value %p.2.lcssa phi after
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; modifying it. Loop deletion is required to show the incorrect use of the cached
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; SCEV value.
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define void @test(i1 %c) {
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; CHECK-LABEL: @test(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[HEADER_1:%.*]]
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; CHECK: header.1.loopexit:
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; CHECK-NEXT: br label [[HEADER_1_BACKEDGE:%.*]]
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; CHECK: header.1:
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; CHECK-NEXT: br label [[HEADER_2:%.*]]
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; CHECK: header.2:
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; CHECK-NEXT: br i1 [[C:%.*]], label [[LATCH_1:%.*]], label [[LATCH_2:%.*]]
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; CHECK: latch.1:
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; CHECK-NEXT: br label [[HEADER_1_LOOPEXIT:%.*]]
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; CHECK: latch.2:
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; CHECK-NEXT: br label [[HEADER_1_BACKEDGE]]
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; CHECK: header.1.backedge:
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; CHECK-NEXT: br label [[HEADER_1]]
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;
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entry:
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br label %header.1
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header.1:
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%p.1 = phi i32 [ 0, %entry ], [ %p.2.lcssa, %latch.2 ], [ 0, %latch.1 ]
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br label %header.2
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header.2:
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%p.2 = phi i32 [ %p.1, %header.1 ], [ %p.2.next, %latch.1 ]
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br i1 %c, label %latch.1, label %latch.2
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latch.1:
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%p.2.next = add i32 %p.2, 1
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br i1 false, label %header.2, label %header.1
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latch.2:
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%p.2.lcssa = phi i32 [ %p.2, %header.2 ]
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br label %header.1
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}
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define i8 @test_pr52023(i1 %c.1, i1 %c.2) {
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; CHECK-LABEL: @test_pr52023(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP_1:%.*]]
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; CHECK: loop.1:
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; CHECK-NEXT: [[INC79:%.*]] = phi i8 [ [[TMP0:%.*]], [[LOOP_1_LATCH:%.*]] ], [ 0, [[ENTRY:%.*]] ]
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; CHECK-NEXT: [[TMP0]] = add i8 [[INC79]], 1
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; CHECK-NEXT: br label [[LOOP_2:%.*]]
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; CHECK: loop.2:
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; CHECK-NEXT: br i1 [[C_1:%.*]], label [[LOOP_2_LATCH:%.*]], label [[LOOP_1_LATCH]]
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; CHECK: loop.2.latch:
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; CHECK-NEXT: br label [[LOOP_1_LATCH]]
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; CHECK: loop.1.latch:
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; CHECK-NEXT: br i1 [[C_2:%.*]], label [[EXIT:%.*]], label [[LOOP_1]]
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; CHECK: exit:
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; CHECK-NEXT: [[INC_LCSSA_LCSSA:%.*]] = phi i8 [ [[TMP0]], [[LOOP_1_LATCH]] ]
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; CHECK-NEXT: ret i8 [[INC_LCSSA_LCSSA]]
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;
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entry:
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br label %loop.1
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loop.1:
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%inc79 = phi i8 [ %inc.lcssa, %loop.1.latch ], [ 0, %entry ]
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br label %loop.2
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loop.2:
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%inc6 = phi i8 [ %inc79, %loop.1 ], [ %inc, %loop.2.latch ]
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%inc = add i8 %inc6, 1
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br i1 %c.1, label %loop.2.latch , label %loop.1.latch
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loop.2.latch:
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br i1 false, label %loop.2, label %loop.1.latch
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loop.1.latch:
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%inc.lcssa = phi i8 [ %inc, %loop.2.latch ], [ undef, %loop.2 ]
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br i1 %c.2, label %exit, label %loop.1
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exit:
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%inc.lcssa.lcssa = phi i8 [ %inc.lcssa, %loop.1.latch ]
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ret i8 %inc.lcssa.lcssa
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}
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define i32 @test_pr58440(i1 %c.0) {
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; CHECK-LABEL: @test_pr58440(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = or i32 0, 1
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; CHECK-NEXT: br label [[LOOP_1_HEADER:%.*]]
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; CHECK: loop.1.header.loopexit:
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; CHECK-NEXT: br label [[LOOP_1_HEADER]]
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; CHECK: loop.1.header:
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; CHECK-NEXT: br label [[LOOP_2_HEADER:%.*]]
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; CHECK: loop.2.header:
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; CHECK-NEXT: br i1 [[C_0:%.*]], label [[LOOP_2_LATCH:%.*]], label [[LOOP_1_HEADER_LOOPEXIT:%.*]]
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; CHECK: loop.2.latch:
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; CHECK-NEXT: br i1 false, label [[EXIT:%.*]], label [[LOOP_2_HEADER]]
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; CHECK: exit:
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; CHECK-NEXT: [[LCSSA:%.*]] = phi i32 [ [[TMP0]], [[LOOP_2_LATCH]] ]
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; CHECK-NEXT: ret i32 [[LCSSA]]
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;
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entry:
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br label %loop.1.header
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loop.1.header:
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%p.1 = phi i32 [ 0, %entry ], [ %p.2, %loop.2.header ]
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br label %loop.2.header
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loop.2.header:
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%p.2 = phi i32 [ %p.1, %loop.1.header ], [ %0, %loop.2.latch ]
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br i1 %c.0, label %loop.2.latch, label %loop.1.header
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loop.2.latch:
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%0 = or i32 %p.1, 1
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br i1 false, label %exit, label %loop.2.header
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exit:
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%lcssa = phi i32 [ %0, %loop.2.latch ]
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ret i32 %lcssa
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}
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define i16 @test_pr58515_invalidate_loop_disposition(ptr %a) {
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; CHECK-LABEL: @test_pr58515_invalidate_loop_disposition(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[SEL:%.*]] = select i1 true, i16 2, i16 0
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[IV:%.*]] = phi i16 [ 1, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
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; CHECK-NEXT: [[SUM:%.*]] = phi i16 [ 0, [[ENTRY]] ], [ [[SUM_NEXT:%.*]], [[LOOP]] ]
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; CHECK-NEXT: [[SUM_NEXT]] = add i16 [[SEL]], [[SUM]]
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; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i16 [[IV]], 1
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; CHECK-NEXT: [[C_2:%.*]] = icmp ult i16 [[IV]], 9
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; CHECK-NEXT: br i1 [[C_2]], label [[LOOP]], label [[EXIT:%.*]]
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; CHECK: exit:
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; CHECK-NEXT: [[LCSSA:%.*]] = phi i16 [ [[SUM_NEXT]], [[LOOP]] ]
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; CHECK-NEXT: ret i16 0
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;
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entry:
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br label %loop
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loop:
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%iv = phi i16 [ 1, %entry ], [ %iv.next, %loop ]
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%sum = phi i16 [ 0, %entry ], [ %sum.next, %loop ]
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%gep = getelementptr inbounds i16, ptr %a, i16 %iv
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%c.1 = icmp ne ptr %a, %gep
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%sel = select i1 %c.1, i16 2, i16 0
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%sum.next = add i16 %sel, %sum
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%iv.next = add nuw nsw i16 %iv, 1
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%c.2 = icmp ult i16 %iv, 9
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br i1 %c.2, label %loop, label %exit
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exit:
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%lcssa = phi i16 [ %sum.next, %loop ]
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ret i16 0
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}
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define i32 @pr58750(i16 %a, ptr %dst, i1 %c.0) {
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; CHECK-LABEL: @pr58750(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP186_NOT:%.*]] = icmp eq i16 [[A:%.*]], 0
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; CHECK-NEXT: call void @llvm.assume(i1 [[CMP186_NOT]])
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; CHECK-NEXT: br label [[OUTER_HEADER:%.*]]
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; CHECK: outer.header:
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; CHECK-NEXT: [[P_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LCSSA:%.*]], [[OUTER_LATCH:%.*]] ]
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; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[P_0]], 0
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; CHECK-NEXT: br label [[INNER:%.*]]
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; CHECK: inner:
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; CHECK-NEXT: store i16 0, ptr [[DST:%.*]], align 1
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; CHECK-NEXT: br i1 false, label [[INNER]], label [[OUTER_LATCH]]
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; CHECK: outer.latch:
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; CHECK-NEXT: [[LCSSA]] = phi i32 [ [[XOR]], [[INNER]] ]
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; CHECK-NEXT: br i1 [[C_0:%.*]], label [[OUTER_HEADER]], label [[EXIT:%.*]]
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; CHECK: exit:
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; CHECK-NEXT: [[LCSSA_LCSSA:%.*]] = phi i32 [ [[LCSSA]], [[OUTER_LATCH]] ]
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; CHECK-NEXT: ret i32 [[LCSSA_LCSSA]]
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;
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entry:
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%cmp186.not = icmp eq i16 %a, 0
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call void @llvm.assume(i1 %cmp186.not)
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br label %outer.header
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outer.header:
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%p.0 = phi i32 [ 0, %entry ], [ %lcssa, %outer.latch ]
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br label %inner
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inner:
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%inner.iv = phi i16 [ 0, %outer.header ], [ %inner.iv.next, %inner ]
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%p.1 = phi i32 [ %p.0, %outer.header ], [ %xor, %inner ]
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store i16 %inner.iv, ptr %dst, align 1
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%conv = sext i16 %inner.iv to i32
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%xor = xor i32 %p.1, %conv
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%inner.iv.next = add nuw i16 %inner.iv, 1
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%c.1 = icmp ult i16 %inner.iv.next, %a
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br i1 %c.1, label %inner, label %outer.latch
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outer.latch:
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%lcssa = phi i32 [ %xor, %inner ]
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br i1 %c.0, label %outer.header, label %exit
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exit:
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ret i32 %lcssa
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}
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; Function Attrs: inaccessiblememonly nocallback nofree nosync nounwind willreturn
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declare void @llvm.assume(i1 noundef) #1
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