532 lines
31 KiB
LLVM
532 lines
31 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
|
|
; RUN: opt -mtriple=amdgcn-amd-amdhsa -S -atomic-expand %s | FileCheck %s
|
|
; RUN: opt -mtriple=r600-mesa-mesa3d -S -atomic-expand %s | FileCheck %s
|
|
|
|
target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5"
|
|
|
|
define i16 @test_atomicrmw_xchg_i16_global(ptr addrspace(1) %ptr, i16 %value) {
|
|
; CHECK-LABEL: @test_atomicrmw_xchg_i16_global(
|
|
; CHECK-NEXT: [[ALIGNEDADDR:%.*]] = call ptr addrspace(1) @llvm.ptrmask.p1.i64(ptr addrspace(1) [[PTR:%.*]], i64 -4)
|
|
; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr addrspace(1) [[PTR]] to i64
|
|
; CHECK-NEXT: [[PTRLSB:%.*]] = and i64 [[TMP1]], 3
|
|
; CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[PTRLSB]], 3
|
|
; CHECK-NEXT: [[SHIFTAMT:%.*]] = trunc i64 [[TMP2]] to i32
|
|
; CHECK-NEXT: [[MASK:%.*]] = shl i32 65535, [[SHIFTAMT]]
|
|
; CHECK-NEXT: [[INV_MASK:%.*]] = xor i32 [[MASK]], -1
|
|
; CHECK-NEXT: [[TMP3:%.*]] = zext i16 [[VALUE:%.*]] to i32
|
|
; CHECK-NEXT: [[VALOPERAND_SHIFTED:%.*]] = shl i32 [[TMP3]], [[SHIFTAMT]]
|
|
; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr addrspace(1) [[ALIGNEDADDR]], align 4
|
|
; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]
|
|
; CHECK: atomicrmw.start:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP4]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], [[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP5:%.*]] = and i32 [[LOADED]], [[INV_MASK]]
|
|
; CHECK-NEXT: [[TMP6:%.*]] = or i32 [[TMP5]], [[VALOPERAND_SHIFTED]]
|
|
; CHECK-NEXT: [[TMP7:%.*]] = cmpxchg ptr addrspace(1) [[ALIGNEDADDR]], i32 [[LOADED]], i32 [[TMP6]] seq_cst seq_cst, align 4
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
|
|
; CHECK: atomicrmw.end:
|
|
; CHECK-NEXT: [[SHIFTED:%.*]] = lshr i32 [[NEWLOADED]], [[SHIFTAMT]]
|
|
; CHECK-NEXT: [[EXTRACTED:%.*]] = trunc i32 [[SHIFTED]] to i16
|
|
; CHECK-NEXT: ret i16 [[EXTRACTED]]
|
|
;
|
|
%res = atomicrmw xchg ptr addrspace(1) %ptr, i16 %value seq_cst
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @test_atomicrmw_xchg_i16_global_align4(ptr addrspace(1) %ptr, i16 %value) {
|
|
; CHECK-LABEL: @test_atomicrmw_xchg_i16_global_align4(
|
|
; CHECK-NEXT: [[TMP1:%.*]] = zext i16 [[VALUE:%.*]] to i32
|
|
; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(1) [[PTR:%.*]], align 4
|
|
; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]
|
|
; CHECK: atomicrmw.start:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], [[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[LOADED]], -65536
|
|
; CHECK-NEXT: [[TMP4:%.*]] = or i32 [[TMP3]], [[TMP1]]
|
|
; CHECK-NEXT: [[TMP5:%.*]] = cmpxchg ptr addrspace(1) [[PTR]], i32 [[LOADED]], i32 [[TMP4]] seq_cst seq_cst, align 4
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP5]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP5]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
|
|
; CHECK: atomicrmw.end:
|
|
; CHECK-NEXT: [[EXTRACTED:%.*]] = trunc i32 [[NEWLOADED]] to i16
|
|
; CHECK-NEXT: ret i16 [[EXTRACTED]]
|
|
;
|
|
%res = atomicrmw xchg ptr addrspace(1) %ptr, i16 %value seq_cst, align 4
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @test_atomicrmw_add_i16_global(ptr addrspace(1) %ptr, i16 %value) {
|
|
; CHECK-LABEL: @test_atomicrmw_add_i16_global(
|
|
; CHECK-NEXT: [[ALIGNEDADDR:%.*]] = call ptr addrspace(1) @llvm.ptrmask.p1.i64(ptr addrspace(1) [[PTR:%.*]], i64 -4)
|
|
; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr addrspace(1) [[PTR]] to i64
|
|
; CHECK-NEXT: [[PTRLSB:%.*]] = and i64 [[TMP1]], 3
|
|
; CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[PTRLSB]], 3
|
|
; CHECK-NEXT: [[SHIFTAMT:%.*]] = trunc i64 [[TMP2]] to i32
|
|
; CHECK-NEXT: [[MASK:%.*]] = shl i32 65535, [[SHIFTAMT]]
|
|
; CHECK-NEXT: [[INV_MASK:%.*]] = xor i32 [[MASK]], -1
|
|
; CHECK-NEXT: [[TMP3:%.*]] = zext i16 [[VALUE:%.*]] to i32
|
|
; CHECK-NEXT: [[VALOPERAND_SHIFTED:%.*]] = shl i32 [[TMP3]], [[SHIFTAMT]]
|
|
; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr addrspace(1) [[ALIGNEDADDR]], align 4
|
|
; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]
|
|
; CHECK: atomicrmw.start:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP4]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], [[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[NEW:%.*]] = add i32 [[LOADED]], [[VALOPERAND_SHIFTED]]
|
|
; CHECK-NEXT: [[TMP5:%.*]] = and i32 [[NEW]], [[MASK]]
|
|
; CHECK-NEXT: [[TMP6:%.*]] = and i32 [[LOADED]], [[INV_MASK]]
|
|
; CHECK-NEXT: [[TMP7:%.*]] = or i32 [[TMP6]], [[TMP5]]
|
|
; CHECK-NEXT: [[TMP8:%.*]] = cmpxchg ptr addrspace(1) [[ALIGNEDADDR]], i32 [[LOADED]], i32 [[TMP7]] seq_cst seq_cst, align 4
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP8]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP8]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
|
|
; CHECK: atomicrmw.end:
|
|
; CHECK-NEXT: [[SHIFTED:%.*]] = lshr i32 [[NEWLOADED]], [[SHIFTAMT]]
|
|
; CHECK-NEXT: [[EXTRACTED:%.*]] = trunc i32 [[SHIFTED]] to i16
|
|
; CHECK-NEXT: ret i16 [[EXTRACTED]]
|
|
;
|
|
%res = atomicrmw add ptr addrspace(1) %ptr, i16 %value seq_cst
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @test_atomicrmw_add_i16_global_align4(ptr addrspace(1) %ptr, i16 %value) {
|
|
; CHECK-LABEL: @test_atomicrmw_add_i16_global_align4(
|
|
; CHECK-NEXT: [[TMP1:%.*]] = zext i16 [[VALUE:%.*]] to i32
|
|
; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(1) [[PTR:%.*]], align 4
|
|
; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]
|
|
; CHECK: atomicrmw.start:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP2]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], [[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[NEW:%.*]] = add i32 [[LOADED]], [[TMP1]]
|
|
; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[NEW]], 65535
|
|
; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[LOADED]], -65536
|
|
; CHECK-NEXT: [[TMP5:%.*]] = or i32 [[TMP4]], [[TMP3]]
|
|
; CHECK-NEXT: [[TMP6:%.*]] = cmpxchg ptr addrspace(1) [[PTR]], i32 [[LOADED]], i32 [[TMP5]] seq_cst seq_cst, align 4
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP6]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP6]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
|
|
; CHECK: atomicrmw.end:
|
|
; CHECK-NEXT: [[EXTRACTED:%.*]] = trunc i32 [[NEWLOADED]] to i16
|
|
; CHECK-NEXT: ret i16 [[EXTRACTED]]
|
|
;
|
|
%res = atomicrmw add ptr addrspace(1) %ptr, i16 %value seq_cst, align 4
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @test_atomicrmw_sub_i16_global(ptr addrspace(1) %ptr, i16 %value) {
|
|
; CHECK-LABEL: @test_atomicrmw_sub_i16_global(
|
|
; CHECK-NEXT: [[ALIGNEDADDR:%.*]] = call ptr addrspace(1) @llvm.ptrmask.p1.i64(ptr addrspace(1) [[PTR:%.*]], i64 -4)
|
|
; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr addrspace(1) [[PTR]] to i64
|
|
; CHECK-NEXT: [[PTRLSB:%.*]] = and i64 [[TMP1]], 3
|
|
; CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[PTRLSB]], 3
|
|
; CHECK-NEXT: [[SHIFTAMT:%.*]] = trunc i64 [[TMP2]] to i32
|
|
; CHECK-NEXT: [[MASK:%.*]] = shl i32 65535, [[SHIFTAMT]]
|
|
; CHECK-NEXT: [[INV_MASK:%.*]] = xor i32 [[MASK]], -1
|
|
; CHECK-NEXT: [[TMP3:%.*]] = zext i16 [[VALUE:%.*]] to i32
|
|
; CHECK-NEXT: [[VALOPERAND_SHIFTED:%.*]] = shl i32 [[TMP3]], [[SHIFTAMT]]
|
|
; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr addrspace(1) [[ALIGNEDADDR]], align 4
|
|
; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]
|
|
; CHECK: atomicrmw.start:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP4]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], [[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[NEW:%.*]] = sub i32 [[LOADED]], [[VALOPERAND_SHIFTED]]
|
|
; CHECK-NEXT: [[TMP5:%.*]] = and i32 [[NEW]], [[MASK]]
|
|
; CHECK-NEXT: [[TMP6:%.*]] = and i32 [[LOADED]], [[INV_MASK]]
|
|
; CHECK-NEXT: [[TMP7:%.*]] = or i32 [[TMP6]], [[TMP5]]
|
|
; CHECK-NEXT: [[TMP8:%.*]] = cmpxchg ptr addrspace(1) [[ALIGNEDADDR]], i32 [[LOADED]], i32 [[TMP7]] seq_cst seq_cst, align 4
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP8]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP8]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
|
|
; CHECK: atomicrmw.end:
|
|
; CHECK-NEXT: [[SHIFTED:%.*]] = lshr i32 [[NEWLOADED]], [[SHIFTAMT]]
|
|
; CHECK-NEXT: [[EXTRACTED:%.*]] = trunc i32 [[SHIFTED]] to i16
|
|
; CHECK-NEXT: ret i16 [[EXTRACTED]]
|
|
;
|
|
%res = atomicrmw sub ptr addrspace(1) %ptr, i16 %value seq_cst
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @test_atomicrmw_and_i16_global(ptr addrspace(1) %ptr, i16 %value) {
|
|
; CHECK-LABEL: @test_atomicrmw_and_i16_global(
|
|
; CHECK-NEXT: [[ALIGNEDADDR:%.*]] = call ptr addrspace(1) @llvm.ptrmask.p1.i64(ptr addrspace(1) [[PTR:%.*]], i64 -4)
|
|
; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr addrspace(1) [[PTR]] to i64
|
|
; CHECK-NEXT: [[PTRLSB:%.*]] = and i64 [[TMP1]], 3
|
|
; CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[PTRLSB]], 3
|
|
; CHECK-NEXT: [[SHIFTAMT:%.*]] = trunc i64 [[TMP2]] to i32
|
|
; CHECK-NEXT: [[MASK:%.*]] = shl i32 65535, [[SHIFTAMT]]
|
|
; CHECK-NEXT: [[INV_MASK:%.*]] = xor i32 [[MASK]], -1
|
|
; CHECK-NEXT: [[TMP3:%.*]] = zext i16 [[VALUE:%.*]] to i32
|
|
; CHECK-NEXT: [[VALOPERAND_SHIFTED:%.*]] = shl i32 [[TMP3]], [[SHIFTAMT]]
|
|
; CHECK-NEXT: [[ANDOPERAND:%.*]] = or i32 [[INV_MASK]], [[VALOPERAND_SHIFTED]]
|
|
; CHECK-NEXT: [[TMP4:%.*]] = atomicrmw and ptr addrspace(1) [[ALIGNEDADDR]], i32 [[ANDOPERAND]] seq_cst, align 4
|
|
; CHECK-NEXT: [[SHIFTED:%.*]] = lshr i32 [[TMP4]], [[SHIFTAMT]]
|
|
; CHECK-NEXT: [[EXTRACTED:%.*]] = trunc i32 [[SHIFTED]] to i16
|
|
; CHECK-NEXT: ret i16 [[EXTRACTED]]
|
|
;
|
|
%res = atomicrmw and ptr addrspace(1) %ptr, i16 %value seq_cst
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @test_atomicrmw_nand_i16_global(ptr addrspace(1) %ptr, i16 %value) {
|
|
; CHECK-LABEL: @test_atomicrmw_nand_i16_global(
|
|
; CHECK-NEXT: [[ALIGNEDADDR:%.*]] = call ptr addrspace(1) @llvm.ptrmask.p1.i64(ptr addrspace(1) [[PTR:%.*]], i64 -4)
|
|
; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr addrspace(1) [[PTR]] to i64
|
|
; CHECK-NEXT: [[PTRLSB:%.*]] = and i64 [[TMP1]], 3
|
|
; CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[PTRLSB]], 3
|
|
; CHECK-NEXT: [[SHIFTAMT:%.*]] = trunc i64 [[TMP2]] to i32
|
|
; CHECK-NEXT: [[MASK:%.*]] = shl i32 65535, [[SHIFTAMT]]
|
|
; CHECK-NEXT: [[INV_MASK:%.*]] = xor i32 [[MASK]], -1
|
|
; CHECK-NEXT: [[TMP3:%.*]] = zext i16 [[VALUE:%.*]] to i32
|
|
; CHECK-NEXT: [[VALOPERAND_SHIFTED:%.*]] = shl i32 [[TMP3]], [[SHIFTAMT]]
|
|
; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr addrspace(1) [[ALIGNEDADDR]], align 4
|
|
; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]
|
|
; CHECK: atomicrmw.start:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP4]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], [[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP5:%.*]] = and i32 [[LOADED]], [[VALOPERAND_SHIFTED]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = xor i32 [[TMP5]], -1
|
|
; CHECK-NEXT: [[TMP6:%.*]] = and i32 [[NEW]], [[MASK]]
|
|
; CHECK-NEXT: [[TMP7:%.*]] = and i32 [[LOADED]], [[INV_MASK]]
|
|
; CHECK-NEXT: [[TMP8:%.*]] = or i32 [[TMP7]], [[TMP6]]
|
|
; CHECK-NEXT: [[TMP9:%.*]] = cmpxchg ptr addrspace(1) [[ALIGNEDADDR]], i32 [[LOADED]], i32 [[TMP8]] seq_cst seq_cst, align 4
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP9]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP9]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
|
|
; CHECK: atomicrmw.end:
|
|
; CHECK-NEXT: [[SHIFTED:%.*]] = lshr i32 [[NEWLOADED]], [[SHIFTAMT]]
|
|
; CHECK-NEXT: [[EXTRACTED:%.*]] = trunc i32 [[SHIFTED]] to i16
|
|
; CHECK-NEXT: ret i16 [[EXTRACTED]]
|
|
;
|
|
%res = atomicrmw nand ptr addrspace(1) %ptr, i16 %value seq_cst
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @test_atomicrmw_or_i16_global(ptr addrspace(1) %ptr, i16 %value) {
|
|
; CHECK-LABEL: @test_atomicrmw_or_i16_global(
|
|
; CHECK-NEXT: [[ALIGNEDADDR:%.*]] = call ptr addrspace(1) @llvm.ptrmask.p1.i64(ptr addrspace(1) [[PTR:%.*]], i64 -4)
|
|
; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr addrspace(1) [[PTR]] to i64
|
|
; CHECK-NEXT: [[PTRLSB:%.*]] = and i64 [[TMP1]], 3
|
|
; CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[PTRLSB]], 3
|
|
; CHECK-NEXT: [[SHIFTAMT:%.*]] = trunc i64 [[TMP2]] to i32
|
|
; CHECK-NEXT: [[MASK:%.*]] = shl i32 65535, [[SHIFTAMT]]
|
|
; CHECK-NEXT: [[INV_MASK:%.*]] = xor i32 [[MASK]], -1
|
|
; CHECK-NEXT: [[TMP3:%.*]] = zext i16 [[VALUE:%.*]] to i32
|
|
; CHECK-NEXT: [[VALOPERAND_SHIFTED:%.*]] = shl i32 [[TMP3]], [[SHIFTAMT]]
|
|
; CHECK-NEXT: [[TMP4:%.*]] = atomicrmw or ptr addrspace(1) [[ALIGNEDADDR]], i32 [[VALOPERAND_SHIFTED]] seq_cst, align 4
|
|
; CHECK-NEXT: [[SHIFTED:%.*]] = lshr i32 [[TMP4]], [[SHIFTAMT]]
|
|
; CHECK-NEXT: [[EXTRACTED:%.*]] = trunc i32 [[SHIFTED]] to i16
|
|
; CHECK-NEXT: ret i16 [[EXTRACTED]]
|
|
;
|
|
%res = atomicrmw or ptr addrspace(1) %ptr, i16 %value seq_cst
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @test_atomicrmw_xor_i16_global(ptr addrspace(1) %ptr, i16 %value) {
|
|
; CHECK-LABEL: @test_atomicrmw_xor_i16_global(
|
|
; CHECK-NEXT: [[ALIGNEDADDR:%.*]] = call ptr addrspace(1) @llvm.ptrmask.p1.i64(ptr addrspace(1) [[PTR:%.*]], i64 -4)
|
|
; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr addrspace(1) [[PTR]] to i64
|
|
; CHECK-NEXT: [[PTRLSB:%.*]] = and i64 [[TMP1]], 3
|
|
; CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[PTRLSB]], 3
|
|
; CHECK-NEXT: [[SHIFTAMT:%.*]] = trunc i64 [[TMP2]] to i32
|
|
; CHECK-NEXT: [[MASK:%.*]] = shl i32 65535, [[SHIFTAMT]]
|
|
; CHECK-NEXT: [[INV_MASK:%.*]] = xor i32 [[MASK]], -1
|
|
; CHECK-NEXT: [[TMP3:%.*]] = zext i16 [[VALUE:%.*]] to i32
|
|
; CHECK-NEXT: [[VALOPERAND_SHIFTED:%.*]] = shl i32 [[TMP3]], [[SHIFTAMT]]
|
|
; CHECK-NEXT: [[TMP4:%.*]] = atomicrmw xor ptr addrspace(1) [[ALIGNEDADDR]], i32 [[VALOPERAND_SHIFTED]] seq_cst, align 4
|
|
; CHECK-NEXT: [[SHIFTED:%.*]] = lshr i32 [[TMP4]], [[SHIFTAMT]]
|
|
; CHECK-NEXT: [[EXTRACTED:%.*]] = trunc i32 [[SHIFTED]] to i16
|
|
; CHECK-NEXT: ret i16 [[EXTRACTED]]
|
|
;
|
|
%res = atomicrmw xor ptr addrspace(1) %ptr, i16 %value seq_cst
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @test_atomicrmw_max_i16_global(ptr addrspace(1) %ptr, i16 %value) {
|
|
; CHECK-LABEL: @test_atomicrmw_max_i16_global(
|
|
; CHECK-NEXT: [[ALIGNEDADDR:%.*]] = call ptr addrspace(1) @llvm.ptrmask.p1.i64(ptr addrspace(1) [[PTR:%.*]], i64 -4)
|
|
; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr addrspace(1) [[PTR]] to i64
|
|
; CHECK-NEXT: [[PTRLSB:%.*]] = and i64 [[TMP1]], 3
|
|
; CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[PTRLSB]], 3
|
|
; CHECK-NEXT: [[SHIFTAMT:%.*]] = trunc i64 [[TMP2]] to i32
|
|
; CHECK-NEXT: [[MASK:%.*]] = shl i32 65535, [[SHIFTAMT]]
|
|
; CHECK-NEXT: [[INV_MASK:%.*]] = xor i32 [[MASK]], -1
|
|
; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr addrspace(1) [[ALIGNEDADDR]], align 4
|
|
; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]
|
|
; CHECK: atomicrmw.start:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP3]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], [[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[SHIFTED:%.*]] = lshr i32 [[LOADED]], [[SHIFTAMT]]
|
|
; CHECK-NEXT: [[EXTRACTED:%.*]] = trunc i32 [[SHIFTED]] to i16
|
|
; CHECK-NEXT: [[TMP4:%.*]] = icmp sgt i16 [[EXTRACTED]], [[VALUE:%.*]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP4]], i16 [[EXTRACTED]], i16 [[VALUE]]
|
|
; CHECK-NEXT: [[EXTENDED:%.*]] = zext i16 [[NEW]] to i32
|
|
; CHECK-NEXT: [[SHIFTED2:%.*]] = shl nuw i32 [[EXTENDED]], [[SHIFTAMT]]
|
|
; CHECK-NEXT: [[UNMASKED:%.*]] = and i32 [[LOADED]], [[INV_MASK]]
|
|
; CHECK-NEXT: [[INSERTED:%.*]] = or i32 [[UNMASKED]], [[SHIFTED2]]
|
|
; CHECK-NEXT: [[TMP5:%.*]] = cmpxchg ptr addrspace(1) [[ALIGNEDADDR]], i32 [[LOADED]], i32 [[INSERTED]] seq_cst seq_cst, align 4
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP5]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP5]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
|
|
; CHECK: atomicrmw.end:
|
|
; CHECK-NEXT: [[SHIFTED3:%.*]] = lshr i32 [[NEWLOADED]], [[SHIFTAMT]]
|
|
; CHECK-NEXT: [[EXTRACTED4:%.*]] = trunc i32 [[SHIFTED3]] to i16
|
|
; CHECK-NEXT: ret i16 [[EXTRACTED4]]
|
|
;
|
|
%res = atomicrmw max ptr addrspace(1) %ptr, i16 %value seq_cst
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @test_atomicrmw_min_i16_global(ptr addrspace(1) %ptr, i16 %value) {
|
|
; CHECK-LABEL: @test_atomicrmw_min_i16_global(
|
|
; CHECK-NEXT: [[ALIGNEDADDR:%.*]] = call ptr addrspace(1) @llvm.ptrmask.p1.i64(ptr addrspace(1) [[PTR:%.*]], i64 -4)
|
|
; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr addrspace(1) [[PTR]] to i64
|
|
; CHECK-NEXT: [[PTRLSB:%.*]] = and i64 [[TMP1]], 3
|
|
; CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[PTRLSB]], 3
|
|
; CHECK-NEXT: [[SHIFTAMT:%.*]] = trunc i64 [[TMP2]] to i32
|
|
; CHECK-NEXT: [[MASK:%.*]] = shl i32 65535, [[SHIFTAMT]]
|
|
; CHECK-NEXT: [[INV_MASK:%.*]] = xor i32 [[MASK]], -1
|
|
; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr addrspace(1) [[ALIGNEDADDR]], align 4
|
|
; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]
|
|
; CHECK: atomicrmw.start:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP3]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], [[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[SHIFTED:%.*]] = lshr i32 [[LOADED]], [[SHIFTAMT]]
|
|
; CHECK-NEXT: [[EXTRACTED:%.*]] = trunc i32 [[SHIFTED]] to i16
|
|
; CHECK-NEXT: [[TMP4:%.*]] = icmp sle i16 [[EXTRACTED]], [[VALUE:%.*]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP4]], i16 [[EXTRACTED]], i16 [[VALUE]]
|
|
; CHECK-NEXT: [[EXTENDED:%.*]] = zext i16 [[NEW]] to i32
|
|
; CHECK-NEXT: [[SHIFTED2:%.*]] = shl nuw i32 [[EXTENDED]], [[SHIFTAMT]]
|
|
; CHECK-NEXT: [[UNMASKED:%.*]] = and i32 [[LOADED]], [[INV_MASK]]
|
|
; CHECK-NEXT: [[INSERTED:%.*]] = or i32 [[UNMASKED]], [[SHIFTED2]]
|
|
; CHECK-NEXT: [[TMP5:%.*]] = cmpxchg ptr addrspace(1) [[ALIGNEDADDR]], i32 [[LOADED]], i32 [[INSERTED]] seq_cst seq_cst, align 4
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP5]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP5]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
|
|
; CHECK: atomicrmw.end:
|
|
; CHECK-NEXT: [[SHIFTED3:%.*]] = lshr i32 [[NEWLOADED]], [[SHIFTAMT]]
|
|
; CHECK-NEXT: [[EXTRACTED4:%.*]] = trunc i32 [[SHIFTED3]] to i16
|
|
; CHECK-NEXT: ret i16 [[EXTRACTED4]]
|
|
;
|
|
%res = atomicrmw min ptr addrspace(1) %ptr, i16 %value seq_cst
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @test_atomicrmw_umax_i16_global(ptr addrspace(1) %ptr, i16 %value) {
|
|
; CHECK-LABEL: @test_atomicrmw_umax_i16_global(
|
|
; CHECK-NEXT: [[ALIGNEDADDR:%.*]] = call ptr addrspace(1) @llvm.ptrmask.p1.i64(ptr addrspace(1) [[PTR:%.*]], i64 -4)
|
|
; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr addrspace(1) [[PTR]] to i64
|
|
; CHECK-NEXT: [[PTRLSB:%.*]] = and i64 [[TMP1]], 3
|
|
; CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[PTRLSB]], 3
|
|
; CHECK-NEXT: [[SHIFTAMT:%.*]] = trunc i64 [[TMP2]] to i32
|
|
; CHECK-NEXT: [[MASK:%.*]] = shl i32 65535, [[SHIFTAMT]]
|
|
; CHECK-NEXT: [[INV_MASK:%.*]] = xor i32 [[MASK]], -1
|
|
; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr addrspace(1) [[ALIGNEDADDR]], align 4
|
|
; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]
|
|
; CHECK: atomicrmw.start:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP3]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], [[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[SHIFTED:%.*]] = lshr i32 [[LOADED]], [[SHIFTAMT]]
|
|
; CHECK-NEXT: [[EXTRACTED:%.*]] = trunc i32 [[SHIFTED]] to i16
|
|
; CHECK-NEXT: [[TMP4:%.*]] = icmp ugt i16 [[EXTRACTED]], [[VALUE:%.*]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP4]], i16 [[EXTRACTED]], i16 [[VALUE]]
|
|
; CHECK-NEXT: [[EXTENDED:%.*]] = zext i16 [[NEW]] to i32
|
|
; CHECK-NEXT: [[SHIFTED2:%.*]] = shl nuw i32 [[EXTENDED]], [[SHIFTAMT]]
|
|
; CHECK-NEXT: [[UNMASKED:%.*]] = and i32 [[LOADED]], [[INV_MASK]]
|
|
; CHECK-NEXT: [[INSERTED:%.*]] = or i32 [[UNMASKED]], [[SHIFTED2]]
|
|
; CHECK-NEXT: [[TMP5:%.*]] = cmpxchg ptr addrspace(1) [[ALIGNEDADDR]], i32 [[LOADED]], i32 [[INSERTED]] seq_cst seq_cst, align 4
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP5]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP5]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
|
|
; CHECK: atomicrmw.end:
|
|
; CHECK-NEXT: [[SHIFTED3:%.*]] = lshr i32 [[NEWLOADED]], [[SHIFTAMT]]
|
|
; CHECK-NEXT: [[EXTRACTED4:%.*]] = trunc i32 [[SHIFTED3]] to i16
|
|
; CHECK-NEXT: ret i16 [[EXTRACTED4]]
|
|
;
|
|
%res = atomicrmw umax ptr addrspace(1) %ptr, i16 %value seq_cst
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @test_atomicrmw_umin_i16_global(ptr addrspace(1) %ptr, i16 %value) {
|
|
; CHECK-LABEL: @test_atomicrmw_umin_i16_global(
|
|
; CHECK-NEXT: [[ALIGNEDADDR:%.*]] = call ptr addrspace(1) @llvm.ptrmask.p1.i64(ptr addrspace(1) [[PTR:%.*]], i64 -4)
|
|
; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr addrspace(1) [[PTR]] to i64
|
|
; CHECK-NEXT: [[PTRLSB:%.*]] = and i64 [[TMP1]], 3
|
|
; CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[PTRLSB]], 3
|
|
; CHECK-NEXT: [[SHIFTAMT:%.*]] = trunc i64 [[TMP2]] to i32
|
|
; CHECK-NEXT: [[MASK:%.*]] = shl i32 65535, [[SHIFTAMT]]
|
|
; CHECK-NEXT: [[INV_MASK:%.*]] = xor i32 [[MASK]], -1
|
|
; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr addrspace(1) [[ALIGNEDADDR]], align 4
|
|
; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]
|
|
; CHECK: atomicrmw.start:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP3]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], [[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[SHIFTED:%.*]] = lshr i32 [[LOADED]], [[SHIFTAMT]]
|
|
; CHECK-NEXT: [[EXTRACTED:%.*]] = trunc i32 [[SHIFTED]] to i16
|
|
; CHECK-NEXT: [[TMP4:%.*]] = icmp ule i16 [[EXTRACTED]], [[VALUE:%.*]]
|
|
; CHECK-NEXT: [[NEW:%.*]] = select i1 [[TMP4]], i16 [[EXTRACTED]], i16 [[VALUE]]
|
|
; CHECK-NEXT: [[EXTENDED:%.*]] = zext i16 [[NEW]] to i32
|
|
; CHECK-NEXT: [[SHIFTED2:%.*]] = shl nuw i32 [[EXTENDED]], [[SHIFTAMT]]
|
|
; CHECK-NEXT: [[UNMASKED:%.*]] = and i32 [[LOADED]], [[INV_MASK]]
|
|
; CHECK-NEXT: [[INSERTED:%.*]] = or i32 [[UNMASKED]], [[SHIFTED2]]
|
|
; CHECK-NEXT: [[TMP5:%.*]] = cmpxchg ptr addrspace(1) [[ALIGNEDADDR]], i32 [[LOADED]], i32 [[INSERTED]] seq_cst seq_cst, align 4
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP5]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP5]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
|
|
; CHECK: atomicrmw.end:
|
|
; CHECK-NEXT: [[SHIFTED3:%.*]] = lshr i32 [[NEWLOADED]], [[SHIFTAMT]]
|
|
; CHECK-NEXT: [[EXTRACTED4:%.*]] = trunc i32 [[SHIFTED3]] to i16
|
|
; CHECK-NEXT: ret i16 [[EXTRACTED4]]
|
|
;
|
|
%res = atomicrmw umin ptr addrspace(1) %ptr, i16 %value seq_cst
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @test_cmpxchg_i16_global(ptr addrspace(1) %out, i16 %in, i16 %old) {
|
|
; CHECK-LABEL: @test_cmpxchg_i16_global(
|
|
; CHECK-NEXT: [[GEP:%.*]] = getelementptr i16, ptr addrspace(1) [[OUT:%.*]], i64 4
|
|
; CHECK-NEXT: [[ALIGNEDADDR:%.*]] = call ptr addrspace(1) @llvm.ptrmask.p1.i64(ptr addrspace(1) [[GEP]], i64 -4)
|
|
; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr addrspace(1) [[GEP]] to i64
|
|
; CHECK-NEXT: [[PTRLSB:%.*]] = and i64 [[TMP1]], 3
|
|
; CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[PTRLSB]], 3
|
|
; CHECK-NEXT: [[SHIFTAMT:%.*]] = trunc i64 [[TMP2]] to i32
|
|
; CHECK-NEXT: [[MASK:%.*]] = shl i32 65535, [[SHIFTAMT]]
|
|
; CHECK-NEXT: [[INV_MASK:%.*]] = xor i32 [[MASK]], -1
|
|
; CHECK-NEXT: [[TMP3:%.*]] = zext i16 [[IN:%.*]] to i32
|
|
; CHECK-NEXT: [[TMP4:%.*]] = shl i32 [[TMP3]], [[SHIFTAMT]]
|
|
; CHECK-NEXT: [[TMP5:%.*]] = zext i16 [[OLD:%.*]] to i32
|
|
; CHECK-NEXT: [[TMP6:%.*]] = shl i32 [[TMP5]], [[SHIFTAMT]]
|
|
; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr addrspace(1) [[ALIGNEDADDR]], align 4
|
|
; CHECK-NEXT: [[TMP8:%.*]] = and i32 [[TMP7]], [[INV_MASK]]
|
|
; CHECK-NEXT: br label [[PARTWORD_CMPXCHG_LOOP:%.*]]
|
|
; CHECK: partword.cmpxchg.loop:
|
|
; CHECK-NEXT: [[TMP9:%.*]] = phi i32 [ [[TMP8]], [[TMP0:%.*]] ], [ [[TMP15:%.*]], [[PARTWORD_CMPXCHG_FAILURE:%.*]] ]
|
|
; CHECK-NEXT: [[TMP10:%.*]] = or i32 [[TMP9]], [[TMP4]]
|
|
; CHECK-NEXT: [[TMP11:%.*]] = or i32 [[TMP9]], [[TMP6]]
|
|
; CHECK-NEXT: [[TMP12:%.*]] = cmpxchg ptr addrspace(1) [[ALIGNEDADDR]], i32 [[TMP11]], i32 [[TMP10]] seq_cst seq_cst, align 4
|
|
; CHECK-NEXT: [[TMP13:%.*]] = extractvalue { i32, i1 } [[TMP12]], 0
|
|
; CHECK-NEXT: [[TMP14:%.*]] = extractvalue { i32, i1 } [[TMP12]], 1
|
|
; CHECK-NEXT: br i1 [[TMP14]], label [[PARTWORD_CMPXCHG_END:%.*]], label [[PARTWORD_CMPXCHG_FAILURE]]
|
|
; CHECK: partword.cmpxchg.failure:
|
|
; CHECK-NEXT: [[TMP15]] = and i32 [[TMP13]], [[INV_MASK]]
|
|
; CHECK-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP9]], [[TMP15]]
|
|
; CHECK-NEXT: br i1 [[TMP16]], label [[PARTWORD_CMPXCHG_LOOP]], label [[PARTWORD_CMPXCHG_END]]
|
|
; CHECK: partword.cmpxchg.end:
|
|
; CHECK-NEXT: [[SHIFTED:%.*]] = lshr i32 [[TMP13]], [[SHIFTAMT]]
|
|
; CHECK-NEXT: [[EXTRACTED:%.*]] = trunc i32 [[SHIFTED]] to i16
|
|
; CHECK-NEXT: [[TMP17:%.*]] = insertvalue { i16, i1 } poison, i16 [[EXTRACTED]], 0
|
|
; CHECK-NEXT: [[TMP18:%.*]] = insertvalue { i16, i1 } [[TMP17]], i1 [[TMP14]], 1
|
|
; CHECK-NEXT: [[EXTRACT:%.*]] = extractvalue { i16, i1 } [[TMP18]], 0
|
|
; CHECK-NEXT: ret i16 [[EXTRACT]]
|
|
;
|
|
%gep = getelementptr i16, ptr addrspace(1) %out, i64 4
|
|
%res = cmpxchg ptr addrspace(1) %gep, i16 %old, i16 %in seq_cst seq_cst
|
|
%extract = extractvalue {i16, i1} %res, 0
|
|
ret i16 %extract
|
|
}
|
|
|
|
define i16 @test_cmpxchg_i16_global_align4(ptr addrspace(1) %out, i16 %in, i16 %old) {
|
|
; CHECK-LABEL: @test_cmpxchg_i16_global_align4(
|
|
; CHECK-NEXT: [[GEP:%.*]] = getelementptr i16, ptr addrspace(1) [[OUT:%.*]], i64 4
|
|
; CHECK-NEXT: [[TMP1:%.*]] = zext i16 [[IN:%.*]] to i32
|
|
; CHECK-NEXT: [[TMP2:%.*]] = zext i16 [[OLD:%.*]] to i32
|
|
; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr addrspace(1) [[GEP]], align 4
|
|
; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[TMP3]], -65536
|
|
; CHECK-NEXT: br label [[PARTWORD_CMPXCHG_LOOP:%.*]]
|
|
; CHECK: partword.cmpxchg.loop:
|
|
; CHECK-NEXT: [[TMP5:%.*]] = phi i32 [ [[TMP4]], [[TMP0:%.*]] ], [ [[TMP11:%.*]], [[PARTWORD_CMPXCHG_FAILURE:%.*]] ]
|
|
; CHECK-NEXT: [[TMP6:%.*]] = or i32 [[TMP5]], [[TMP1]]
|
|
; CHECK-NEXT: [[TMP7:%.*]] = or i32 [[TMP5]], [[TMP2]]
|
|
; CHECK-NEXT: [[TMP8:%.*]] = cmpxchg ptr addrspace(1) [[GEP]], i32 [[TMP7]], i32 [[TMP6]] seq_cst seq_cst, align 4
|
|
; CHECK-NEXT: [[TMP9:%.*]] = extractvalue { i32, i1 } [[TMP8]], 0
|
|
; CHECK-NEXT: [[TMP10:%.*]] = extractvalue { i32, i1 } [[TMP8]], 1
|
|
; CHECK-NEXT: br i1 [[TMP10]], label [[PARTWORD_CMPXCHG_END:%.*]], label [[PARTWORD_CMPXCHG_FAILURE]]
|
|
; CHECK: partword.cmpxchg.failure:
|
|
; CHECK-NEXT: [[TMP11]] = and i32 [[TMP9]], -65536
|
|
; CHECK-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP5]], [[TMP11]]
|
|
; CHECK-NEXT: br i1 [[TMP12]], label [[PARTWORD_CMPXCHG_LOOP]], label [[PARTWORD_CMPXCHG_END]]
|
|
; CHECK: partword.cmpxchg.end:
|
|
; CHECK-NEXT: [[EXTRACTED:%.*]] = trunc i32 [[TMP9]] to i16
|
|
; CHECK-NEXT: [[TMP13:%.*]] = insertvalue { i16, i1 } poison, i16 [[EXTRACTED]], 0
|
|
; CHECK-NEXT: [[TMP14:%.*]] = insertvalue { i16, i1 } [[TMP13]], i1 [[TMP10]], 1
|
|
; CHECK-NEXT: [[EXTRACT:%.*]] = extractvalue { i16, i1 } [[TMP14]], 0
|
|
; CHECK-NEXT: ret i16 [[EXTRACT]]
|
|
;
|
|
%gep = getelementptr i16, ptr addrspace(1) %out, i64 4
|
|
%res = cmpxchg ptr addrspace(1) %gep, i16 %old, i16 %in seq_cst seq_cst, align 4
|
|
%extract = extractvalue {i16, i1} %res, 0
|
|
ret i16 %extract
|
|
}
|
|
|
|
define i16 @test_atomicrmw_xchg_i16_local(ptr addrspace(3) %ptr, i16 %value) {
|
|
; CHECK-LABEL: @test_atomicrmw_xchg_i16_local(
|
|
; CHECK-NEXT: [[ALIGNEDADDR:%.*]] = call ptr addrspace(3) @llvm.ptrmask.p3.i32(ptr addrspace(3) [[PTR:%.*]], i32 -4)
|
|
; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr addrspace(3) [[PTR]] to i32
|
|
; CHECK-NEXT: [[PTRLSB:%.*]] = and i32 [[TMP1]], 3
|
|
; CHECK-NEXT: [[TMP2:%.*]] = shl i32 [[PTRLSB]], 3
|
|
; CHECK-NEXT: [[MASK:%.*]] = shl i32 65535, [[TMP2]]
|
|
; CHECK-NEXT: [[INV_MASK:%.*]] = xor i32 [[MASK]], -1
|
|
; CHECK-NEXT: [[TMP3:%.*]] = zext i16 [[VALUE:%.*]] to i32
|
|
; CHECK-NEXT: [[VALOPERAND_SHIFTED:%.*]] = shl i32 [[TMP3]], [[TMP2]]
|
|
; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr addrspace(3) [[ALIGNEDADDR]], align 4
|
|
; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]
|
|
; CHECK: atomicrmw.start:
|
|
; CHECK-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP4]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], [[ATOMICRMW_START]] ]
|
|
; CHECK-NEXT: [[TMP5:%.*]] = and i32 [[LOADED]], [[INV_MASK]]
|
|
; CHECK-NEXT: [[TMP6:%.*]] = or i32 [[TMP5]], [[VALOPERAND_SHIFTED]]
|
|
; CHECK-NEXT: [[TMP7:%.*]] = cmpxchg ptr addrspace(3) [[ALIGNEDADDR]], i32 [[LOADED]], i32 [[TMP6]] seq_cst seq_cst, align 4
|
|
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP7]], 1
|
|
; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP7]], 0
|
|
; CHECK-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
|
|
; CHECK: atomicrmw.end:
|
|
; CHECK-NEXT: [[SHIFTED:%.*]] = lshr i32 [[NEWLOADED]], [[TMP2]]
|
|
; CHECK-NEXT: [[EXTRACTED:%.*]] = trunc i32 [[SHIFTED]] to i16
|
|
; CHECK-NEXT: ret i16 [[EXTRACTED]]
|
|
;
|
|
%res = atomicrmw xchg ptr addrspace(3) %ptr, i16 %value seq_cst
|
|
ret i16 %res
|
|
}
|
|
|
|
define i16 @test_cmpxchg_i16_local(ptr addrspace(3) %out, i16 %in, i16 %old) {
|
|
; CHECK-LABEL: @test_cmpxchg_i16_local(
|
|
; CHECK-NEXT: [[GEP:%.*]] = getelementptr i16, ptr addrspace(3) [[OUT:%.*]], i64 4
|
|
; CHECK-NEXT: [[ALIGNEDADDR:%.*]] = call ptr addrspace(3) @llvm.ptrmask.p3.i32(ptr addrspace(3) [[GEP]], i32 -4)
|
|
; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr addrspace(3) [[GEP]] to i32
|
|
; CHECK-NEXT: [[PTRLSB:%.*]] = and i32 [[TMP1]], 3
|
|
; CHECK-NEXT: [[TMP2:%.*]] = shl i32 [[PTRLSB]], 3
|
|
; CHECK-NEXT: [[MASK:%.*]] = shl i32 65535, [[TMP2]]
|
|
; CHECK-NEXT: [[INV_MASK:%.*]] = xor i32 [[MASK]], -1
|
|
; CHECK-NEXT: [[TMP3:%.*]] = zext i16 [[IN:%.*]] to i32
|
|
; CHECK-NEXT: [[TMP4:%.*]] = shl i32 [[TMP3]], [[TMP2]]
|
|
; CHECK-NEXT: [[TMP5:%.*]] = zext i16 [[OLD:%.*]] to i32
|
|
; CHECK-NEXT: [[TMP6:%.*]] = shl i32 [[TMP5]], [[TMP2]]
|
|
; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr addrspace(3) [[ALIGNEDADDR]], align 4
|
|
; CHECK-NEXT: [[TMP8:%.*]] = and i32 [[TMP7]], [[INV_MASK]]
|
|
; CHECK-NEXT: br label [[PARTWORD_CMPXCHG_LOOP:%.*]]
|
|
; CHECK: partword.cmpxchg.loop:
|
|
; CHECK-NEXT: [[TMP9:%.*]] = phi i32 [ [[TMP8]], [[TMP0:%.*]] ], [ [[TMP15:%.*]], [[PARTWORD_CMPXCHG_FAILURE:%.*]] ]
|
|
; CHECK-NEXT: [[TMP10:%.*]] = or i32 [[TMP9]], [[TMP4]]
|
|
; CHECK-NEXT: [[TMP11:%.*]] = or i32 [[TMP9]], [[TMP6]]
|
|
; CHECK-NEXT: [[TMP12:%.*]] = cmpxchg ptr addrspace(3) [[ALIGNEDADDR]], i32 [[TMP11]], i32 [[TMP10]] seq_cst seq_cst, align 4
|
|
; CHECK-NEXT: [[TMP13:%.*]] = extractvalue { i32, i1 } [[TMP12]], 0
|
|
; CHECK-NEXT: [[TMP14:%.*]] = extractvalue { i32, i1 } [[TMP12]], 1
|
|
; CHECK-NEXT: br i1 [[TMP14]], label [[PARTWORD_CMPXCHG_END:%.*]], label [[PARTWORD_CMPXCHG_FAILURE]]
|
|
; CHECK: partword.cmpxchg.failure:
|
|
; CHECK-NEXT: [[TMP15]] = and i32 [[TMP13]], [[INV_MASK]]
|
|
; CHECK-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP9]], [[TMP15]]
|
|
; CHECK-NEXT: br i1 [[TMP16]], label [[PARTWORD_CMPXCHG_LOOP]], label [[PARTWORD_CMPXCHG_END]]
|
|
; CHECK: partword.cmpxchg.end:
|
|
; CHECK-NEXT: [[SHIFTED:%.*]] = lshr i32 [[TMP13]], [[TMP2]]
|
|
; CHECK-NEXT: [[EXTRACTED:%.*]] = trunc i32 [[SHIFTED]] to i16
|
|
; CHECK-NEXT: [[TMP17:%.*]] = insertvalue { i16, i1 } poison, i16 [[EXTRACTED]], 0
|
|
; CHECK-NEXT: [[TMP18:%.*]] = insertvalue { i16, i1 } [[TMP17]], i1 [[TMP14]], 1
|
|
; CHECK-NEXT: [[EXTRACT:%.*]] = extractvalue { i16, i1 } [[TMP18]], 0
|
|
; CHECK-NEXT: ret i16 [[EXTRACT]]
|
|
;
|
|
%gep = getelementptr i16, ptr addrspace(3) %out, i64 4
|
|
%res = cmpxchg ptr addrspace(3) %gep, i16 %old, i16 %in seq_cst seq_cst
|
|
%extract = extractvalue {i16, i1} %res, 0
|
|
ret i16 %extract
|
|
}
|
|
|
|
define i16 @test_atomicrmw_xor_i16_local_align4(ptr addrspace(3) %ptr, i16 %value) {
|
|
; CHECK-LABEL: @test_atomicrmw_xor_i16_local_align4(
|
|
; CHECK-NEXT: [[TMP1:%.*]] = zext i16 [[VALUE:%.*]] to i32
|
|
; CHECK-NEXT: [[TMP2:%.*]] = atomicrmw xor ptr addrspace(3) [[PTR:%.*]], i32 [[TMP1]] seq_cst, align 4
|
|
; CHECK-NEXT: [[EXTRACTED:%.*]] = trunc i32 [[TMP2]] to i16
|
|
; CHECK-NEXT: ret i16 [[EXTRACTED]]
|
|
;
|
|
%res = atomicrmw xor ptr addrspace(3) %ptr, i16 %value seq_cst, align 4
|
|
ret i16 %res
|
|
}
|