450 lines
11 KiB
ArmAsm
450 lines
11 KiB
ArmAsm
# RUN: llvm-mc %s -triple=riscv32 -riscv-no-aliases -show-encoding \
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# RUN: | FileCheck -check-prefixes=CHECK-INST,CHECK-ENC %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 < %s \
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# RUN: | llvm-objdump -d - \
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# RUN: | FileCheck -check-prefix=CHECK-INST-ALIAS %s
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#
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# RUN: llvm-mc %s -triple=riscv64 -riscv-no-aliases -show-encoding \
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# RUN: | FileCheck -check-prefixes=CHECK-INST,CHECK-ENC %s
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# RUN: llvm-mc -filetype=obj -triple riscv64 < %s \
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# RUN: | llvm-objdump -d - \
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# RUN: | FileCheck -check-prefix=CHECK-INST-ALIAS %s
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##################################
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# Hypervisor Trap Setup
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##################################
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# hstatus
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# name
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# CHECK-INST: csrrs t1, hstatus, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x00,0x60]
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# CHECK-INST-ALIAS: csrr t1, hstatus
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# uimm12
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# CHECK-INST: csrrs t2, hstatus, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x00,0x60]
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# CHECK-INST-ALIAS: csrr t2, hstatus
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# name
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csrrs t1, hstatus, zero
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# uimm12
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csrrs t2, 0x600, zero
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# hedeleg
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# name
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# CHECK-INST: csrrs t1, hedeleg, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x20,0x60]
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# CHECK-INST-ALIAS: csrr t1, hedeleg
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# uimm12
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# CHECK-INST: csrrs t2, hedeleg, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x20,0x60]
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# CHECK-INST-ALIAS: csrr t2, hedeleg
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# name
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csrrs t1, hedeleg, zero
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# uimm12
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csrrs t2, 0x602, zero
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# hideleg
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# name
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# CHECK-INST: csrrs t1, hideleg, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x30,0x60]
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# CHECK-INST-ALIAS: csrr t1, hideleg
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# uimm12
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# CHECK-INST: csrrs t2, hideleg, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x30,0x60]
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# CHECK-INST-ALIAS: csrr t2, hideleg
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# name
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csrrs t1, hideleg, zero
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# uimm12
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csrrs t2, 0x603, zero
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# hie
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# name
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# CHECK-INST: csrrs t1, hie, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x40,0x60]
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# CHECK-INST-ALIAS: csrr t1, hie
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# uimm12
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# CHECK-INST: csrrs t2, hie, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x40,0x60]
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# CHECK-INST-ALIAS: csrr t2, hie
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# name
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csrrs t1, hie, zero
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# uimm12
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csrrs t2, 0x604, zero
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# hcounteren
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# name
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# CHECK-INST: csrrs t1, hcounteren, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x60,0x60]
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# CHECK-INST-ALIAS: csrr t1, hcounteren
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# uimm12
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# CHECK-INST: csrrs t2, hcounteren, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x60,0x60]
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# CHECK-INST-ALIAS: csrr t2, hcounteren
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# name
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csrrs t1, hcounteren, zero
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# uimm12
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csrrs t2, 0x606, zero
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# hgeie
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# name
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# CHECK-INST: csrrs t1, hgeie, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x70,0x60]
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# CHECK-INST-ALIAS: csrr t1, hgeie
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# uimm12
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# CHECK-INST: csrrs t2, hgeie, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x70,0x60]
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# CHECK-INST-ALIAS: csrr t2, hgeie
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# name
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csrrs t1, hgeie, zero
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# uimm12
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csrrs t2, 0x607, zero
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##################################
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# Hypervisor Trap Handling
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##################################
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# htval
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# name
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# CHECK-INST: csrrs t1, htval, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x30,0x64]
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# CHECK-INST-ALIAS: csrr t1, htval
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# uimm12
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# CHECK-INST: csrrs t2, htval, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x30,0x64]
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# CHECK-INST-ALIAS: csrr t2, htval
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# name
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csrrs t1, htval, zero
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# uimm12
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csrrs t2, 0x643, zero
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# hip
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# name
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# CHECK-INST: csrrs t1, hip, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x40,0x64]
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# CHECK-INST-ALIAS: csrr t1, hip
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# uimm12
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# CHECK-INST: csrrs t2, hip, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x40,0x64]
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# CHECK-INST-ALIAS: csrr t2, hip
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# name
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csrrs t1, hip, zero
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# uimm12
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csrrs t2, 0x644, zero
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# hvip
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# name
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# CHECK-INST: csrrs t1, hvip, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x50,0x64]
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# CHECK-INST-ALIAS: csrr t1, hvip
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# uimm12
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# CHECK-INST: csrrs t2, hvip, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x50,0x64]
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# CHECK-INST-ALIAS: csrr t2, hvip
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# name
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csrrs t1, hvip, zero
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# uimm12
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csrrs t2, 0x645, zero
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# htinst
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# name
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# CHECK-INST: csrrs t1, htinst, zero
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# CHECK-ENC: encoding: [0x73,0x23,0xa0,0x64]
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# CHECK-INST-ALIAS: csrr t1, htinst
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# uimm12
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# CHECK-INST: csrrs t2, htinst, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0xa0,0x64]
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# CHECK-INST-ALIAS: csrr t2, htinst
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# name
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csrrs t1, htinst, zero
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# uimm12
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csrrs t2, 0x64A, zero
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# hgeip
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# name
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# CHECK-INST: csrrs t1, hgeip, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x20,0xe1]
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# CHECK-INST-ALIAS: csrr t1, hgeip
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# uimm12
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# CHECK-INST: csrrs t2, hgeip, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x20,0xe1]
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# CHECK-INST-ALIAS: csrr t2, hgeip
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# name
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csrrs t1, hgeip, zero
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# uimm12
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csrrs t2, 0xE12, zero
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##################################
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# Hypervisor Configuration
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##################################
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# henvcfg
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# name
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# CHECK-INST: csrrs t1, henvcfg, zero
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# CHECK-ENC: encoding: [0x73,0x23,0xa0,0x60]
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# CHECK-INST-ALIAS: csrr t1, henvcfg
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# uimm12
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# CHECK-INST: csrrs t2, henvcfg, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0xa0,0x60]
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# CHECK-INST-ALIAS: csrr t2, henvcfg
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# name
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csrrs t1, henvcfg, zero
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# uimm12
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csrrs t2, 0x60A, zero
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########################################
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# Hypervisor Protection and Translation
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########################################
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# hgatp
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# name
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# CHECK-INST: csrrs t1, hgatp, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x00,0x68]
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# CHECK-INST-ALIAS: csrr t1, hgatp
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# uimm12
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# CHECK-INST: csrrs t2, hgatp, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x00,0x68]
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# CHECK-INST-ALIAS: csrr t2, hgatp
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# name
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csrrs t1, hgatp, zero
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# uimm12
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csrrs t2, 0x680, zero
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##########################
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# Debug/Trace Registers
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##########################
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# hcontext
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# name
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# CHECK-INST: csrrs t1, hcontext, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x80,0x6a]
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# CHECK-INST-ALIAS: csrr t1, hcontext
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# uimm12
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# CHECK-INST: csrrs t2, hcontext, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x80,0x6a]
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# CHECK-INST-ALIAS: csrr t2, hcontext
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# name
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csrrs t1, hcontext, zero
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# uimm12
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csrrs t2, 0x6A8, zero
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####################################################
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# Hypervisor Counter/Timer Virtualization Registers
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####################################################
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# htimedelta
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# name
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# CHECK-INST: csrrs t1, htimedelta, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x50,0x60]
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# CHECK-INST-ALIAS: csrr t1, htimedelta
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# uimm12
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# CHECK-INST: csrrs t2, htimedelta, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x50,0x60]
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# CHECK-INST-ALIAS: csrr t2, htimedelta
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# name
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csrrs t1, htimedelta, zero
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# uimm12
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csrrs t2, 0x605, zero
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################################
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# Virtual Supervisor Registers
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################################
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# vsstatus
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# name
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# CHECK-INST: csrrs t1, vsstatus, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x00,0x20]
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# CHECK-INST-ALIAS: csrr t1, vsstatus
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# uimm12
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# CHECK-INST: csrrs t2, vsstatus, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x00,0x20]
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# CHECK-INST-ALIAS: csrr t2, vsstatus
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# name
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csrrs t1, vsstatus, zero
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# uimm12
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csrrs t2, 0x200, zero
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# vsie
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# name
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# CHECK-INST: csrrs t1, vsie, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x40,0x20]
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# CHECK-INST-ALIAS: csrr t1, vsie
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# uimm12
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# CHECK-INST: csrrs t2, vsie, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x40,0x20]
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# CHECK-INST-ALIAS: csrr t2, vsie
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# name
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csrrs t1, vsie, zero
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# uimm12
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csrrs t2, 0x204, zero
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# vstvec
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# name
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# CHECK-INST: csrrs t1, vstvec, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x50,0x20]
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# CHECK-INST-ALIAS: csrr t1, vstvec
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# uimm12
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# CHECK-INST: csrrs t2, vstvec, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x50,0x20]
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# CHECK-INST-ALIAS: csrr t2, vstvec
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# name
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csrrs t1, vstvec, zero
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# uimm12
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csrrs t2, 0x205, zero
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# vsscratch
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# name
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# CHECK-INST: csrrs t1, vsscratch, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x00,0x24]
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# CHECK-INST-ALIAS: csrr t1, vsscratch
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# uimm12
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# CHECK-INST: csrrs t2, vsscratch, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x00,0x24]
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# CHECK-INST-ALIAS: csrr t2, vsscratch
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# name
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csrrs t1, vsscratch, zero
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# uimm12
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csrrs t2, 0x240, zero
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# vsepc
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# name
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# CHECK-INST: csrrs t1, vsepc, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x10,0x24]
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# CHECK-INST-ALIAS: csrr t1, vsepc
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# uimm12
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# CHECK-INST: csrrs t2, vsepc, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x10,0x24]
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# CHECK-INST-ALIAS: csrr t2, vsepc
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# name
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csrrs t1, vsepc, zero
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# uimm12
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csrrs t2, 0x241, zero
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# vscause
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# name
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# CHECK-INST: csrrs t1, vscause, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x20,0x24]
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# CHECK-INST-ALIAS: csrr t1, vscause
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# uimm12
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# CHECK-INST: csrrs t2, vscause, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x20,0x24]
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# CHECK-INST-ALIAS: csrr t2, vscause
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# name
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csrrs t1, vscause, zero
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# uimm12
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csrrs t2, 0x242, zero
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# vstval
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# name
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# CHECK-INST: csrrs t1, vstval, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x30,0x24]
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# CHECK-INST-ALIAS: csrr t1, vstval
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# uimm12
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# CHECK-INST: csrrs t2, vstval, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x30,0x24]
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# CHECK-INST-ALIAS: csrr t2, vstval
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# name
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csrrs t1, vstval, zero
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# uimm12
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csrrs t2, 0x243, zero
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# vsip
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# name
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# CHECK-INST: csrrs t1, vsip, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x40,0x24]
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# CHECK-INST-ALIAS: csrr t1, vsip
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# uimm12
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# CHECK-INST: csrrs t2, vsip, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x40,0x24]
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# CHECK-INST-ALIAS: csrr t2, vsip
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# name
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csrrs t1, vsip, zero
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# uimm12
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csrrs t2, 0x244, zero
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# vstimecmp
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# name
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# CHECK-INST: csrrs t1, vstimecmp, zero
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# CHECK-ENC: encoding: [0x73,0x23,0xd0,0x24]
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# CHECK-INST-ALIAS: csrr t1, vstimecmp
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# uimm12
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# CHECK-INST: csrrs t2, vstimecmp, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0xd0,0x24]
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# CHECK-INST-ALIAS: csrr t2, vstimecmp
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# name
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csrrs t1, vstimecmp, zero
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# uimm12
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csrrs t2, 0x24D, zero
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# vsatp
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# name
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# CHECK-INST: csrrs t1, vsatp, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x00,0x28]
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# CHECK-INST-ALIAS: csrr t1, vsatp
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# uimm12
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# CHECK-INST: csrrs t2, vsatp, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x00,0x28]
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# CHECK-INST-ALIAS: csrr t2, vsatp
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# name
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csrrs t1, vsatp, zero
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# uimm12
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csrrs t2, 0x280, zero
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#########################################
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# State Enable Extension (Smstateen)
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#########################################
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# hstateen0
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# name
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# CHECK-INST: csrrs t1, hstateen0, zero
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# CHECK-ENC: encoding: [0x73,0x23,0xc0,0x60]
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# CHECK-INST-ALIAS: csrr t1, hstateen0
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# uimm12
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# CHECK-INST: csrrs t2, hstateen0, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0xc0,0x60]
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# CHECK-INST-ALIAS: csrr t2, hstateen0
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# name
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csrrs t1, hstateen0, zero
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# uimm12
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csrrs t2, 0x60C, zero
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# hstateen1
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# name
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# CHECK-INST: csrrs t1, hstateen1, zero
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# CHECK-ENC: encoding: [0x73,0x23,0xd0,0x60]
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# CHECK-INST-ALIAS: csrr t1, hstateen1
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# uimm12
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# CHECK-INST: csrrs t2, hstateen1, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0xd0,0x60]
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# CHECK-INST-ALIAS: csrr t2, hstateen1
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# name
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csrrs t1, hstateen1, zero
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# uimm12
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csrrs t2, 0x60D, zero
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# hstateen2
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# name
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# CHECK-INST: csrrs t1, hstateen2, zero
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# CHECK-ENC: encoding: [0x73,0x23,0xe0,0x60]
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# CHECK-INST-ALIAS: csrr t1, hstateen2
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# uimm12
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# CHECK-INST: csrrs t2, hstateen2, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0xe0,0x60]
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# CHECK-INST-ALIAS: csrr t2, hstateen2
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# name
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csrrs t1, hstateen2, zero
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# uimm12
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csrrs t2, 0x60E, zero
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# hstateen3
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# name
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# CHECK-INST: csrrs t1, hstateen3, zero
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# CHECK-ENC: encoding: [0x73,0x23,0xf0,0x60]
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# CHECK-INST-ALIAS: csrr t1, hstateen3
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# uimm12
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# CHECK-INST: csrrs t2, hstateen3, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0xf0,0x60]
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# CHECK-INST-ALIAS: csrr t2, hstateen3
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# name
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csrrs t1, hstateen3, zero
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# uimm12
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csrrs t2, 0x60F, zero
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