104 lines
3.5 KiB
LLVM
104 lines
3.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp --no_x86_scrub_mem_shuffle
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; RUN: llc -mcpu=generic -mtriple=i686-pc-windows-msvc -mattr=+sse2 < %s | FileCheck %s --check-prefix=MSVC
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; RUN: llc -mcpu=generic -mtriple=i686-pc-mingw32 -mattr=+sse2 < %s | FileCheck %s --check-prefix=MINGW
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@a = external dso_local global <4 x float>, align 16
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define dso_local void @testPastArguments() nounwind {
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; MSVC-LABEL: testPastArguments:
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; MSVC: # %bb.0: # %entry
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; MSVC-NEXT: subl $20, %esp
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; MSVC-NEXT: movaps _a, %xmm0
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; MSVC-NEXT: movups %xmm0, 4(%esp)
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; MSVC-NEXT: movl $1, (%esp)
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; MSVC-NEXT: calll _testm128
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; MSVC-NEXT: addl $20, %esp
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; MSVC-NEXT: retl
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;
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; MINGW-LABEL: testPastArguments:
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; MINGW: # %bb.0: # %entry
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; MINGW-NEXT: pushl %ebp
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; MINGW-NEXT: movl %esp, %ebp
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; MINGW-NEXT: andl $-16, %esp
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; MINGW-NEXT: subl $48, %esp
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; MINGW-NEXT: movaps _a, %xmm0
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; MINGW-NEXT: movaps %xmm0, 16(%esp)
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; MINGW-NEXT: movl $1, (%esp)
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; MINGW-NEXT: calll _testm128
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; MINGW-NEXT: movl %ebp, %esp
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; MINGW-NEXT: popl %ebp
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; MINGW-NEXT: retl
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entry:
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%0 = load <4 x float>, ptr @a, align 16
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%call = tail call i32 (i32, ...) @testm128(i32 1, <4 x float> inreg %0)
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ret void
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}
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define <4 x i32> @foo(<4 x float> inreg %0, ...) nounwind {
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; MSVC-LABEL: foo:
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; MSVC: # %bb.0:
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; MSVC-NEXT: pushl %eax
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; MSVC-NEXT: movups 8(%esp), %xmm0
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; MSVC-NEXT: movups 24(%esp), %xmm1
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; MSVC-NEXT: cmpltps %xmm1, %xmm0
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; MSVC-NEXT: popl %eax
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; MSVC-NEXT: retl
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;
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; MINGW-LABEL: foo:
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; MINGW: # %bb.0:
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; MINGW-NEXT: pushl %ebp
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; MINGW-NEXT: movl %esp, %ebp
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; MINGW-NEXT: andl $-16, %esp
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; MINGW-NEXT: subl $16, %esp
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; MINGW-NEXT: movaps 8(%ebp), %xmm0
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; MINGW-NEXT: movups 24(%ebp), %xmm1
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; MINGW-NEXT: cmpltps %xmm1, %xmm0
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; MINGW-NEXT: movl %ebp, %esp
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; MINGW-NEXT: popl %ebp
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; MINGW-NEXT: retl
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%2 = alloca ptr, align 4
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call void @llvm.lifetime.start.p0(i64 4, ptr %2)
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call void @llvm.va_start(ptr %2)
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%3 = load ptr, ptr %2, align 4
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%4 = load <4 x float>, ptr %3, align 4
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%5 = fcmp ogt <4 x float> %4, %0
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%6 = sext <4 x i1> %5 to <4 x i32>
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call void @llvm.lifetime.end.p0(i64 4, ptr %2)
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ret <4 x i32> %6
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}
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define <4 x i32> @bar() nounwind {
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; MSVC-LABEL: bar:
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; MSVC: # %bb.0:
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; MSVC-NEXT: subl $32, %esp
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; MSVC-NEXT: movaps {{.*#+}} xmm0 = [5.0E+0,6.0E+0,7.0E+0,8.0E+0]
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; MSVC-NEXT: movups %xmm0, 16(%esp)
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; MSVC-NEXT: movaps {{.*#+}} xmm0 = [1.0E+0,2.0E+0,3.0E+0,4.0E+0]
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; MSVC-NEXT: movups %xmm0, (%esp)
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; MSVC-NEXT: calll _foo
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; MSVC-NEXT: addl $32, %esp
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; MSVC-NEXT: retl
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;
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; MINGW-LABEL: bar:
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; MINGW: # %bb.0:
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; MINGW-NEXT: pushl %ebp
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; MINGW-NEXT: movl %esp, %ebp
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; MINGW-NEXT: andl $-16, %esp
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; MINGW-NEXT: subl $48, %esp
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; MINGW-NEXT: movaps {{.*#+}} xmm0 = [5.0E+0,6.0E+0,7.0E+0,8.0E+0]
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; MINGW-NEXT: movaps %xmm0, 16(%esp)
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; MINGW-NEXT: movaps {{.*#+}} xmm0 = [1.0E+0,2.0E+0,3.0E+0,4.0E+0]
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; MINGW-NEXT: movaps %xmm0, (%esp)
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; MINGW-NEXT: calll _foo
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; MINGW-NEXT: movl %ebp, %esp
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; MINGW-NEXT: popl %ebp
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; MINGW-NEXT: retl
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%1 = tail call <4 x i32> (<4 x float>, ...) @foo(<4 x float> <float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00>, <4 x float> <float 5.000000e+00, float 6.000000e+00, float 7.000000e+00, float 8.000000e+00>)
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ret <4 x i32> %1
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}
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declare i32 @testm128(i32, ...) nounwind
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declare void @llvm.va_start(ptr)
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declare void @llvm.lifetime.start.p0(i64, ptr)
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declare void @llvm.lifetime.end.p0(i64, ptr)
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