32 lines
1.4 KiB
LLVM
32 lines
1.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512fp16 | FileCheck %s --check-prefixes=X64-AVX512FP16
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; This should do a single load into the fp stack for the return, not diddle with xmm registers.
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define half @fcmp_select_fp_constants_olt(half %x) nounwind readnone {
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; X64-AVX512FP16-LABEL: fcmp_select_fp_constants_olt:
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; X64-AVX512FP16: # %bb.0:
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; X64-AVX512FP16-NEXT: vmovsh {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
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; X64-AVX512FP16-NEXT: vcmpltsh {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %k1
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; X64-AVX512FP16-NEXT: vmovsh {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; X64-AVX512FP16-NEXT: vmovsh %xmm1, %xmm0, %xmm0 {%k1}
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; X64-AVX512FP16-NEXT: retq
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%c = fcmp olt half %x, -4.0
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%r = select i1 %c, half 42.0, half 23.0
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ret half %r
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}
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define half @fcmp_select_fp_constants_ogt(half %x) nounwind readnone {
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; X64-AVX512FP16-LABEL: fcmp_select_fp_constants_ogt:
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; X64-AVX512FP16: # %bb.0:
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; X64-AVX512FP16-NEXT: vmovsh {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
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; X64-AVX512FP16-NEXT: vcmpgtsh {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %k1
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; X64-AVX512FP16-NEXT: vmovsh {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; X64-AVX512FP16-NEXT: vmovsh %xmm1, %xmm0, %xmm0 {%k1}
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; X64-AVX512FP16-NEXT: retq
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%c = fcmp ogt half %x, -4.0
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%r = select i1 %c, half 42.0, half 23.0
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ret half %r
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}
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