28 lines
1.0 KiB
LLVM
28 lines
1.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=SSE
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX
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define i32 @PR53247(){
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; SSE-LABEL: PR53247:
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; SSE: # %bb.0: # %entry
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; SSE-NEXT: pxor %xmm0, %xmm0
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; SSE-NEXT: phaddd %xmm0, %xmm0
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; SSE-NEXT: phaddd %xmm0, %xmm0
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; SSE-NEXT: movd %xmm0, %eax
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; SSE-NEXT: retq
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;
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; AVX-LABEL: PR53247:
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; AVX: # %bb.0: # %entry
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; AVX-NEXT: vpxor %xmm0, %xmm0, %xmm0
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; AVX-NEXT: vphaddd %xmm0, %xmm0, %xmm0
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; AVX-NEXT: vphaddd %xmm0, %xmm0, %xmm0
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; AVX-NEXT: vmovd %xmm0, %eax
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; AVX-NEXT: retq
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entry:
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%0 = call <4 x i32> @llvm.x86.ssse3.phadd.d.128(<4 x i32> zeroinitializer, <4 x i32> zeroinitializer)
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%1 = call <4 x i32> @llvm.x86.ssse3.phadd.d.128(<4 x i32> %0, <4 x i32> zeroinitializer)
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%vecext.i = extractelement <4 x i32> %1, i32 0
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ret i32 %vecext.i
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}
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declare <4 x i32> @llvm.x86.ssse3.phadd.d.128(<4 x i32>, <4 x i32>)
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