185 lines
4.8 KiB
YAML
185 lines
4.8 KiB
YAML
# REQUIRES: asserts
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# RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr10 -x=mir < %s \
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# RUN: -debug-only=machine-scheduler -start-before=postmisched 2>&1 \
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# RUN: -mattr=+fuse-zeromove,+fuse-cmp,+fuse-wideimm,+fuse-back2back \
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# RUN: | FileCheck %s
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# CHECK: add_mulld:%bb.0
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# CHECK: Macro fuse: SU(0) - SU(1) / MULLD - ADD8
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---
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name: add_mulld
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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liveins: $x3, $x4, $x5
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renamable $x4 = MULLD $x3, $x4
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renamable $x3 = ADD8 killed renamable $x4, $x5
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BLR8 implicit $lr8, implicit $rm, implicit $x3
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...
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# CHECK: add_and:%bb.0
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# CHECK: Macro fuse: SU(0) - SU(1) / ADD8 - AND8
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---
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name: add_and
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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liveins: $x3, $x4, $x5
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renamable $x4 = ADD8 $x3, $x4
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renamable $x3 = AND8 killed renamable $x4, $x5
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BLR8 implicit $lr8, implicit $rm, implicit $x3
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...
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# CHECK: xor_subf:%bb.0
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# CHECK: Macro fuse: SU(0) - SU(1) / XOR8 - SUBF8
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---
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name: xor_subf
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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liveins: $x3, $x4, $x5
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renamable $x4 = XOR8 $x3, $x4
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renamable $x3 = SUBF8 killed renamable $x4, $x5
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BLR8 implicit $lr8, implicit $rm, implicit $x3
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...
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# CHECK: or_nand:%bb.0
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# CHECK: Macro fuse: SU(0) - SU(1) / OR8 - NAND8
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---
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name: or_nand
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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liveins: $x3, $x4, $x5
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renamable $x4 = OR8 $x3, $x4
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renamable $x3 = NAND8 killed renamable $x4, $x5
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BLR8 implicit $lr8, implicit $rm, implicit $x3
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...
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# CHECK: vand_vand:%bb.0
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# CHECK: Macro fuse: SU(0) - SU(1) / VAND - VAND
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---
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name: vand_vand
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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liveins: $v2, $v3, $v4
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renamable $v2 = VAND $v3, $v2
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renamable $v2 = VAND killed renamable $v2, $v4
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BLR8 implicit $lr8, implicit $rm
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...
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# CHECK: vadd_vadd:%bb.0
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# CHECK: Macro fuse: SU(0) - SU(1) / VADDUDM - VADDUDM
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---
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name: vadd_vadd
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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liveins: $v2, $v3, $v4
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renamable $v2 = VADDUDM $v3, $v2
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renamable $v2 = VADDUDM killed renamable $v2, $v4
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BLR8 implicit $lr8, implicit $rm
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...
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# CHECK: sldi_add:%bb.0
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# CHECK: Macro fuse: SU(0) - SU(1) / RLDICR - ADD8
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---
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name: sldi_add
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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liveins: $x3, $x4, $x5
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renamable $x4 = RLDICR $x3, 3, 60
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renamable $x3 = ADD8 killed renamable $x4, $x5
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BLR8 implicit $lr8, implicit $rm, implicit $x3
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...
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# CHECK: rldicl_xor:%bb.0
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# CHECK: Macro fuse: SU(0) - SU(1) / RLDICL - XOR8
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---
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name: rldicl_xor
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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liveins: $x3, $x4, $x5
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renamable $x4 = RLDICL $x3, 1, 0
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renamable $x3 = XOR8 killed renamable $x4, $x5
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BLR8 implicit $lr8, implicit $rm, implicit $x3
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...
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# CHECK: rldicr_xor:%bb.0
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# CHECK: Macro fuse: SU(0) - SU(1) / RLDICR - XOR8
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---
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name: rldicr_xor
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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liveins: $x3, $x4, $x5
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renamable $x4 = RLDICR $x3, 1, 63
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renamable $x3 = XOR8 killed renamable $x4, $x5
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BLR8 implicit $lr8, implicit $rm, implicit $x3
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...
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# CHECK: ori_oris:%bb.0
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# CHECK: Macro fuse: SU(0) - SU(1) / ORI8 - ORIS8
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---
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name: ori_oris
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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liveins: $x3, $x4
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renamable $x4 = ORI8 $x3, 63
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renamable $x3 = ORIS8 killed renamable $x4, 20
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BLR8 implicit $lr8, implicit $rm, implicit $x3
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...
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# CHECK: load_cmp:%bb.0
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# CHECK: Macro fuse: SU(0) - SU(1) / LD - CMPDI
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---
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name: load_cmp
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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liveins: $x3, $x4, $x5
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renamable $x3 = LD 0, killed renamable $x3
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renamable $cr0 = CMPDI killed renamable $x3, 0
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renamable $x3 = ISEL8 killed renamable $x5, killed renamable $x4, renamable $cr0lt, implicit killed $cr0
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BLR8 implicit $lr8, implicit $rm, implicit $x3
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# CHECK: back2back_1:%bb.0
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# CHECK: Macro fuse: SU(0) - SU(1) / VADDUBM - VSUBUBM
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---
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name: back2back_1
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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liveins: $v2, $v3, $v4
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renamable $v2 = VADDUBM $v3, $v2
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renamable $v2 = VSUBUBM killed renamable $v2, $v4
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BLR8 implicit $lr8, implicit $rm
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# CHECK: back2back_2:%bb.0
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# CHECK: Macro fuse: SU(0) - SU(1) / XSABSDP - XSNEGDP
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---
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name: back2back_2
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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liveins: $f1, $f2
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renamable $f2 = XSABSDP $f1, implicit $rm
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renamable $f1 = XSNEGDP killed renamable $f2, implicit $rm
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BLR8 implicit $lr8, implicit $rm, implicit $f1
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# CHECK: back2back_3:%bb.0
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# CHECK: Macro fuse: SU(0) - SU(1) / VMAXFP - XVMINSP
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---
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name: back2back_3
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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liveins: $v2, $v3, $v4
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renamable $v3 = VMAXFP $v2, $v3
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renamable $v2 = XVMINSP killed renamable $v3, $v4, implicit $rm
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BLR8 implicit $lr8, implicit $rm, implicit $v2
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