185 lines
4.0 KiB
LLVM
185 lines
4.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc --mtriple=loongarch32 < %s | FileCheck %s --check-prefix=LA32
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; RUN: llc --mtriple=loongarch64 < %s | FileCheck %s --check-prefix=LA64
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;; Exercise the 'add' LLVM IR: https://llvm.org/docs/LangRef.html#add-instruction
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define i1 @add_i1(i1 %x, i1 %y) {
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; LA32-LABEL: add_i1:
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; LA32: # %bb.0:
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; LA32-NEXT: add.w $a0, $a0, $a1
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; LA32-NEXT: ret
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;
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; LA64-LABEL: add_i1:
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; LA64: # %bb.0:
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; LA64-NEXT: add.d $a0, $a0, $a1
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; LA64-NEXT: ret
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%add = add i1 %x, %y
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ret i1 %add
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}
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define i8 @add_i8(i8 %x, i8 %y) {
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; LA32-LABEL: add_i8:
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; LA32: # %bb.0:
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; LA32-NEXT: add.w $a0, $a0, $a1
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; LA32-NEXT: ret
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;
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; LA64-LABEL: add_i8:
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; LA64: # %bb.0:
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; LA64-NEXT: add.d $a0, $a0, $a1
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; LA64-NEXT: ret
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%add = add i8 %x, %y
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ret i8 %add
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}
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define i16 @add_i16(i16 %x, i16 %y) {
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; LA32-LABEL: add_i16:
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; LA32: # %bb.0:
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; LA32-NEXT: add.w $a0, $a0, $a1
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; LA32-NEXT: ret
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;
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; LA64-LABEL: add_i16:
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; LA64: # %bb.0:
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; LA64-NEXT: add.d $a0, $a0, $a1
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; LA64-NEXT: ret
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%add = add i16 %x, %y
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ret i16 %add
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}
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define i32 @add_i32(i32 %x, i32 %y) {
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; LA32-LABEL: add_i32:
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; LA32: # %bb.0:
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; LA32-NEXT: add.w $a0, $a0, $a1
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; LA32-NEXT: ret
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;
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; LA64-LABEL: add_i32:
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; LA64: # %bb.0:
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; LA64-NEXT: add.d $a0, $a0, $a1
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; LA64-NEXT: ret
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%add = add i32 %x, %y
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ret i32 %add
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}
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;; Match the pattern:
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;; def : PatGprGpr_32<add, ADD_W>;
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define signext i32 @add_i32_sext(i32 %x, i32 %y) {
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; LA32-LABEL: add_i32_sext:
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; LA32: # %bb.0:
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; LA32-NEXT: add.w $a0, $a0, $a1
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; LA32-NEXT: ret
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;
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; LA64-LABEL: add_i32_sext:
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; LA64: # %bb.0:
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; LA64-NEXT: add.w $a0, $a0, $a1
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; LA64-NEXT: ret
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%add = add i32 %x, %y
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ret i32 %add
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}
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define i64 @add_i64(i64 %x, i64 %y) {
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; LA32-LABEL: add_i64:
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; LA32: # %bb.0:
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; LA32-NEXT: add.w $a1, $a1, $a3
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; LA32-NEXT: add.w $a2, $a0, $a2
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; LA32-NEXT: sltu $a0, $a2, $a0
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; LA32-NEXT: add.w $a1, $a1, $a0
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; LA32-NEXT: move $a0, $a2
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; LA32-NEXT: ret
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;
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; LA64-LABEL: add_i64:
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; LA64: # %bb.0:
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; LA64-NEXT: add.d $a0, $a0, $a1
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; LA64-NEXT: ret
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%add = add i64 %x, %y
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ret i64 %add
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}
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define i1 @add_i1_3(i1 %x) {
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; LA32-LABEL: add_i1_3:
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; LA32: # %bb.0:
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; LA32-NEXT: addi.w $a0, $a0, 1
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; LA32-NEXT: ret
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;
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; LA64-LABEL: add_i1_3:
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; LA64: # %bb.0:
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; LA64-NEXT: addi.d $a0, $a0, 1
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; LA64-NEXT: ret
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%add = add i1 %x, 3
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ret i1 %add
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}
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define i8 @add_i8_3(i8 %x) {
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; LA32-LABEL: add_i8_3:
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; LA32: # %bb.0:
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; LA32-NEXT: addi.w $a0, $a0, 3
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; LA32-NEXT: ret
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;
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; LA64-LABEL: add_i8_3:
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; LA64: # %bb.0:
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; LA64-NEXT: addi.d $a0, $a0, 3
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; LA64-NEXT: ret
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%add = add i8 %x, 3
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ret i8 %add
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}
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define i16 @add_i16_3(i16 %x) {
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; LA32-LABEL: add_i16_3:
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; LA32: # %bb.0:
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; LA32-NEXT: addi.w $a0, $a0, 3
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; LA32-NEXT: ret
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;
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; LA64-LABEL: add_i16_3:
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; LA64: # %bb.0:
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; LA64-NEXT: addi.d $a0, $a0, 3
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; LA64-NEXT: ret
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%add = add i16 %x, 3
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ret i16 %add
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}
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define i32 @add_i32_3(i32 %x) {
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; LA32-LABEL: add_i32_3:
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; LA32: # %bb.0:
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; LA32-NEXT: addi.w $a0, $a0, 3
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; LA32-NEXT: ret
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;
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; LA64-LABEL: add_i32_3:
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; LA64: # %bb.0:
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; LA64-NEXT: addi.d $a0, $a0, 3
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; LA64-NEXT: ret
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%add = add i32 %x, 3
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ret i32 %add
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}
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;; Match the pattern:
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;; def : PatGprImm_32<add, ADDI_W, simm12>;
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define signext i32 @add_i32_3_sext(i32 %x) {
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; LA32-LABEL: add_i32_3_sext:
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; LA32: # %bb.0:
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; LA32-NEXT: addi.w $a0, $a0, 3
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; LA32-NEXT: ret
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;
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; LA64-LABEL: add_i32_3_sext:
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; LA64: # %bb.0:
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; LA64-NEXT: addi.w $a0, $a0, 3
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; LA64-NEXT: ret
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%add = add i32 %x, 3
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ret i32 %add
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}
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define i64 @add_i64_3(i64 %x) {
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; LA32-LABEL: add_i64_3:
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; LA32: # %bb.0:
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; LA32-NEXT: addi.w $a2, $a0, 3
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; LA32-NEXT: sltu $a0, $a2, $a0
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; LA32-NEXT: add.w $a1, $a1, $a0
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; LA32-NEXT: move $a0, $a2
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; LA32-NEXT: ret
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;
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; LA64-LABEL: add_i64_3:
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; LA64: # %bb.0:
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; LA64-NEXT: addi.d $a0, $a0, 3
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; LA64-NEXT: ret
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%add = add i64 %x, 3
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ret i64 %add
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}
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