53 lines
2.2 KiB
LLVM
53 lines
2.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck %s
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define half @known_nnan_extract_vector_elt(float %a, float %b, i32 %idx, half %c) {
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; CHECK-LABEL: known_nnan_extract_vector_elt:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; CHECK-NEXT: s_waitcnt_vscnt null, 0x0
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; CHECK-NEXT: v_cvt_pkrtz_f16_f32_e32 v0, v0, v1
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; CHECK-NEXT: v_lshlrev_b32_e32 v1, 4, v2
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; CHECK-NEXT: v_add_f16_e32 v2, 1.0, v3
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; CHECK-NEXT: v_lshrrev_b32_e32 v0, v1, v0
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; CHECK-NEXT: v_cmp_lt_f16_e32 vcc_lo, v0, v2
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; CHECK-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc_lo
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; CHECK-NEXT: s_setpc_b64 s[30:31]
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%cvt = call nnan <2 x half> @llvm.amdgcn.cvt.pkrtz(float %a, float %b)
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%extract = extractelement <2 x half> %cvt, i32 %idx
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%canon = call half @llvm.canonicalize.f16(half %extract)
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%nnan.c = fadd nnan nsz half %c, 1.0
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%cmp = fcmp olt half %extract, %nnan.c
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%select = select i1 %cmp, half %extract, half %nnan.c
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ret half %select
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}
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; should not emit v_max
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define float @fma_not_fmaxnm_maybe_nan(i32 %i1, i32 %i2, i32 %i3) #0 {
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; CHECK-LABEL: fma_not_fmaxnm_maybe_nan:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; CHECK-NEXT: s_waitcnt_vscnt null, 0x0
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; CHECK-NEXT: v_cvt_f32_u32_e32 v0, v0
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; CHECK-NEXT: v_cvt_f32_u32_e32 v1, v1
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; CHECK-NEXT: v_fmaak_f32 v0, v1, v0, 0xff800000
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; CHECK-NEXT: v_cmp_nge_f32_e32 vcc_lo, 0xff800000, v0
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; CHECK-NEXT: v_cndmask_b32_e32 v0, 0xff800000, v0, vcc_lo
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; CHECK-NEXT: s_setpc_b64 s[30:31]
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%f1 = uitofp i32 %i1 to float
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%f2 = uitofp i32 %i2 to float
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%f3 = uitofp i32 %i2 to float
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%fma = tail call float @llvm.fma.f32(float %f2, float %f1, float 0xfff0000000000000)
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%cmp = fcmp ugt float %fma, 0xfff0000000000000
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%val = select i1 %cmp, float %fma, float 0xfff0000000000000
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ret float %val
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}
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declare float @llvm.fma.f32(float, float, float) nounwind readnone
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declare float @llvm.amdgcn.fmad.ftz.f32(float, float, float)
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declare <2 x half> @llvm.amdgcn.cvt.pkrtz(float, float)
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declare half @llvm.canonicalize.f16(half)
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attributes #0 = { nounwind "no-signed-zeros-fp-math"="true" "target-features"="+mad-mac-f32-insts" }
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