191 lines
7.5 KiB
LLVM
191 lines
7.5 KiB
LLVM
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 -verify-machineinstrs < %s | FileCheck --check-prefix=GCN %s
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; RUN: llvm-as -data-layout=A5 < %s | llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 -verify-machineinstrs | FileCheck --check-prefix=GCN %s
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declare ptr addrspace(4) @llvm.amdgcn.dispatch.ptr()
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declare ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
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declare i32 @llvm.amdgcn.workitem.id.x()
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declare i32 @llvm.amdgcn.workgroup.id.x()
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declare void @llvm.amdgcn.s.barrier()
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@test_local.temp = internal addrspace(3) global [1 x i32] undef, align 4
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@test_global_local.temp = internal addrspace(3) global [1 x i32] undef, align 4
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; GCN-LABEL: {{^}}test_local
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; GCN: v_mov_b32_e32 v[[VAL:[0-9]+]], 0x777
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; GCN: ds_write_b32 v{{[0-9]+}}, v[[VAL]]
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; GCN: s_waitcnt lgkmcnt(0){{$}}
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; GCN-NEXT: s_barrier
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; GCN: flat_store_dword
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define amdgpu_kernel void @test_local(ptr addrspace(1) %arg) {
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bb:
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%i = alloca ptr addrspace(1), align 4, addrspace(5)
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store ptr addrspace(1) %arg, ptr addrspace(5) %i, align 4
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%i1 = call i32 @llvm.amdgcn.workitem.id.x()
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%i2 = zext i32 %i1 to i64
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%i3 = icmp eq i64 %i2, 0
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br i1 %i3, label %bb4, label %bb5
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bb4: ; preds = %bb
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store i32 1911, ptr addrspace(3) @test_local.temp, align 4
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br label %bb5
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bb5: ; preds = %bb4, %bb
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fence syncscope("workgroup") release
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call void @llvm.amdgcn.s.barrier()
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fence syncscope("workgroup") acquire
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%i6 = load i32, ptr addrspace(3) @test_local.temp, align 4
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%i7 = load ptr addrspace(1), ptr addrspace(5) %i, align 4
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%i8 = call ptr addrspace(4) @llvm.amdgcn.dispatch.ptr()
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%i9 = call i32 @llvm.amdgcn.workitem.id.x()
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%i10 = call i32 @llvm.amdgcn.workgroup.id.x()
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%i11 = getelementptr inbounds i8, ptr addrspace(4) %i8, i64 4
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%i13 = load i16, ptr addrspace(4) %i11, align 4
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%i14 = zext i16 %i13 to i32
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%i15 = mul i32 %i10, %i14
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%i16 = add i32 %i15, %i9
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%i17 = call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
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%i18 = zext i32 %i16 to i64
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%i20 = load i64, ptr addrspace(4) %i17, align 8
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%i21 = add i64 %i20, %i18
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%i22 = getelementptr inbounds i32, ptr addrspace(1) %i7, i64 %i21
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store i32 %i6, ptr addrspace(1) %i22, align 4
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ret void
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}
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; GCN-LABEL: {{^}}test_global
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; GCN: v_add_u32_e32 v{{[0-9]+}}, vcc, 0x888, v{{[0-9]+}}
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; GCN: flat_store_dword
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; GCN: s_waitcnt vmcnt(0) lgkmcnt(0){{$}}
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; GCN-NEXT: s_barrier
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define amdgpu_kernel void @test_global(ptr addrspace(1) %arg) {
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bb:
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%i = alloca ptr addrspace(1), align 4, addrspace(5)
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%i1 = alloca i32, align 4, addrspace(5)
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store ptr addrspace(1) %arg, ptr addrspace(5) %i, align 4
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store i32 0, ptr addrspace(5) %i1, align 4
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br label %bb2
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bb2: ; preds = %bb56, %bb
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%i3 = load i32, ptr addrspace(5) %i1, align 4
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%i4 = sext i32 %i3 to i64
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%i5 = call ptr addrspace(4) @llvm.amdgcn.dispatch.ptr()
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%i6 = call i32 @llvm.amdgcn.workitem.id.x()
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%i7 = call i32 @llvm.amdgcn.workgroup.id.x()
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%i8 = getelementptr inbounds i8, ptr addrspace(4) %i5, i64 4
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%i10 = load i16, ptr addrspace(4) %i8, align 4
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%i11 = zext i16 %i10 to i32
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%i12 = mul i32 %i7, %i11
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%i13 = add i32 %i12, %i6
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%i14 = call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
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%i15 = zext i32 %i13 to i64
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%i17 = load i64, ptr addrspace(4) %i14, align 8
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%i18 = add i64 %i17, %i15
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%i19 = icmp ult i64 %i4, %i18
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br i1 %i19, label %bb20, label %bb59
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bb20: ; preds = %bb2
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%i21 = call ptr addrspace(4) @llvm.amdgcn.dispatch.ptr()
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%i22 = call i32 @llvm.amdgcn.workitem.id.x()
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%i23 = call i32 @llvm.amdgcn.workgroup.id.x()
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%i24 = getelementptr inbounds i8, ptr addrspace(4) %i21, i64 4
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%i26 = load i16, ptr addrspace(4) %i24, align 4
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%i27 = zext i16 %i26 to i32
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%i28 = mul i32 %i23, %i27
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%i29 = add i32 %i28, %i22
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%i30 = call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
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%i31 = zext i32 %i29 to i64
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%i33 = load i64, ptr addrspace(4) %i30, align 8
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%i34 = add i64 %i33, %i31
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%i35 = add i64 %i34, 2184
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%i36 = trunc i64 %i35 to i32
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%i37 = load ptr addrspace(1), ptr addrspace(5) %i, align 4
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%i38 = load i32, ptr addrspace(5) %i1, align 4
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%i39 = sext i32 %i38 to i64
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%i40 = call ptr addrspace(4) @llvm.amdgcn.dispatch.ptr()
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%i41 = call i32 @llvm.amdgcn.workitem.id.x()
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%i42 = call i32 @llvm.amdgcn.workgroup.id.x()
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%i43 = getelementptr inbounds i8, ptr addrspace(4) %i40, i64 4
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%i45 = load i16, ptr addrspace(4) %i43, align 4
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%i46 = zext i16 %i45 to i32
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%i47 = mul i32 %i42, %i46
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%i48 = add i32 %i47, %i41
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%i49 = call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
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%i50 = zext i32 %i48 to i64
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%i52 = load i64, ptr addrspace(4) %i49, align 8
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%i53 = add i64 %i52, %i50
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%i54 = add i64 %i39, %i53
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%i55 = getelementptr inbounds i32, ptr addrspace(1) %i37, i64 %i54
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store i32 %i36, ptr addrspace(1) %i55, align 4
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fence syncscope("workgroup") release
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call void @llvm.amdgcn.s.barrier()
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fence syncscope("workgroup") acquire
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br label %bb56
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bb56: ; preds = %bb20
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%i57 = load i32, ptr addrspace(5) %i1, align 4
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%i58 = add nsw i32 %i57, 1
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store i32 %i58, ptr addrspace(5) %i1, align 4
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br label %bb2
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bb59: ; preds = %bb2
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ret void
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}
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; GCN-LABEL: {{^}}test_global_local
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; GCN: v_mov_b32_e32 v[[VAL:[0-9]+]], 0x999
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; GCN: ds_write_b32 v{{[0-9]+}}, v[[VAL]]
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; GCN: s_waitcnt vmcnt(0) lgkmcnt(0){{$}}
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; GCN-NEXT: s_barrier
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; GCN: flat_store_dword
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define amdgpu_kernel void @test_global_local(ptr addrspace(1) %arg) {
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bb:
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%i = alloca ptr addrspace(1), align 4, addrspace(5)
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store ptr addrspace(1) %arg, ptr addrspace(5) %i, align 4
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%i1 = load ptr addrspace(1), ptr addrspace(5) %i, align 4
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%i2 = call ptr addrspace(4) @llvm.amdgcn.dispatch.ptr()
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%i3 = call i32 @llvm.amdgcn.workitem.id.x()
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%i4 = call i32 @llvm.amdgcn.workgroup.id.x()
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%i5 = getelementptr inbounds i8, ptr addrspace(4) %i2, i64 4
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%i7 = load i16, ptr addrspace(4) %i5, align 4
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%i8 = zext i16 %i7 to i32
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%i9 = mul i32 %i4, %i8
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%i10 = add i32 %i9, %i3
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%i11 = call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
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%i12 = zext i32 %i10 to i64
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%i14 = load i64, ptr addrspace(4) %i11, align 8
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%i15 = add i64 %i14, %i12
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%i16 = getelementptr inbounds i32, ptr addrspace(1) %i1, i64 %i15
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store i32 1, ptr addrspace(1) %i16, align 4
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%i17 = call i32 @llvm.amdgcn.workitem.id.x()
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%i18 = zext i32 %i17 to i64
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%i19 = icmp eq i64 %i18, 0
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br i1 %i19, label %bb20, label %bb21
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bb20: ; preds = %bb
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store i32 2457, ptr addrspace(3) @test_global_local.temp, align 4
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br label %bb21
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bb21: ; preds = %bb20, %bb
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fence syncscope("workgroup") release
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call void @llvm.amdgcn.s.barrier()
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fence syncscope("workgroup") acquire
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%i22 = load i32, ptr addrspace(3) @test_global_local.temp, align 4
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%i23 = load ptr addrspace(1), ptr addrspace(5) %i, align 4
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%i24 = call ptr addrspace(4) @llvm.amdgcn.dispatch.ptr()
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%i25 = call i32 @llvm.amdgcn.workitem.id.x()
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%i26 = call i32 @llvm.amdgcn.workgroup.id.x()
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%i27 = getelementptr inbounds i8, ptr addrspace(4) %i24, i64 4
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%i29 = load i16, ptr addrspace(4) %i27, align 4
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%i30 = zext i16 %i29 to i32
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%i31 = mul i32 %i26, %i30
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%i32 = add i32 %i31, %i25
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%i33 = call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
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%i34 = zext i32 %i32 to i64
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%i36 = load i64, ptr addrspace(4) %i33, align 8
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%i37 = add i64 %i36, %i34
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%i38 = getelementptr inbounds i32, ptr addrspace(1) %i23, i64 %i37
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store i32 %i22, ptr addrspace(1) %i38, align 4
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ret void
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}
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