499 lines
15 KiB
LLVM
499 lines
15 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -force-streaming-compatible-sve < %s | FileCheck %s
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target triple = "aarch64-unknown-linux-gnu"
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;
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; AND
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;
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define <8 x i8> @and_v8i8(<8 x i8> %op1, <8 x i8> %op2) #0 {
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; CHECK-LABEL: and_v8i8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
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; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
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; CHECK-NEXT: and z0.d, z0.d, z1.d
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; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
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; CHECK-NEXT: ret
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%res = and <8 x i8> %op1, %op2
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ret <8 x i8> %res
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}
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define <16 x i8> @and_v16i8(<16 x i8> %op1, <16 x i8> %op2) #0 {
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; CHECK-LABEL: and_v16i8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
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; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
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; CHECK-NEXT: and z0.d, z0.d, z1.d
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; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
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; CHECK-NEXT: ret
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%res = and <16 x i8> %op1, %op2
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ret <16 x i8> %res
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}
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define void @and_v32i8(<32 x i8>* %a, <32 x i8>* %b) #0 {
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; CHECK-LABEL: and_v32i8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldp q0, q1, [x0]
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; CHECK-NEXT: ldp q2, q3, [x1]
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; CHECK-NEXT: and z0.d, z0.d, z2.d
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; CHECK-NEXT: and z1.d, z1.d, z3.d
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; CHECK-NEXT: stp q0, q1, [x0]
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; CHECK-NEXT: ret
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%op1 = load <32 x i8>, <32 x i8>* %a
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%op2 = load <32 x i8>, <32 x i8>* %b
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%res = and <32 x i8> %op1, %op2
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store <32 x i8> %res, <32 x i8>* %a
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ret void
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}
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define <4 x i16> @and_v4i16(<4 x i16> %op1, <4 x i16> %op2) #0 {
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; CHECK-LABEL: and_v4i16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
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; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
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; CHECK-NEXT: and z0.d, z0.d, z1.d
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; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
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; CHECK-NEXT: ret
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%res = and <4 x i16> %op1, %op2
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ret <4 x i16> %res
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}
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define <8 x i16> @and_v8i16(<8 x i16> %op1, <8 x i16> %op2) #0 {
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; CHECK-LABEL: and_v8i16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
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; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
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; CHECK-NEXT: and z0.d, z0.d, z1.d
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; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
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; CHECK-NEXT: ret
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%res = and <8 x i16> %op1, %op2
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ret <8 x i16> %res
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}
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define void @and_v16i16(<16 x i16>* %a, <16 x i16>* %b) #0 {
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; CHECK-LABEL: and_v16i16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldp q0, q1, [x0]
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; CHECK-NEXT: ldp q2, q3, [x1]
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; CHECK-NEXT: and z0.d, z0.d, z2.d
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; CHECK-NEXT: and z1.d, z1.d, z3.d
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; CHECK-NEXT: stp q0, q1, [x0]
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; CHECK-NEXT: ret
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%op1 = load <16 x i16>, <16 x i16>* %a
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%op2 = load <16 x i16>, <16 x i16>* %b
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%res = and <16 x i16> %op1, %op2
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store <16 x i16> %res, <16 x i16>* %a
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ret void
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}
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define <2 x i32> @and_v2i32(<2 x i32> %op1, <2 x i32> %op2) #0 {
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; CHECK-LABEL: and_v2i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
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; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
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; CHECK-NEXT: and z0.d, z0.d, z1.d
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; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
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; CHECK-NEXT: ret
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%res = and <2 x i32> %op1, %op2
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ret <2 x i32> %res
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}
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define <4 x i32> @and_v4i32(<4 x i32> %op1, <4 x i32> %op2) #0 {
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; CHECK-LABEL: and_v4i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
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; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
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; CHECK-NEXT: and z0.d, z0.d, z1.d
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; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
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; CHECK-NEXT: ret
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%res = and <4 x i32> %op1, %op2
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ret <4 x i32> %res
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}
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define void @and_v8i32(<8 x i32>* %a, <8 x i32>* %b) #0 {
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; CHECK-LABEL: and_v8i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldp q0, q1, [x0]
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; CHECK-NEXT: ldp q2, q3, [x1]
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; CHECK-NEXT: and z0.d, z0.d, z2.d
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; CHECK-NEXT: and z1.d, z1.d, z3.d
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; CHECK-NEXT: stp q0, q1, [x0]
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; CHECK-NEXT: ret
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%op1 = load <8 x i32>, <8 x i32>* %a
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%op2 = load <8 x i32>, <8 x i32>* %b
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%res = and <8 x i32> %op1, %op2
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store <8 x i32> %res, <8 x i32>* %a
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ret void
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}
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define <1 x i64> @and_v1i64(<1 x i64> %op1, <1 x i64> %op2) #0 {
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; CHECK-LABEL: and_v1i64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
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; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
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; CHECK-NEXT: and z0.d, z0.d, z1.d
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; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
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; CHECK-NEXT: ret
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%res = and <1 x i64> %op1, %op2
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ret <1 x i64> %res
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}
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define <2 x i64> @and_v2i64(<2 x i64> %op1, <2 x i64> %op2) #0 {
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; CHECK-LABEL: and_v2i64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
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; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
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; CHECK-NEXT: and z0.d, z0.d, z1.d
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; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
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; CHECK-NEXT: ret
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%res = and <2 x i64> %op1, %op2
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ret <2 x i64> %res
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}
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define void @and_v4i64(<4 x i64>* %a, <4 x i64>* %b) #0 {
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; CHECK-LABEL: and_v4i64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldp q0, q1, [x0]
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; CHECK-NEXT: ldp q2, q3, [x1]
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; CHECK-NEXT: and z0.d, z0.d, z2.d
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; CHECK-NEXT: and z1.d, z1.d, z3.d
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; CHECK-NEXT: stp q0, q1, [x0]
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; CHECK-NEXT: ret
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%op1 = load <4 x i64>, <4 x i64>* %a
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%op2 = load <4 x i64>, <4 x i64>* %b
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%res = and <4 x i64> %op1, %op2
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store <4 x i64> %res, <4 x i64>* %a
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ret void
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}
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;
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; OR
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;
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define <8 x i8> @or_v8i8(<8 x i8> %op1, <8 x i8> %op2) #0 {
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; CHECK-LABEL: or_v8i8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
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; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
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; CHECK-NEXT: orr z0.d, z0.d, z1.d
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; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
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; CHECK-NEXT: ret
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%res = or <8 x i8> %op1, %op2
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ret <8 x i8> %res
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}
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define <16 x i8> @or_v16i8(<16 x i8> %op1, <16 x i8> %op2) #0 {
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; CHECK-LABEL: or_v16i8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
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; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
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; CHECK-NEXT: orr z0.d, z0.d, z1.d
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; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
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; CHECK-NEXT: ret
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%res = or <16 x i8> %op1, %op2
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ret <16 x i8> %res
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}
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define void @or_v32i8(<32 x i8>* %a, <32 x i8>* %b) #0 {
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; CHECK-LABEL: or_v32i8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldp q0, q1, [x0]
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; CHECK-NEXT: ldp q2, q3, [x1]
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; CHECK-NEXT: orr z0.d, z0.d, z2.d
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; CHECK-NEXT: orr z1.d, z1.d, z3.d
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; CHECK-NEXT: stp q0, q1, [x0]
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; CHECK-NEXT: ret
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%op1 = load <32 x i8>, <32 x i8>* %a
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%op2 = load <32 x i8>, <32 x i8>* %b
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%res = or <32 x i8> %op1, %op2
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store <32 x i8> %res, <32 x i8>* %a
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ret void
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}
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define <4 x i16> @or_v4i16(<4 x i16> %op1, <4 x i16> %op2) #0 {
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; CHECK-LABEL: or_v4i16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
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; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
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; CHECK-NEXT: orr z0.d, z0.d, z1.d
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; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
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; CHECK-NEXT: ret
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%res = or <4 x i16> %op1, %op2
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ret <4 x i16> %res
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}
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define <8 x i16> @or_v8i16(<8 x i16> %op1, <8 x i16> %op2) #0 {
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; CHECK-LABEL: or_v8i16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
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; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
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; CHECK-NEXT: orr z0.d, z0.d, z1.d
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; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
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; CHECK-NEXT: ret
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%res = or <8 x i16> %op1, %op2
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ret <8 x i16> %res
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}
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define void @or_v16i16(<16 x i16>* %a, <16 x i16>* %b) #0 {
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; CHECK-LABEL: or_v16i16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldp q0, q1, [x0]
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; CHECK-NEXT: ldp q2, q3, [x1]
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; CHECK-NEXT: orr z0.d, z0.d, z2.d
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; CHECK-NEXT: orr z1.d, z1.d, z3.d
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; CHECK-NEXT: stp q0, q1, [x0]
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; CHECK-NEXT: ret
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%op1 = load <16 x i16>, <16 x i16>* %a
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%op2 = load <16 x i16>, <16 x i16>* %b
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%res = or <16 x i16> %op1, %op2
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store <16 x i16> %res, <16 x i16>* %a
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ret void
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}
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define <2 x i32> @or_v2i32(<2 x i32> %op1, <2 x i32> %op2) #0 {
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; CHECK-LABEL: or_v2i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
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; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
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; CHECK-NEXT: orr z0.d, z0.d, z1.d
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; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
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; CHECK-NEXT: ret
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%res = or <2 x i32> %op1, %op2
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ret <2 x i32> %res
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}
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define <4 x i32> @or_v4i32(<4 x i32> %op1, <4 x i32> %op2) #0 {
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; CHECK-LABEL: or_v4i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
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; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
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; CHECK-NEXT: orr z0.d, z0.d, z1.d
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; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
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; CHECK-NEXT: ret
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%res = or <4 x i32> %op1, %op2
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ret <4 x i32> %res
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}
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define void @or_v8i32(<8 x i32>* %a, <8 x i32>* %b) #0 {
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; CHECK-LABEL: or_v8i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldp q0, q1, [x0]
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; CHECK-NEXT: ldp q2, q3, [x1]
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; CHECK-NEXT: orr z0.d, z0.d, z2.d
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; CHECK-NEXT: orr z1.d, z1.d, z3.d
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; CHECK-NEXT: stp q0, q1, [x0]
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; CHECK-NEXT: ret
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%op1 = load <8 x i32>, <8 x i32>* %a
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%op2 = load <8 x i32>, <8 x i32>* %b
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%res = or <8 x i32> %op1, %op2
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store <8 x i32> %res, <8 x i32>* %a
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ret void
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}
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define <1 x i64> @or_v1i64(<1 x i64> %op1, <1 x i64> %op2) #0 {
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; CHECK-LABEL: or_v1i64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
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; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
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; CHECK-NEXT: orr z0.d, z0.d, z1.d
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; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
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; CHECK-NEXT: ret
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%res = or <1 x i64> %op1, %op2
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ret <1 x i64> %res
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}
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define <2 x i64> @or_v2i64(<2 x i64> %op1, <2 x i64> %op2) #0 {
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; CHECK-LABEL: or_v2i64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
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; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
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; CHECK-NEXT: orr z0.d, z0.d, z1.d
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; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
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; CHECK-NEXT: ret
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%res = or <2 x i64> %op1, %op2
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ret <2 x i64> %res
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}
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define void @or_v4i64(<4 x i64>* %a, <4 x i64>* %b) #0 {
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; CHECK-LABEL: or_v4i64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldp q0, q1, [x0]
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; CHECK-NEXT: ldp q2, q3, [x1]
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; CHECK-NEXT: orr z0.d, z0.d, z2.d
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; CHECK-NEXT: orr z1.d, z1.d, z3.d
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; CHECK-NEXT: stp q0, q1, [x0]
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; CHECK-NEXT: ret
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%op1 = load <4 x i64>, <4 x i64>* %a
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%op2 = load <4 x i64>, <4 x i64>* %b
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%res = or <4 x i64> %op1, %op2
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store <4 x i64> %res, <4 x i64>* %a
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ret void
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}
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;
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; XOR
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;
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define <8 x i8> @xor_v8i8(<8 x i8> %op1, <8 x i8> %op2) #0 {
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; CHECK-LABEL: xor_v8i8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
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; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
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; CHECK-NEXT: eor z0.d, z0.d, z1.d
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; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
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; CHECK-NEXT: ret
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%res = xor <8 x i8> %op1, %op2
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ret <8 x i8> %res
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}
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define <16 x i8> @xor_v16i8(<16 x i8> %op1, <16 x i8> %op2) #0 {
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; CHECK-LABEL: xor_v16i8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
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; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
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; CHECK-NEXT: eor z0.d, z0.d, z1.d
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; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
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; CHECK-NEXT: ret
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%res = xor <16 x i8> %op1, %op2
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ret <16 x i8> %res
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}
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define void @xor_v32i8(<32 x i8>* %a, <32 x i8>* %b) #0 {
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; CHECK-LABEL: xor_v32i8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldp q0, q1, [x0]
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; CHECK-NEXT: ldp q2, q3, [x1]
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; CHECK-NEXT: eor z0.d, z0.d, z2.d
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; CHECK-NEXT: eor z1.d, z1.d, z3.d
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; CHECK-NEXT: stp q0, q1, [x0]
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; CHECK-NEXT: ret
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%op1 = load <32 x i8>, <32 x i8>* %a
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%op2 = load <32 x i8>, <32 x i8>* %b
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%res = xor <32 x i8> %op1, %op2
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|
store <32 x i8> %res, <32 x i8>* %a
|
|
ret void
|
|
}
|
|
|
|
define <4 x i16> @xor_v4i16(<4 x i16> %op1, <4 x i16> %op2) #0 {
|
|
; CHECK-LABEL: xor_v4i16:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
|
|
; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
|
|
; CHECK-NEXT: eor z0.d, z0.d, z1.d
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
|
|
; CHECK-NEXT: ret
|
|
%res = xor <4 x i16> %op1, %op2
|
|
ret <4 x i16> %res
|
|
}
|
|
|
|
define <8 x i16> @xor_v8i16(<8 x i16> %op1, <8 x i16> %op2) #0 {
|
|
; CHECK-LABEL: xor_v8i16:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
|
|
; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
|
|
; CHECK-NEXT: eor z0.d, z0.d, z1.d
|
|
; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
|
|
; CHECK-NEXT: ret
|
|
%res = xor <8 x i16> %op1, %op2
|
|
ret <8 x i16> %res
|
|
}
|
|
|
|
define void @xor_v16i16(<16 x i16>* %a, <16 x i16>* %b) #0 {
|
|
; CHECK-LABEL: xor_v16i16:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: ldp q0, q1, [x0]
|
|
; CHECK-NEXT: ldp q2, q3, [x1]
|
|
; CHECK-NEXT: eor z0.d, z0.d, z2.d
|
|
; CHECK-NEXT: eor z1.d, z1.d, z3.d
|
|
; CHECK-NEXT: stp q0, q1, [x0]
|
|
; CHECK-NEXT: ret
|
|
%op1 = load <16 x i16>, <16 x i16>* %a
|
|
%op2 = load <16 x i16>, <16 x i16>* %b
|
|
%res = xor <16 x i16> %op1, %op2
|
|
store <16 x i16> %res, <16 x i16>* %a
|
|
ret void
|
|
}
|
|
|
|
define <2 x i32> @xor_v2i32(<2 x i32> %op1, <2 x i32> %op2) #0 {
|
|
; CHECK-LABEL: xor_v2i32:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
|
|
; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
|
|
; CHECK-NEXT: eor z0.d, z0.d, z1.d
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
|
|
; CHECK-NEXT: ret
|
|
%res = xor <2 x i32> %op1, %op2
|
|
ret <2 x i32> %res
|
|
}
|
|
|
|
define <4 x i32> @xor_v4i32(<4 x i32> %op1, <4 x i32> %op2) #0 {
|
|
; CHECK-LABEL: xor_v4i32:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
|
|
; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
|
|
; CHECK-NEXT: eor z0.d, z0.d, z1.d
|
|
; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
|
|
; CHECK-NEXT: ret
|
|
%res = xor <4 x i32> %op1, %op2
|
|
ret <4 x i32> %res
|
|
}
|
|
|
|
define void @xor_v8i32(<8 x i32>* %a, <8 x i32>* %b) #0 {
|
|
; CHECK-LABEL: xor_v8i32:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: ldp q0, q1, [x0]
|
|
; CHECK-NEXT: ldp q2, q3, [x1]
|
|
; CHECK-NEXT: eor z0.d, z0.d, z2.d
|
|
; CHECK-NEXT: eor z1.d, z1.d, z3.d
|
|
; CHECK-NEXT: stp q0, q1, [x0]
|
|
; CHECK-NEXT: ret
|
|
%op1 = load <8 x i32>, <8 x i32>* %a
|
|
%op2 = load <8 x i32>, <8 x i32>* %b
|
|
%res = xor <8 x i32> %op1, %op2
|
|
store <8 x i32> %res, <8 x i32>* %a
|
|
ret void
|
|
}
|
|
|
|
define <1 x i64> @xor_v1i64(<1 x i64> %op1, <1 x i64> %op2) #0 {
|
|
; CHECK-LABEL: xor_v1i64:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
|
|
; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
|
|
; CHECK-NEXT: eor z0.d, z0.d, z1.d
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
|
|
; CHECK-NEXT: ret
|
|
%res = xor <1 x i64> %op1, %op2
|
|
ret <1 x i64> %res
|
|
}
|
|
|
|
define <2 x i64> @xor_v2i64(<2 x i64> %op1, <2 x i64> %op2) #0 {
|
|
; CHECK-LABEL: xor_v2i64:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
|
|
; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
|
|
; CHECK-NEXT: eor z0.d, z0.d, z1.d
|
|
; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
|
|
; CHECK-NEXT: ret
|
|
%res = xor <2 x i64> %op1, %op2
|
|
ret <2 x i64> %res
|
|
}
|
|
|
|
define void @xor_v4i64(<4 x i64>* %a, <4 x i64>* %b) #0 {
|
|
; CHECK-LABEL: xor_v4i64:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: ldp q0, q1, [x0]
|
|
; CHECK-NEXT: ldp q2, q3, [x1]
|
|
; CHECK-NEXT: eor z0.d, z0.d, z2.d
|
|
; CHECK-NEXT: eor z1.d, z1.d, z3.d
|
|
; CHECK-NEXT: stp q0, q1, [x0]
|
|
; CHECK-NEXT: ret
|
|
%op1 = load <4 x i64>, <4 x i64>* %a
|
|
%op2 = load <4 x i64>, <4 x i64>* %b
|
|
%res = xor <4 x i64> %op1, %op2
|
|
store <4 x i64> %res, <4 x i64>* %a
|
|
ret void
|
|
}
|
|
|
|
attributes #0 = { "target-features"="+sve" }
|