199 lines
6.0 KiB
LLVM
199 lines
6.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -force-streaming-compatible-sve < %s | FileCheck %s
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target triple = "aarch64-unknown-linux-gnu"
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define void @bitcast_v4i8(<4 x i8> *%a, <4 x i8>* %b) #0 {
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; CHECK-LABEL: bitcast_v4i8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldr s0, [x0]
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; CHECK-NEXT: ptrue p0.h, vl4
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; CHECK-NEXT: uunpklo z0.h, z0.b
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; CHECK-NEXT: st1b { z0.h }, p0, [x1]
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; CHECK-NEXT: ret
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%load = load volatile <4 x i8>, <4 x i8>* %a
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%cast = bitcast <4 x i8> %load to <4 x i8>
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store volatile <4 x i8> %cast, <4 x i8>* %b
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ret void
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}
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define void @bitcast_v8i8(<8 x i8> *%a, <8 x i8>* %b) #0 {
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; CHECK-LABEL: bitcast_v8i8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldr d0, [x0]
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; CHECK-NEXT: str d0, [x1]
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; CHECK-NEXT: ret
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%load = load volatile <8 x i8>, <8 x i8>* %a
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%cast = bitcast <8 x i8> %load to <8 x i8>
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store volatile <8 x i8> %cast, <8 x i8>* %b
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ret void
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}
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define void @bitcast_v16i8(<16 x i8> *%a, <16 x i8>* %b) #0 {
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; CHECK-LABEL: bitcast_v16i8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldr q0, [x0]
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; CHECK-NEXT: str q0, [x1]
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; CHECK-NEXT: ret
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%load = load volatile <16 x i8>, <16 x i8>* %a
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%cast = bitcast <16 x i8> %load to <16 x i8>
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store volatile <16 x i8> %cast, <16 x i8>* %b
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ret void
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}
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define void @bitcast_v32i8(<32 x i8> *%a, <32 x i8>* %b) #0 {
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; CHECK-LABEL: bitcast_v32i8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldr q0, [x0]
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; CHECK-NEXT: ldr q1, [x0, #16]
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; CHECK-NEXT: str q1, [x1, #16]
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; CHECK-NEXT: str q0, [x1]
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; CHECK-NEXT: ret
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%load = load volatile <32 x i8>, <32 x i8>* %a
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%cast = bitcast <32 x i8> %load to <32 x i8>
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store volatile <32 x i8> %cast, <32 x i8>* %b
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ret void
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}
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define void @bitcast_v2i16(<2 x i16> *%a, <2 x half>* %b) #0 {
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; CHECK-LABEL: bitcast_v2i16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: sub sp, sp, #16
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: ldrh w8, [x0, #2]
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; CHECK-NEXT: str w8, [sp, #4]
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; CHECK-NEXT: ldrh w8, [x0]
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; CHECK-NEXT: str w8, [sp]
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; CHECK-NEXT: ldr d0, [sp]
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; CHECK-NEXT: mov z1.s, z0.s[1]
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; CHECK-NEXT: fmov w8, s0
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; CHECK-NEXT: fmov w9, s1
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; CHECK-NEXT: strh w8, [sp, #8]
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; CHECK-NEXT: strh w9, [sp, #10]
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; CHECK-NEXT: ldr d0, [sp, #8]
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; CHECK-NEXT: fmov w8, s0
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; CHECK-NEXT: str w8, [x1]
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; CHECK-NEXT: add sp, sp, #16
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; CHECK-NEXT: ret
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%load = load volatile <2 x i16>, <2 x i16>* %a
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%cast = bitcast <2 x i16> %load to <2 x half>
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store volatile <2 x half> %cast, <2 x half>* %b
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ret void
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}
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define void @bitcast_v4i16(<4 x i16> *%a, <4 x half>* %b) #0 {
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; CHECK-LABEL: bitcast_v4i16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldr d0, [x0]
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; CHECK-NEXT: str d0, [x1]
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; CHECK-NEXT: ret
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%load = load volatile <4 x i16>, <4 x i16>* %a
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%cast = bitcast <4 x i16> %load to <4 x half>
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store volatile <4 x half> %cast, <4 x half>* %b
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ret void
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}
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define void @bitcast_v8i16(<8 x i16> *%a, <8 x half>* %b) #0 {
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; CHECK-LABEL: bitcast_v8i16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldr q0, [x0]
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; CHECK-NEXT: str q0, [x1]
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; CHECK-NEXT: ret
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%load = load volatile <8 x i16>, <8 x i16>* %a
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%cast = bitcast <8 x i16> %load to <8 x half>
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store volatile <8 x half> %cast, <8 x half>* %b
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ret void
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}
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define void @bitcast_v16i16(<16 x i16> *%a, <16 x half>* %b) #0 {
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; CHECK-LABEL: bitcast_v16i16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldr q0, [x0]
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; CHECK-NEXT: ldr q1, [x0, #16]
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; CHECK-NEXT: str q1, [x1, #16]
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; CHECK-NEXT: str q0, [x1]
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; CHECK-NEXT: ret
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%load = load volatile <16 x i16>, <16 x i16>* %a
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%cast = bitcast <16 x i16> %load to <16 x half>
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store volatile <16 x half> %cast, <16 x half>* %b
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ret void
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}
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define void @bitcast_v2i32(<2 x i32> *%a, <2 x float>* %b) #0 {
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; CHECK-LABEL: bitcast_v2i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldr d0, [x0]
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; CHECK-NEXT: str d0, [x1]
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; CHECK-NEXT: ret
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%load = load volatile <2 x i32>, <2 x i32>* %a
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%cast = bitcast <2 x i32> %load to <2 x float>
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store volatile <2 x float> %cast, <2 x float>* %b
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ret void
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}
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define void @bitcast_v4i32(<4 x i32> *%a, <4 x float>* %b) #0 {
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; CHECK-LABEL: bitcast_v4i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldr q0, [x0]
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; CHECK-NEXT: str q0, [x1]
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; CHECK-NEXT: ret
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%load = load volatile <4 x i32>, <4 x i32>* %a
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%cast = bitcast <4 x i32> %load to <4 x float>
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store volatile <4 x float> %cast, <4 x float>* %b
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ret void
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}
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define void @bitcast_v8i32(<8 x i32> *%a, <8 x float>* %b) #0 {
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; CHECK-LABEL: bitcast_v8i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldr q0, [x0]
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; CHECK-NEXT: ldr q1, [x0, #16]
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; CHECK-NEXT: str q1, [x1, #16]
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; CHECK-NEXT: str q0, [x1]
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; CHECK-NEXT: ret
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%load = load volatile <8 x i32>, <8 x i32>* %a
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%cast = bitcast <8 x i32> %load to <8 x float>
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store volatile <8 x float> %cast, <8 x float>* %b
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ret void
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}
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define void @bitcast_v1i64(<1 x i64> *%a, <1 x double>* %b) #0 {
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; CHECK-LABEL: bitcast_v1i64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldr d0, [x0]
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; CHECK-NEXT: str d0, [x1]
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; CHECK-NEXT: ret
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%load = load volatile <1 x i64>, <1 x i64>* %a
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%cast = bitcast <1 x i64> %load to <1 x double>
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store volatile <1 x double> %cast, <1 x double>* %b
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ret void
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}
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define void @bitcast_v2i64(<2 x i64> *%a, <2 x double>* %b) #0 {
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; CHECK-LABEL: bitcast_v2i64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldr q0, [x0]
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; CHECK-NEXT: str q0, [x1]
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; CHECK-NEXT: ret
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%load = load volatile <2 x i64>, <2 x i64>* %a
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%cast = bitcast <2 x i64> %load to <2 x double>
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store volatile <2 x double> %cast, <2 x double>* %b
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ret void
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}
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define void @bitcast_v4i64(<4 x i64> *%a, <4 x double>* %b) #0 {
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; CHECK-LABEL: bitcast_v4i64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldr q0, [x0]
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; CHECK-NEXT: ldr q1, [x0, #16]
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; CHECK-NEXT: str q1, [x1, #16]
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; CHECK-NEXT: str q0, [x1]
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; CHECK-NEXT: ret
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%load = load volatile <4 x i64>, <4 x i64>* %a
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%cast = bitcast <4 x i64> %load to <4 x double>
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store volatile <4 x double> %cast, <4 x double>* %b
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ret void
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}
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attributes #0 = { "target-features"="+sve" }
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