564 lines
14 KiB
LLVM
564 lines
14 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s
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; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve -mattr=+use-scalar-inc-vl < %s | FileCheck %s -check-prefix=USE_SCALAR_INC
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; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve2 < %s | FileCheck %s -check-prefix=USE_SCALAR_INC
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; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sme < %s | FileCheck %s -check-prefix=USE_SCALAR_INC
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;
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; CNTB
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;
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define i64 @cntb() {
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; CHECK-LABEL: cntb:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cntb x0, vl2
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; CHECK-NEXT: ret
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;
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; USE_SCALAR_INC-LABEL: cntb:
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; USE_SCALAR_INC: // %bb.0:
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; USE_SCALAR_INC-NEXT: cntb x0, vl2
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; USE_SCALAR_INC-NEXT: ret
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%out = call i64 @llvm.aarch64.sve.cntb(i32 2)
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ret i64 %out
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}
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define i64 @cntb_mul3() {
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; CHECK-LABEL: cntb_mul3:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cntb x0, vl6, mul #3
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; CHECK-NEXT: ret
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;
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; USE_SCALAR_INC-LABEL: cntb_mul3:
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; USE_SCALAR_INC: // %bb.0:
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; USE_SCALAR_INC-NEXT: cntb x0, vl6, mul #3
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; USE_SCALAR_INC-NEXT: ret
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%cnt = call i64 @llvm.aarch64.sve.cntb(i32 6)
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%out = mul i64 %cnt, 3
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ret i64 %out
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}
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define i64 @cntb_mul4() {
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; CHECK-LABEL: cntb_mul4:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cntb x0, vl8, mul #4
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; CHECK-NEXT: ret
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;
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; USE_SCALAR_INC-LABEL: cntb_mul4:
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; USE_SCALAR_INC: // %bb.0:
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; USE_SCALAR_INC-NEXT: cntb x0, vl8, mul #4
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; USE_SCALAR_INC-NEXT: ret
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%cnt = call i64 @llvm.aarch64.sve.cntb(i32 8)
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%out = mul i64 %cnt, 4
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ret i64 %out
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}
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;
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; CNTH
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;
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define i64 @cnth() {
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; CHECK-LABEL: cnth:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cnth x0, vl3
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; CHECK-NEXT: ret
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;
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; USE_SCALAR_INC-LABEL: cnth:
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; USE_SCALAR_INC: // %bb.0:
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; USE_SCALAR_INC-NEXT: cnth x0, vl3
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; USE_SCALAR_INC-NEXT: ret
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%out = call i64 @llvm.aarch64.sve.cnth(i32 3)
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ret i64 %out
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}
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define i64 @cnth_mul5() {
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; CHECK-LABEL: cnth_mul5:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cnth x0, vl7, mul #5
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; CHECK-NEXT: ret
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;
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; USE_SCALAR_INC-LABEL: cnth_mul5:
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; USE_SCALAR_INC: // %bb.0:
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; USE_SCALAR_INC-NEXT: cnth x0, vl7, mul #5
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; USE_SCALAR_INC-NEXT: ret
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%cnt = call i64 @llvm.aarch64.sve.cnth(i32 7)
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%out = mul i64 %cnt, 5
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ret i64 %out
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}
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define i64 @cnth_mul8() {
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; CHECK-LABEL: cnth_mul8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cnth x0, vl5, mul #8
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; CHECK-NEXT: ret
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;
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; USE_SCALAR_INC-LABEL: cnth_mul8:
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; USE_SCALAR_INC: // %bb.0:
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; USE_SCALAR_INC-NEXT: cnth x0, vl5, mul #8
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; USE_SCALAR_INC-NEXT: ret
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%cnt = call i64 @llvm.aarch64.sve.cnth(i32 5)
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%out = mul i64 %cnt, 8
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ret i64 %out
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}
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;
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; CNTW
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;
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define i64 @cntw() {
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; CHECK-LABEL: cntw:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cntw x0, vl4
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; CHECK-NEXT: ret
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;
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; USE_SCALAR_INC-LABEL: cntw:
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; USE_SCALAR_INC: // %bb.0:
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; USE_SCALAR_INC-NEXT: cntw x0, vl4
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; USE_SCALAR_INC-NEXT: ret
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%out = call i64 @llvm.aarch64.sve.cntw(i32 4)
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ret i64 %out
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}
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define i64 @cntw_mul11() {
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; CHECK-LABEL: cntw_mul11:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cntw x0, vl8, mul #11
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; CHECK-NEXT: ret
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;
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; USE_SCALAR_INC-LABEL: cntw_mul11:
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; USE_SCALAR_INC: // %bb.0:
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; USE_SCALAR_INC-NEXT: cntw x0, vl8, mul #11
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; USE_SCALAR_INC-NEXT: ret
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%cnt = call i64 @llvm.aarch64.sve.cntw(i32 8)
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%out = mul i64 %cnt, 11
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ret i64 %out
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}
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define i64 @cntw_mul2() {
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; CHECK-LABEL: cntw_mul2:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cntw x0, vl6, mul #2
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; CHECK-NEXT: ret
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;
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; USE_SCALAR_INC-LABEL: cntw_mul2:
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; USE_SCALAR_INC: // %bb.0:
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; USE_SCALAR_INC-NEXT: cntw x0, vl6, mul #2
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; USE_SCALAR_INC-NEXT: ret
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%cnt = call i64 @llvm.aarch64.sve.cntw(i32 6)
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%out = mul i64 %cnt, 2
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ret i64 %out
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}
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;
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; CNTD
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;
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define i64 @cntd() {
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; CHECK-LABEL: cntd:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cntd x0, vl5
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; CHECK-NEXT: ret
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;
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; USE_SCALAR_INC-LABEL: cntd:
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; USE_SCALAR_INC: // %bb.0:
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; USE_SCALAR_INC-NEXT: cntd x0, vl5
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; USE_SCALAR_INC-NEXT: ret
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%out = call i64 @llvm.aarch64.sve.cntd(i32 5)
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ret i64 %out
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}
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define i64 @cntd_mul15() {
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; CHECK-LABEL: cntd_mul15:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cntd x0, vl16, mul #15
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; CHECK-NEXT: ret
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;
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; USE_SCALAR_INC-LABEL: cntd_mul15:
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; USE_SCALAR_INC: // %bb.0:
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; USE_SCALAR_INC-NEXT: cntd x0, vl16, mul #15
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; USE_SCALAR_INC-NEXT: ret
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%cnt = call i64 @llvm.aarch64.sve.cntd(i32 9)
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%out = mul i64 %cnt, 15
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ret i64 %out
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}
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define i64 @cntd_mul16() {
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; CHECK-LABEL: cntd_mul16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cntd x0, vl32, mul #16
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; CHECK-NEXT: ret
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;
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; USE_SCALAR_INC-LABEL: cntd_mul16:
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; USE_SCALAR_INC: // %bb.0:
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; USE_SCALAR_INC-NEXT: cntd x0, vl32, mul #16
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; USE_SCALAR_INC-NEXT: ret
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%cnt = call i64 @llvm.aarch64.sve.cntd(i32 10)
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%out = mul i64 %cnt, 16
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ret i64 %out
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}
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;
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; CNTP
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;
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define i64 @cntp_b8(<vscale x 16 x i1> %pg, <vscale x 16 x i1> %a) {
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; CHECK-LABEL: cntp_b8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cntp x0, p0, p1.b
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; CHECK-NEXT: ret
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;
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; USE_SCALAR_INC-LABEL: cntp_b8:
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; USE_SCALAR_INC: // %bb.0:
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; USE_SCALAR_INC-NEXT: cntp x0, p0, p1.b
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; USE_SCALAR_INC-NEXT: ret
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%out = call i64 @llvm.aarch64.sve.cntp.nxv16i1(<vscale x 16 x i1> %pg,
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<vscale x 16 x i1> %a)
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ret i64 %out
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}
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define i64 @cntp_b16(<vscale x 8 x i1> %pg, <vscale x 8 x i1> %a) {
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; CHECK-LABEL: cntp_b16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cntp x0, p0, p1.h
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; CHECK-NEXT: ret
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;
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; USE_SCALAR_INC-LABEL: cntp_b16:
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; USE_SCALAR_INC: // %bb.0:
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; USE_SCALAR_INC-NEXT: cntp x0, p0, p1.h
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; USE_SCALAR_INC-NEXT: ret
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%out = call i64 @llvm.aarch64.sve.cntp.nxv8i1(<vscale x 8 x i1> %pg,
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<vscale x 8 x i1> %a)
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ret i64 %out
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}
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define i64 @cntp_b32(<vscale x 4 x i1> %pg, <vscale x 4 x i1> %a) {
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; CHECK-LABEL: cntp_b32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cntp x0, p0, p1.s
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; CHECK-NEXT: ret
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;
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; USE_SCALAR_INC-LABEL: cntp_b32:
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; USE_SCALAR_INC: // %bb.0:
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; USE_SCALAR_INC-NEXT: cntp x0, p0, p1.s
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; USE_SCALAR_INC-NEXT: ret
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%out = call i64 @llvm.aarch64.sve.cntp.nxv4i1(<vscale x 4 x i1> %pg,
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<vscale x 4 x i1> %a)
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ret i64 %out
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}
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define i64 @cntp_b64(<vscale x 2 x i1> %pg, <vscale x 2 x i1> %a) {
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; CHECK-LABEL: cntp_b64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cntp x0, p0, p1.d
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; CHECK-NEXT: ret
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;
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; USE_SCALAR_INC-LABEL: cntp_b64:
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; USE_SCALAR_INC: // %bb.0:
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; USE_SCALAR_INC-NEXT: cntp x0, p0, p1.d
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; USE_SCALAR_INC-NEXT: ret
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%out = call i64 @llvm.aarch64.sve.cntp.nxv2i1(<vscale x 2 x i1> %pg,
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<vscale x 2 x i1> %a)
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ret i64 %out
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}
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;
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; INCB
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;
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define i64 @incb(i64 %a) {
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; CHECK-LABEL: incb:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cntb x8, vl5
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; CHECK-NEXT: add x0, x8, x0
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; CHECK-NEXT: ret
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;
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; USE_SCALAR_INC-LABEL: incb:
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; USE_SCALAR_INC: // %bb.0:
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; USE_SCALAR_INC-NEXT: incb x0, vl5
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; USE_SCALAR_INC-NEXT: ret
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%cnt = call i64 @llvm.aarch64.sve.cntb(i32 5)
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%out = add i64 %cnt, %a
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ret i64 %out
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}
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define i64 @incb_mul(i64 %a) {
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; CHECK-LABEL: incb_mul:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cntb x8, vl4
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; CHECK-NEXT: add x0, x0, x8, lsl #2
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; CHECK-NEXT: ret
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;
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; USE_SCALAR_INC-LABEL: incb_mul:
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; USE_SCALAR_INC: // %bb.0:
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; USE_SCALAR_INC-NEXT: incb x0, vl4, mul #4
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; USE_SCALAR_INC-NEXT: ret
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%cnt = call i64 @llvm.aarch64.sve.cntb(i32 4)
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%mul = mul i64 %cnt, 4
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%out = add i64 %mul, %a
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ret i64 %out
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}
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;
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; DECB
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;
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define i64 @decb(i64 %a) {
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; CHECK-LABEL: decb:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cntb x8, vl6
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; CHECK-NEXT: sub x0, x0, x8
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; CHECK-NEXT: ret
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;
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; USE_SCALAR_INC-LABEL: decb:
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; USE_SCALAR_INC: // %bb.0:
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; USE_SCALAR_INC-NEXT: decb x0, vl6
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; USE_SCALAR_INC-NEXT: ret
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%cnt = call i64 @llvm.aarch64.sve.cntb(i32 6)
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%out = sub i64 %a, %cnt
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ret i64 %out
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}
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define i64 @decb_mul(i64 %a) {
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; CHECK-LABEL: decb_mul:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cntb x8, vl7
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; CHECK-NEXT: sub x0, x0, x8, lsl #3
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; CHECK-NEXT: ret
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;
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; USE_SCALAR_INC-LABEL: decb_mul:
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; USE_SCALAR_INC: // %bb.0:
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; USE_SCALAR_INC-NEXT: decb x0, vl7, mul #8
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; USE_SCALAR_INC-NEXT: ret
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%cnt = call i64 @llvm.aarch64.sve.cntb(i32 7)
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%mul = mul i64 %cnt, 8
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%out = sub i64 %a, %mul
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ret i64 %out
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}
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;
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; INCH
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;
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define i64 @inch(i64 %a) {
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; CHECK-LABEL: inch:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cnth x8, vl4
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; CHECK-NEXT: add x0, x8, x0
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; CHECK-NEXT: ret
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;
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; USE_SCALAR_INC-LABEL: inch:
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; USE_SCALAR_INC: // %bb.0:
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; USE_SCALAR_INC-NEXT: inch x0, vl4
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; USE_SCALAR_INC-NEXT: ret
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%cnt = call i64 @llvm.aarch64.sve.cnth(i32 4)
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%out = add i64 %cnt, %a
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ret i64 %out
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}
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define i64 @inch_mul(i64 %a) {
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; CHECK-LABEL: inch_mul:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cnth x8, vl8, mul #5
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; CHECK-NEXT: add x0, x8, x0
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; CHECK-NEXT: ret
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;
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; USE_SCALAR_INC-LABEL: inch_mul:
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; USE_SCALAR_INC: // %bb.0:
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; USE_SCALAR_INC-NEXT: inch x0, vl8, mul #5
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; USE_SCALAR_INC-NEXT: ret
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%cnt = call i64 @llvm.aarch64.sve.cnth(i32 8)
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%mul = mul i64 %cnt, 5
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%out = add i64 %mul, %a
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ret i64 %out
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}
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;
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; DECH
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;
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define i64 @dech(i64 %a) {
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; CHECK-LABEL: dech:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cnth x8, vl1
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; CHECK-NEXT: sub x0, x0, x8
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; CHECK-NEXT: ret
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;
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; USE_SCALAR_INC-LABEL: dech:
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; USE_SCALAR_INC: // %bb.0:
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; USE_SCALAR_INC-NEXT: dech x0, vl1
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; USE_SCALAR_INC-NEXT: ret
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%cnt = call i64 @llvm.aarch64.sve.cnth(i32 1)
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%out = sub i64 %a, %cnt
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ret i64 %out
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}
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define i64 @dech_mul(i64 %a) {
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; CHECK-LABEL: dech_mul:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cnth x8, vl16, mul #7
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; CHECK-NEXT: sub x0, x0, x8
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; CHECK-NEXT: ret
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;
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; USE_SCALAR_INC-LABEL: dech_mul:
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; USE_SCALAR_INC: // %bb.0:
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; USE_SCALAR_INC-NEXT: dech x0, vl16, mul #7
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; USE_SCALAR_INC-NEXT: ret
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%cnt = call i64 @llvm.aarch64.sve.cnth(i32 9)
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%mul = mul i64 %cnt, 7
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%out = sub i64 %a, %mul
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ret i64 %out
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}
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;
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; INCW
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;
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define i64 @incw(i64 %a) {
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; CHECK-LABEL: incw:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cntw x8, #16
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; CHECK-NEXT: add x0, x8, x0
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; CHECK-NEXT: ret
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;
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; USE_SCALAR_INC-LABEL: incw:
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; USE_SCALAR_INC: // %bb.0:
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; USE_SCALAR_INC-NEXT: incw x0, #16
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; USE_SCALAR_INC-NEXT: ret
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%cnt = call i64 @llvm.aarch64.sve.cntw(i32 16)
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%out = add i64 %cnt, %a
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ret i64 %out
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}
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define i64 @incw_mul(i64 %a) {
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; CHECK-LABEL: incw_mul:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cntw x8, vl32, mul #12
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; CHECK-NEXT: add x0, x8, x0
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; CHECK-NEXT: ret
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;
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; USE_SCALAR_INC-LABEL: incw_mul:
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; USE_SCALAR_INC: // %bb.0:
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; USE_SCALAR_INC-NEXT: incw x0, vl32, mul #12
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; USE_SCALAR_INC-NEXT: ret
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%cnt = call i64 @llvm.aarch64.sve.cntw(i32 10)
|
|
%mul = mul i64 %cnt, 12
|
|
%out = add i64 %mul, %a
|
|
ret i64 %out
|
|
}
|
|
|
|
;
|
|
; DECW
|
|
;
|
|
|
|
define i64 @decw(i64 %a) {
|
|
; CHECK-LABEL: decw:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: cntw x8
|
|
; CHECK-NEXT: sub x0, x0, x8
|
|
; CHECK-NEXT: ret
|
|
;
|
|
; USE_SCALAR_INC-LABEL: decw:
|
|
; USE_SCALAR_INC: // %bb.0:
|
|
; USE_SCALAR_INC-NEXT: decw x0
|
|
; USE_SCALAR_INC-NEXT: ret
|
|
%cnt = call i64 @llvm.aarch64.sve.cntw(i32 31)
|
|
%out = sub i64 %a, %cnt
|
|
ret i64 %out
|
|
}
|
|
|
|
define i64 @decw_mul(i64 %a) {
|
|
; CHECK-LABEL: decw_mul:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: cntw x8, vl128
|
|
; CHECK-NEXT: sub x0, x0, x8, lsl #4
|
|
; CHECK-NEXT: ret
|
|
;
|
|
; USE_SCALAR_INC-LABEL: decw_mul:
|
|
; USE_SCALAR_INC: // %bb.0:
|
|
; USE_SCALAR_INC-NEXT: decw x0, vl128, mul #16
|
|
; USE_SCALAR_INC-NEXT: ret
|
|
%cnt = call i64 @llvm.aarch64.sve.cntw(i32 12)
|
|
%mul = mul i64 %cnt, 16
|
|
%out = sub i64 %a, %mul
|
|
ret i64 %out
|
|
}
|
|
|
|
define i64 @incd(i64 %a) {
|
|
; CHECK-LABEL: incd:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: cntd x8, vl8
|
|
; CHECK-NEXT: add x0, x8, x0
|
|
; CHECK-NEXT: ret
|
|
;
|
|
; USE_SCALAR_INC-LABEL: incd:
|
|
; USE_SCALAR_INC: // %bb.0:
|
|
; USE_SCALAR_INC-NEXT: incd x0, vl8
|
|
; USE_SCALAR_INC-NEXT: ret
|
|
%cnt = call i64 @llvm.aarch64.sve.cntd(i32 8)
|
|
%out = add i64 %cnt, %a
|
|
ret i64 %out
|
|
}
|
|
|
|
define i64 @incd_mul(i64 %a) {
|
|
; CHECK-LABEL: incd_mul:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: cntd x8, all, mul #15
|
|
; CHECK-NEXT: add x0, x8, x0
|
|
; CHECK-NEXT: ret
|
|
;
|
|
; USE_SCALAR_INC-LABEL: incd_mul:
|
|
; USE_SCALAR_INC: // %bb.0:
|
|
; USE_SCALAR_INC-NEXT: incd x0, all, mul #15
|
|
; USE_SCALAR_INC-NEXT: ret
|
|
%cnt = call i64 @llvm.aarch64.sve.cntd(i32 31)
|
|
%mul = mul i64 %cnt, 15
|
|
%out = add i64 %mul, %a
|
|
ret i64 %out
|
|
}
|
|
|
|
;
|
|
; DECD
|
|
;
|
|
|
|
define i64 @decd(i64 %a) {
|
|
; CHECK-LABEL: decd:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: cntd x8, #16
|
|
; CHECK-NEXT: sub x0, x0, x8
|
|
; CHECK-NEXT: ret
|
|
;
|
|
; USE_SCALAR_INC-LABEL: decd:
|
|
; USE_SCALAR_INC: // %bb.0:
|
|
; USE_SCALAR_INC-NEXT: decd x0, #16
|
|
; USE_SCALAR_INC-NEXT: ret
|
|
%cnt = call i64 @llvm.aarch64.sve.cntd(i32 16)
|
|
%out = sub i64 %a, %cnt
|
|
ret i64 %out
|
|
}
|
|
|
|
define i64 @decd_mul(i64 %a) {
|
|
; CHECK-LABEL: decd_mul:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: cntd x8, vl2, mul #9
|
|
; CHECK-NEXT: sub x0, x0, x8
|
|
; CHECK-NEXT: ret
|
|
;
|
|
; USE_SCALAR_INC-LABEL: decd_mul:
|
|
; USE_SCALAR_INC: // %bb.0:
|
|
; USE_SCALAR_INC-NEXT: decd x0, vl2, mul #9
|
|
; USE_SCALAR_INC-NEXT: ret
|
|
%cnt = call i64 @llvm.aarch64.sve.cntd(i32 2)
|
|
%mul = mul i64 %cnt, 9
|
|
%out = sub i64 %a, %mul
|
|
ret i64 %out
|
|
}
|
|
|
|
declare i64 @llvm.aarch64.sve.cntb(i32 %pattern)
|
|
declare i64 @llvm.aarch64.sve.cnth(i32 %pattern)
|
|
declare i64 @llvm.aarch64.sve.cntw(i32 %pattern)
|
|
declare i64 @llvm.aarch64.sve.cntd(i32 %pattern)
|
|
|
|
declare i64 @llvm.aarch64.sve.cntp.nxv16i1(<vscale x 16 x i1>, <vscale x 16 x i1>)
|
|
declare i64 @llvm.aarch64.sve.cntp.nxv8i1(<vscale x 8 x i1>, <vscale x 8 x i1>)
|
|
declare i64 @llvm.aarch64.sve.cntp.nxv4i1(<vscale x 4 x i1>, <vscale x 4 x i1>)
|
|
declare i64 @llvm.aarch64.sve.cntp.nxv2i1(<vscale x 2 x i1>, <vscale x 2 x i1>)
|