340 lines
12 KiB
LLVM
340 lines
12 KiB
LLVM
; RUN: llc -mtriple=aarch64--linux-gnu -mattr=+sve < %s | FileCheck %s
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declare dso_local void @val_fn(<vscale x 4 x float>)
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declare dso_local void @ptr_fn(<vscale x 4 x float>*)
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; An alloca of a scalable vector shouldn't trigger stack protection.
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; CHECK-LABEL: call_value:
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; CHECK-NOT: mov x19, sp
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; CHECK: addvl sp, sp, #-1
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; CHECK-NOT: __stack_chk_guard
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; CHECK: st1w { {{z[0-9]+.s}} }, {{p[0-9]+}}, [x29, #-1, mul vl]
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define void @call_value() #0 {
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entry:
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%x = alloca <vscale x 4 x float>, align 16
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store <vscale x 4 x float> zeroinitializer, <vscale x 4 x float>* %x, align 16
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%0 = load <vscale x 4 x float>, <vscale x 4 x float>* %x, align 16
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call void @val_fn(<vscale x 4 x float> %0)
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ret void
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}
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; CHECK-LABEL: call_value_strong:
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; CHECK-NOT: mov x19, sp
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; CHECK: addvl sp, sp, #-1
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; CHECK-NOT: __stack_chk_guard
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; CHECK: st1w { {{z[0-9]+.s}} }, {{p[0-9]+}}, [x29, #-1, mul vl]
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define void @call_value_strong() #1 {
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entry:
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%x = alloca <vscale x 4 x float>, align 16
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store <vscale x 4 x float> zeroinitializer, <vscale x 4 x float>* %x, align 16
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%0 = load <vscale x 4 x float>, <vscale x 4 x float>* %x, align 16
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call void @val_fn(<vscale x 4 x float> %0)
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ret void
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}
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; Address-taking of a scalable vector should trigger stack protection only with
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; sspstrong, and the scalable vector should be be placed below the stack guard.
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; CHECK-LABEL: call_ptr:
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; CHECK-NOT: mov x19, sp
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; CHECK: addvl sp, sp, #-1
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; CHECK-NOT: __stack_chk_guard
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; CHECK: addvl x0, x29, #-1
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; CHECK: bl ptr_fn
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define void @call_ptr() #0 {
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entry:
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%x = alloca <vscale x 4 x float>, align 16
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call void @ptr_fn(<vscale x 4 x float>* %x)
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ret void
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}
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; CHECK-LABEL: call_ptr_strong:
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; CHECK: mov x29, sp
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; CHECK: addvl sp, sp, #-2
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; CHECK-DAG: addvl [[ADDR:x[0-9]+]], x29, #-1
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; CHECK-DAG: ldr [[VAL:x[0-9]+]], [{{x[0-9]+}}, :lo12:__stack_chk_guard]
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; CHECK-DAG: str [[VAL]], [[[ADDR]]]
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; CHECK-DAG: addvl x0, x29, #-2
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; CHECK: bl ptr_fn
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define void @call_ptr_strong() #1 {
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entry:
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%x = alloca <vscale x 4 x float>, align 16
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call void @ptr_fn(<vscale x 4 x float>* %x)
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ret void
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}
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; Check that both variables are addressed in the same way
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; CHECK-LABEL: call_both:
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; CHECK: mov x29, sp
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; CHECK: addvl sp, sp, #-2
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; CHECK-NOT: __stack_chk_guard
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; CHECK: st1w { {{z[0-9]+.s}} }, {{p[0-9]+}}, [x29, #-1, mul vl]
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; CHECK: bl val_fn
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; CHECK: addvl x0, x29, #-2
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; CHECK: bl ptr_fn
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define void @call_both() #0 {
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entry:
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%x = alloca <vscale x 4 x float>, align 16
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%y = alloca <vscale x 4 x float>, align 16
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store <vscale x 4 x float> zeroinitializer, <vscale x 4 x float>* %x, align 16
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%0 = load <vscale x 4 x float>, <vscale x 4 x float>* %x, align 16
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call void @val_fn(<vscale x 4 x float> %0)
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call void @ptr_fn(<vscale x 4 x float>* %y)
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ret void
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}
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; CHECK-LABEL: call_both_strong:
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; CHECK: mov x29, sp
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; CHECK: addvl sp, sp, #-3
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; CHECK-DAG: addvl [[ADDR:x[0-9]+]], x29, #-1
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; CHECK-DAG: ldr [[VAL:x[0-9]+]], [{{x[0-9]+}}, :lo12:__stack_chk_guard]
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; CHECK-DAG: str [[VAL]], [[[ADDR]]]
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; CHECK-DAG: st1w { {{z[0-9]+.s}} }, {{p[0-9]+}}, [x29, #-2, mul vl]
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; CHECK: bl val_fn
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; CHECK: addvl x0, x29, #-3
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; CHECK: bl ptr_fn
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define void @call_both_strong() #1 {
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entry:
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%x = alloca <vscale x 4 x float>, align 16
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%y = alloca <vscale x 4 x float>, align 16
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store <vscale x 4 x float> zeroinitializer, <vscale x 4 x float>* %x, align 16
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%0 = load <vscale x 4 x float>, <vscale x 4 x float>* %x, align 16
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call void @val_fn(<vscale x 4 x float> %0)
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call void @ptr_fn(<vscale x 4 x float>* %y)
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ret void
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}
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; Pushed callee-saved regs should be above the stack guard
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; CHECK-LABEL: callee_save:
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; CHECK: mov x29, sp
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; CHECK: addvl sp, sp, #-18
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; CHECK: str {{z[0-9]+}}, [sp, #{{[0-9]+}}, mul vl]
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; CHECK-NOT: mov x29, sp
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; CHECK: addvl sp, sp, #-1
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; CHECK-NOT: __stack_chk_guard
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; CHECK: addvl [[REG:x[0-9]+]], x29, #-11
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; CHECK: st1w { {{z[0-9]+.s}} }, {{p[0-9]+}}, [[[REG]], #-8, mul vl]
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define void @callee_save(<vscale x 4 x float> %x) #0 {
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entry:
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%x.addr = alloca <vscale x 4 x float>, align 16
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store <vscale x 4 x float> %x, <vscale x 4 x float>* %x.addr, align 16
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call void @ptr_fn(<vscale x 4 x float>* %x.addr)
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ret void
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}
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; CHECK-LABEL: callee_save_strong:
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; CHECK: mov x29, sp
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; CHECK: addvl sp, sp, #-18
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; CHECK: str {{z[0-9]+}}, [sp, #{{[0-9]+}}, mul vl]
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; CHECK: addvl sp, sp, #-2
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; CHECK-DAG: addvl [[ADDR:x[0-9]+]], x29, #-19
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; CHECK-DAG: ldr [[VAL:x[0-9]+]], [{{x[0-9]+}}, :lo12:__stack_chk_guard]
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; CHECK-DAG: str [[VAL]], [[[ADDR]]]
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; CHECK-DAG: addvl [[ADDR2:x[0-9]+]], x29, #-12
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; CHECK-DAG: st1w { z0.s }, p0, [[[ADDR2]], #-8, mul vl]
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define void @callee_save_strong(<vscale x 4 x float> %x) #1 {
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entry:
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%x.addr = alloca <vscale x 4 x float>, align 16
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store <vscale x 4 x float> %x, <vscale x 4 x float>* %x.addr, align 16
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call void @ptr_fn(<vscale x 4 x float>* %x.addr)
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ret void
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}
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; Check that local stack allocation works correctly both when we have a stack
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; guard but no vulnerable SVE objects, and when we do have such objects.
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; CHECK-LABEL: local_stack_alloc:
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; CHECK: mov x29, sp
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; CHECK: addvl sp, sp, #-2
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; CHECK: sub sp, sp, #16, lsl #12
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; CHECK: sub sp, sp, #16
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; Stack guard is placed below the SVE stack area (and above all fixed-width objects)
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; CHECK-DAG: add [[STACK_GUARD_SPILL_PART_LOC:x[0-9]+]], sp, #8, lsl #12
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; CHECK-DAG: add [[STACK_GUARD_SPILL_PART_LOC]], [[STACK_GUARD_SPILL_PART_LOC]], #16
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; CHECK-DAG: ldr [[STACK_GUARD:x[0-9]+]], [{{x[0-9]+}}, :lo12:__stack_chk_guard]
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; CHECK-DAG: str [[STACK_GUARD]], [[[STACK_GUARD_SPILL_PART_LOC]], #32760]
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; char_arr is below the stack guard
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; CHECK-DAG: add [[CHAR_ARR_LOC:x[0-9]+]], sp, #16, lsl #12
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; CHECK-DAG: strb wzr, [[[CHAR_ARR_LOC]]]
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; large1 is accessed via a virtual base register
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; CHECK-DAG: add [[LARGE1:x[0-9]+]], sp, #8, lsl #12
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; CHECK-DAG: stp x0, x0, [[[LARGE1]]]
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; large2 is at the bottom of the stack
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; CHECK-DAG: stp x0, x0, [sp]
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; vec1 and vec2 are in the SVE stack immediately below fp
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; CHECK-DAG: addvl x0, x29, #-1
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; CHECK-DAG: bl ptr_fn
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; CHECK-DAG: addvl x0, x29, #-2
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; CHECK-DAG: bl ptr_fn
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define void @local_stack_alloc(i64 %val) #0 {
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entry:
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%char_arr = alloca [8 x i8], align 4
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%gep0 = getelementptr [8 x i8], [8 x i8]* %char_arr, i64 0, i64 0
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store i8 0, i8* %gep0, align 8
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%large1 = alloca [4096 x i64], align 8
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%large2 = alloca [4096 x i64], align 8
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%vec_1 = alloca <vscale x 4 x float>, align 16
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%vec_2 = alloca <vscale x 4 x float>, align 16
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%gep1 = getelementptr [4096 x i64], [4096 x i64]* %large1, i64 0, i64 0
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%gep2 = getelementptr [4096 x i64], [4096 x i64]* %large1, i64 0, i64 1
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store i64 %val, i64* %gep1, align 8
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store i64 %val, i64* %gep2, align 8
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%gep3 = getelementptr [4096 x i64], [4096 x i64]* %large2, i64 0, i64 0
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%gep4 = getelementptr [4096 x i64], [4096 x i64]* %large2, i64 0, i64 1
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store i64 %val, i64* %gep3, align 8
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store i64 %val, i64* %gep4, align 8
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call void @ptr_fn(<vscale x 4 x float>* %vec_1)
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call void @ptr_fn(<vscale x 4 x float>* %vec_2)
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ret void
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}
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; CHECK-LABEL: local_stack_alloc_strong:
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; CHECK: mov x29, sp
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; CHECK: addvl sp, sp, #-3
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; CHECK: sub sp, sp, #16, lsl #12
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; CHECK: sub sp, sp, #16
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; Stack guard is placed at the top of the SVE stack area
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; CHECK-DAG: ldr [[STACK_GUARD:x[0-9]+]], [{{x[0-9]+}}, :lo12:__stack_chk_guard]
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; CHECK-DAG: addvl [[STACK_GUARD_POS:x[0-9]+]], x29, #-1
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; CHECK-DAG: str [[STACK_GUARD]], [[[STACK_GUARD_POS]]]
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; char_arr is below the SVE stack area
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; CHECK-DAG: add [[CHAR_ARR:x[0-9]+]], sp, #15, lsl #12 // =61440
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; CHECK-DAG: add [[CHAR_ARR]], [[CHAR_ARR]], #9
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; CHECK-DAG: strb wzr, [[[CHAR_ARR]], #4095]
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; large1 is accessed via a virtual base register
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; CHECK-DAG: add [[LARGE1:x[0-9]+]], sp, #8, lsl #12
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; CHECK-DAG: stp x0, x0, [[[LARGE1]], #8]
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; large2 is at the bottom of the stack
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; CHECK-DAG: stp x0, x0, [sp, #8]
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; vec1 and vec2 are in the SVE stack area below the stack guard
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; CHECK-DAG: addvl x0, x29, #-2
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; CHECK-DAG: bl ptr_fn
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; CHECK-DAG: addvl x0, x29, #-3
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; CHECK-DAG: bl ptr_fn
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define void @local_stack_alloc_strong(i64 %val) #1 {
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entry:
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%char_arr = alloca [8 x i8], align 4
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%gep0 = getelementptr [8 x i8], [8 x i8]* %char_arr, i64 0, i64 0
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store i8 0, i8* %gep0, align 8
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%large1 = alloca [4096 x i64], align 8
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%large2 = alloca [4096 x i64], align 8
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%vec_1 = alloca <vscale x 4 x float>, align 16
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%vec_2 = alloca <vscale x 4 x float>, align 16
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%gep1 = getelementptr [4096 x i64], [4096 x i64]* %large1, i64 0, i64 0
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%gep2 = getelementptr [4096 x i64], [4096 x i64]* %large1, i64 0, i64 1
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store i64 %val, i64* %gep1, align 8
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store i64 %val, i64* %gep2, align 8
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%gep3 = getelementptr [4096 x i64], [4096 x i64]* %large2, i64 0, i64 0
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%gep4 = getelementptr [4096 x i64], [4096 x i64]* %large2, i64 0, i64 1
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store i64 %val, i64* %gep3, align 8
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store i64 %val, i64* %gep4, align 8
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call void @ptr_fn(<vscale x 4 x float>* %vec_1)
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call void @ptr_fn(<vscale x 4 x float>* %vec_2)
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ret void
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}
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; A GEP addressing into a vector of <vscale x 4 x float> is in-bounds for
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; offsets up to 3, but out-of-bounds (and so triggers stack protection with
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; sspstrong) after that.
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; CHECK-LABEL: vector_gep_3:
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; CHECK-NOT: __stack_chk_guard
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define void @vector_gep_3() #0 {
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entry:
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%vec = alloca <vscale x 4 x float>, align 16
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%gep = getelementptr <vscale x 4 x float>, <vscale x 4 x float>* %vec, i64 0, i64 3
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store float 0.0, float* %gep, align 4
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ret void
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}
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; CHECK-LABEL: vector_gep_4:
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; CHECK-NOT: __stack_chk_guard
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define void @vector_gep_4() #0 {
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entry:
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%vec = alloca <vscale x 4 x float>, align 16
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%gep = getelementptr <vscale x 4 x float>, <vscale x 4 x float>* %vec, i64 0, i64 4
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store float 0.0, float* %gep, align 4
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ret void
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}
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; CHECK-LABEL: vector_gep_twice:
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; CHECK-NOT: __stack_chk_guard
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define void @vector_gep_twice() #0 {
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entry:
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%vec = alloca <vscale x 4 x float>, align 16
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%gep1 = getelementptr <vscale x 4 x float>, <vscale x 4 x float>* %vec, i64 0, i64 3
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store float 0.0, float* %gep1, align 4
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%gep2 = getelementptr float, float* %gep1, i64 1
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store float 0.0, float* %gep2, align 4
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ret void
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}
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; CHECK-LABEL: vector_gep_n:
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; CHECK-NOT: __stack_chk_guard
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define void @vector_gep_n(i64 %n) #0 {
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entry:
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%vec = alloca <vscale x 4 x float>, align 16
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%gep = getelementptr <vscale x 4 x float>, <vscale x 4 x float>* %vec, i64 0, i64 %n
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store float 0.0, float* %gep, align 4
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ret void
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}
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; CHECK-LABEL: vector_gep_3_strong:
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; CHECK-NOT: __stack_chk_guard
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define void @vector_gep_3_strong() #1 {
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entry:
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%vec = alloca <vscale x 4 x float>, align 16
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%gep = getelementptr <vscale x 4 x float>, <vscale x 4 x float>* %vec, i64 0, i64 3
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store float 0.0, float* %gep, align 4
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ret void
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}
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; CHECK-LABEL: vector_gep_4_strong:
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; CHECK: __stack_chk_guard
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define void @vector_gep_4_strong(i64 %val) #1 {
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entry:
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%vec = alloca <vscale x 4 x float>, align 16
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%gep = getelementptr <vscale x 4 x float>, <vscale x 4 x float>* %vec, i64 0, i64 4
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store float 0.0, float* %gep, align 4
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ret void
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}
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; CHECK-LABEL: vector_gep_twice_strong:
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; CHECK: __stack_chk_guard
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define void @vector_gep_twice_strong() #1 {
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entry:
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%vec = alloca <vscale x 4 x float>, align 16
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%gep1 = getelementptr <vscale x 4 x float>, <vscale x 4 x float>* %vec, i64 0, i64 3
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store float 0.0, float* %gep1, align 4
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%gep2 = getelementptr float, float* %gep1, i64 1
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store float 0.0, float* %gep2, align 4
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ret void
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}
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; CHECK-LABEL: vector_gep_n_strong:
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; CHECK: __stack_chk_guard
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define void @vector_gep_n_strong(i64 %n) #1 {
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entry:
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%vec = alloca <vscale x 4 x float>, align 16
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%gep = getelementptr <vscale x 4 x float>, <vscale x 4 x float>* %vec, i64 0, i64 %n
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store float 0.0, float* %gep, align 4
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ret void
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}
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attributes #0 = { ssp "frame-pointer"="non-leaf" }
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attributes #1 = { sspstrong "frame-pointer"="non-leaf" }
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