118 lines
4.6 KiB
C
118 lines
4.6 KiB
C
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
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// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve \
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// RUN: -disable-O0-optnone -mvscale-min=4 -mvscale-max=4 \
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// RUN: -emit-llvm -o - %s | opt -S -passes=sroa | FileCheck %s
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// REQUIRES: aarch64-registered-target
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#include <arm_sve.h>
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#include <stddef.h>
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#define N 512
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typedef svint8_t fixed_int8_t __attribute__((arm_sve_vector_bits(N)));
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typedef svint16_t fixed_int16_t __attribute__((arm_sve_vector_bits(N)));
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typedef svint32_t fixed_int32_t __attribute__((arm_sve_vector_bits(N)));
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typedef svint64_t fixed_int64_t __attribute__((arm_sve_vector_bits(N)));
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typedef svuint8_t fixed_uint8_t __attribute__((arm_sve_vector_bits(N)));
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typedef svuint16_t fixed_uint16_t __attribute__((arm_sve_vector_bits(N)));
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typedef svuint32_t fixed_uint32_t __attribute__((arm_sve_vector_bits(N)));
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typedef svuint64_t fixed_uint64_t __attribute__((arm_sve_vector_bits(N)));
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typedef svfloat16_t fixed_float16_t __attribute__((arm_sve_vector_bits(N)));
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typedef svfloat32_t fixed_float32_t __attribute__((arm_sve_vector_bits(N)));
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typedef svfloat64_t fixed_float64_t __attribute__((arm_sve_vector_bits(N)));
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typedef svbool_t fixed_bool_t __attribute__((arm_sve_vector_bits(N)));
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// CHECK-LABEL: @subscript_int16(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[A:%.*]] = call <32 x i16> @llvm.vector.extract.v32i16.nxv8i16(<vscale x 8 x i16> [[A_COERCE:%.*]], i64 0)
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// CHECK-NEXT: [[VECEXT:%.*]] = extractelement <32 x i16> [[A]], i64 [[B:%.*]]
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// CHECK-NEXT: ret i16 [[VECEXT]]
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//
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int16_t subscript_int16(fixed_int16_t a, size_t b) {
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return a[b];
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}
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// CHECK-LABEL: @subscript_uint16(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[A:%.*]] = call <32 x i16> @llvm.vector.extract.v32i16.nxv8i16(<vscale x 8 x i16> [[A_COERCE:%.*]], i64 0)
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// CHECK-NEXT: [[VECEXT:%.*]] = extractelement <32 x i16> [[A]], i64 [[B:%.*]]
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// CHECK-NEXT: ret i16 [[VECEXT]]
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//
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uint16_t subscript_uint16(fixed_uint16_t a, size_t b) {
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return a[b];
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}
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// CHECK-LABEL: @subscript_int32(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[A:%.*]] = call <16 x i32> @llvm.vector.extract.v16i32.nxv4i32(<vscale x 4 x i32> [[A_COERCE:%.*]], i64 0)
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// CHECK-NEXT: [[VECEXT:%.*]] = extractelement <16 x i32> [[A]], i64 [[B:%.*]]
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// CHECK-NEXT: ret i32 [[VECEXT]]
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//
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int32_t subscript_int32(fixed_int32_t a, size_t b) {
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return a[b];
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}
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// CHECK-LABEL: @subscript_uint32(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[A:%.*]] = call <16 x i32> @llvm.vector.extract.v16i32.nxv4i32(<vscale x 4 x i32> [[A_COERCE:%.*]], i64 0)
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// CHECK-NEXT: [[VECEXT:%.*]] = extractelement <16 x i32> [[A]], i64 [[B:%.*]]
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// CHECK-NEXT: ret i32 [[VECEXT]]
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//
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uint32_t subscript_uint32(fixed_uint32_t a, size_t b) {
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return a[b];
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}
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// CHECK-LABEL: @subscript_int64(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[A:%.*]] = call <8 x i64> @llvm.vector.extract.v8i64.nxv2i64(<vscale x 2 x i64> [[A_COERCE:%.*]], i64 0)
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// CHECK-NEXT: [[VECEXT:%.*]] = extractelement <8 x i64> [[A]], i64 [[B:%.*]]
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// CHECK-NEXT: ret i64 [[VECEXT]]
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//
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int64_t subscript_int64(fixed_int64_t a, size_t b) {
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return a[b];
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}
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// CHECK-LABEL: @subscript_uint64(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[A:%.*]] = call <8 x i64> @llvm.vector.extract.v8i64.nxv2i64(<vscale x 2 x i64> [[A_COERCE:%.*]], i64 0)
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// CHECK-NEXT: [[VECEXT:%.*]] = extractelement <8 x i64> [[A]], i64 [[B:%.*]]
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// CHECK-NEXT: ret i64 [[VECEXT]]
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//
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uint64_t subscript_uint64(fixed_uint64_t a, size_t b) {
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return a[b];
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}
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// CHECK-LABEL: @subscript_float16(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[A:%.*]] = call <32 x half> @llvm.vector.extract.v32f16.nxv8f16(<vscale x 8 x half> [[A_COERCE:%.*]], i64 0)
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// CHECK-NEXT: [[VECEXT:%.*]] = extractelement <32 x half> [[A]], i64 [[B:%.*]]
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// CHECK-NEXT: ret half [[VECEXT]]
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//
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__fp16 subscript_float16(fixed_float16_t a, size_t b) {
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return a[b];
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}
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// CHECK-LABEL: @subscript_float32(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[A:%.*]] = call <16 x float> @llvm.vector.extract.v16f32.nxv4f32(<vscale x 4 x float> [[A_COERCE:%.*]], i64 0)
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// CHECK-NEXT: [[VECEXT:%.*]] = extractelement <16 x float> [[A]], i64 [[B:%.*]]
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// CHECK-NEXT: ret float [[VECEXT]]
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//
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float subscript_float32(fixed_float32_t a, size_t b) {
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return a[b];
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}
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// CHECK-LABEL: @subscript_float64(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[A:%.*]] = call <8 x double> @llvm.vector.extract.v8f64.nxv2f64(<vscale x 2 x double> [[A_COERCE:%.*]], i64 0)
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// CHECK-NEXT: [[VECEXT:%.*]] = extractelement <8 x double> [[A]], i64 [[B:%.*]]
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// CHECK-NEXT: ret double [[VECEXT]]
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//
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double subscript_float64(fixed_float64_t a, size_t b) {
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return a[b];
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}
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