2427 lines
121 KiB
Systemverilog
2427 lines
121 KiB
Systemverilog
// Generated by CIRCT firtool-1.62.0
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// Standard header to adapt well known macros for register randomization.
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`ifndef RANDOMIZE
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`ifdef RANDOMIZE_MEM_INIT
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`define RANDOMIZE
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`endif // RANDOMIZE_MEM_INIT
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`endif // not def RANDOMIZE
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`ifndef RANDOMIZE
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`ifdef RANDOMIZE_REG_INIT
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`define RANDOMIZE
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`endif // RANDOMIZE_REG_INIT
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`endif // not def RANDOMIZE
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// RANDOM may be set to an expression that produces a 32-bit random unsigned value.
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`ifndef RANDOM
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`define RANDOM $random
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`endif // not def RANDOM
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// Users can define INIT_RANDOM as general code that gets injected into the
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// initializer block for modules with registers.
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`ifndef INIT_RANDOM
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`define INIT_RANDOM
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`endif // not def INIT_RANDOM
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// If using random initialization, you can also define RANDOMIZE_DELAY to
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// customize the delay used, otherwise 0.002 is used.
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`ifndef RANDOMIZE_DELAY
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`define RANDOMIZE_DELAY 0.002
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`endif // not def RANDOMIZE_DELAY
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// Define INIT_RANDOM_PROLOG_ for use in our modules below.
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`ifndef INIT_RANDOM_PROLOG_
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`ifdef RANDOMIZE
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`ifdef VERILATOR
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`define INIT_RANDOM_PROLOG_ `INIT_RANDOM
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`else // VERILATOR
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`define INIT_RANDOM_PROLOG_ `INIT_RANDOM #`RANDOMIZE_DELAY begin end
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`endif // VERILATOR
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`else // RANDOMIZE
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`define INIT_RANDOM_PROLOG_
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`endif // RANDOMIZE
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`endif // not def INIT_RANDOM_PROLOG_
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// Include register initializers in init blocks unless synthesis is set
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`ifndef SYNTHESIS
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`ifndef ENABLE_INITIAL_REG_
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`define ENABLE_INITIAL_REG_
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`endif // not def ENABLE_INITIAL_REG_
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`endif // not def SYNTHESIS
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// Include rmemory initializers in init blocks unless synthesis is set
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`ifndef SYNTHESIS
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`ifndef ENABLE_INITIAL_MEM_
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`define ENABLE_INITIAL_MEM_
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`endif // not def ENABLE_INITIAL_MEM_
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`endif // not def SYNTHESIS
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module Composer(
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input clock,
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input reset,
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input [35:0] io_reset_vector,
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input [40:0] io_in_bits_s0_pc_0,
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input [40:0] io_in_bits_s0_pc_1,
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input [40:0] io_in_bits_s0_pc_2,
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input [40:0] io_in_bits_s0_pc_3,
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input [10:0] io_in_bits_folded_hist_1_hist_17_folded_hist,
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input [10:0] io_in_bits_folded_hist_1_hist_16_folded_hist,
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input [6:0] io_in_bits_folded_hist_1_hist_15_folded_hist,
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input [7:0] io_in_bits_folded_hist_1_hist_14_folded_hist,
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input [6:0] io_in_bits_folded_hist_1_hist_9_folded_hist,
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input [7:0] io_in_bits_folded_hist_1_hist_8_folded_hist,
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input [6:0] io_in_bits_folded_hist_1_hist_7_folded_hist,
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input [6:0] io_in_bits_folded_hist_1_hist_5_folded_hist,
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input [7:0] io_in_bits_folded_hist_1_hist_4_folded_hist,
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input [7:0] io_in_bits_folded_hist_1_hist_3_folded_hist,
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input [10:0] io_in_bits_folded_hist_1_hist_1_folded_hist,
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input [7:0] io_in_bits_folded_hist_3_hist_14_folded_hist,
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input [8:0] io_in_bits_folded_hist_3_hist_13_folded_hist,
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input [3:0] io_in_bits_folded_hist_3_hist_12_folded_hist,
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input [7:0] io_in_bits_folded_hist_3_hist_11_folded_hist,
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input [8:0] io_in_bits_folded_hist_3_hist_10_folded_hist,
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input [8:0] io_in_bits_folded_hist_3_hist_6_folded_hist,
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input [7:0] io_in_bits_folded_hist_3_hist_4_folded_hist,
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input [7:0] io_in_bits_folded_hist_3_hist_3_folded_hist,
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input [7:0] io_in_bits_folded_hist_3_hist_2_folded_hist,
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output [40:0] io_out_s1_pc_0,
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output [40:0] io_out_s1_pc_1,
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output [40:0] io_out_s1_pc_2,
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output [40:0] io_out_s1_pc_3,
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output io_out_s1_full_pred_0_br_taken_mask_0,
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output io_out_s1_full_pred_0_br_taken_mask_1,
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output io_out_s1_full_pred_0_slot_valids_0,
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output io_out_s1_full_pred_0_slot_valids_1,
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output [40:0] io_out_s1_full_pred_0_targets_0,
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output [40:0] io_out_s1_full_pred_0_targets_1,
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output [3:0] io_out_s1_full_pred_0_offsets_0,
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output [3:0] io_out_s1_full_pred_0_offsets_1,
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output [40:0] io_out_s1_full_pred_0_fallThroughAddr,
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output io_out_s1_full_pred_0_is_br_sharing,
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output io_out_s1_full_pred_0_hit,
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output io_out_s1_full_pred_1_br_taken_mask_0,
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output io_out_s1_full_pred_1_br_taken_mask_1,
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output io_out_s1_full_pred_1_slot_valids_0,
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output io_out_s1_full_pred_1_slot_valids_1,
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output [40:0] io_out_s1_full_pred_1_targets_0,
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output [40:0] io_out_s1_full_pred_1_targets_1,
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output [3:0] io_out_s1_full_pred_1_offsets_0,
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output [3:0] io_out_s1_full_pred_1_offsets_1,
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output [40:0] io_out_s1_full_pred_1_fallThroughAddr,
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output io_out_s1_full_pred_1_is_br_sharing,
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output io_out_s1_full_pred_1_hit,
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output io_out_s1_full_pred_2_br_taken_mask_0,
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output io_out_s1_full_pred_2_br_taken_mask_1,
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output io_out_s1_full_pred_2_slot_valids_0,
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output io_out_s1_full_pred_2_slot_valids_1,
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output [40:0] io_out_s1_full_pred_2_targets_0,
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output [40:0] io_out_s1_full_pred_2_targets_1,
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output [3:0] io_out_s1_full_pred_2_offsets_0,
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output [3:0] io_out_s1_full_pred_2_offsets_1,
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output [40:0] io_out_s1_full_pred_2_fallThroughAddr,
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output io_out_s1_full_pred_2_is_br_sharing,
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output io_out_s1_full_pred_2_hit,
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output io_out_s1_full_pred_3_br_taken_mask_0,
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output io_out_s1_full_pred_3_br_taken_mask_1,
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output io_out_s1_full_pred_3_slot_valids_0,
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output io_out_s1_full_pred_3_slot_valids_1,
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output [40:0] io_out_s1_full_pred_3_targets_0,
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output [40:0] io_out_s1_full_pred_3_targets_1,
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output [3:0] io_out_s1_full_pred_3_offsets_0,
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output [3:0] io_out_s1_full_pred_3_offsets_1,
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output [40:0] io_out_s1_full_pred_3_fallThroughAddr,
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output io_out_s1_full_pred_3_fallThroughErr,
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output io_out_s1_full_pred_3_is_br_sharing,
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output io_out_s1_full_pred_3_hit,
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output [40:0] io_out_s2_pc_0,
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output [40:0] io_out_s2_pc_1,
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output [40:0] io_out_s2_pc_2,
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output [40:0] io_out_s2_pc_3,
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output io_out_s2_full_pred_0_br_taken_mask_0,
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output io_out_s2_full_pred_0_br_taken_mask_1,
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output io_out_s2_full_pred_0_slot_valids_0,
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output io_out_s2_full_pred_0_slot_valids_1,
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output [40:0] io_out_s2_full_pred_0_targets_0,
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output [40:0] io_out_s2_full_pred_0_targets_1,
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output [3:0] io_out_s2_full_pred_0_offsets_0,
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output [3:0] io_out_s2_full_pred_0_offsets_1,
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output [40:0] io_out_s2_full_pred_0_fallThroughAddr,
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output io_out_s2_full_pred_0_is_br_sharing,
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output io_out_s2_full_pred_0_hit,
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output io_out_s2_full_pred_1_br_taken_mask_0,
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output io_out_s2_full_pred_1_br_taken_mask_1,
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output io_out_s2_full_pred_1_slot_valids_0,
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output io_out_s2_full_pred_1_slot_valids_1,
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output [40:0] io_out_s2_full_pred_1_targets_0,
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output [40:0] io_out_s2_full_pred_1_targets_1,
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output [3:0] io_out_s2_full_pred_1_offsets_0,
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output [3:0] io_out_s2_full_pred_1_offsets_1,
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output [40:0] io_out_s2_full_pred_1_fallThroughAddr,
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output io_out_s2_full_pred_1_is_br_sharing,
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output io_out_s2_full_pred_1_hit,
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output io_out_s2_full_pred_2_br_taken_mask_0,
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output io_out_s2_full_pred_2_br_taken_mask_1,
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output io_out_s2_full_pred_2_slot_valids_0,
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output io_out_s2_full_pred_2_slot_valids_1,
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output [40:0] io_out_s2_full_pred_2_targets_0,
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output [40:0] io_out_s2_full_pred_2_targets_1,
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output [3:0] io_out_s2_full_pred_2_offsets_0,
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output [3:0] io_out_s2_full_pred_2_offsets_1,
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output [40:0] io_out_s2_full_pred_2_fallThroughAddr,
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output io_out_s2_full_pred_2_is_br_sharing,
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output io_out_s2_full_pred_2_hit,
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output io_out_s2_full_pred_3_br_taken_mask_0,
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output io_out_s2_full_pred_3_br_taken_mask_1,
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output io_out_s2_full_pred_3_slot_valids_0,
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output io_out_s2_full_pred_3_slot_valids_1,
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output [40:0] io_out_s2_full_pred_3_targets_0,
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output [40:0] io_out_s2_full_pred_3_targets_1,
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output [3:0] io_out_s2_full_pred_3_offsets_0,
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output [3:0] io_out_s2_full_pred_3_offsets_1,
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output [40:0] io_out_s2_full_pred_3_fallThroughAddr,
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output io_out_s2_full_pred_3_fallThroughErr,
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output io_out_s2_full_pred_3_is_br_sharing,
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output io_out_s2_full_pred_3_hit,
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output [40:0] io_out_s3_pc_0,
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output [40:0] io_out_s3_pc_1,
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output [40:0] io_out_s3_pc_2,
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output [40:0] io_out_s3_pc_3,
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output io_out_s3_full_pred_0_br_taken_mask_0,
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output io_out_s3_full_pred_0_br_taken_mask_1,
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output io_out_s3_full_pred_0_slot_valids_0,
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output io_out_s3_full_pred_0_slot_valids_1,
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output [40:0] io_out_s3_full_pred_0_targets_0,
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output [40:0] io_out_s3_full_pred_0_targets_1,
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output [40:0] io_out_s3_full_pred_0_fallThroughAddr,
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output io_out_s3_full_pred_0_fallThroughErr,
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output io_out_s3_full_pred_0_is_br_sharing,
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output io_out_s3_full_pred_0_hit,
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output io_out_s3_full_pred_1_br_taken_mask_0,
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output io_out_s3_full_pred_1_br_taken_mask_1,
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output io_out_s3_full_pred_1_slot_valids_0,
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output io_out_s3_full_pred_1_slot_valids_1,
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output [40:0] io_out_s3_full_pred_1_targets_0,
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output [40:0] io_out_s3_full_pred_1_targets_1,
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output [40:0] io_out_s3_full_pred_1_fallThroughAddr,
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output io_out_s3_full_pred_1_fallThroughErr,
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output io_out_s3_full_pred_1_is_br_sharing,
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output io_out_s3_full_pred_1_hit,
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output io_out_s3_full_pred_2_br_taken_mask_0,
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output io_out_s3_full_pred_2_br_taken_mask_1,
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output io_out_s3_full_pred_2_slot_valids_0,
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output io_out_s3_full_pred_2_slot_valids_1,
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output [40:0] io_out_s3_full_pred_2_targets_0,
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output [40:0] io_out_s3_full_pred_2_targets_1,
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output [40:0] io_out_s3_full_pred_2_fallThroughAddr,
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output io_out_s3_full_pred_2_fallThroughErr,
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output io_out_s3_full_pred_2_is_br_sharing,
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output io_out_s3_full_pred_2_hit,
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output io_out_s3_full_pred_3_br_taken_mask_0,
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output io_out_s3_full_pred_3_br_taken_mask_1,
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output io_out_s3_full_pred_3_slot_valids_0,
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output io_out_s3_full_pred_3_slot_valids_1,
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output [40:0] io_out_s3_full_pred_3_targets_0,
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output [40:0] io_out_s3_full_pred_3_targets_1,
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output [3:0] io_out_s3_full_pred_3_offsets_0,
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output [3:0] io_out_s3_full_pred_3_offsets_1,
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output [40:0] io_out_s3_full_pred_3_fallThroughAddr,
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output io_out_s3_full_pred_3_fallThroughErr,
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output io_out_s3_full_pred_3_is_br_sharing,
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output io_out_s3_full_pred_3_hit,
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output [222:0] io_out_last_stage_meta,
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output [3:0] io_out_last_stage_spec_info_ssp,
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output [1:0] io_out_last_stage_spec_info_sctr,
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output io_out_last_stage_spec_info_TOSW_flag,
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output [4:0] io_out_last_stage_spec_info_TOSW_value,
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output io_out_last_stage_spec_info_TOSR_flag,
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output [4:0] io_out_last_stage_spec_info_TOSR_value,
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output io_out_last_stage_spec_info_NOS_flag,
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output [4:0] io_out_last_stage_spec_info_NOS_value,
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output [40:0] io_out_last_stage_spec_info_topAddr,
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output io_out_last_stage_ftb_entry_valid,
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output [3:0] io_out_last_stage_ftb_entry_brSlots_0_offset,
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output [11:0] io_out_last_stage_ftb_entry_brSlots_0_lower,
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output [1:0] io_out_last_stage_ftb_entry_brSlots_0_tarStat,
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output io_out_last_stage_ftb_entry_brSlots_0_sharing,
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output io_out_last_stage_ftb_entry_brSlots_0_valid,
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output [3:0] io_out_last_stage_ftb_entry_tailSlot_offset,
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output [19:0] io_out_last_stage_ftb_entry_tailSlot_lower,
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output [1:0] io_out_last_stage_ftb_entry_tailSlot_tarStat,
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output io_out_last_stage_ftb_entry_tailSlot_sharing,
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output io_out_last_stage_ftb_entry_tailSlot_valid,
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output [3:0] io_out_last_stage_ftb_entry_pftAddr,
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output io_out_last_stage_ftb_entry_carry,
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output io_out_last_stage_ftb_entry_isCall,
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output io_out_last_stage_ftb_entry_isRet,
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output io_out_last_stage_ftb_entry_isJalr,
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output io_out_last_stage_ftb_entry_last_may_be_rvi_call,
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output io_out_last_stage_ftb_entry_always_taken_0,
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output io_out_last_stage_ftb_entry_always_taken_1,
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input io_ctrl_ubtb_enable,
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input io_ctrl_btb_enable,
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input io_ctrl_tage_enable,
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input io_ctrl_sc_enable,
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input io_ctrl_ras_enable,
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input io_s0_fire_0,
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input io_s0_fire_1,
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input io_s0_fire_2,
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input io_s0_fire_3,
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input io_s1_fire_0,
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input io_s1_fire_1,
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input io_s1_fire_2,
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input io_s1_fire_3,
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input io_s2_fire_0,
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input io_s2_fire_1,
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input io_s2_fire_2,
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input io_s2_fire_3,
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input io_s3_fire_2,
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input io_s3_redirect_2,
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output io_s1_ready,
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input io_update_valid,
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input [40:0] io_update_bits_pc,
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input [10:0] io_update_bits_spec_info_folded_hist_hist_17_folded_hist,
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input [10:0] io_update_bits_spec_info_folded_hist_hist_16_folded_hist,
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input [6:0] io_update_bits_spec_info_folded_hist_hist_15_folded_hist,
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input [7:0] io_update_bits_spec_info_folded_hist_hist_14_folded_hist,
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input [8:0] io_update_bits_spec_info_folded_hist_hist_13_folded_hist,
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input [3:0] io_update_bits_spec_info_folded_hist_hist_12_folded_hist,
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input [7:0] io_update_bits_spec_info_folded_hist_hist_11_folded_hist,
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input [8:0] io_update_bits_spec_info_folded_hist_hist_10_folded_hist,
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input [6:0] io_update_bits_spec_info_folded_hist_hist_9_folded_hist,
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input [7:0] io_update_bits_spec_info_folded_hist_hist_8_folded_hist,
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input [6:0] io_update_bits_spec_info_folded_hist_hist_7_folded_hist,
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input [8:0] io_update_bits_spec_info_folded_hist_hist_6_folded_hist,
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input [6:0] io_update_bits_spec_info_folded_hist_hist_5_folded_hist,
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input [7:0] io_update_bits_spec_info_folded_hist_hist_4_folded_hist,
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input [7:0] io_update_bits_spec_info_folded_hist_hist_3_folded_hist,
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input [7:0] io_update_bits_spec_info_folded_hist_hist_2_folded_hist,
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input [10:0] io_update_bits_spec_info_folded_hist_hist_1_folded_hist,
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input io_update_bits_ftb_entry_valid,
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input [3:0] io_update_bits_ftb_entry_brSlots_0_offset,
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input [11:0] io_update_bits_ftb_entry_brSlots_0_lower,
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input [1:0] io_update_bits_ftb_entry_brSlots_0_tarStat,
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input io_update_bits_ftb_entry_brSlots_0_sharing,
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input io_update_bits_ftb_entry_brSlots_0_valid,
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input [3:0] io_update_bits_ftb_entry_tailSlot_offset,
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input [19:0] io_update_bits_ftb_entry_tailSlot_lower,
|
|
input [1:0] io_update_bits_ftb_entry_tailSlot_tarStat,
|
|
input io_update_bits_ftb_entry_tailSlot_sharing,
|
|
input io_update_bits_ftb_entry_tailSlot_valid,
|
|
input [3:0] io_update_bits_ftb_entry_pftAddr,
|
|
input io_update_bits_ftb_entry_carry,
|
|
input io_update_bits_ftb_entry_isCall,
|
|
input io_update_bits_ftb_entry_isRet,
|
|
input io_update_bits_ftb_entry_isJalr,
|
|
input io_update_bits_ftb_entry_last_may_be_rvi_call,
|
|
input io_update_bits_ftb_entry_always_taken_0,
|
|
input io_update_bits_ftb_entry_always_taken_1,
|
|
input io_update_bits_cfi_idx_valid,
|
|
input [3:0] io_update_bits_cfi_idx_bits,
|
|
input io_update_bits_br_taken_mask_0,
|
|
input io_update_bits_br_taken_mask_1,
|
|
input io_update_bits_jmp_taken,
|
|
input io_update_bits_mispred_mask_0,
|
|
input io_update_bits_mispred_mask_1,
|
|
input io_update_bits_mispred_mask_2,
|
|
input io_update_bits_old_entry,
|
|
input [222:0] io_update_bits_meta,
|
|
input [40:0] io_update_bits_full_target,
|
|
input io_redirect_valid,
|
|
input io_redirect_bits_level,
|
|
input [40:0] io_redirect_bits_cfiUpdate_pc,
|
|
input io_redirect_bits_cfiUpdate_pd_isRVC,
|
|
input io_redirect_bits_cfiUpdate_pd_isCall,
|
|
input io_redirect_bits_cfiUpdate_pd_isRet,
|
|
input [3:0] io_redirect_bits_cfiUpdate_ssp,
|
|
input [1:0] io_redirect_bits_cfiUpdate_sctr,
|
|
input io_redirect_bits_cfiUpdate_TOSW_flag,
|
|
input [4:0] io_redirect_bits_cfiUpdate_TOSW_value,
|
|
input io_redirect_bits_cfiUpdate_TOSR_flag,
|
|
input [4:0] io_redirect_bits_cfiUpdate_TOSR_value,
|
|
input io_redirect_bits_cfiUpdate_NOS_flag,
|
|
input [4:0] io_redirect_bits_cfiUpdate_NOS_value,
|
|
output [5:0] io_perf_0_value,
|
|
output [5:0] io_perf_1_value,
|
|
output [5:0] io_perf_2_value,
|
|
output [5:0] io_perf_3_value,
|
|
output [5:0] io_perf_4_value,
|
|
output [5:0] io_perf_5_value,
|
|
output [5:0] io_perf_6_value
|
|
);
|
|
|
|
wire _ras_io_ctrl_delay_io_out_ras_enable;
|
|
wire _ftb_io_ctrl_delay_io_out_btb_enable;
|
|
wire _tage_io_ctrl_delay_io_out_tage_enable;
|
|
wire _tage_io_ctrl_delay_io_out_sc_enable;
|
|
wire _ubtb_io_ctrl_delay_io_out_ubtb_enable;
|
|
wire _ittage_io_out_s2_full_pred_0_br_taken_mask_0;
|
|
wire _ittage_io_out_s2_full_pred_0_br_taken_mask_1;
|
|
wire _ittage_io_out_s2_full_pred_0_slot_valids_0;
|
|
wire _ittage_io_out_s2_full_pred_0_slot_valids_1;
|
|
wire [40:0] _ittage_io_out_s2_full_pred_0_targets_0;
|
|
wire [40:0] _ittage_io_out_s2_full_pred_0_targets_1;
|
|
wire [40:0] _ittage_io_out_s2_full_pred_0_jalr_target;
|
|
wire [3:0] _ittage_io_out_s2_full_pred_0_offsets_0;
|
|
wire [3:0] _ittage_io_out_s2_full_pred_0_offsets_1;
|
|
wire [40:0] _ittage_io_out_s2_full_pred_0_fallThroughAddr;
|
|
wire _ittage_io_out_s2_full_pred_0_is_br_sharing;
|
|
wire _ittage_io_out_s2_full_pred_0_hit;
|
|
wire _ittage_io_out_s2_full_pred_1_br_taken_mask_0;
|
|
wire _ittage_io_out_s2_full_pred_1_br_taken_mask_1;
|
|
wire _ittage_io_out_s2_full_pred_1_slot_valids_0;
|
|
wire _ittage_io_out_s2_full_pred_1_slot_valids_1;
|
|
wire [40:0] _ittage_io_out_s2_full_pred_1_targets_0;
|
|
wire [40:0] _ittage_io_out_s2_full_pred_1_targets_1;
|
|
wire [40:0] _ittage_io_out_s2_full_pred_1_jalr_target;
|
|
wire [3:0] _ittage_io_out_s2_full_pred_1_offsets_0;
|
|
wire [3:0] _ittage_io_out_s2_full_pred_1_offsets_1;
|
|
wire [40:0] _ittage_io_out_s2_full_pred_1_fallThroughAddr;
|
|
wire _ittage_io_out_s2_full_pred_1_is_br_sharing;
|
|
wire _ittage_io_out_s2_full_pred_1_hit;
|
|
wire _ittage_io_out_s2_full_pred_2_br_taken_mask_0;
|
|
wire _ittage_io_out_s2_full_pred_2_br_taken_mask_1;
|
|
wire _ittage_io_out_s2_full_pred_2_slot_valids_0;
|
|
wire _ittage_io_out_s2_full_pred_2_slot_valids_1;
|
|
wire [40:0] _ittage_io_out_s2_full_pred_2_targets_0;
|
|
wire [40:0] _ittage_io_out_s2_full_pred_2_targets_1;
|
|
wire [40:0] _ittage_io_out_s2_full_pred_2_jalr_target;
|
|
wire [3:0] _ittage_io_out_s2_full_pred_2_offsets_0;
|
|
wire [3:0] _ittage_io_out_s2_full_pred_2_offsets_1;
|
|
wire [40:0] _ittage_io_out_s2_full_pred_2_fallThroughAddr;
|
|
wire _ittage_io_out_s2_full_pred_2_is_jalr;
|
|
wire _ittage_io_out_s2_full_pred_2_is_call;
|
|
wire _ittage_io_out_s2_full_pred_2_is_ret;
|
|
wire _ittage_io_out_s2_full_pred_2_last_may_be_rvi_call;
|
|
wire _ittage_io_out_s2_full_pred_2_is_br_sharing;
|
|
wire _ittage_io_out_s2_full_pred_2_hit;
|
|
wire _ittage_io_out_s2_full_pred_3_br_taken_mask_0;
|
|
wire _ittage_io_out_s2_full_pred_3_br_taken_mask_1;
|
|
wire _ittage_io_out_s2_full_pred_3_slot_valids_0;
|
|
wire _ittage_io_out_s2_full_pred_3_slot_valids_1;
|
|
wire [40:0] _ittage_io_out_s2_full_pred_3_targets_0;
|
|
wire [40:0] _ittage_io_out_s2_full_pred_3_targets_1;
|
|
wire [40:0] _ittage_io_out_s2_full_pred_3_jalr_target;
|
|
wire [3:0] _ittage_io_out_s2_full_pred_3_offsets_0;
|
|
wire [3:0] _ittage_io_out_s2_full_pred_3_offsets_1;
|
|
wire [40:0] _ittage_io_out_s2_full_pred_3_fallThroughAddr;
|
|
wire _ittage_io_out_s2_full_pred_3_fallThroughErr;
|
|
wire _ittage_io_out_s2_full_pred_3_is_br_sharing;
|
|
wire _ittage_io_out_s2_full_pred_3_hit;
|
|
wire _ittage_io_out_s3_full_pred_0_br_taken_mask_0;
|
|
wire _ittage_io_out_s3_full_pred_0_br_taken_mask_1;
|
|
wire _ittage_io_out_s3_full_pred_0_slot_valids_0;
|
|
wire _ittage_io_out_s3_full_pred_0_slot_valids_1;
|
|
wire [40:0] _ittage_io_out_s3_full_pred_0_targets_0;
|
|
wire [40:0] _ittage_io_out_s3_full_pred_0_targets_1;
|
|
wire [40:0] _ittage_io_out_s3_full_pred_0_jalr_target;
|
|
wire [40:0] _ittage_io_out_s3_full_pred_0_fallThroughAddr;
|
|
wire _ittage_io_out_s3_full_pred_0_fallThroughErr;
|
|
wire _ittage_io_out_s3_full_pred_0_is_br_sharing;
|
|
wire _ittage_io_out_s3_full_pred_0_hit;
|
|
wire _ittage_io_out_s3_full_pred_1_br_taken_mask_0;
|
|
wire _ittage_io_out_s3_full_pred_1_br_taken_mask_1;
|
|
wire _ittage_io_out_s3_full_pred_1_slot_valids_0;
|
|
wire _ittage_io_out_s3_full_pred_1_slot_valids_1;
|
|
wire [40:0] _ittage_io_out_s3_full_pred_1_targets_0;
|
|
wire [40:0] _ittage_io_out_s3_full_pred_1_targets_1;
|
|
wire [40:0] _ittage_io_out_s3_full_pred_1_jalr_target;
|
|
wire [40:0] _ittage_io_out_s3_full_pred_1_fallThroughAddr;
|
|
wire _ittage_io_out_s3_full_pred_1_fallThroughErr;
|
|
wire _ittage_io_out_s3_full_pred_1_is_br_sharing;
|
|
wire _ittage_io_out_s3_full_pred_1_hit;
|
|
wire _ittage_io_out_s3_full_pred_2_br_taken_mask_0;
|
|
wire _ittage_io_out_s3_full_pred_2_br_taken_mask_1;
|
|
wire _ittage_io_out_s3_full_pred_2_slot_valids_0;
|
|
wire _ittage_io_out_s3_full_pred_2_slot_valids_1;
|
|
wire [40:0] _ittage_io_out_s3_full_pred_2_targets_0;
|
|
wire [40:0] _ittage_io_out_s3_full_pred_2_targets_1;
|
|
wire [40:0] _ittage_io_out_s3_full_pred_2_jalr_target;
|
|
wire [40:0] _ittage_io_out_s3_full_pred_2_fallThroughAddr;
|
|
wire _ittage_io_out_s3_full_pred_2_fallThroughErr;
|
|
wire _ittage_io_out_s3_full_pred_2_is_jalr;
|
|
wire _ittage_io_out_s3_full_pred_2_is_call;
|
|
wire _ittage_io_out_s3_full_pred_2_is_ret;
|
|
wire _ittage_io_out_s3_full_pred_2_is_br_sharing;
|
|
wire _ittage_io_out_s3_full_pred_2_hit;
|
|
wire _ittage_io_out_s3_full_pred_3_br_taken_mask_0;
|
|
wire _ittage_io_out_s3_full_pred_3_br_taken_mask_1;
|
|
wire _ittage_io_out_s3_full_pred_3_slot_valids_0;
|
|
wire _ittage_io_out_s3_full_pred_3_slot_valids_1;
|
|
wire [40:0] _ittage_io_out_s3_full_pred_3_targets_0;
|
|
wire [40:0] _ittage_io_out_s3_full_pred_3_targets_1;
|
|
wire [40:0] _ittage_io_out_s3_full_pred_3_jalr_target;
|
|
wire [3:0] _ittage_io_out_s3_full_pred_3_offsets_0;
|
|
wire [3:0] _ittage_io_out_s3_full_pred_3_offsets_1;
|
|
wire [40:0] _ittage_io_out_s3_full_pred_3_fallThroughAddr;
|
|
wire _ittage_io_out_s3_full_pred_3_fallThroughErr;
|
|
wire _ittage_io_out_s3_full_pred_3_is_br_sharing;
|
|
wire _ittage_io_out_s3_full_pred_3_hit;
|
|
wire [222:0] _ittage_io_out_last_stage_meta;
|
|
wire _ittage_io_out_last_stage_ftb_entry_valid;
|
|
wire [3:0] _ittage_io_out_last_stage_ftb_entry_brSlots_0_offset;
|
|
wire [11:0] _ittage_io_out_last_stage_ftb_entry_brSlots_0_lower;
|
|
wire [1:0] _ittage_io_out_last_stage_ftb_entry_brSlots_0_tarStat;
|
|
wire _ittage_io_out_last_stage_ftb_entry_brSlots_0_sharing;
|
|
wire _ittage_io_out_last_stage_ftb_entry_brSlots_0_valid;
|
|
wire [3:0] _ittage_io_out_last_stage_ftb_entry_tailSlot_offset;
|
|
wire [19:0] _ittage_io_out_last_stage_ftb_entry_tailSlot_lower;
|
|
wire [1:0] _ittage_io_out_last_stage_ftb_entry_tailSlot_tarStat;
|
|
wire _ittage_io_out_last_stage_ftb_entry_tailSlot_sharing;
|
|
wire _ittage_io_out_last_stage_ftb_entry_tailSlot_valid;
|
|
wire [3:0] _ittage_io_out_last_stage_ftb_entry_pftAddr;
|
|
wire _ittage_io_out_last_stage_ftb_entry_carry;
|
|
wire _ittage_io_out_last_stage_ftb_entry_isCall;
|
|
wire _ittage_io_out_last_stage_ftb_entry_isRet;
|
|
wire _ittage_io_out_last_stage_ftb_entry_isJalr;
|
|
wire _ittage_io_out_last_stage_ftb_entry_last_may_be_rvi_call;
|
|
wire _ittage_io_out_last_stage_ftb_entry_always_taken_0;
|
|
wire _ittage_io_out_last_stage_ftb_entry_always_taken_1;
|
|
wire [222:0] _ras_io_out_last_stage_meta;
|
|
wire _tage_io_out_s2_full_pred_0_br_taken_mask_0;
|
|
wire _tage_io_out_s2_full_pred_0_br_taken_mask_1;
|
|
wire _tage_io_out_s2_full_pred_1_br_taken_mask_0;
|
|
wire _tage_io_out_s2_full_pred_1_br_taken_mask_1;
|
|
wire _tage_io_out_s2_full_pred_2_br_taken_mask_0;
|
|
wire _tage_io_out_s2_full_pred_2_br_taken_mask_1;
|
|
wire _tage_io_out_s2_full_pred_3_br_taken_mask_0;
|
|
wire _tage_io_out_s2_full_pred_3_br_taken_mask_1;
|
|
wire _tage_io_out_s3_full_pred_0_br_taken_mask_0;
|
|
wire _tage_io_out_s3_full_pred_0_br_taken_mask_1;
|
|
wire _tage_io_out_s3_full_pred_1_br_taken_mask_0;
|
|
wire _tage_io_out_s3_full_pred_1_br_taken_mask_1;
|
|
wire _tage_io_out_s3_full_pred_2_br_taken_mask_0;
|
|
wire _tage_io_out_s3_full_pred_2_br_taken_mask_1;
|
|
wire _tage_io_out_s3_full_pred_3_br_taken_mask_0;
|
|
wire _tage_io_out_s3_full_pred_3_br_taken_mask_1;
|
|
wire [222:0] _tage_io_out_last_stage_meta;
|
|
wire _tage_io_s1_ready;
|
|
wire [5:0] _tage_io_perf_0_value;
|
|
wire [5:0] _tage_io_perf_1_value;
|
|
wire [5:0] _tage_io_perf_2_value;
|
|
wire [222:0] _ubtb_io_out_last_stage_meta;
|
|
wire [5:0] _ubtb_io_perf_0_value;
|
|
wire [5:0] _ubtb_io_perf_1_value;
|
|
wire _ftb_io_out_s2_full_pred_0_br_taken_mask_0;
|
|
wire _ftb_io_out_s2_full_pred_0_br_taken_mask_1;
|
|
wire _ftb_io_out_s2_full_pred_0_slot_valids_0;
|
|
wire _ftb_io_out_s2_full_pred_0_slot_valids_1;
|
|
wire [40:0] _ftb_io_out_s2_full_pred_0_targets_0;
|
|
wire [40:0] _ftb_io_out_s2_full_pred_0_targets_1;
|
|
wire [40:0] _ftb_io_out_s2_full_pred_0_jalr_target;
|
|
wire [3:0] _ftb_io_out_s2_full_pred_0_offsets_0;
|
|
wire [3:0] _ftb_io_out_s2_full_pred_0_offsets_1;
|
|
wire [40:0] _ftb_io_out_s2_full_pred_0_fallThroughAddr;
|
|
wire _ftb_io_out_s2_full_pred_0_is_br_sharing;
|
|
wire _ftb_io_out_s2_full_pred_0_hit;
|
|
wire _ftb_io_out_s2_full_pred_1_br_taken_mask_0;
|
|
wire _ftb_io_out_s2_full_pred_1_br_taken_mask_1;
|
|
wire _ftb_io_out_s2_full_pred_1_slot_valids_0;
|
|
wire _ftb_io_out_s2_full_pred_1_slot_valids_1;
|
|
wire [40:0] _ftb_io_out_s2_full_pred_1_targets_0;
|
|
wire [40:0] _ftb_io_out_s2_full_pred_1_targets_1;
|
|
wire [40:0] _ftb_io_out_s2_full_pred_1_jalr_target;
|
|
wire [3:0] _ftb_io_out_s2_full_pred_1_offsets_0;
|
|
wire [3:0] _ftb_io_out_s2_full_pred_1_offsets_1;
|
|
wire [40:0] _ftb_io_out_s2_full_pred_1_fallThroughAddr;
|
|
wire _ftb_io_out_s2_full_pred_1_is_br_sharing;
|
|
wire _ftb_io_out_s2_full_pred_1_hit;
|
|
wire _ftb_io_out_s2_full_pred_2_br_taken_mask_0;
|
|
wire _ftb_io_out_s2_full_pred_2_br_taken_mask_1;
|
|
wire _ftb_io_out_s2_full_pred_2_slot_valids_0;
|
|
wire _ftb_io_out_s2_full_pred_2_slot_valids_1;
|
|
wire [40:0] _ftb_io_out_s2_full_pred_2_targets_0;
|
|
wire [40:0] _ftb_io_out_s2_full_pred_2_targets_1;
|
|
wire [40:0] _ftb_io_out_s2_full_pred_2_jalr_target;
|
|
wire [3:0] _ftb_io_out_s2_full_pred_2_offsets_0;
|
|
wire [3:0] _ftb_io_out_s2_full_pred_2_offsets_1;
|
|
wire [40:0] _ftb_io_out_s2_full_pred_2_fallThroughAddr;
|
|
wire _ftb_io_out_s2_full_pred_2_is_jalr;
|
|
wire _ftb_io_out_s2_full_pred_2_is_call;
|
|
wire _ftb_io_out_s2_full_pred_2_is_ret;
|
|
wire _ftb_io_out_s2_full_pred_2_last_may_be_rvi_call;
|
|
wire _ftb_io_out_s2_full_pred_2_is_br_sharing;
|
|
wire _ftb_io_out_s2_full_pred_2_hit;
|
|
wire _ftb_io_out_s2_full_pred_3_br_taken_mask_0;
|
|
wire _ftb_io_out_s2_full_pred_3_br_taken_mask_1;
|
|
wire _ftb_io_out_s2_full_pred_3_slot_valids_0;
|
|
wire _ftb_io_out_s2_full_pred_3_slot_valids_1;
|
|
wire [40:0] _ftb_io_out_s2_full_pred_3_targets_0;
|
|
wire [40:0] _ftb_io_out_s2_full_pred_3_targets_1;
|
|
wire [40:0] _ftb_io_out_s2_full_pred_3_jalr_target;
|
|
wire [3:0] _ftb_io_out_s2_full_pred_3_offsets_0;
|
|
wire [3:0] _ftb_io_out_s2_full_pred_3_offsets_1;
|
|
wire [40:0] _ftb_io_out_s2_full_pred_3_fallThroughAddr;
|
|
wire _ftb_io_out_s2_full_pred_3_fallThroughErr;
|
|
wire _ftb_io_out_s2_full_pred_3_is_br_sharing;
|
|
wire _ftb_io_out_s2_full_pred_3_hit;
|
|
wire _ftb_io_out_s3_full_pred_0_br_taken_mask_0;
|
|
wire _ftb_io_out_s3_full_pred_0_br_taken_mask_1;
|
|
wire _ftb_io_out_s3_full_pred_0_slot_valids_0;
|
|
wire _ftb_io_out_s3_full_pred_0_slot_valids_1;
|
|
wire [40:0] _ftb_io_out_s3_full_pred_0_targets_0;
|
|
wire [40:0] _ftb_io_out_s3_full_pred_0_targets_1;
|
|
wire [40:0] _ftb_io_out_s3_full_pred_0_jalr_target;
|
|
wire [40:0] _ftb_io_out_s3_full_pred_0_fallThroughAddr;
|
|
wire _ftb_io_out_s3_full_pred_0_fallThroughErr;
|
|
wire _ftb_io_out_s3_full_pred_0_is_br_sharing;
|
|
wire _ftb_io_out_s3_full_pred_0_hit;
|
|
wire _ftb_io_out_s3_full_pred_1_br_taken_mask_0;
|
|
wire _ftb_io_out_s3_full_pred_1_br_taken_mask_1;
|
|
wire _ftb_io_out_s3_full_pred_1_slot_valids_0;
|
|
wire _ftb_io_out_s3_full_pred_1_slot_valids_1;
|
|
wire [40:0] _ftb_io_out_s3_full_pred_1_targets_0;
|
|
wire [40:0] _ftb_io_out_s3_full_pred_1_targets_1;
|
|
wire [40:0] _ftb_io_out_s3_full_pred_1_jalr_target;
|
|
wire [40:0] _ftb_io_out_s3_full_pred_1_fallThroughAddr;
|
|
wire _ftb_io_out_s3_full_pred_1_fallThroughErr;
|
|
wire _ftb_io_out_s3_full_pred_1_is_br_sharing;
|
|
wire _ftb_io_out_s3_full_pred_1_hit;
|
|
wire _ftb_io_out_s3_full_pred_2_br_taken_mask_0;
|
|
wire _ftb_io_out_s3_full_pred_2_br_taken_mask_1;
|
|
wire _ftb_io_out_s3_full_pred_2_slot_valids_0;
|
|
wire _ftb_io_out_s3_full_pred_2_slot_valids_1;
|
|
wire [40:0] _ftb_io_out_s3_full_pred_2_targets_0;
|
|
wire [40:0] _ftb_io_out_s3_full_pred_2_targets_1;
|
|
wire [40:0] _ftb_io_out_s3_full_pred_2_jalr_target;
|
|
wire [40:0] _ftb_io_out_s3_full_pred_2_fallThroughAddr;
|
|
wire _ftb_io_out_s3_full_pred_2_fallThroughErr;
|
|
wire _ftb_io_out_s3_full_pred_2_is_jalr;
|
|
wire _ftb_io_out_s3_full_pred_2_is_call;
|
|
wire _ftb_io_out_s3_full_pred_2_is_ret;
|
|
wire _ftb_io_out_s3_full_pred_2_is_br_sharing;
|
|
wire _ftb_io_out_s3_full_pred_2_hit;
|
|
wire _ftb_io_out_s3_full_pred_3_br_taken_mask_0;
|
|
wire _ftb_io_out_s3_full_pred_3_br_taken_mask_1;
|
|
wire _ftb_io_out_s3_full_pred_3_slot_valids_0;
|
|
wire _ftb_io_out_s3_full_pred_3_slot_valids_1;
|
|
wire [40:0] _ftb_io_out_s3_full_pred_3_targets_0;
|
|
wire [40:0] _ftb_io_out_s3_full_pred_3_targets_1;
|
|
wire [40:0] _ftb_io_out_s3_full_pred_3_jalr_target;
|
|
wire [3:0] _ftb_io_out_s3_full_pred_3_offsets_0;
|
|
wire [3:0] _ftb_io_out_s3_full_pred_3_offsets_1;
|
|
wire [40:0] _ftb_io_out_s3_full_pred_3_fallThroughAddr;
|
|
wire _ftb_io_out_s3_full_pred_3_fallThroughErr;
|
|
wire _ftb_io_out_s3_full_pred_3_is_br_sharing;
|
|
wire _ftb_io_out_s3_full_pred_3_hit;
|
|
wire [222:0] _ftb_io_out_last_stage_meta;
|
|
wire _ftb_io_out_last_stage_ftb_entry_valid;
|
|
wire [3:0] _ftb_io_out_last_stage_ftb_entry_brSlots_0_offset;
|
|
wire [11:0] _ftb_io_out_last_stage_ftb_entry_brSlots_0_lower;
|
|
wire [1:0] _ftb_io_out_last_stage_ftb_entry_brSlots_0_tarStat;
|
|
wire _ftb_io_out_last_stage_ftb_entry_brSlots_0_sharing;
|
|
wire _ftb_io_out_last_stage_ftb_entry_brSlots_0_valid;
|
|
wire [3:0] _ftb_io_out_last_stage_ftb_entry_tailSlot_offset;
|
|
wire [19:0] _ftb_io_out_last_stage_ftb_entry_tailSlot_lower;
|
|
wire [1:0] _ftb_io_out_last_stage_ftb_entry_tailSlot_tarStat;
|
|
wire _ftb_io_out_last_stage_ftb_entry_tailSlot_sharing;
|
|
wire _ftb_io_out_last_stage_ftb_entry_tailSlot_valid;
|
|
wire [3:0] _ftb_io_out_last_stage_ftb_entry_pftAddr;
|
|
wire _ftb_io_out_last_stage_ftb_entry_carry;
|
|
wire _ftb_io_out_last_stage_ftb_entry_isCall;
|
|
wire _ftb_io_out_last_stage_ftb_entry_isRet;
|
|
wire _ftb_io_out_last_stage_ftb_entry_isJalr;
|
|
wire _ftb_io_out_last_stage_ftb_entry_last_may_be_rvi_call;
|
|
wire _ftb_io_out_last_stage_ftb_entry_always_taken_0;
|
|
wire _ftb_io_out_last_stage_ftb_entry_always_taken_1;
|
|
wire _ftb_io_s1_ready;
|
|
wire [5:0] _ftb_io_perf_0_value;
|
|
wire [5:0] _ftb_io_perf_1_value;
|
|
reg [5:0] io_perf_0_value_REG;
|
|
reg [5:0] io_perf_0_value_REG_1;
|
|
reg [5:0] io_perf_1_value_REG;
|
|
reg [5:0] io_perf_1_value_REG_1;
|
|
reg [5:0] io_perf_2_value_REG;
|
|
reg [5:0] io_perf_2_value_REG_1;
|
|
reg [5:0] io_perf_3_value_REG;
|
|
reg [5:0] io_perf_3_value_REG_1;
|
|
reg [5:0] io_perf_4_value_REG;
|
|
reg [5:0] io_perf_4_value_REG_1;
|
|
reg [5:0] io_perf_5_value_REG;
|
|
reg [5:0] io_perf_5_value_REG_1;
|
|
reg [5:0] io_perf_6_value_REG;
|
|
reg [5:0] io_perf_6_value_REG_1;
|
|
always @(posedge clock) begin
|
|
io_perf_0_value_REG <= _ubtb_io_perf_0_value;
|
|
io_perf_0_value_REG_1 <= io_perf_0_value_REG;
|
|
io_perf_1_value_REG <= _ubtb_io_perf_1_value;
|
|
io_perf_1_value_REG_1 <= io_perf_1_value_REG;
|
|
io_perf_2_value_REG <= _tage_io_perf_0_value;
|
|
io_perf_2_value_REG_1 <= io_perf_2_value_REG;
|
|
io_perf_3_value_REG <= _tage_io_perf_1_value;
|
|
io_perf_3_value_REG_1 <= io_perf_3_value_REG;
|
|
io_perf_4_value_REG <= _tage_io_perf_2_value;
|
|
io_perf_4_value_REG_1 <= io_perf_4_value_REG;
|
|
io_perf_5_value_REG <= _ftb_io_perf_0_value;
|
|
io_perf_5_value_REG_1 <= io_perf_5_value_REG;
|
|
io_perf_6_value_REG <= _ftb_io_perf_1_value;
|
|
io_perf_6_value_REG_1 <= io_perf_6_value_REG;
|
|
end // always @(posedge)
|
|
`ifdef ENABLE_INITIAL_REG_
|
|
`ifdef FIRRTL_BEFORE_INITIAL
|
|
`FIRRTL_BEFORE_INITIAL
|
|
`endif // FIRRTL_BEFORE_INITIAL
|
|
logic [31:0] _RANDOM[0:18];
|
|
initial begin
|
|
`ifdef INIT_RANDOM_PROLOG_
|
|
`INIT_RANDOM_PROLOG_
|
|
`endif // INIT_RANDOM_PROLOG_
|
|
`ifdef RANDOMIZE_REG_INIT
|
|
for (logic [4:0] i = 5'h0; i < 5'h13; i += 5'h1) begin
|
|
_RANDOM[i] = `RANDOM;
|
|
end
|
|
io_perf_0_value_REG = _RANDOM[5'hF][19:14];
|
|
io_perf_0_value_REG_1 = _RANDOM[5'hF][25:20];
|
|
io_perf_1_value_REG = _RANDOM[5'hF][31:26];
|
|
io_perf_1_value_REG_1 = _RANDOM[5'h10][5:0];
|
|
io_perf_2_value_REG = _RANDOM[5'h10][11:6];
|
|
io_perf_2_value_REG_1 = _RANDOM[5'h10][17:12];
|
|
io_perf_3_value_REG = _RANDOM[5'h10][23:18];
|
|
io_perf_3_value_REG_1 = _RANDOM[5'h10][29:24];
|
|
io_perf_4_value_REG = {_RANDOM[5'h10][31:30], _RANDOM[5'h11][3:0]};
|
|
io_perf_4_value_REG_1 = _RANDOM[5'h11][9:4];
|
|
io_perf_5_value_REG = _RANDOM[5'h11][15:10];
|
|
io_perf_5_value_REG_1 = _RANDOM[5'h11][21:16];
|
|
io_perf_6_value_REG = _RANDOM[5'h11][27:22];
|
|
io_perf_6_value_REG_1 = {_RANDOM[5'h11][31:28], _RANDOM[5'h12][1:0]};
|
|
`endif // RANDOMIZE_REG_INIT
|
|
end // initial
|
|
`ifdef FIRRTL_AFTER_INITIAL
|
|
`FIRRTL_AFTER_INITIAL
|
|
`endif // FIRRTL_AFTER_INITIAL
|
|
`endif // ENABLE_INITIAL_REG_
|
|
FTB ftb (
|
|
.clock (clock),
|
|
.reset (reset),
|
|
.io_reset_vector (io_reset_vector),
|
|
.io_in_bits_s0_pc_0 (io_in_bits_s0_pc_0),
|
|
.io_in_bits_s0_pc_1 (io_in_bits_s0_pc_1),
|
|
.io_in_bits_s0_pc_2 (io_in_bits_s0_pc_2),
|
|
.io_in_bits_s0_pc_3 (io_in_bits_s0_pc_3),
|
|
.io_in_bits_resp_in_0_s2_full_pred_0_br_taken_mask_0
|
|
(_tage_io_out_s2_full_pred_0_br_taken_mask_0),
|
|
.io_in_bits_resp_in_0_s2_full_pred_0_br_taken_mask_1
|
|
(_tage_io_out_s2_full_pred_0_br_taken_mask_1),
|
|
.io_in_bits_resp_in_0_s2_full_pred_1_br_taken_mask_0
|
|
(_tage_io_out_s2_full_pred_1_br_taken_mask_0),
|
|
.io_in_bits_resp_in_0_s2_full_pred_1_br_taken_mask_1
|
|
(_tage_io_out_s2_full_pred_1_br_taken_mask_1),
|
|
.io_in_bits_resp_in_0_s2_full_pred_2_br_taken_mask_0
|
|
(_tage_io_out_s2_full_pred_2_br_taken_mask_0),
|
|
.io_in_bits_resp_in_0_s2_full_pred_2_br_taken_mask_1
|
|
(_tage_io_out_s2_full_pred_2_br_taken_mask_1),
|
|
.io_in_bits_resp_in_0_s2_full_pred_3_br_taken_mask_0
|
|
(_tage_io_out_s2_full_pred_3_br_taken_mask_0),
|
|
.io_in_bits_resp_in_0_s2_full_pred_3_br_taken_mask_1
|
|
(_tage_io_out_s2_full_pred_3_br_taken_mask_1),
|
|
.io_in_bits_resp_in_0_s3_full_pred_0_br_taken_mask_0
|
|
(_tage_io_out_s3_full_pred_0_br_taken_mask_0),
|
|
.io_in_bits_resp_in_0_s3_full_pred_0_br_taken_mask_1
|
|
(_tage_io_out_s3_full_pred_0_br_taken_mask_1),
|
|
.io_in_bits_resp_in_0_s3_full_pred_1_br_taken_mask_0
|
|
(_tage_io_out_s3_full_pred_1_br_taken_mask_0),
|
|
.io_in_bits_resp_in_0_s3_full_pred_1_br_taken_mask_1
|
|
(_tage_io_out_s3_full_pred_1_br_taken_mask_1),
|
|
.io_in_bits_resp_in_0_s3_full_pred_2_br_taken_mask_0
|
|
(_tage_io_out_s3_full_pred_2_br_taken_mask_0),
|
|
.io_in_bits_resp_in_0_s3_full_pred_2_br_taken_mask_1
|
|
(_tage_io_out_s3_full_pred_2_br_taken_mask_1),
|
|
.io_in_bits_resp_in_0_s3_full_pred_3_br_taken_mask_0
|
|
(_tage_io_out_s3_full_pred_3_br_taken_mask_0),
|
|
.io_in_bits_resp_in_0_s3_full_pred_3_br_taken_mask_1
|
|
(_tage_io_out_s3_full_pred_3_br_taken_mask_1),
|
|
.io_out_s2_full_pred_0_br_taken_mask_0
|
|
(_ftb_io_out_s2_full_pred_0_br_taken_mask_0),
|
|
.io_out_s2_full_pred_0_br_taken_mask_1
|
|
(_ftb_io_out_s2_full_pred_0_br_taken_mask_1),
|
|
.io_out_s2_full_pred_0_slot_valids_0
|
|
(_ftb_io_out_s2_full_pred_0_slot_valids_0),
|
|
.io_out_s2_full_pred_0_slot_valids_1
|
|
(_ftb_io_out_s2_full_pred_0_slot_valids_1),
|
|
.io_out_s2_full_pred_0_targets_0
|
|
(_ftb_io_out_s2_full_pred_0_targets_0),
|
|
.io_out_s2_full_pred_0_targets_1
|
|
(_ftb_io_out_s2_full_pred_0_targets_1),
|
|
.io_out_s2_full_pred_0_jalr_target
|
|
(_ftb_io_out_s2_full_pred_0_jalr_target),
|
|
.io_out_s2_full_pred_0_offsets_0
|
|
(_ftb_io_out_s2_full_pred_0_offsets_0),
|
|
.io_out_s2_full_pred_0_offsets_1
|
|
(_ftb_io_out_s2_full_pred_0_offsets_1),
|
|
.io_out_s2_full_pred_0_fallThroughAddr
|
|
(_ftb_io_out_s2_full_pred_0_fallThroughAddr),
|
|
.io_out_s2_full_pred_0_is_br_sharing
|
|
(_ftb_io_out_s2_full_pred_0_is_br_sharing),
|
|
.io_out_s2_full_pred_0_hit (_ftb_io_out_s2_full_pred_0_hit),
|
|
.io_out_s2_full_pred_1_br_taken_mask_0
|
|
(_ftb_io_out_s2_full_pred_1_br_taken_mask_0),
|
|
.io_out_s2_full_pred_1_br_taken_mask_1
|
|
(_ftb_io_out_s2_full_pred_1_br_taken_mask_1),
|
|
.io_out_s2_full_pred_1_slot_valids_0
|
|
(_ftb_io_out_s2_full_pred_1_slot_valids_0),
|
|
.io_out_s2_full_pred_1_slot_valids_1
|
|
(_ftb_io_out_s2_full_pred_1_slot_valids_1),
|
|
.io_out_s2_full_pred_1_targets_0
|
|
(_ftb_io_out_s2_full_pred_1_targets_0),
|
|
.io_out_s2_full_pred_1_targets_1
|
|
(_ftb_io_out_s2_full_pred_1_targets_1),
|
|
.io_out_s2_full_pred_1_jalr_target
|
|
(_ftb_io_out_s2_full_pred_1_jalr_target),
|
|
.io_out_s2_full_pred_1_offsets_0
|
|
(_ftb_io_out_s2_full_pred_1_offsets_0),
|
|
.io_out_s2_full_pred_1_offsets_1
|
|
(_ftb_io_out_s2_full_pred_1_offsets_1),
|
|
.io_out_s2_full_pred_1_fallThroughAddr
|
|
(_ftb_io_out_s2_full_pred_1_fallThroughAddr),
|
|
.io_out_s2_full_pred_1_is_br_sharing
|
|
(_ftb_io_out_s2_full_pred_1_is_br_sharing),
|
|
.io_out_s2_full_pred_1_hit (_ftb_io_out_s2_full_pred_1_hit),
|
|
.io_out_s2_full_pred_2_br_taken_mask_0
|
|
(_ftb_io_out_s2_full_pred_2_br_taken_mask_0),
|
|
.io_out_s2_full_pred_2_br_taken_mask_1
|
|
(_ftb_io_out_s2_full_pred_2_br_taken_mask_1),
|
|
.io_out_s2_full_pred_2_slot_valids_0
|
|
(_ftb_io_out_s2_full_pred_2_slot_valids_0),
|
|
.io_out_s2_full_pred_2_slot_valids_1
|
|
(_ftb_io_out_s2_full_pred_2_slot_valids_1),
|
|
.io_out_s2_full_pred_2_targets_0
|
|
(_ftb_io_out_s2_full_pred_2_targets_0),
|
|
.io_out_s2_full_pred_2_targets_1
|
|
(_ftb_io_out_s2_full_pred_2_targets_1),
|
|
.io_out_s2_full_pred_2_jalr_target
|
|
(_ftb_io_out_s2_full_pred_2_jalr_target),
|
|
.io_out_s2_full_pred_2_offsets_0
|
|
(_ftb_io_out_s2_full_pred_2_offsets_0),
|
|
.io_out_s2_full_pred_2_offsets_1
|
|
(_ftb_io_out_s2_full_pred_2_offsets_1),
|
|
.io_out_s2_full_pred_2_fallThroughAddr
|
|
(_ftb_io_out_s2_full_pred_2_fallThroughAddr),
|
|
.io_out_s2_full_pred_2_is_jalr
|
|
(_ftb_io_out_s2_full_pred_2_is_jalr),
|
|
.io_out_s2_full_pred_2_is_call
|
|
(_ftb_io_out_s2_full_pred_2_is_call),
|
|
.io_out_s2_full_pred_2_is_ret
|
|
(_ftb_io_out_s2_full_pred_2_is_ret),
|
|
.io_out_s2_full_pred_2_last_may_be_rvi_call
|
|
(_ftb_io_out_s2_full_pred_2_last_may_be_rvi_call),
|
|
.io_out_s2_full_pred_2_is_br_sharing
|
|
(_ftb_io_out_s2_full_pred_2_is_br_sharing),
|
|
.io_out_s2_full_pred_2_hit (_ftb_io_out_s2_full_pred_2_hit),
|
|
.io_out_s2_full_pred_3_br_taken_mask_0
|
|
(_ftb_io_out_s2_full_pred_3_br_taken_mask_0),
|
|
.io_out_s2_full_pred_3_br_taken_mask_1
|
|
(_ftb_io_out_s2_full_pred_3_br_taken_mask_1),
|
|
.io_out_s2_full_pred_3_slot_valids_0
|
|
(_ftb_io_out_s2_full_pred_3_slot_valids_0),
|
|
.io_out_s2_full_pred_3_slot_valids_1
|
|
(_ftb_io_out_s2_full_pred_3_slot_valids_1),
|
|
.io_out_s2_full_pred_3_targets_0
|
|
(_ftb_io_out_s2_full_pred_3_targets_0),
|
|
.io_out_s2_full_pred_3_targets_1
|
|
(_ftb_io_out_s2_full_pred_3_targets_1),
|
|
.io_out_s2_full_pred_3_jalr_target
|
|
(_ftb_io_out_s2_full_pred_3_jalr_target),
|
|
.io_out_s2_full_pred_3_offsets_0
|
|
(_ftb_io_out_s2_full_pred_3_offsets_0),
|
|
.io_out_s2_full_pred_3_offsets_1
|
|
(_ftb_io_out_s2_full_pred_3_offsets_1),
|
|
.io_out_s2_full_pred_3_fallThroughAddr
|
|
(_ftb_io_out_s2_full_pred_3_fallThroughAddr),
|
|
.io_out_s2_full_pred_3_fallThroughErr
|
|
(_ftb_io_out_s2_full_pred_3_fallThroughErr),
|
|
.io_out_s2_full_pred_3_is_br_sharing
|
|
(_ftb_io_out_s2_full_pred_3_is_br_sharing),
|
|
.io_out_s2_full_pred_3_hit (_ftb_io_out_s2_full_pred_3_hit),
|
|
.io_out_s3_full_pred_0_br_taken_mask_0
|
|
(_ftb_io_out_s3_full_pred_0_br_taken_mask_0),
|
|
.io_out_s3_full_pred_0_br_taken_mask_1
|
|
(_ftb_io_out_s3_full_pred_0_br_taken_mask_1),
|
|
.io_out_s3_full_pred_0_slot_valids_0
|
|
(_ftb_io_out_s3_full_pred_0_slot_valids_0),
|
|
.io_out_s3_full_pred_0_slot_valids_1
|
|
(_ftb_io_out_s3_full_pred_0_slot_valids_1),
|
|
.io_out_s3_full_pred_0_targets_0
|
|
(_ftb_io_out_s3_full_pred_0_targets_0),
|
|
.io_out_s3_full_pred_0_targets_1
|
|
(_ftb_io_out_s3_full_pred_0_targets_1),
|
|
.io_out_s3_full_pred_0_jalr_target
|
|
(_ftb_io_out_s3_full_pred_0_jalr_target),
|
|
.io_out_s3_full_pred_0_fallThroughAddr
|
|
(_ftb_io_out_s3_full_pred_0_fallThroughAddr),
|
|
.io_out_s3_full_pred_0_fallThroughErr
|
|
(_ftb_io_out_s3_full_pred_0_fallThroughErr),
|
|
.io_out_s3_full_pred_0_is_br_sharing
|
|
(_ftb_io_out_s3_full_pred_0_is_br_sharing),
|
|
.io_out_s3_full_pred_0_hit (_ftb_io_out_s3_full_pred_0_hit),
|
|
.io_out_s3_full_pred_1_br_taken_mask_0
|
|
(_ftb_io_out_s3_full_pred_1_br_taken_mask_0),
|
|
.io_out_s3_full_pred_1_br_taken_mask_1
|
|
(_ftb_io_out_s3_full_pred_1_br_taken_mask_1),
|
|
.io_out_s3_full_pred_1_slot_valids_0
|
|
(_ftb_io_out_s3_full_pred_1_slot_valids_0),
|
|
.io_out_s3_full_pred_1_slot_valids_1
|
|
(_ftb_io_out_s3_full_pred_1_slot_valids_1),
|
|
.io_out_s3_full_pred_1_targets_0
|
|
(_ftb_io_out_s3_full_pred_1_targets_0),
|
|
.io_out_s3_full_pred_1_targets_1
|
|
(_ftb_io_out_s3_full_pred_1_targets_1),
|
|
.io_out_s3_full_pred_1_jalr_target
|
|
(_ftb_io_out_s3_full_pred_1_jalr_target),
|
|
.io_out_s3_full_pred_1_fallThroughAddr
|
|
(_ftb_io_out_s3_full_pred_1_fallThroughAddr),
|
|
.io_out_s3_full_pred_1_fallThroughErr
|
|
(_ftb_io_out_s3_full_pred_1_fallThroughErr),
|
|
.io_out_s3_full_pred_1_is_br_sharing
|
|
(_ftb_io_out_s3_full_pred_1_is_br_sharing),
|
|
.io_out_s3_full_pred_1_hit (_ftb_io_out_s3_full_pred_1_hit),
|
|
.io_out_s3_full_pred_2_br_taken_mask_0
|
|
(_ftb_io_out_s3_full_pred_2_br_taken_mask_0),
|
|
.io_out_s3_full_pred_2_br_taken_mask_1
|
|
(_ftb_io_out_s3_full_pred_2_br_taken_mask_1),
|
|
.io_out_s3_full_pred_2_slot_valids_0
|
|
(_ftb_io_out_s3_full_pred_2_slot_valids_0),
|
|
.io_out_s3_full_pred_2_slot_valids_1
|
|
(_ftb_io_out_s3_full_pred_2_slot_valids_1),
|
|
.io_out_s3_full_pred_2_targets_0
|
|
(_ftb_io_out_s3_full_pred_2_targets_0),
|
|
.io_out_s3_full_pred_2_targets_1
|
|
(_ftb_io_out_s3_full_pred_2_targets_1),
|
|
.io_out_s3_full_pred_2_jalr_target
|
|
(_ftb_io_out_s3_full_pred_2_jalr_target),
|
|
.io_out_s3_full_pred_2_fallThroughAddr
|
|
(_ftb_io_out_s3_full_pred_2_fallThroughAddr),
|
|
.io_out_s3_full_pred_2_fallThroughErr
|
|
(_ftb_io_out_s3_full_pred_2_fallThroughErr),
|
|
.io_out_s3_full_pred_2_is_jalr
|
|
(_ftb_io_out_s3_full_pred_2_is_jalr),
|
|
.io_out_s3_full_pred_2_is_call
|
|
(_ftb_io_out_s3_full_pred_2_is_call),
|
|
.io_out_s3_full_pred_2_is_ret
|
|
(_ftb_io_out_s3_full_pred_2_is_ret),
|
|
.io_out_s3_full_pred_2_is_br_sharing
|
|
(_ftb_io_out_s3_full_pred_2_is_br_sharing),
|
|
.io_out_s3_full_pred_2_hit (_ftb_io_out_s3_full_pred_2_hit),
|
|
.io_out_s3_full_pred_3_br_taken_mask_0
|
|
(_ftb_io_out_s3_full_pred_3_br_taken_mask_0),
|
|
.io_out_s3_full_pred_3_br_taken_mask_1
|
|
(_ftb_io_out_s3_full_pred_3_br_taken_mask_1),
|
|
.io_out_s3_full_pred_3_slot_valids_0
|
|
(_ftb_io_out_s3_full_pred_3_slot_valids_0),
|
|
.io_out_s3_full_pred_3_slot_valids_1
|
|
(_ftb_io_out_s3_full_pred_3_slot_valids_1),
|
|
.io_out_s3_full_pred_3_targets_0
|
|
(_ftb_io_out_s3_full_pred_3_targets_0),
|
|
.io_out_s3_full_pred_3_targets_1
|
|
(_ftb_io_out_s3_full_pred_3_targets_1),
|
|
.io_out_s3_full_pred_3_jalr_target
|
|
(_ftb_io_out_s3_full_pred_3_jalr_target),
|
|
.io_out_s3_full_pred_3_offsets_0
|
|
(_ftb_io_out_s3_full_pred_3_offsets_0),
|
|
.io_out_s3_full_pred_3_offsets_1
|
|
(_ftb_io_out_s3_full_pred_3_offsets_1),
|
|
.io_out_s3_full_pred_3_fallThroughAddr
|
|
(_ftb_io_out_s3_full_pred_3_fallThroughAddr),
|
|
.io_out_s3_full_pred_3_fallThroughErr
|
|
(_ftb_io_out_s3_full_pred_3_fallThroughErr),
|
|
.io_out_s3_full_pred_3_is_br_sharing
|
|
(_ftb_io_out_s3_full_pred_3_is_br_sharing),
|
|
.io_out_s3_full_pred_3_hit (_ftb_io_out_s3_full_pred_3_hit),
|
|
.io_out_last_stage_meta (_ftb_io_out_last_stage_meta),
|
|
.io_out_last_stage_ftb_entry_valid
|
|
(_ftb_io_out_last_stage_ftb_entry_valid),
|
|
.io_out_last_stage_ftb_entry_brSlots_0_offset
|
|
(_ftb_io_out_last_stage_ftb_entry_brSlots_0_offset),
|
|
.io_out_last_stage_ftb_entry_brSlots_0_lower
|
|
(_ftb_io_out_last_stage_ftb_entry_brSlots_0_lower),
|
|
.io_out_last_stage_ftb_entry_brSlots_0_tarStat
|
|
(_ftb_io_out_last_stage_ftb_entry_brSlots_0_tarStat),
|
|
.io_out_last_stage_ftb_entry_brSlots_0_sharing
|
|
(_ftb_io_out_last_stage_ftb_entry_brSlots_0_sharing),
|
|
.io_out_last_stage_ftb_entry_brSlots_0_valid
|
|
(_ftb_io_out_last_stage_ftb_entry_brSlots_0_valid),
|
|
.io_out_last_stage_ftb_entry_tailSlot_offset
|
|
(_ftb_io_out_last_stage_ftb_entry_tailSlot_offset),
|
|
.io_out_last_stage_ftb_entry_tailSlot_lower
|
|
(_ftb_io_out_last_stage_ftb_entry_tailSlot_lower),
|
|
.io_out_last_stage_ftb_entry_tailSlot_tarStat
|
|
(_ftb_io_out_last_stage_ftb_entry_tailSlot_tarStat),
|
|
.io_out_last_stage_ftb_entry_tailSlot_sharing
|
|
(_ftb_io_out_last_stage_ftb_entry_tailSlot_sharing),
|
|
.io_out_last_stage_ftb_entry_tailSlot_valid
|
|
(_ftb_io_out_last_stage_ftb_entry_tailSlot_valid),
|
|
.io_out_last_stage_ftb_entry_pftAddr
|
|
(_ftb_io_out_last_stage_ftb_entry_pftAddr),
|
|
.io_out_last_stage_ftb_entry_carry
|
|
(_ftb_io_out_last_stage_ftb_entry_carry),
|
|
.io_out_last_stage_ftb_entry_isCall
|
|
(_ftb_io_out_last_stage_ftb_entry_isCall),
|
|
.io_out_last_stage_ftb_entry_isRet
|
|
(_ftb_io_out_last_stage_ftb_entry_isRet),
|
|
.io_out_last_stage_ftb_entry_isJalr
|
|
(_ftb_io_out_last_stage_ftb_entry_isJalr),
|
|
.io_out_last_stage_ftb_entry_last_may_be_rvi_call
|
|
(_ftb_io_out_last_stage_ftb_entry_last_may_be_rvi_call),
|
|
.io_out_last_stage_ftb_entry_always_taken_0
|
|
(_ftb_io_out_last_stage_ftb_entry_always_taken_0),
|
|
.io_out_last_stage_ftb_entry_always_taken_1
|
|
(_ftb_io_out_last_stage_ftb_entry_always_taken_1),
|
|
.io_ctrl_btb_enable
|
|
(_ftb_io_ctrl_delay_io_out_btb_enable),
|
|
.io_s0_fire_0 (io_s0_fire_0),
|
|
.io_s0_fire_1 (io_s0_fire_1),
|
|
.io_s0_fire_2 (io_s0_fire_2),
|
|
.io_s0_fire_3 (io_s0_fire_3),
|
|
.io_s1_fire_0 (io_s1_fire_0),
|
|
.io_s1_fire_1 (io_s1_fire_1),
|
|
.io_s1_fire_2 (io_s1_fire_2),
|
|
.io_s1_fire_3 (io_s1_fire_3),
|
|
.io_s2_fire_0 (io_s2_fire_0),
|
|
.io_s2_fire_1 (io_s2_fire_1),
|
|
.io_s2_fire_2 (io_s2_fire_2),
|
|
.io_s2_fire_3 (io_s2_fire_3),
|
|
.io_s1_ready (_ftb_io_s1_ready),
|
|
.io_update_valid (io_update_valid),
|
|
.io_update_bits_pc (io_update_bits_pc),
|
|
.io_update_bits_ftb_entry_valid (io_update_bits_ftb_entry_valid),
|
|
.io_update_bits_ftb_entry_brSlots_0_offset
|
|
(io_update_bits_ftb_entry_brSlots_0_offset),
|
|
.io_update_bits_ftb_entry_brSlots_0_lower
|
|
(io_update_bits_ftb_entry_brSlots_0_lower),
|
|
.io_update_bits_ftb_entry_brSlots_0_tarStat
|
|
(io_update_bits_ftb_entry_brSlots_0_tarStat),
|
|
.io_update_bits_ftb_entry_brSlots_0_sharing
|
|
(io_update_bits_ftb_entry_brSlots_0_sharing),
|
|
.io_update_bits_ftb_entry_brSlots_0_valid
|
|
(io_update_bits_ftb_entry_brSlots_0_valid),
|
|
.io_update_bits_ftb_entry_tailSlot_offset
|
|
(io_update_bits_ftb_entry_tailSlot_offset),
|
|
.io_update_bits_ftb_entry_tailSlot_lower
|
|
(io_update_bits_ftb_entry_tailSlot_lower),
|
|
.io_update_bits_ftb_entry_tailSlot_tarStat
|
|
(io_update_bits_ftb_entry_tailSlot_tarStat),
|
|
.io_update_bits_ftb_entry_tailSlot_sharing
|
|
(io_update_bits_ftb_entry_tailSlot_sharing),
|
|
.io_update_bits_ftb_entry_tailSlot_valid
|
|
(io_update_bits_ftb_entry_tailSlot_valid),
|
|
.io_update_bits_ftb_entry_pftAddr
|
|
(io_update_bits_ftb_entry_pftAddr),
|
|
.io_update_bits_ftb_entry_carry (io_update_bits_ftb_entry_carry),
|
|
.io_update_bits_ftb_entry_isCall
|
|
(io_update_bits_ftb_entry_isCall),
|
|
.io_update_bits_ftb_entry_isRet (io_update_bits_ftb_entry_isRet),
|
|
.io_update_bits_ftb_entry_isJalr
|
|
(io_update_bits_ftb_entry_isJalr),
|
|
.io_update_bits_ftb_entry_last_may_be_rvi_call
|
|
(io_update_bits_ftb_entry_last_may_be_rvi_call),
|
|
.io_update_bits_ftb_entry_always_taken_0
|
|
(io_update_bits_ftb_entry_always_taken_0),
|
|
.io_update_bits_ftb_entry_always_taken_1
|
|
(io_update_bits_ftb_entry_always_taken_1),
|
|
.io_update_bits_old_entry (io_update_bits_old_entry),
|
|
.io_update_bits_meta
|
|
({126'h0, io_update_bits_meta[222:126]}),
|
|
.io_perf_0_value (_ftb_io_perf_0_value),
|
|
.io_perf_1_value (_ftb_io_perf_1_value)
|
|
);
|
|
FauFTB ubtb (
|
|
.clock (clock),
|
|
.reset (reset),
|
|
.io_reset_vector (io_reset_vector),
|
|
.io_in_bits_s0_pc_0 (io_in_bits_s0_pc_0),
|
|
.io_in_bits_s0_pc_1 (io_in_bits_s0_pc_1),
|
|
.io_in_bits_s0_pc_2 (io_in_bits_s0_pc_2),
|
|
.io_in_bits_s0_pc_3 (io_in_bits_s0_pc_3),
|
|
.io_out_s1_pc_0 (io_out_s1_pc_0),
|
|
.io_out_s1_pc_1 (io_out_s1_pc_1),
|
|
.io_out_s1_pc_2 (io_out_s1_pc_2),
|
|
.io_out_s1_pc_3 (io_out_s1_pc_3),
|
|
.io_out_s1_full_pred_0_br_taken_mask_0 (io_out_s1_full_pred_0_br_taken_mask_0),
|
|
.io_out_s1_full_pred_0_br_taken_mask_1 (io_out_s1_full_pred_0_br_taken_mask_1),
|
|
.io_out_s1_full_pred_0_slot_valids_0 (io_out_s1_full_pred_0_slot_valids_0),
|
|
.io_out_s1_full_pred_0_slot_valids_1 (io_out_s1_full_pred_0_slot_valids_1),
|
|
.io_out_s1_full_pred_0_targets_0 (io_out_s1_full_pred_0_targets_0),
|
|
.io_out_s1_full_pred_0_targets_1 (io_out_s1_full_pred_0_targets_1),
|
|
.io_out_s1_full_pred_0_offsets_0 (io_out_s1_full_pred_0_offsets_0),
|
|
.io_out_s1_full_pred_0_offsets_1 (io_out_s1_full_pred_0_offsets_1),
|
|
.io_out_s1_full_pred_0_fallThroughAddr (io_out_s1_full_pred_0_fallThroughAddr),
|
|
.io_out_s1_full_pred_0_is_br_sharing (io_out_s1_full_pred_0_is_br_sharing),
|
|
.io_out_s1_full_pred_0_hit (io_out_s1_full_pred_0_hit),
|
|
.io_out_s1_full_pred_1_br_taken_mask_0 (io_out_s1_full_pred_1_br_taken_mask_0),
|
|
.io_out_s1_full_pred_1_br_taken_mask_1 (io_out_s1_full_pred_1_br_taken_mask_1),
|
|
.io_out_s1_full_pred_1_slot_valids_0 (io_out_s1_full_pred_1_slot_valids_0),
|
|
.io_out_s1_full_pred_1_slot_valids_1 (io_out_s1_full_pred_1_slot_valids_1),
|
|
.io_out_s1_full_pred_1_targets_0 (io_out_s1_full_pred_1_targets_0),
|
|
.io_out_s1_full_pred_1_targets_1 (io_out_s1_full_pred_1_targets_1),
|
|
.io_out_s1_full_pred_1_offsets_0 (io_out_s1_full_pred_1_offsets_0),
|
|
.io_out_s1_full_pred_1_offsets_1 (io_out_s1_full_pred_1_offsets_1),
|
|
.io_out_s1_full_pred_1_fallThroughAddr (io_out_s1_full_pred_1_fallThroughAddr),
|
|
.io_out_s1_full_pred_1_is_br_sharing (io_out_s1_full_pred_1_is_br_sharing),
|
|
.io_out_s1_full_pred_1_hit (io_out_s1_full_pred_1_hit),
|
|
.io_out_s1_full_pred_2_br_taken_mask_0 (io_out_s1_full_pred_2_br_taken_mask_0),
|
|
.io_out_s1_full_pred_2_br_taken_mask_1 (io_out_s1_full_pred_2_br_taken_mask_1),
|
|
.io_out_s1_full_pred_2_slot_valids_0 (io_out_s1_full_pred_2_slot_valids_0),
|
|
.io_out_s1_full_pred_2_slot_valids_1 (io_out_s1_full_pred_2_slot_valids_1),
|
|
.io_out_s1_full_pred_2_targets_0 (io_out_s1_full_pred_2_targets_0),
|
|
.io_out_s1_full_pred_2_targets_1 (io_out_s1_full_pred_2_targets_1),
|
|
.io_out_s1_full_pred_2_offsets_0 (io_out_s1_full_pred_2_offsets_0),
|
|
.io_out_s1_full_pred_2_offsets_1 (io_out_s1_full_pred_2_offsets_1),
|
|
.io_out_s1_full_pred_2_fallThroughAddr (io_out_s1_full_pred_2_fallThroughAddr),
|
|
.io_out_s1_full_pred_2_is_br_sharing (io_out_s1_full_pred_2_is_br_sharing),
|
|
.io_out_s1_full_pred_2_hit (io_out_s1_full_pred_2_hit),
|
|
.io_out_s1_full_pred_3_br_taken_mask_0 (io_out_s1_full_pred_3_br_taken_mask_0),
|
|
.io_out_s1_full_pred_3_br_taken_mask_1 (io_out_s1_full_pred_3_br_taken_mask_1),
|
|
.io_out_s1_full_pred_3_slot_valids_0 (io_out_s1_full_pred_3_slot_valids_0),
|
|
.io_out_s1_full_pred_3_slot_valids_1 (io_out_s1_full_pred_3_slot_valids_1),
|
|
.io_out_s1_full_pred_3_targets_0 (io_out_s1_full_pred_3_targets_0),
|
|
.io_out_s1_full_pred_3_targets_1 (io_out_s1_full_pred_3_targets_1),
|
|
.io_out_s1_full_pred_3_offsets_0 (io_out_s1_full_pred_3_offsets_0),
|
|
.io_out_s1_full_pred_3_offsets_1 (io_out_s1_full_pred_3_offsets_1),
|
|
.io_out_s1_full_pred_3_fallThroughAddr (io_out_s1_full_pred_3_fallThroughAddr),
|
|
.io_out_s1_full_pred_3_fallThroughErr (io_out_s1_full_pred_3_fallThroughErr),
|
|
.io_out_s1_full_pred_3_is_br_sharing (io_out_s1_full_pred_3_is_br_sharing),
|
|
.io_out_s1_full_pred_3_hit (io_out_s1_full_pred_3_hit),
|
|
.io_out_last_stage_meta (_ubtb_io_out_last_stage_meta),
|
|
.io_ctrl_ubtb_enable (_ubtb_io_ctrl_delay_io_out_ubtb_enable),
|
|
.io_s0_fire_0 (io_s0_fire_0),
|
|
.io_s0_fire_1 (io_s0_fire_1),
|
|
.io_s0_fire_2 (io_s0_fire_2),
|
|
.io_s0_fire_3 (io_s0_fire_3),
|
|
.io_s1_fire_0 (io_s1_fire_0),
|
|
.io_s2_fire_0 (io_s2_fire_0),
|
|
.io_update_valid (io_update_valid),
|
|
.io_update_bits_pc (io_update_bits_pc),
|
|
.io_update_bits_ftb_entry_brSlots_0_offset
|
|
(io_update_bits_ftb_entry_brSlots_0_offset),
|
|
.io_update_bits_ftb_entry_brSlots_0_lower
|
|
(io_update_bits_ftb_entry_brSlots_0_lower),
|
|
.io_update_bits_ftb_entry_brSlots_0_tarStat
|
|
(io_update_bits_ftb_entry_brSlots_0_tarStat),
|
|
.io_update_bits_ftb_entry_brSlots_0_valid
|
|
(io_update_bits_ftb_entry_brSlots_0_valid),
|
|
.io_update_bits_ftb_entry_tailSlot_offset
|
|
(io_update_bits_ftb_entry_tailSlot_offset),
|
|
.io_update_bits_ftb_entry_tailSlot_lower (io_update_bits_ftb_entry_tailSlot_lower),
|
|
.io_update_bits_ftb_entry_tailSlot_tarStat
|
|
(io_update_bits_ftb_entry_tailSlot_tarStat),
|
|
.io_update_bits_ftb_entry_tailSlot_sharing
|
|
(io_update_bits_ftb_entry_tailSlot_sharing),
|
|
.io_update_bits_ftb_entry_tailSlot_valid (io_update_bits_ftb_entry_tailSlot_valid),
|
|
.io_update_bits_ftb_entry_pftAddr (io_update_bits_ftb_entry_pftAddr),
|
|
.io_update_bits_ftb_entry_carry (io_update_bits_ftb_entry_carry),
|
|
.io_update_bits_ftb_entry_always_taken_0 (io_update_bits_ftb_entry_always_taken_0),
|
|
.io_update_bits_ftb_entry_always_taken_1 (io_update_bits_ftb_entry_always_taken_1),
|
|
.io_update_bits_br_taken_mask_0 (io_update_bits_br_taken_mask_0),
|
|
.io_update_bits_br_taken_mask_1 (io_update_bits_br_taken_mask_1),
|
|
.io_update_bits_meta ({217'h0, io_update_bits_meta[222:217]}),
|
|
.io_perf_0_value (_ubtb_io_perf_0_value),
|
|
.io_perf_1_value (_ubtb_io_perf_1_value)
|
|
);
|
|
Tage_SC tage (
|
|
.clock (clock),
|
|
.reset (reset),
|
|
.io_reset_vector (io_reset_vector),
|
|
.io_in_bits_s0_pc_0 (io_in_bits_s0_pc_0),
|
|
.io_in_bits_s0_pc_1 (io_in_bits_s0_pc_1),
|
|
.io_in_bits_s0_pc_3 (io_in_bits_s0_pc_3),
|
|
.io_in_bits_folded_hist_1_hist_17_folded_hist
|
|
(io_in_bits_folded_hist_1_hist_17_folded_hist),
|
|
.io_in_bits_folded_hist_1_hist_16_folded_hist
|
|
(io_in_bits_folded_hist_1_hist_16_folded_hist),
|
|
.io_in_bits_folded_hist_1_hist_15_folded_hist
|
|
(io_in_bits_folded_hist_1_hist_15_folded_hist),
|
|
.io_in_bits_folded_hist_1_hist_14_folded_hist
|
|
(io_in_bits_folded_hist_1_hist_14_folded_hist),
|
|
.io_in_bits_folded_hist_1_hist_9_folded_hist
|
|
(io_in_bits_folded_hist_1_hist_9_folded_hist),
|
|
.io_in_bits_folded_hist_1_hist_8_folded_hist
|
|
(io_in_bits_folded_hist_1_hist_8_folded_hist),
|
|
.io_in_bits_folded_hist_1_hist_7_folded_hist
|
|
(io_in_bits_folded_hist_1_hist_7_folded_hist),
|
|
.io_in_bits_folded_hist_1_hist_5_folded_hist
|
|
(io_in_bits_folded_hist_1_hist_5_folded_hist),
|
|
.io_in_bits_folded_hist_1_hist_4_folded_hist
|
|
(io_in_bits_folded_hist_1_hist_4_folded_hist),
|
|
.io_in_bits_folded_hist_1_hist_3_folded_hist
|
|
(io_in_bits_folded_hist_1_hist_3_folded_hist),
|
|
.io_in_bits_folded_hist_1_hist_1_folded_hist
|
|
(io_in_bits_folded_hist_1_hist_1_folded_hist),
|
|
.io_in_bits_folded_hist_3_hist_12_folded_hist
|
|
(io_in_bits_folded_hist_3_hist_12_folded_hist),
|
|
.io_in_bits_folded_hist_3_hist_11_folded_hist
|
|
(io_in_bits_folded_hist_3_hist_11_folded_hist),
|
|
.io_in_bits_folded_hist_3_hist_2_folded_hist
|
|
(io_in_bits_folded_hist_3_hist_2_folded_hist),
|
|
.io_out_s2_full_pred_0_br_taken_mask_0
|
|
(_tage_io_out_s2_full_pred_0_br_taken_mask_0),
|
|
.io_out_s2_full_pred_0_br_taken_mask_1
|
|
(_tage_io_out_s2_full_pred_0_br_taken_mask_1),
|
|
.io_out_s2_full_pred_1_br_taken_mask_0
|
|
(_tage_io_out_s2_full_pred_1_br_taken_mask_0),
|
|
.io_out_s2_full_pred_1_br_taken_mask_1
|
|
(_tage_io_out_s2_full_pred_1_br_taken_mask_1),
|
|
.io_out_s2_full_pred_2_br_taken_mask_0
|
|
(_tage_io_out_s2_full_pred_2_br_taken_mask_0),
|
|
.io_out_s2_full_pred_2_br_taken_mask_1
|
|
(_tage_io_out_s2_full_pred_2_br_taken_mask_1),
|
|
.io_out_s2_full_pred_3_br_taken_mask_0
|
|
(_tage_io_out_s2_full_pred_3_br_taken_mask_0),
|
|
.io_out_s2_full_pred_3_br_taken_mask_1
|
|
(_tage_io_out_s2_full_pred_3_br_taken_mask_1),
|
|
.io_out_s3_full_pred_0_br_taken_mask_0
|
|
(_tage_io_out_s3_full_pred_0_br_taken_mask_0),
|
|
.io_out_s3_full_pred_0_br_taken_mask_1
|
|
(_tage_io_out_s3_full_pred_0_br_taken_mask_1),
|
|
.io_out_s3_full_pred_1_br_taken_mask_0
|
|
(_tage_io_out_s3_full_pred_1_br_taken_mask_0),
|
|
.io_out_s3_full_pred_1_br_taken_mask_1
|
|
(_tage_io_out_s3_full_pred_1_br_taken_mask_1),
|
|
.io_out_s3_full_pred_2_br_taken_mask_0
|
|
(_tage_io_out_s3_full_pred_2_br_taken_mask_0),
|
|
.io_out_s3_full_pred_2_br_taken_mask_1
|
|
(_tage_io_out_s3_full_pred_2_br_taken_mask_1),
|
|
.io_out_s3_full_pred_3_br_taken_mask_0
|
|
(_tage_io_out_s3_full_pred_3_br_taken_mask_0),
|
|
.io_out_s3_full_pred_3_br_taken_mask_1
|
|
(_tage_io_out_s3_full_pred_3_br_taken_mask_1),
|
|
.io_out_last_stage_meta
|
|
(_tage_io_out_last_stage_meta),
|
|
.io_ctrl_tage_enable
|
|
(_tage_io_ctrl_delay_io_out_tage_enable),
|
|
.io_ctrl_sc_enable
|
|
(_tage_io_ctrl_delay_io_out_sc_enable),
|
|
.io_s0_fire_0 (io_s0_fire_0),
|
|
.io_s0_fire_1 (io_s0_fire_1),
|
|
.io_s0_fire_3 (io_s0_fire_3),
|
|
.io_s1_fire_0 (io_s1_fire_0),
|
|
.io_s1_fire_1 (io_s1_fire_1),
|
|
.io_s1_fire_2 (io_s1_fire_2),
|
|
.io_s1_fire_3 (io_s1_fire_3),
|
|
.io_s2_fire_0 (io_s2_fire_0),
|
|
.io_s2_fire_1 (io_s2_fire_1),
|
|
.io_s2_fire_2 (io_s2_fire_2),
|
|
.io_s2_fire_3 (io_s2_fire_3),
|
|
.io_s1_ready (_tage_io_s1_ready),
|
|
.io_update_valid (io_update_valid),
|
|
.io_update_bits_pc (io_update_bits_pc),
|
|
.io_update_bits_spec_info_folded_hist_hist_17_folded_hist
|
|
(io_update_bits_spec_info_folded_hist_hist_17_folded_hist),
|
|
.io_update_bits_spec_info_folded_hist_hist_16_folded_hist
|
|
(io_update_bits_spec_info_folded_hist_hist_16_folded_hist),
|
|
.io_update_bits_spec_info_folded_hist_hist_15_folded_hist
|
|
(io_update_bits_spec_info_folded_hist_hist_15_folded_hist),
|
|
.io_update_bits_spec_info_folded_hist_hist_14_folded_hist
|
|
(io_update_bits_spec_info_folded_hist_hist_14_folded_hist),
|
|
.io_update_bits_spec_info_folded_hist_hist_12_folded_hist
|
|
(io_update_bits_spec_info_folded_hist_hist_12_folded_hist),
|
|
.io_update_bits_spec_info_folded_hist_hist_11_folded_hist
|
|
(io_update_bits_spec_info_folded_hist_hist_11_folded_hist),
|
|
.io_update_bits_spec_info_folded_hist_hist_9_folded_hist
|
|
(io_update_bits_spec_info_folded_hist_hist_9_folded_hist),
|
|
.io_update_bits_spec_info_folded_hist_hist_8_folded_hist
|
|
(io_update_bits_spec_info_folded_hist_hist_8_folded_hist),
|
|
.io_update_bits_spec_info_folded_hist_hist_7_folded_hist
|
|
(io_update_bits_spec_info_folded_hist_hist_7_folded_hist),
|
|
.io_update_bits_spec_info_folded_hist_hist_5_folded_hist
|
|
(io_update_bits_spec_info_folded_hist_hist_5_folded_hist),
|
|
.io_update_bits_spec_info_folded_hist_hist_4_folded_hist
|
|
(io_update_bits_spec_info_folded_hist_hist_4_folded_hist),
|
|
.io_update_bits_spec_info_folded_hist_hist_3_folded_hist
|
|
(io_update_bits_spec_info_folded_hist_hist_3_folded_hist),
|
|
.io_update_bits_spec_info_folded_hist_hist_2_folded_hist
|
|
(io_update_bits_spec_info_folded_hist_hist_2_folded_hist),
|
|
.io_update_bits_spec_info_folded_hist_hist_1_folded_hist
|
|
(io_update_bits_spec_info_folded_hist_hist_1_folded_hist),
|
|
.io_update_bits_ftb_entry_brSlots_0_valid
|
|
(io_update_bits_ftb_entry_brSlots_0_valid),
|
|
.io_update_bits_ftb_entry_tailSlot_sharing
|
|
(io_update_bits_ftb_entry_tailSlot_sharing),
|
|
.io_update_bits_ftb_entry_tailSlot_valid
|
|
(io_update_bits_ftb_entry_tailSlot_valid),
|
|
.io_update_bits_ftb_entry_always_taken_0
|
|
(io_update_bits_ftb_entry_always_taken_0),
|
|
.io_update_bits_ftb_entry_always_taken_1
|
|
(io_update_bits_ftb_entry_always_taken_1),
|
|
.io_update_bits_br_taken_mask_0
|
|
(io_update_bits_br_taken_mask_0),
|
|
.io_update_bits_br_taken_mask_1
|
|
(io_update_bits_br_taken_mask_1),
|
|
.io_update_bits_mispred_mask_0
|
|
(io_update_bits_mispred_mask_0),
|
|
.io_update_bits_mispred_mask_1
|
|
(io_update_bits_mispred_mask_1),
|
|
.io_update_bits_meta
|
|
({129'h0, io_update_bits_meta[222:129]}),
|
|
.io_perf_0_value (_tage_io_perf_0_value),
|
|
.io_perf_1_value (_tage_io_perf_1_value),
|
|
.io_perf_2_value (_tage_io_perf_2_value)
|
|
);
|
|
RAS ras (
|
|
.clock (clock),
|
|
.reset (reset),
|
|
.io_reset_vector (io_reset_vector),
|
|
.io_in_bits_s0_pc_0 (io_in_bits_s0_pc_0),
|
|
.io_in_bits_s0_pc_1 (io_in_bits_s0_pc_1),
|
|
.io_in_bits_s0_pc_2 (io_in_bits_s0_pc_2),
|
|
.io_in_bits_s0_pc_3 (io_in_bits_s0_pc_3),
|
|
.io_in_bits_resp_in_0_s2_full_pred_0_br_taken_mask_0
|
|
(_ittage_io_out_s2_full_pred_0_br_taken_mask_0),
|
|
.io_in_bits_resp_in_0_s2_full_pred_0_br_taken_mask_1
|
|
(_ittage_io_out_s2_full_pred_0_br_taken_mask_1),
|
|
.io_in_bits_resp_in_0_s2_full_pred_0_slot_valids_0
|
|
(_ittage_io_out_s2_full_pred_0_slot_valids_0),
|
|
.io_in_bits_resp_in_0_s2_full_pred_0_slot_valids_1
|
|
(_ittage_io_out_s2_full_pred_0_slot_valids_1),
|
|
.io_in_bits_resp_in_0_s2_full_pred_0_targets_0
|
|
(_ittage_io_out_s2_full_pred_0_targets_0),
|
|
.io_in_bits_resp_in_0_s2_full_pred_0_targets_1
|
|
(_ittage_io_out_s2_full_pred_0_targets_1),
|
|
.io_in_bits_resp_in_0_s2_full_pred_0_jalr_target
|
|
(_ittage_io_out_s2_full_pred_0_jalr_target),
|
|
.io_in_bits_resp_in_0_s2_full_pred_0_offsets_0
|
|
(_ittage_io_out_s2_full_pred_0_offsets_0),
|
|
.io_in_bits_resp_in_0_s2_full_pred_0_offsets_1
|
|
(_ittage_io_out_s2_full_pred_0_offsets_1),
|
|
.io_in_bits_resp_in_0_s2_full_pred_0_fallThroughAddr
|
|
(_ittage_io_out_s2_full_pred_0_fallThroughAddr),
|
|
.io_in_bits_resp_in_0_s2_full_pred_0_is_br_sharing
|
|
(_ittage_io_out_s2_full_pred_0_is_br_sharing),
|
|
.io_in_bits_resp_in_0_s2_full_pred_0_hit
|
|
(_ittage_io_out_s2_full_pred_0_hit),
|
|
.io_in_bits_resp_in_0_s2_full_pred_1_br_taken_mask_0
|
|
(_ittage_io_out_s2_full_pred_1_br_taken_mask_0),
|
|
.io_in_bits_resp_in_0_s2_full_pred_1_br_taken_mask_1
|
|
(_ittage_io_out_s2_full_pred_1_br_taken_mask_1),
|
|
.io_in_bits_resp_in_0_s2_full_pred_1_slot_valids_0
|
|
(_ittage_io_out_s2_full_pred_1_slot_valids_0),
|
|
.io_in_bits_resp_in_0_s2_full_pred_1_slot_valids_1
|
|
(_ittage_io_out_s2_full_pred_1_slot_valids_1),
|
|
.io_in_bits_resp_in_0_s2_full_pred_1_targets_0
|
|
(_ittage_io_out_s2_full_pred_1_targets_0),
|
|
.io_in_bits_resp_in_0_s2_full_pred_1_targets_1
|
|
(_ittage_io_out_s2_full_pred_1_targets_1),
|
|
.io_in_bits_resp_in_0_s2_full_pred_1_jalr_target
|
|
(_ittage_io_out_s2_full_pred_1_jalr_target),
|
|
.io_in_bits_resp_in_0_s2_full_pred_1_offsets_0
|
|
(_ittage_io_out_s2_full_pred_1_offsets_0),
|
|
.io_in_bits_resp_in_0_s2_full_pred_1_offsets_1
|
|
(_ittage_io_out_s2_full_pred_1_offsets_1),
|
|
.io_in_bits_resp_in_0_s2_full_pred_1_fallThroughAddr
|
|
(_ittage_io_out_s2_full_pred_1_fallThroughAddr),
|
|
.io_in_bits_resp_in_0_s2_full_pred_1_is_br_sharing
|
|
(_ittage_io_out_s2_full_pred_1_is_br_sharing),
|
|
.io_in_bits_resp_in_0_s2_full_pred_1_hit
|
|
(_ittage_io_out_s2_full_pred_1_hit),
|
|
.io_in_bits_resp_in_0_s2_full_pred_2_br_taken_mask_0
|
|
(_ittage_io_out_s2_full_pred_2_br_taken_mask_0),
|
|
.io_in_bits_resp_in_0_s2_full_pred_2_br_taken_mask_1
|
|
(_ittage_io_out_s2_full_pred_2_br_taken_mask_1),
|
|
.io_in_bits_resp_in_0_s2_full_pred_2_slot_valids_0
|
|
(_ittage_io_out_s2_full_pred_2_slot_valids_0),
|
|
.io_in_bits_resp_in_0_s2_full_pred_2_slot_valids_1
|
|
(_ittage_io_out_s2_full_pred_2_slot_valids_1),
|
|
.io_in_bits_resp_in_0_s2_full_pred_2_targets_0
|
|
(_ittage_io_out_s2_full_pred_2_targets_0),
|
|
.io_in_bits_resp_in_0_s2_full_pred_2_targets_1
|
|
(_ittage_io_out_s2_full_pred_2_targets_1),
|
|
.io_in_bits_resp_in_0_s2_full_pred_2_jalr_target
|
|
(_ittage_io_out_s2_full_pred_2_jalr_target),
|
|
.io_in_bits_resp_in_0_s2_full_pred_2_offsets_0
|
|
(_ittage_io_out_s2_full_pred_2_offsets_0),
|
|
.io_in_bits_resp_in_0_s2_full_pred_2_offsets_1
|
|
(_ittage_io_out_s2_full_pred_2_offsets_1),
|
|
.io_in_bits_resp_in_0_s2_full_pred_2_fallThroughAddr
|
|
(_ittage_io_out_s2_full_pred_2_fallThroughAddr),
|
|
.io_in_bits_resp_in_0_s2_full_pred_2_is_jalr
|
|
(_ittage_io_out_s2_full_pred_2_is_jalr),
|
|
.io_in_bits_resp_in_0_s2_full_pred_2_is_call
|
|
(_ittage_io_out_s2_full_pred_2_is_call),
|
|
.io_in_bits_resp_in_0_s2_full_pred_2_is_ret
|
|
(_ittage_io_out_s2_full_pred_2_is_ret),
|
|
.io_in_bits_resp_in_0_s2_full_pred_2_last_may_be_rvi_call
|
|
(_ittage_io_out_s2_full_pred_2_last_may_be_rvi_call),
|
|
.io_in_bits_resp_in_0_s2_full_pred_2_is_br_sharing
|
|
(_ittage_io_out_s2_full_pred_2_is_br_sharing),
|
|
.io_in_bits_resp_in_0_s2_full_pred_2_hit
|
|
(_ittage_io_out_s2_full_pred_2_hit),
|
|
.io_in_bits_resp_in_0_s2_full_pred_3_br_taken_mask_0
|
|
(_ittage_io_out_s2_full_pred_3_br_taken_mask_0),
|
|
.io_in_bits_resp_in_0_s2_full_pred_3_br_taken_mask_1
|
|
(_ittage_io_out_s2_full_pred_3_br_taken_mask_1),
|
|
.io_in_bits_resp_in_0_s2_full_pred_3_slot_valids_0
|
|
(_ittage_io_out_s2_full_pred_3_slot_valids_0),
|
|
.io_in_bits_resp_in_0_s2_full_pred_3_slot_valids_1
|
|
(_ittage_io_out_s2_full_pred_3_slot_valids_1),
|
|
.io_in_bits_resp_in_0_s2_full_pred_3_targets_0
|
|
(_ittage_io_out_s2_full_pred_3_targets_0),
|
|
.io_in_bits_resp_in_0_s2_full_pred_3_targets_1
|
|
(_ittage_io_out_s2_full_pred_3_targets_1),
|
|
.io_in_bits_resp_in_0_s2_full_pred_3_jalr_target
|
|
(_ittage_io_out_s2_full_pred_3_jalr_target),
|
|
.io_in_bits_resp_in_0_s2_full_pred_3_offsets_0
|
|
(_ittage_io_out_s2_full_pred_3_offsets_0),
|
|
.io_in_bits_resp_in_0_s2_full_pred_3_offsets_1
|
|
(_ittage_io_out_s2_full_pred_3_offsets_1),
|
|
.io_in_bits_resp_in_0_s2_full_pred_3_fallThroughAddr
|
|
(_ittage_io_out_s2_full_pred_3_fallThroughAddr),
|
|
.io_in_bits_resp_in_0_s2_full_pred_3_fallThroughErr
|
|
(_ittage_io_out_s2_full_pred_3_fallThroughErr),
|
|
.io_in_bits_resp_in_0_s2_full_pred_3_is_br_sharing
|
|
(_ittage_io_out_s2_full_pred_3_is_br_sharing),
|
|
.io_in_bits_resp_in_0_s2_full_pred_3_hit
|
|
(_ittage_io_out_s2_full_pred_3_hit),
|
|
.io_in_bits_resp_in_0_s3_full_pred_0_br_taken_mask_0
|
|
(_ittage_io_out_s3_full_pred_0_br_taken_mask_0),
|
|
.io_in_bits_resp_in_0_s3_full_pred_0_br_taken_mask_1
|
|
(_ittage_io_out_s3_full_pred_0_br_taken_mask_1),
|
|
.io_in_bits_resp_in_0_s3_full_pred_0_slot_valids_0
|
|
(_ittage_io_out_s3_full_pred_0_slot_valids_0),
|
|
.io_in_bits_resp_in_0_s3_full_pred_0_slot_valids_1
|
|
(_ittage_io_out_s3_full_pred_0_slot_valids_1),
|
|
.io_in_bits_resp_in_0_s3_full_pred_0_targets_0
|
|
(_ittage_io_out_s3_full_pred_0_targets_0),
|
|
.io_in_bits_resp_in_0_s3_full_pred_0_targets_1
|
|
(_ittage_io_out_s3_full_pred_0_targets_1),
|
|
.io_in_bits_resp_in_0_s3_full_pred_0_jalr_target
|
|
(_ittage_io_out_s3_full_pred_0_jalr_target),
|
|
.io_in_bits_resp_in_0_s3_full_pred_0_fallThroughAddr
|
|
(_ittage_io_out_s3_full_pred_0_fallThroughAddr),
|
|
.io_in_bits_resp_in_0_s3_full_pred_0_fallThroughErr
|
|
(_ittage_io_out_s3_full_pred_0_fallThroughErr),
|
|
.io_in_bits_resp_in_0_s3_full_pred_0_is_br_sharing
|
|
(_ittage_io_out_s3_full_pred_0_is_br_sharing),
|
|
.io_in_bits_resp_in_0_s3_full_pred_0_hit
|
|
(_ittage_io_out_s3_full_pred_0_hit),
|
|
.io_in_bits_resp_in_0_s3_full_pred_1_br_taken_mask_0
|
|
(_ittage_io_out_s3_full_pred_1_br_taken_mask_0),
|
|
.io_in_bits_resp_in_0_s3_full_pred_1_br_taken_mask_1
|
|
(_ittage_io_out_s3_full_pred_1_br_taken_mask_1),
|
|
.io_in_bits_resp_in_0_s3_full_pred_1_slot_valids_0
|
|
(_ittage_io_out_s3_full_pred_1_slot_valids_0),
|
|
.io_in_bits_resp_in_0_s3_full_pred_1_slot_valids_1
|
|
(_ittage_io_out_s3_full_pred_1_slot_valids_1),
|
|
.io_in_bits_resp_in_0_s3_full_pred_1_targets_0
|
|
(_ittage_io_out_s3_full_pred_1_targets_0),
|
|
.io_in_bits_resp_in_0_s3_full_pred_1_targets_1
|
|
(_ittage_io_out_s3_full_pred_1_targets_1),
|
|
.io_in_bits_resp_in_0_s3_full_pred_1_jalr_target
|
|
(_ittage_io_out_s3_full_pred_1_jalr_target),
|
|
.io_in_bits_resp_in_0_s3_full_pred_1_fallThroughAddr
|
|
(_ittage_io_out_s3_full_pred_1_fallThroughAddr),
|
|
.io_in_bits_resp_in_0_s3_full_pred_1_fallThroughErr
|
|
(_ittage_io_out_s3_full_pred_1_fallThroughErr),
|
|
.io_in_bits_resp_in_0_s3_full_pred_1_is_br_sharing
|
|
(_ittage_io_out_s3_full_pred_1_is_br_sharing),
|
|
.io_in_bits_resp_in_0_s3_full_pred_1_hit
|
|
(_ittage_io_out_s3_full_pred_1_hit),
|
|
.io_in_bits_resp_in_0_s3_full_pred_2_br_taken_mask_0
|
|
(_ittage_io_out_s3_full_pred_2_br_taken_mask_0),
|
|
.io_in_bits_resp_in_0_s3_full_pred_2_br_taken_mask_1
|
|
(_ittage_io_out_s3_full_pred_2_br_taken_mask_1),
|
|
.io_in_bits_resp_in_0_s3_full_pred_2_slot_valids_0
|
|
(_ittage_io_out_s3_full_pred_2_slot_valids_0),
|
|
.io_in_bits_resp_in_0_s3_full_pred_2_slot_valids_1
|
|
(_ittage_io_out_s3_full_pred_2_slot_valids_1),
|
|
.io_in_bits_resp_in_0_s3_full_pred_2_targets_0
|
|
(_ittage_io_out_s3_full_pred_2_targets_0),
|
|
.io_in_bits_resp_in_0_s3_full_pred_2_targets_1
|
|
(_ittage_io_out_s3_full_pred_2_targets_1),
|
|
.io_in_bits_resp_in_0_s3_full_pred_2_jalr_target
|
|
(_ittage_io_out_s3_full_pred_2_jalr_target),
|
|
.io_in_bits_resp_in_0_s3_full_pred_2_fallThroughAddr
|
|
(_ittage_io_out_s3_full_pred_2_fallThroughAddr),
|
|
.io_in_bits_resp_in_0_s3_full_pred_2_fallThroughErr
|
|
(_ittage_io_out_s3_full_pred_2_fallThroughErr),
|
|
.io_in_bits_resp_in_0_s3_full_pred_2_is_jalr
|
|
(_ittage_io_out_s3_full_pred_2_is_jalr),
|
|
.io_in_bits_resp_in_0_s3_full_pred_2_is_call
|
|
(_ittage_io_out_s3_full_pred_2_is_call),
|
|
.io_in_bits_resp_in_0_s3_full_pred_2_is_ret
|
|
(_ittage_io_out_s3_full_pred_2_is_ret),
|
|
.io_in_bits_resp_in_0_s3_full_pred_2_is_br_sharing
|
|
(_ittage_io_out_s3_full_pred_2_is_br_sharing),
|
|
.io_in_bits_resp_in_0_s3_full_pred_2_hit
|
|
(_ittage_io_out_s3_full_pred_2_hit),
|
|
.io_in_bits_resp_in_0_s3_full_pred_3_br_taken_mask_0
|
|
(_ittage_io_out_s3_full_pred_3_br_taken_mask_0),
|
|
.io_in_bits_resp_in_0_s3_full_pred_3_br_taken_mask_1
|
|
(_ittage_io_out_s3_full_pred_3_br_taken_mask_1),
|
|
.io_in_bits_resp_in_0_s3_full_pred_3_slot_valids_0
|
|
(_ittage_io_out_s3_full_pred_3_slot_valids_0),
|
|
.io_in_bits_resp_in_0_s3_full_pred_3_slot_valids_1
|
|
(_ittage_io_out_s3_full_pred_3_slot_valids_1),
|
|
.io_in_bits_resp_in_0_s3_full_pred_3_targets_0
|
|
(_ittage_io_out_s3_full_pred_3_targets_0),
|
|
.io_in_bits_resp_in_0_s3_full_pred_3_targets_1
|
|
(_ittage_io_out_s3_full_pred_3_targets_1),
|
|
.io_in_bits_resp_in_0_s3_full_pred_3_jalr_target
|
|
(_ittage_io_out_s3_full_pred_3_jalr_target),
|
|
.io_in_bits_resp_in_0_s3_full_pred_3_offsets_0
|
|
(_ittage_io_out_s3_full_pred_3_offsets_0),
|
|
.io_in_bits_resp_in_0_s3_full_pred_3_offsets_1
|
|
(_ittage_io_out_s3_full_pred_3_offsets_1),
|
|
.io_in_bits_resp_in_0_s3_full_pred_3_fallThroughAddr
|
|
(_ittage_io_out_s3_full_pred_3_fallThroughAddr),
|
|
.io_in_bits_resp_in_0_s3_full_pred_3_fallThroughErr
|
|
(_ittage_io_out_s3_full_pred_3_fallThroughErr),
|
|
.io_in_bits_resp_in_0_s3_full_pred_3_is_br_sharing
|
|
(_ittage_io_out_s3_full_pred_3_is_br_sharing),
|
|
.io_in_bits_resp_in_0_s3_full_pred_3_hit
|
|
(_ittage_io_out_s3_full_pred_3_hit),
|
|
.io_in_bits_resp_in_0_last_stage_ftb_entry_valid
|
|
(_ittage_io_out_last_stage_ftb_entry_valid),
|
|
.io_in_bits_resp_in_0_last_stage_ftb_entry_brSlots_0_offset
|
|
(_ittage_io_out_last_stage_ftb_entry_brSlots_0_offset),
|
|
.io_in_bits_resp_in_0_last_stage_ftb_entry_brSlots_0_lower
|
|
(_ittage_io_out_last_stage_ftb_entry_brSlots_0_lower),
|
|
.io_in_bits_resp_in_0_last_stage_ftb_entry_brSlots_0_tarStat
|
|
(_ittage_io_out_last_stage_ftb_entry_brSlots_0_tarStat),
|
|
.io_in_bits_resp_in_0_last_stage_ftb_entry_brSlots_0_sharing
|
|
(_ittage_io_out_last_stage_ftb_entry_brSlots_0_sharing),
|
|
.io_in_bits_resp_in_0_last_stage_ftb_entry_brSlots_0_valid
|
|
(_ittage_io_out_last_stage_ftb_entry_brSlots_0_valid),
|
|
.io_in_bits_resp_in_0_last_stage_ftb_entry_tailSlot_offset
|
|
(_ittage_io_out_last_stage_ftb_entry_tailSlot_offset),
|
|
.io_in_bits_resp_in_0_last_stage_ftb_entry_tailSlot_lower
|
|
(_ittage_io_out_last_stage_ftb_entry_tailSlot_lower),
|
|
.io_in_bits_resp_in_0_last_stage_ftb_entry_tailSlot_tarStat
|
|
(_ittage_io_out_last_stage_ftb_entry_tailSlot_tarStat),
|
|
.io_in_bits_resp_in_0_last_stage_ftb_entry_tailSlot_sharing
|
|
(_ittage_io_out_last_stage_ftb_entry_tailSlot_sharing),
|
|
.io_in_bits_resp_in_0_last_stage_ftb_entry_tailSlot_valid
|
|
(_ittage_io_out_last_stage_ftb_entry_tailSlot_valid),
|
|
.io_in_bits_resp_in_0_last_stage_ftb_entry_pftAddr
|
|
(_ittage_io_out_last_stage_ftb_entry_pftAddr),
|
|
.io_in_bits_resp_in_0_last_stage_ftb_entry_carry
|
|
(_ittage_io_out_last_stage_ftb_entry_carry),
|
|
.io_in_bits_resp_in_0_last_stage_ftb_entry_isCall
|
|
(_ittage_io_out_last_stage_ftb_entry_isCall),
|
|
.io_in_bits_resp_in_0_last_stage_ftb_entry_isRet
|
|
(_ittage_io_out_last_stage_ftb_entry_isRet),
|
|
.io_in_bits_resp_in_0_last_stage_ftb_entry_isJalr
|
|
(_ittage_io_out_last_stage_ftb_entry_isJalr),
|
|
.io_in_bits_resp_in_0_last_stage_ftb_entry_last_may_be_rvi_call
|
|
(_ittage_io_out_last_stage_ftb_entry_last_may_be_rvi_call),
|
|
.io_in_bits_resp_in_0_last_stage_ftb_entry_always_taken_0
|
|
(_ittage_io_out_last_stage_ftb_entry_always_taken_0),
|
|
.io_in_bits_resp_in_0_last_stage_ftb_entry_always_taken_1
|
|
(_ittage_io_out_last_stage_ftb_entry_always_taken_1),
|
|
.io_out_s2_pc_0 (io_out_s2_pc_0),
|
|
.io_out_s2_pc_1 (io_out_s2_pc_1),
|
|
.io_out_s2_pc_2 (io_out_s2_pc_2),
|
|
.io_out_s2_pc_3 (io_out_s2_pc_3),
|
|
.io_out_s2_full_pred_0_br_taken_mask_0
|
|
(io_out_s2_full_pred_0_br_taken_mask_0),
|
|
.io_out_s2_full_pred_0_br_taken_mask_1
|
|
(io_out_s2_full_pred_0_br_taken_mask_1),
|
|
.io_out_s2_full_pred_0_slot_valids_0
|
|
(io_out_s2_full_pred_0_slot_valids_0),
|
|
.io_out_s2_full_pred_0_slot_valids_1
|
|
(io_out_s2_full_pred_0_slot_valids_1),
|
|
.io_out_s2_full_pred_0_targets_0
|
|
(io_out_s2_full_pred_0_targets_0),
|
|
.io_out_s2_full_pred_0_targets_1
|
|
(io_out_s2_full_pred_0_targets_1),
|
|
.io_out_s2_full_pred_0_offsets_0
|
|
(io_out_s2_full_pred_0_offsets_0),
|
|
.io_out_s2_full_pred_0_offsets_1
|
|
(io_out_s2_full_pred_0_offsets_1),
|
|
.io_out_s2_full_pred_0_fallThroughAddr
|
|
(io_out_s2_full_pred_0_fallThroughAddr),
|
|
.io_out_s2_full_pred_0_is_br_sharing
|
|
(io_out_s2_full_pred_0_is_br_sharing),
|
|
.io_out_s2_full_pred_0_hit
|
|
(io_out_s2_full_pred_0_hit),
|
|
.io_out_s2_full_pred_1_br_taken_mask_0
|
|
(io_out_s2_full_pred_1_br_taken_mask_0),
|
|
.io_out_s2_full_pred_1_br_taken_mask_1
|
|
(io_out_s2_full_pred_1_br_taken_mask_1),
|
|
.io_out_s2_full_pred_1_slot_valids_0
|
|
(io_out_s2_full_pred_1_slot_valids_0),
|
|
.io_out_s2_full_pred_1_slot_valids_1
|
|
(io_out_s2_full_pred_1_slot_valids_1),
|
|
.io_out_s2_full_pred_1_targets_0
|
|
(io_out_s2_full_pred_1_targets_0),
|
|
.io_out_s2_full_pred_1_targets_1
|
|
(io_out_s2_full_pred_1_targets_1),
|
|
.io_out_s2_full_pred_1_offsets_0
|
|
(io_out_s2_full_pred_1_offsets_0),
|
|
.io_out_s2_full_pred_1_offsets_1
|
|
(io_out_s2_full_pred_1_offsets_1),
|
|
.io_out_s2_full_pred_1_fallThroughAddr
|
|
(io_out_s2_full_pred_1_fallThroughAddr),
|
|
.io_out_s2_full_pred_1_is_br_sharing
|
|
(io_out_s2_full_pred_1_is_br_sharing),
|
|
.io_out_s2_full_pred_1_hit
|
|
(io_out_s2_full_pred_1_hit),
|
|
.io_out_s2_full_pred_2_br_taken_mask_0
|
|
(io_out_s2_full_pred_2_br_taken_mask_0),
|
|
.io_out_s2_full_pred_2_br_taken_mask_1
|
|
(io_out_s2_full_pred_2_br_taken_mask_1),
|
|
.io_out_s2_full_pred_2_slot_valids_0
|
|
(io_out_s2_full_pred_2_slot_valids_0),
|
|
.io_out_s2_full_pred_2_slot_valids_1
|
|
(io_out_s2_full_pred_2_slot_valids_1),
|
|
.io_out_s2_full_pred_2_targets_0
|
|
(io_out_s2_full_pred_2_targets_0),
|
|
.io_out_s2_full_pred_2_targets_1
|
|
(io_out_s2_full_pred_2_targets_1),
|
|
.io_out_s2_full_pred_2_offsets_0
|
|
(io_out_s2_full_pred_2_offsets_0),
|
|
.io_out_s2_full_pred_2_offsets_1
|
|
(io_out_s2_full_pred_2_offsets_1),
|
|
.io_out_s2_full_pred_2_fallThroughAddr
|
|
(io_out_s2_full_pred_2_fallThroughAddr),
|
|
.io_out_s2_full_pred_2_is_br_sharing
|
|
(io_out_s2_full_pred_2_is_br_sharing),
|
|
.io_out_s2_full_pred_2_hit
|
|
(io_out_s2_full_pred_2_hit),
|
|
.io_out_s2_full_pred_3_br_taken_mask_0
|
|
(io_out_s2_full_pred_3_br_taken_mask_0),
|
|
.io_out_s2_full_pred_3_br_taken_mask_1
|
|
(io_out_s2_full_pred_3_br_taken_mask_1),
|
|
.io_out_s2_full_pred_3_slot_valids_0
|
|
(io_out_s2_full_pred_3_slot_valids_0),
|
|
.io_out_s2_full_pred_3_slot_valids_1
|
|
(io_out_s2_full_pred_3_slot_valids_1),
|
|
.io_out_s2_full_pred_3_targets_0
|
|
(io_out_s2_full_pred_3_targets_0),
|
|
.io_out_s2_full_pred_3_targets_1
|
|
(io_out_s2_full_pred_3_targets_1),
|
|
.io_out_s2_full_pred_3_offsets_0
|
|
(io_out_s2_full_pred_3_offsets_0),
|
|
.io_out_s2_full_pred_3_offsets_1
|
|
(io_out_s2_full_pred_3_offsets_1),
|
|
.io_out_s2_full_pred_3_fallThroughAddr
|
|
(io_out_s2_full_pred_3_fallThroughAddr),
|
|
.io_out_s2_full_pred_3_fallThroughErr
|
|
(io_out_s2_full_pred_3_fallThroughErr),
|
|
.io_out_s2_full_pred_3_is_br_sharing
|
|
(io_out_s2_full_pred_3_is_br_sharing),
|
|
.io_out_s2_full_pred_3_hit
|
|
(io_out_s2_full_pred_3_hit),
|
|
.io_out_s3_pc_0 (io_out_s3_pc_0),
|
|
.io_out_s3_pc_1 (io_out_s3_pc_1),
|
|
.io_out_s3_pc_2 (io_out_s3_pc_2),
|
|
.io_out_s3_pc_3 (io_out_s3_pc_3),
|
|
.io_out_s3_full_pred_0_br_taken_mask_0
|
|
(io_out_s3_full_pred_0_br_taken_mask_0),
|
|
.io_out_s3_full_pred_0_br_taken_mask_1
|
|
(io_out_s3_full_pred_0_br_taken_mask_1),
|
|
.io_out_s3_full_pred_0_slot_valids_0
|
|
(io_out_s3_full_pred_0_slot_valids_0),
|
|
.io_out_s3_full_pred_0_slot_valids_1
|
|
(io_out_s3_full_pred_0_slot_valids_1),
|
|
.io_out_s3_full_pred_0_targets_0
|
|
(io_out_s3_full_pred_0_targets_0),
|
|
.io_out_s3_full_pred_0_targets_1
|
|
(io_out_s3_full_pred_0_targets_1),
|
|
.io_out_s3_full_pred_0_fallThroughAddr
|
|
(io_out_s3_full_pred_0_fallThroughAddr),
|
|
.io_out_s3_full_pred_0_fallThroughErr
|
|
(io_out_s3_full_pred_0_fallThroughErr),
|
|
.io_out_s3_full_pred_0_is_br_sharing
|
|
(io_out_s3_full_pred_0_is_br_sharing),
|
|
.io_out_s3_full_pred_0_hit
|
|
(io_out_s3_full_pred_0_hit),
|
|
.io_out_s3_full_pred_1_br_taken_mask_0
|
|
(io_out_s3_full_pred_1_br_taken_mask_0),
|
|
.io_out_s3_full_pred_1_br_taken_mask_1
|
|
(io_out_s3_full_pred_1_br_taken_mask_1),
|
|
.io_out_s3_full_pred_1_slot_valids_0
|
|
(io_out_s3_full_pred_1_slot_valids_0),
|
|
.io_out_s3_full_pred_1_slot_valids_1
|
|
(io_out_s3_full_pred_1_slot_valids_1),
|
|
.io_out_s3_full_pred_1_targets_0
|
|
(io_out_s3_full_pred_1_targets_0),
|
|
.io_out_s3_full_pred_1_targets_1
|
|
(io_out_s3_full_pred_1_targets_1),
|
|
.io_out_s3_full_pred_1_fallThroughAddr
|
|
(io_out_s3_full_pred_1_fallThroughAddr),
|
|
.io_out_s3_full_pred_1_fallThroughErr
|
|
(io_out_s3_full_pred_1_fallThroughErr),
|
|
.io_out_s3_full_pred_1_is_br_sharing
|
|
(io_out_s3_full_pred_1_is_br_sharing),
|
|
.io_out_s3_full_pred_1_hit
|
|
(io_out_s3_full_pred_1_hit),
|
|
.io_out_s3_full_pred_2_br_taken_mask_0
|
|
(io_out_s3_full_pred_2_br_taken_mask_0),
|
|
.io_out_s3_full_pred_2_br_taken_mask_1
|
|
(io_out_s3_full_pred_2_br_taken_mask_1),
|
|
.io_out_s3_full_pred_2_slot_valids_0
|
|
(io_out_s3_full_pred_2_slot_valids_0),
|
|
.io_out_s3_full_pred_2_slot_valids_1
|
|
(io_out_s3_full_pred_2_slot_valids_1),
|
|
.io_out_s3_full_pred_2_targets_0
|
|
(io_out_s3_full_pred_2_targets_0),
|
|
.io_out_s3_full_pred_2_targets_1
|
|
(io_out_s3_full_pred_2_targets_1),
|
|
.io_out_s3_full_pred_2_fallThroughAddr
|
|
(io_out_s3_full_pred_2_fallThroughAddr),
|
|
.io_out_s3_full_pred_2_fallThroughErr
|
|
(io_out_s3_full_pred_2_fallThroughErr),
|
|
.io_out_s3_full_pred_2_is_br_sharing
|
|
(io_out_s3_full_pred_2_is_br_sharing),
|
|
.io_out_s3_full_pred_2_hit
|
|
(io_out_s3_full_pred_2_hit),
|
|
.io_out_s3_full_pred_3_br_taken_mask_0
|
|
(io_out_s3_full_pred_3_br_taken_mask_0),
|
|
.io_out_s3_full_pred_3_br_taken_mask_1
|
|
(io_out_s3_full_pred_3_br_taken_mask_1),
|
|
.io_out_s3_full_pred_3_slot_valids_0
|
|
(io_out_s3_full_pred_3_slot_valids_0),
|
|
.io_out_s3_full_pred_3_slot_valids_1
|
|
(io_out_s3_full_pred_3_slot_valids_1),
|
|
.io_out_s3_full_pred_3_targets_0
|
|
(io_out_s3_full_pred_3_targets_0),
|
|
.io_out_s3_full_pred_3_targets_1
|
|
(io_out_s3_full_pred_3_targets_1),
|
|
.io_out_s3_full_pred_3_offsets_0
|
|
(io_out_s3_full_pred_3_offsets_0),
|
|
.io_out_s3_full_pred_3_offsets_1
|
|
(io_out_s3_full_pred_3_offsets_1),
|
|
.io_out_s3_full_pred_3_fallThroughAddr
|
|
(io_out_s3_full_pred_3_fallThroughAddr),
|
|
.io_out_s3_full_pred_3_fallThroughErr
|
|
(io_out_s3_full_pred_3_fallThroughErr),
|
|
.io_out_s3_full_pred_3_is_br_sharing
|
|
(io_out_s3_full_pred_3_is_br_sharing),
|
|
.io_out_s3_full_pred_3_hit
|
|
(io_out_s3_full_pred_3_hit),
|
|
.io_out_last_stage_meta
|
|
(_ras_io_out_last_stage_meta),
|
|
.io_out_last_stage_spec_info_ssp
|
|
(io_out_last_stage_spec_info_ssp),
|
|
.io_out_last_stage_spec_info_sctr
|
|
(io_out_last_stage_spec_info_sctr),
|
|
.io_out_last_stage_spec_info_TOSW_flag
|
|
(io_out_last_stage_spec_info_TOSW_flag),
|
|
.io_out_last_stage_spec_info_TOSW_value
|
|
(io_out_last_stage_spec_info_TOSW_value),
|
|
.io_out_last_stage_spec_info_TOSR_flag
|
|
(io_out_last_stage_spec_info_TOSR_flag),
|
|
.io_out_last_stage_spec_info_TOSR_value
|
|
(io_out_last_stage_spec_info_TOSR_value),
|
|
.io_out_last_stage_spec_info_NOS_flag
|
|
(io_out_last_stage_spec_info_NOS_flag),
|
|
.io_out_last_stage_spec_info_NOS_value
|
|
(io_out_last_stage_spec_info_NOS_value),
|
|
.io_out_last_stage_spec_info_topAddr
|
|
(io_out_last_stage_spec_info_topAddr),
|
|
.io_out_last_stage_ftb_entry_valid
|
|
(io_out_last_stage_ftb_entry_valid),
|
|
.io_out_last_stage_ftb_entry_brSlots_0_offset
|
|
(io_out_last_stage_ftb_entry_brSlots_0_offset),
|
|
.io_out_last_stage_ftb_entry_brSlots_0_lower
|
|
(io_out_last_stage_ftb_entry_brSlots_0_lower),
|
|
.io_out_last_stage_ftb_entry_brSlots_0_tarStat
|
|
(io_out_last_stage_ftb_entry_brSlots_0_tarStat),
|
|
.io_out_last_stage_ftb_entry_brSlots_0_sharing
|
|
(io_out_last_stage_ftb_entry_brSlots_0_sharing),
|
|
.io_out_last_stage_ftb_entry_brSlots_0_valid
|
|
(io_out_last_stage_ftb_entry_brSlots_0_valid),
|
|
.io_out_last_stage_ftb_entry_tailSlot_offset
|
|
(io_out_last_stage_ftb_entry_tailSlot_offset),
|
|
.io_out_last_stage_ftb_entry_tailSlot_lower
|
|
(io_out_last_stage_ftb_entry_tailSlot_lower),
|
|
.io_out_last_stage_ftb_entry_tailSlot_tarStat
|
|
(io_out_last_stage_ftb_entry_tailSlot_tarStat),
|
|
.io_out_last_stage_ftb_entry_tailSlot_sharing
|
|
(io_out_last_stage_ftb_entry_tailSlot_sharing),
|
|
.io_out_last_stage_ftb_entry_tailSlot_valid
|
|
(io_out_last_stage_ftb_entry_tailSlot_valid),
|
|
.io_out_last_stage_ftb_entry_pftAddr
|
|
(io_out_last_stage_ftb_entry_pftAddr),
|
|
.io_out_last_stage_ftb_entry_carry
|
|
(io_out_last_stage_ftb_entry_carry),
|
|
.io_out_last_stage_ftb_entry_isCall
|
|
(io_out_last_stage_ftb_entry_isCall),
|
|
.io_out_last_stage_ftb_entry_isRet
|
|
(io_out_last_stage_ftb_entry_isRet),
|
|
.io_out_last_stage_ftb_entry_isJalr
|
|
(io_out_last_stage_ftb_entry_isJalr),
|
|
.io_out_last_stage_ftb_entry_last_may_be_rvi_call
|
|
(io_out_last_stage_ftb_entry_last_may_be_rvi_call),
|
|
.io_out_last_stage_ftb_entry_always_taken_0
|
|
(io_out_last_stage_ftb_entry_always_taken_0),
|
|
.io_out_last_stage_ftb_entry_always_taken_1
|
|
(io_out_last_stage_ftb_entry_always_taken_1),
|
|
.io_ctrl_ras_enable
|
|
(_ras_io_ctrl_delay_io_out_ras_enable),
|
|
.io_s0_fire_0 (io_s0_fire_0),
|
|
.io_s0_fire_1 (io_s0_fire_1),
|
|
.io_s0_fire_2 (io_s0_fire_2),
|
|
.io_s0_fire_3 (io_s0_fire_3),
|
|
.io_s1_fire_0 (io_s1_fire_0),
|
|
.io_s1_fire_1 (io_s1_fire_1),
|
|
.io_s1_fire_2 (io_s1_fire_2),
|
|
.io_s1_fire_3 (io_s1_fire_3),
|
|
.io_s2_fire_0 (io_s2_fire_0),
|
|
.io_s2_fire_1 (io_s2_fire_1),
|
|
.io_s2_fire_2 (io_s2_fire_2),
|
|
.io_s2_fire_3 (io_s2_fire_3),
|
|
.io_s3_fire_2 (io_s3_fire_2),
|
|
.io_s3_redirect_2 (io_s3_redirect_2),
|
|
.io_update_valid (io_update_valid),
|
|
.io_update_bits_ftb_entry_tailSlot_offset
|
|
(io_update_bits_ftb_entry_tailSlot_offset),
|
|
.io_update_bits_ftb_entry_tailSlot_valid
|
|
(io_update_bits_ftb_entry_tailSlot_valid),
|
|
.io_update_bits_ftb_entry_isCall
|
|
(io_update_bits_ftb_entry_isCall),
|
|
.io_update_bits_ftb_entry_isRet
|
|
(io_update_bits_ftb_entry_isRet),
|
|
.io_update_bits_cfi_idx_valid
|
|
(io_update_bits_cfi_idx_valid),
|
|
.io_update_bits_cfi_idx_bits
|
|
(io_update_bits_cfi_idx_bits),
|
|
.io_update_bits_jmp_taken
|
|
(io_update_bits_jmp_taken),
|
|
.io_update_bits_meta (io_update_bits_meta),
|
|
.io_redirect_valid (io_redirect_valid),
|
|
.io_redirect_bits_level
|
|
(io_redirect_bits_level),
|
|
.io_redirect_bits_cfiUpdate_pc
|
|
(io_redirect_bits_cfiUpdate_pc),
|
|
.io_redirect_bits_cfiUpdate_pd_isRVC
|
|
(io_redirect_bits_cfiUpdate_pd_isRVC),
|
|
.io_redirect_bits_cfiUpdate_pd_isCall
|
|
(io_redirect_bits_cfiUpdate_pd_isCall),
|
|
.io_redirect_bits_cfiUpdate_pd_isRet
|
|
(io_redirect_bits_cfiUpdate_pd_isRet),
|
|
.io_redirect_bits_cfiUpdate_ssp
|
|
(io_redirect_bits_cfiUpdate_ssp),
|
|
.io_redirect_bits_cfiUpdate_sctr
|
|
(io_redirect_bits_cfiUpdate_sctr),
|
|
.io_redirect_bits_cfiUpdate_TOSW_flag
|
|
(io_redirect_bits_cfiUpdate_TOSW_flag),
|
|
.io_redirect_bits_cfiUpdate_TOSW_value
|
|
(io_redirect_bits_cfiUpdate_TOSW_value),
|
|
.io_redirect_bits_cfiUpdate_TOSR_flag
|
|
(io_redirect_bits_cfiUpdate_TOSR_flag),
|
|
.io_redirect_bits_cfiUpdate_TOSR_value
|
|
(io_redirect_bits_cfiUpdate_TOSR_value),
|
|
.io_redirect_bits_cfiUpdate_NOS_flag
|
|
(io_redirect_bits_cfiUpdate_NOS_flag),
|
|
.io_redirect_bits_cfiUpdate_NOS_value
|
|
(io_redirect_bits_cfiUpdate_NOS_value)
|
|
);
|
|
ITTage ittage (
|
|
.clock (clock),
|
|
.reset (reset),
|
|
.io_in_bits_s0_pc_3 (io_in_bits_s0_pc_3),
|
|
.io_in_bits_folded_hist_3_hist_14_folded_hist
|
|
(io_in_bits_folded_hist_3_hist_14_folded_hist),
|
|
.io_in_bits_folded_hist_3_hist_13_folded_hist
|
|
(io_in_bits_folded_hist_3_hist_13_folded_hist),
|
|
.io_in_bits_folded_hist_3_hist_12_folded_hist
|
|
(io_in_bits_folded_hist_3_hist_12_folded_hist),
|
|
.io_in_bits_folded_hist_3_hist_10_folded_hist
|
|
(io_in_bits_folded_hist_3_hist_10_folded_hist),
|
|
.io_in_bits_folded_hist_3_hist_6_folded_hist
|
|
(io_in_bits_folded_hist_3_hist_6_folded_hist),
|
|
.io_in_bits_folded_hist_3_hist_4_folded_hist
|
|
(io_in_bits_folded_hist_3_hist_4_folded_hist),
|
|
.io_in_bits_folded_hist_3_hist_3_folded_hist
|
|
(io_in_bits_folded_hist_3_hist_3_folded_hist),
|
|
.io_in_bits_folded_hist_3_hist_2_folded_hist
|
|
(io_in_bits_folded_hist_3_hist_2_folded_hist),
|
|
.io_in_bits_resp_in_0_s2_full_pred_0_br_taken_mask_0
|
|
(_ftb_io_out_s2_full_pred_0_br_taken_mask_0),
|
|
.io_in_bits_resp_in_0_s2_full_pred_0_br_taken_mask_1
|
|
(_ftb_io_out_s2_full_pred_0_br_taken_mask_1),
|
|
.io_in_bits_resp_in_0_s2_full_pred_0_slot_valids_0
|
|
(_ftb_io_out_s2_full_pred_0_slot_valids_0),
|
|
.io_in_bits_resp_in_0_s2_full_pred_0_slot_valids_1
|
|
(_ftb_io_out_s2_full_pred_0_slot_valids_1),
|
|
.io_in_bits_resp_in_0_s2_full_pred_0_targets_0
|
|
(_ftb_io_out_s2_full_pred_0_targets_0),
|
|
.io_in_bits_resp_in_0_s2_full_pred_0_targets_1
|
|
(_ftb_io_out_s2_full_pred_0_targets_1),
|
|
.io_in_bits_resp_in_0_s2_full_pred_0_jalr_target
|
|
(_ftb_io_out_s2_full_pred_0_jalr_target),
|
|
.io_in_bits_resp_in_0_s2_full_pred_0_offsets_0
|
|
(_ftb_io_out_s2_full_pred_0_offsets_0),
|
|
.io_in_bits_resp_in_0_s2_full_pred_0_offsets_1
|
|
(_ftb_io_out_s2_full_pred_0_offsets_1),
|
|
.io_in_bits_resp_in_0_s2_full_pred_0_fallThroughAddr
|
|
(_ftb_io_out_s2_full_pred_0_fallThroughAddr),
|
|
.io_in_bits_resp_in_0_s2_full_pred_0_is_br_sharing
|
|
(_ftb_io_out_s2_full_pred_0_is_br_sharing),
|
|
.io_in_bits_resp_in_0_s2_full_pred_0_hit
|
|
(_ftb_io_out_s2_full_pred_0_hit),
|
|
.io_in_bits_resp_in_0_s2_full_pred_1_br_taken_mask_0
|
|
(_ftb_io_out_s2_full_pred_1_br_taken_mask_0),
|
|
.io_in_bits_resp_in_0_s2_full_pred_1_br_taken_mask_1
|
|
(_ftb_io_out_s2_full_pred_1_br_taken_mask_1),
|
|
.io_in_bits_resp_in_0_s2_full_pred_1_slot_valids_0
|
|
(_ftb_io_out_s2_full_pred_1_slot_valids_0),
|
|
.io_in_bits_resp_in_0_s2_full_pred_1_slot_valids_1
|
|
(_ftb_io_out_s2_full_pred_1_slot_valids_1),
|
|
.io_in_bits_resp_in_0_s2_full_pred_1_targets_0
|
|
(_ftb_io_out_s2_full_pred_1_targets_0),
|
|
.io_in_bits_resp_in_0_s2_full_pred_1_targets_1
|
|
(_ftb_io_out_s2_full_pred_1_targets_1),
|
|
.io_in_bits_resp_in_0_s2_full_pred_1_jalr_target
|
|
(_ftb_io_out_s2_full_pred_1_jalr_target),
|
|
.io_in_bits_resp_in_0_s2_full_pred_1_offsets_0
|
|
(_ftb_io_out_s2_full_pred_1_offsets_0),
|
|
.io_in_bits_resp_in_0_s2_full_pred_1_offsets_1
|
|
(_ftb_io_out_s2_full_pred_1_offsets_1),
|
|
.io_in_bits_resp_in_0_s2_full_pred_1_fallThroughAddr
|
|
(_ftb_io_out_s2_full_pred_1_fallThroughAddr),
|
|
.io_in_bits_resp_in_0_s2_full_pred_1_is_br_sharing
|
|
(_ftb_io_out_s2_full_pred_1_is_br_sharing),
|
|
.io_in_bits_resp_in_0_s2_full_pred_1_hit
|
|
(_ftb_io_out_s2_full_pred_1_hit),
|
|
.io_in_bits_resp_in_0_s2_full_pred_2_br_taken_mask_0
|
|
(_ftb_io_out_s2_full_pred_2_br_taken_mask_0),
|
|
.io_in_bits_resp_in_0_s2_full_pred_2_br_taken_mask_1
|
|
(_ftb_io_out_s2_full_pred_2_br_taken_mask_1),
|
|
.io_in_bits_resp_in_0_s2_full_pred_2_slot_valids_0
|
|
(_ftb_io_out_s2_full_pred_2_slot_valids_0),
|
|
.io_in_bits_resp_in_0_s2_full_pred_2_slot_valids_1
|
|
(_ftb_io_out_s2_full_pred_2_slot_valids_1),
|
|
.io_in_bits_resp_in_0_s2_full_pred_2_targets_0
|
|
(_ftb_io_out_s2_full_pred_2_targets_0),
|
|
.io_in_bits_resp_in_0_s2_full_pred_2_targets_1
|
|
(_ftb_io_out_s2_full_pred_2_targets_1),
|
|
.io_in_bits_resp_in_0_s2_full_pred_2_jalr_target
|
|
(_ftb_io_out_s2_full_pred_2_jalr_target),
|
|
.io_in_bits_resp_in_0_s2_full_pred_2_offsets_0
|
|
(_ftb_io_out_s2_full_pred_2_offsets_0),
|
|
.io_in_bits_resp_in_0_s2_full_pred_2_offsets_1
|
|
(_ftb_io_out_s2_full_pred_2_offsets_1),
|
|
.io_in_bits_resp_in_0_s2_full_pred_2_fallThroughAddr
|
|
(_ftb_io_out_s2_full_pred_2_fallThroughAddr),
|
|
.io_in_bits_resp_in_0_s2_full_pred_2_is_jalr
|
|
(_ftb_io_out_s2_full_pred_2_is_jalr),
|
|
.io_in_bits_resp_in_0_s2_full_pred_2_is_call
|
|
(_ftb_io_out_s2_full_pred_2_is_call),
|
|
.io_in_bits_resp_in_0_s2_full_pred_2_is_ret
|
|
(_ftb_io_out_s2_full_pred_2_is_ret),
|
|
.io_in_bits_resp_in_0_s2_full_pred_2_last_may_be_rvi_call
|
|
(_ftb_io_out_s2_full_pred_2_last_may_be_rvi_call),
|
|
.io_in_bits_resp_in_0_s2_full_pred_2_is_br_sharing
|
|
(_ftb_io_out_s2_full_pred_2_is_br_sharing),
|
|
.io_in_bits_resp_in_0_s2_full_pred_2_hit
|
|
(_ftb_io_out_s2_full_pred_2_hit),
|
|
.io_in_bits_resp_in_0_s2_full_pred_3_br_taken_mask_0
|
|
(_ftb_io_out_s2_full_pred_3_br_taken_mask_0),
|
|
.io_in_bits_resp_in_0_s2_full_pred_3_br_taken_mask_1
|
|
(_ftb_io_out_s2_full_pred_3_br_taken_mask_1),
|
|
.io_in_bits_resp_in_0_s2_full_pred_3_slot_valids_0
|
|
(_ftb_io_out_s2_full_pred_3_slot_valids_0),
|
|
.io_in_bits_resp_in_0_s2_full_pred_3_slot_valids_1
|
|
(_ftb_io_out_s2_full_pred_3_slot_valids_1),
|
|
.io_in_bits_resp_in_0_s2_full_pred_3_targets_0
|
|
(_ftb_io_out_s2_full_pred_3_targets_0),
|
|
.io_in_bits_resp_in_0_s2_full_pred_3_targets_1
|
|
(_ftb_io_out_s2_full_pred_3_targets_1),
|
|
.io_in_bits_resp_in_0_s2_full_pred_3_jalr_target
|
|
(_ftb_io_out_s2_full_pred_3_jalr_target),
|
|
.io_in_bits_resp_in_0_s2_full_pred_3_offsets_0
|
|
(_ftb_io_out_s2_full_pred_3_offsets_0),
|
|
.io_in_bits_resp_in_0_s2_full_pred_3_offsets_1
|
|
(_ftb_io_out_s2_full_pred_3_offsets_1),
|
|
.io_in_bits_resp_in_0_s2_full_pred_3_fallThroughAddr
|
|
(_ftb_io_out_s2_full_pred_3_fallThroughAddr),
|
|
.io_in_bits_resp_in_0_s2_full_pred_3_fallThroughErr
|
|
(_ftb_io_out_s2_full_pred_3_fallThroughErr),
|
|
.io_in_bits_resp_in_0_s2_full_pred_3_is_br_sharing
|
|
(_ftb_io_out_s2_full_pred_3_is_br_sharing),
|
|
.io_in_bits_resp_in_0_s2_full_pred_3_hit
|
|
(_ftb_io_out_s2_full_pred_3_hit),
|
|
.io_in_bits_resp_in_0_s3_full_pred_0_br_taken_mask_0
|
|
(_ftb_io_out_s3_full_pred_0_br_taken_mask_0),
|
|
.io_in_bits_resp_in_0_s3_full_pred_0_br_taken_mask_1
|
|
(_ftb_io_out_s3_full_pred_0_br_taken_mask_1),
|
|
.io_in_bits_resp_in_0_s3_full_pred_0_slot_valids_0
|
|
(_ftb_io_out_s3_full_pred_0_slot_valids_0),
|
|
.io_in_bits_resp_in_0_s3_full_pred_0_slot_valids_1
|
|
(_ftb_io_out_s3_full_pred_0_slot_valids_1),
|
|
.io_in_bits_resp_in_0_s3_full_pred_0_targets_0
|
|
(_ftb_io_out_s3_full_pred_0_targets_0),
|
|
.io_in_bits_resp_in_0_s3_full_pred_0_targets_1
|
|
(_ftb_io_out_s3_full_pred_0_targets_1),
|
|
.io_in_bits_resp_in_0_s3_full_pred_0_jalr_target
|
|
(_ftb_io_out_s3_full_pred_0_jalr_target),
|
|
.io_in_bits_resp_in_0_s3_full_pred_0_fallThroughAddr
|
|
(_ftb_io_out_s3_full_pred_0_fallThroughAddr),
|
|
.io_in_bits_resp_in_0_s3_full_pred_0_fallThroughErr
|
|
(_ftb_io_out_s3_full_pred_0_fallThroughErr),
|
|
.io_in_bits_resp_in_0_s3_full_pred_0_is_br_sharing
|
|
(_ftb_io_out_s3_full_pred_0_is_br_sharing),
|
|
.io_in_bits_resp_in_0_s3_full_pred_0_hit
|
|
(_ftb_io_out_s3_full_pred_0_hit),
|
|
.io_in_bits_resp_in_0_s3_full_pred_1_br_taken_mask_0
|
|
(_ftb_io_out_s3_full_pred_1_br_taken_mask_0),
|
|
.io_in_bits_resp_in_0_s3_full_pred_1_br_taken_mask_1
|
|
(_ftb_io_out_s3_full_pred_1_br_taken_mask_1),
|
|
.io_in_bits_resp_in_0_s3_full_pred_1_slot_valids_0
|
|
(_ftb_io_out_s3_full_pred_1_slot_valids_0),
|
|
.io_in_bits_resp_in_0_s3_full_pred_1_slot_valids_1
|
|
(_ftb_io_out_s3_full_pred_1_slot_valids_1),
|
|
.io_in_bits_resp_in_0_s3_full_pred_1_targets_0
|
|
(_ftb_io_out_s3_full_pred_1_targets_0),
|
|
.io_in_bits_resp_in_0_s3_full_pred_1_targets_1
|
|
(_ftb_io_out_s3_full_pred_1_targets_1),
|
|
.io_in_bits_resp_in_0_s3_full_pred_1_jalr_target
|
|
(_ftb_io_out_s3_full_pred_1_jalr_target),
|
|
.io_in_bits_resp_in_0_s3_full_pred_1_fallThroughAddr
|
|
(_ftb_io_out_s3_full_pred_1_fallThroughAddr),
|
|
.io_in_bits_resp_in_0_s3_full_pred_1_fallThroughErr
|
|
(_ftb_io_out_s3_full_pred_1_fallThroughErr),
|
|
.io_in_bits_resp_in_0_s3_full_pred_1_is_br_sharing
|
|
(_ftb_io_out_s3_full_pred_1_is_br_sharing),
|
|
.io_in_bits_resp_in_0_s3_full_pred_1_hit
|
|
(_ftb_io_out_s3_full_pred_1_hit),
|
|
.io_in_bits_resp_in_0_s3_full_pred_2_br_taken_mask_0
|
|
(_ftb_io_out_s3_full_pred_2_br_taken_mask_0),
|
|
.io_in_bits_resp_in_0_s3_full_pred_2_br_taken_mask_1
|
|
(_ftb_io_out_s3_full_pred_2_br_taken_mask_1),
|
|
.io_in_bits_resp_in_0_s3_full_pred_2_slot_valids_0
|
|
(_ftb_io_out_s3_full_pred_2_slot_valids_0),
|
|
.io_in_bits_resp_in_0_s3_full_pred_2_slot_valids_1
|
|
(_ftb_io_out_s3_full_pred_2_slot_valids_1),
|
|
.io_in_bits_resp_in_0_s3_full_pred_2_targets_0
|
|
(_ftb_io_out_s3_full_pred_2_targets_0),
|
|
.io_in_bits_resp_in_0_s3_full_pred_2_targets_1
|
|
(_ftb_io_out_s3_full_pred_2_targets_1),
|
|
.io_in_bits_resp_in_0_s3_full_pred_2_jalr_target
|
|
(_ftb_io_out_s3_full_pred_2_jalr_target),
|
|
.io_in_bits_resp_in_0_s3_full_pred_2_fallThroughAddr
|
|
(_ftb_io_out_s3_full_pred_2_fallThroughAddr),
|
|
.io_in_bits_resp_in_0_s3_full_pred_2_fallThroughErr
|
|
(_ftb_io_out_s3_full_pred_2_fallThroughErr),
|
|
.io_in_bits_resp_in_0_s3_full_pred_2_is_jalr
|
|
(_ftb_io_out_s3_full_pred_2_is_jalr),
|
|
.io_in_bits_resp_in_0_s3_full_pred_2_is_call
|
|
(_ftb_io_out_s3_full_pred_2_is_call),
|
|
.io_in_bits_resp_in_0_s3_full_pred_2_is_ret
|
|
(_ftb_io_out_s3_full_pred_2_is_ret),
|
|
.io_in_bits_resp_in_0_s3_full_pred_2_is_br_sharing
|
|
(_ftb_io_out_s3_full_pred_2_is_br_sharing),
|
|
.io_in_bits_resp_in_0_s3_full_pred_2_hit
|
|
(_ftb_io_out_s3_full_pred_2_hit),
|
|
.io_in_bits_resp_in_0_s3_full_pred_3_br_taken_mask_0
|
|
(_ftb_io_out_s3_full_pred_3_br_taken_mask_0),
|
|
.io_in_bits_resp_in_0_s3_full_pred_3_br_taken_mask_1
|
|
(_ftb_io_out_s3_full_pred_3_br_taken_mask_1),
|
|
.io_in_bits_resp_in_0_s3_full_pred_3_slot_valids_0
|
|
(_ftb_io_out_s3_full_pred_3_slot_valids_0),
|
|
.io_in_bits_resp_in_0_s3_full_pred_3_slot_valids_1
|
|
(_ftb_io_out_s3_full_pred_3_slot_valids_1),
|
|
.io_in_bits_resp_in_0_s3_full_pred_3_targets_0
|
|
(_ftb_io_out_s3_full_pred_3_targets_0),
|
|
.io_in_bits_resp_in_0_s3_full_pred_3_targets_1
|
|
(_ftb_io_out_s3_full_pred_3_targets_1),
|
|
.io_in_bits_resp_in_0_s3_full_pred_3_jalr_target
|
|
(_ftb_io_out_s3_full_pred_3_jalr_target),
|
|
.io_in_bits_resp_in_0_s3_full_pred_3_offsets_0
|
|
(_ftb_io_out_s3_full_pred_3_offsets_0),
|
|
.io_in_bits_resp_in_0_s3_full_pred_3_offsets_1
|
|
(_ftb_io_out_s3_full_pred_3_offsets_1),
|
|
.io_in_bits_resp_in_0_s3_full_pred_3_fallThroughAddr
|
|
(_ftb_io_out_s3_full_pred_3_fallThroughAddr),
|
|
.io_in_bits_resp_in_0_s3_full_pred_3_fallThroughErr
|
|
(_ftb_io_out_s3_full_pred_3_fallThroughErr),
|
|
.io_in_bits_resp_in_0_s3_full_pred_3_is_br_sharing
|
|
(_ftb_io_out_s3_full_pred_3_is_br_sharing),
|
|
.io_in_bits_resp_in_0_s3_full_pred_3_hit
|
|
(_ftb_io_out_s3_full_pred_3_hit),
|
|
.io_in_bits_resp_in_0_last_stage_ftb_entry_valid
|
|
(_ftb_io_out_last_stage_ftb_entry_valid),
|
|
.io_in_bits_resp_in_0_last_stage_ftb_entry_brSlots_0_offset
|
|
(_ftb_io_out_last_stage_ftb_entry_brSlots_0_offset),
|
|
.io_in_bits_resp_in_0_last_stage_ftb_entry_brSlots_0_lower
|
|
(_ftb_io_out_last_stage_ftb_entry_brSlots_0_lower),
|
|
.io_in_bits_resp_in_0_last_stage_ftb_entry_brSlots_0_tarStat
|
|
(_ftb_io_out_last_stage_ftb_entry_brSlots_0_tarStat),
|
|
.io_in_bits_resp_in_0_last_stage_ftb_entry_brSlots_0_sharing
|
|
(_ftb_io_out_last_stage_ftb_entry_brSlots_0_sharing),
|
|
.io_in_bits_resp_in_0_last_stage_ftb_entry_brSlots_0_valid
|
|
(_ftb_io_out_last_stage_ftb_entry_brSlots_0_valid),
|
|
.io_in_bits_resp_in_0_last_stage_ftb_entry_tailSlot_offset
|
|
(_ftb_io_out_last_stage_ftb_entry_tailSlot_offset),
|
|
.io_in_bits_resp_in_0_last_stage_ftb_entry_tailSlot_lower
|
|
(_ftb_io_out_last_stage_ftb_entry_tailSlot_lower),
|
|
.io_in_bits_resp_in_0_last_stage_ftb_entry_tailSlot_tarStat
|
|
(_ftb_io_out_last_stage_ftb_entry_tailSlot_tarStat),
|
|
.io_in_bits_resp_in_0_last_stage_ftb_entry_tailSlot_sharing
|
|
(_ftb_io_out_last_stage_ftb_entry_tailSlot_sharing),
|
|
.io_in_bits_resp_in_0_last_stage_ftb_entry_tailSlot_valid
|
|
(_ftb_io_out_last_stage_ftb_entry_tailSlot_valid),
|
|
.io_in_bits_resp_in_0_last_stage_ftb_entry_pftAddr
|
|
(_ftb_io_out_last_stage_ftb_entry_pftAddr),
|
|
.io_in_bits_resp_in_0_last_stage_ftb_entry_carry
|
|
(_ftb_io_out_last_stage_ftb_entry_carry),
|
|
.io_in_bits_resp_in_0_last_stage_ftb_entry_isCall
|
|
(_ftb_io_out_last_stage_ftb_entry_isCall),
|
|
.io_in_bits_resp_in_0_last_stage_ftb_entry_isRet
|
|
(_ftb_io_out_last_stage_ftb_entry_isRet),
|
|
.io_in_bits_resp_in_0_last_stage_ftb_entry_isJalr
|
|
(_ftb_io_out_last_stage_ftb_entry_isJalr),
|
|
.io_in_bits_resp_in_0_last_stage_ftb_entry_last_may_be_rvi_call
|
|
(_ftb_io_out_last_stage_ftb_entry_last_may_be_rvi_call),
|
|
.io_in_bits_resp_in_0_last_stage_ftb_entry_always_taken_0
|
|
(_ftb_io_out_last_stage_ftb_entry_always_taken_0),
|
|
.io_in_bits_resp_in_0_last_stage_ftb_entry_always_taken_1
|
|
(_ftb_io_out_last_stage_ftb_entry_always_taken_1),
|
|
.io_out_s2_full_pred_0_br_taken_mask_0
|
|
(_ittage_io_out_s2_full_pred_0_br_taken_mask_0),
|
|
.io_out_s2_full_pred_0_br_taken_mask_1
|
|
(_ittage_io_out_s2_full_pred_0_br_taken_mask_1),
|
|
.io_out_s2_full_pred_0_slot_valids_0
|
|
(_ittage_io_out_s2_full_pred_0_slot_valids_0),
|
|
.io_out_s2_full_pred_0_slot_valids_1
|
|
(_ittage_io_out_s2_full_pred_0_slot_valids_1),
|
|
.io_out_s2_full_pred_0_targets_0
|
|
(_ittage_io_out_s2_full_pred_0_targets_0),
|
|
.io_out_s2_full_pred_0_targets_1
|
|
(_ittage_io_out_s2_full_pred_0_targets_1),
|
|
.io_out_s2_full_pred_0_jalr_target
|
|
(_ittage_io_out_s2_full_pred_0_jalr_target),
|
|
.io_out_s2_full_pred_0_offsets_0
|
|
(_ittage_io_out_s2_full_pred_0_offsets_0),
|
|
.io_out_s2_full_pred_0_offsets_1
|
|
(_ittage_io_out_s2_full_pred_0_offsets_1),
|
|
.io_out_s2_full_pred_0_fallThroughAddr
|
|
(_ittage_io_out_s2_full_pred_0_fallThroughAddr),
|
|
.io_out_s2_full_pred_0_is_br_sharing
|
|
(_ittage_io_out_s2_full_pred_0_is_br_sharing),
|
|
.io_out_s2_full_pred_0_hit
|
|
(_ittage_io_out_s2_full_pred_0_hit),
|
|
.io_out_s2_full_pred_1_br_taken_mask_0
|
|
(_ittage_io_out_s2_full_pred_1_br_taken_mask_0),
|
|
.io_out_s2_full_pred_1_br_taken_mask_1
|
|
(_ittage_io_out_s2_full_pred_1_br_taken_mask_1),
|
|
.io_out_s2_full_pred_1_slot_valids_0
|
|
(_ittage_io_out_s2_full_pred_1_slot_valids_0),
|
|
.io_out_s2_full_pred_1_slot_valids_1
|
|
(_ittage_io_out_s2_full_pred_1_slot_valids_1),
|
|
.io_out_s2_full_pred_1_targets_0
|
|
(_ittage_io_out_s2_full_pred_1_targets_0),
|
|
.io_out_s2_full_pred_1_targets_1
|
|
(_ittage_io_out_s2_full_pred_1_targets_1),
|
|
.io_out_s2_full_pred_1_jalr_target
|
|
(_ittage_io_out_s2_full_pred_1_jalr_target),
|
|
.io_out_s2_full_pred_1_offsets_0
|
|
(_ittage_io_out_s2_full_pred_1_offsets_0),
|
|
.io_out_s2_full_pred_1_offsets_1
|
|
(_ittage_io_out_s2_full_pred_1_offsets_1),
|
|
.io_out_s2_full_pred_1_fallThroughAddr
|
|
(_ittage_io_out_s2_full_pred_1_fallThroughAddr),
|
|
.io_out_s2_full_pred_1_is_br_sharing
|
|
(_ittage_io_out_s2_full_pred_1_is_br_sharing),
|
|
.io_out_s2_full_pred_1_hit
|
|
(_ittage_io_out_s2_full_pred_1_hit),
|
|
.io_out_s2_full_pred_2_br_taken_mask_0
|
|
(_ittage_io_out_s2_full_pred_2_br_taken_mask_0),
|
|
.io_out_s2_full_pred_2_br_taken_mask_1
|
|
(_ittage_io_out_s2_full_pred_2_br_taken_mask_1),
|
|
.io_out_s2_full_pred_2_slot_valids_0
|
|
(_ittage_io_out_s2_full_pred_2_slot_valids_0),
|
|
.io_out_s2_full_pred_2_slot_valids_1
|
|
(_ittage_io_out_s2_full_pred_2_slot_valids_1),
|
|
.io_out_s2_full_pred_2_targets_0
|
|
(_ittage_io_out_s2_full_pred_2_targets_0),
|
|
.io_out_s2_full_pred_2_targets_1
|
|
(_ittage_io_out_s2_full_pred_2_targets_1),
|
|
.io_out_s2_full_pred_2_jalr_target
|
|
(_ittage_io_out_s2_full_pred_2_jalr_target),
|
|
.io_out_s2_full_pred_2_offsets_0
|
|
(_ittage_io_out_s2_full_pred_2_offsets_0),
|
|
.io_out_s2_full_pred_2_offsets_1
|
|
(_ittage_io_out_s2_full_pred_2_offsets_1),
|
|
.io_out_s2_full_pred_2_fallThroughAddr
|
|
(_ittage_io_out_s2_full_pred_2_fallThroughAddr),
|
|
.io_out_s2_full_pred_2_is_jalr
|
|
(_ittage_io_out_s2_full_pred_2_is_jalr),
|
|
.io_out_s2_full_pred_2_is_call
|
|
(_ittage_io_out_s2_full_pred_2_is_call),
|
|
.io_out_s2_full_pred_2_is_ret
|
|
(_ittage_io_out_s2_full_pred_2_is_ret),
|
|
.io_out_s2_full_pred_2_last_may_be_rvi_call
|
|
(_ittage_io_out_s2_full_pred_2_last_may_be_rvi_call),
|
|
.io_out_s2_full_pred_2_is_br_sharing
|
|
(_ittage_io_out_s2_full_pred_2_is_br_sharing),
|
|
.io_out_s2_full_pred_2_hit
|
|
(_ittage_io_out_s2_full_pred_2_hit),
|
|
.io_out_s2_full_pred_3_br_taken_mask_0
|
|
(_ittage_io_out_s2_full_pred_3_br_taken_mask_0),
|
|
.io_out_s2_full_pred_3_br_taken_mask_1
|
|
(_ittage_io_out_s2_full_pred_3_br_taken_mask_1),
|
|
.io_out_s2_full_pred_3_slot_valids_0
|
|
(_ittage_io_out_s2_full_pred_3_slot_valids_0),
|
|
.io_out_s2_full_pred_3_slot_valids_1
|
|
(_ittage_io_out_s2_full_pred_3_slot_valids_1),
|
|
.io_out_s2_full_pred_3_targets_0
|
|
(_ittage_io_out_s2_full_pred_3_targets_0),
|
|
.io_out_s2_full_pred_3_targets_1
|
|
(_ittage_io_out_s2_full_pred_3_targets_1),
|
|
.io_out_s2_full_pred_3_jalr_target
|
|
(_ittage_io_out_s2_full_pred_3_jalr_target),
|
|
.io_out_s2_full_pred_3_offsets_0
|
|
(_ittage_io_out_s2_full_pred_3_offsets_0),
|
|
.io_out_s2_full_pred_3_offsets_1
|
|
(_ittage_io_out_s2_full_pred_3_offsets_1),
|
|
.io_out_s2_full_pred_3_fallThroughAddr
|
|
(_ittage_io_out_s2_full_pred_3_fallThroughAddr),
|
|
.io_out_s2_full_pred_3_fallThroughErr
|
|
(_ittage_io_out_s2_full_pred_3_fallThroughErr),
|
|
.io_out_s2_full_pred_3_is_br_sharing
|
|
(_ittage_io_out_s2_full_pred_3_is_br_sharing),
|
|
.io_out_s2_full_pred_3_hit
|
|
(_ittage_io_out_s2_full_pred_3_hit),
|
|
.io_out_s3_full_pred_0_br_taken_mask_0
|
|
(_ittage_io_out_s3_full_pred_0_br_taken_mask_0),
|
|
.io_out_s3_full_pred_0_br_taken_mask_1
|
|
(_ittage_io_out_s3_full_pred_0_br_taken_mask_1),
|
|
.io_out_s3_full_pred_0_slot_valids_0
|
|
(_ittage_io_out_s3_full_pred_0_slot_valids_0),
|
|
.io_out_s3_full_pred_0_slot_valids_1
|
|
(_ittage_io_out_s3_full_pred_0_slot_valids_1),
|
|
.io_out_s3_full_pred_0_targets_0
|
|
(_ittage_io_out_s3_full_pred_0_targets_0),
|
|
.io_out_s3_full_pred_0_targets_1
|
|
(_ittage_io_out_s3_full_pred_0_targets_1),
|
|
.io_out_s3_full_pred_0_jalr_target
|
|
(_ittage_io_out_s3_full_pred_0_jalr_target),
|
|
.io_out_s3_full_pred_0_fallThroughAddr
|
|
(_ittage_io_out_s3_full_pred_0_fallThroughAddr),
|
|
.io_out_s3_full_pred_0_fallThroughErr
|
|
(_ittage_io_out_s3_full_pred_0_fallThroughErr),
|
|
.io_out_s3_full_pred_0_is_br_sharing
|
|
(_ittage_io_out_s3_full_pred_0_is_br_sharing),
|
|
.io_out_s3_full_pred_0_hit
|
|
(_ittage_io_out_s3_full_pred_0_hit),
|
|
.io_out_s3_full_pred_1_br_taken_mask_0
|
|
(_ittage_io_out_s3_full_pred_1_br_taken_mask_0),
|
|
.io_out_s3_full_pred_1_br_taken_mask_1
|
|
(_ittage_io_out_s3_full_pred_1_br_taken_mask_1),
|
|
.io_out_s3_full_pred_1_slot_valids_0
|
|
(_ittage_io_out_s3_full_pred_1_slot_valids_0),
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|
.io_out_s3_full_pred_1_slot_valids_1
|
|
(_ittage_io_out_s3_full_pred_1_slot_valids_1),
|
|
.io_out_s3_full_pred_1_targets_0
|
|
(_ittage_io_out_s3_full_pred_1_targets_0),
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|
.io_out_s3_full_pred_1_targets_1
|
|
(_ittage_io_out_s3_full_pred_1_targets_1),
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|
.io_out_s3_full_pred_1_jalr_target
|
|
(_ittage_io_out_s3_full_pred_1_jalr_target),
|
|
.io_out_s3_full_pred_1_fallThroughAddr
|
|
(_ittage_io_out_s3_full_pred_1_fallThroughAddr),
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|
.io_out_s3_full_pred_1_fallThroughErr
|
|
(_ittage_io_out_s3_full_pred_1_fallThroughErr),
|
|
.io_out_s3_full_pred_1_is_br_sharing
|
|
(_ittage_io_out_s3_full_pred_1_is_br_sharing),
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|
.io_out_s3_full_pred_1_hit
|
|
(_ittage_io_out_s3_full_pred_1_hit),
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|
.io_out_s3_full_pred_2_br_taken_mask_0
|
|
(_ittage_io_out_s3_full_pred_2_br_taken_mask_0),
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|
.io_out_s3_full_pred_2_br_taken_mask_1
|
|
(_ittage_io_out_s3_full_pred_2_br_taken_mask_1),
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|
.io_out_s3_full_pred_2_slot_valids_0
|
|
(_ittage_io_out_s3_full_pred_2_slot_valids_0),
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|
.io_out_s3_full_pred_2_slot_valids_1
|
|
(_ittage_io_out_s3_full_pred_2_slot_valids_1),
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|
.io_out_s3_full_pred_2_targets_0
|
|
(_ittage_io_out_s3_full_pred_2_targets_0),
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|
.io_out_s3_full_pred_2_targets_1
|
|
(_ittage_io_out_s3_full_pred_2_targets_1),
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|
.io_out_s3_full_pred_2_jalr_target
|
|
(_ittage_io_out_s3_full_pred_2_jalr_target),
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|
.io_out_s3_full_pred_2_fallThroughAddr
|
|
(_ittage_io_out_s3_full_pred_2_fallThroughAddr),
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|
.io_out_s3_full_pred_2_fallThroughErr
|
|
(_ittage_io_out_s3_full_pred_2_fallThroughErr),
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|
.io_out_s3_full_pred_2_is_jalr
|
|
(_ittage_io_out_s3_full_pred_2_is_jalr),
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|
.io_out_s3_full_pred_2_is_call
|
|
(_ittage_io_out_s3_full_pred_2_is_call),
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|
.io_out_s3_full_pred_2_is_ret
|
|
(_ittage_io_out_s3_full_pred_2_is_ret),
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|
.io_out_s3_full_pred_2_is_br_sharing
|
|
(_ittage_io_out_s3_full_pred_2_is_br_sharing),
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|
.io_out_s3_full_pred_2_hit
|
|
(_ittage_io_out_s3_full_pred_2_hit),
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|
.io_out_s3_full_pred_3_br_taken_mask_0
|
|
(_ittage_io_out_s3_full_pred_3_br_taken_mask_0),
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|
.io_out_s3_full_pred_3_br_taken_mask_1
|
|
(_ittage_io_out_s3_full_pred_3_br_taken_mask_1),
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|
.io_out_s3_full_pred_3_slot_valids_0
|
|
(_ittage_io_out_s3_full_pred_3_slot_valids_0),
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|
.io_out_s3_full_pred_3_slot_valids_1
|
|
(_ittage_io_out_s3_full_pred_3_slot_valids_1),
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|
.io_out_s3_full_pred_3_targets_0
|
|
(_ittage_io_out_s3_full_pred_3_targets_0),
|
|
.io_out_s3_full_pred_3_targets_1
|
|
(_ittage_io_out_s3_full_pred_3_targets_1),
|
|
.io_out_s3_full_pred_3_jalr_target
|
|
(_ittage_io_out_s3_full_pred_3_jalr_target),
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|
.io_out_s3_full_pred_3_offsets_0
|
|
(_ittage_io_out_s3_full_pred_3_offsets_0),
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|
.io_out_s3_full_pred_3_offsets_1
|
|
(_ittage_io_out_s3_full_pred_3_offsets_1),
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|
.io_out_s3_full_pred_3_fallThroughAddr
|
|
(_ittage_io_out_s3_full_pred_3_fallThroughAddr),
|
|
.io_out_s3_full_pred_3_fallThroughErr
|
|
(_ittage_io_out_s3_full_pred_3_fallThroughErr),
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|
.io_out_s3_full_pred_3_is_br_sharing
|
|
(_ittage_io_out_s3_full_pred_3_is_br_sharing),
|
|
.io_out_s3_full_pred_3_hit
|
|
(_ittage_io_out_s3_full_pred_3_hit),
|
|
.io_out_last_stage_meta
|
|
(_ittage_io_out_last_stage_meta),
|
|
.io_out_last_stage_ftb_entry_valid
|
|
(_ittage_io_out_last_stage_ftb_entry_valid),
|
|
.io_out_last_stage_ftb_entry_brSlots_0_offset
|
|
(_ittage_io_out_last_stage_ftb_entry_brSlots_0_offset),
|
|
.io_out_last_stage_ftb_entry_brSlots_0_lower
|
|
(_ittage_io_out_last_stage_ftb_entry_brSlots_0_lower),
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|
.io_out_last_stage_ftb_entry_brSlots_0_tarStat
|
|
(_ittage_io_out_last_stage_ftb_entry_brSlots_0_tarStat),
|
|
.io_out_last_stage_ftb_entry_brSlots_0_sharing
|
|
(_ittage_io_out_last_stage_ftb_entry_brSlots_0_sharing),
|
|
.io_out_last_stage_ftb_entry_brSlots_0_valid
|
|
(_ittage_io_out_last_stage_ftb_entry_brSlots_0_valid),
|
|
.io_out_last_stage_ftb_entry_tailSlot_offset
|
|
(_ittage_io_out_last_stage_ftb_entry_tailSlot_offset),
|
|
.io_out_last_stage_ftb_entry_tailSlot_lower
|
|
(_ittage_io_out_last_stage_ftb_entry_tailSlot_lower),
|
|
.io_out_last_stage_ftb_entry_tailSlot_tarStat
|
|
(_ittage_io_out_last_stage_ftb_entry_tailSlot_tarStat),
|
|
.io_out_last_stage_ftb_entry_tailSlot_sharing
|
|
(_ittage_io_out_last_stage_ftb_entry_tailSlot_sharing),
|
|
.io_out_last_stage_ftb_entry_tailSlot_valid
|
|
(_ittage_io_out_last_stage_ftb_entry_tailSlot_valid),
|
|
.io_out_last_stage_ftb_entry_pftAddr
|
|
(_ittage_io_out_last_stage_ftb_entry_pftAddr),
|
|
.io_out_last_stage_ftb_entry_carry
|
|
(_ittage_io_out_last_stage_ftb_entry_carry),
|
|
.io_out_last_stage_ftb_entry_isCall
|
|
(_ittage_io_out_last_stage_ftb_entry_isCall),
|
|
.io_out_last_stage_ftb_entry_isRet
|
|
(_ittage_io_out_last_stage_ftb_entry_isRet),
|
|
.io_out_last_stage_ftb_entry_isJalr
|
|
(_ittage_io_out_last_stage_ftb_entry_isJalr),
|
|
.io_out_last_stage_ftb_entry_last_may_be_rvi_call
|
|
(_ittage_io_out_last_stage_ftb_entry_last_may_be_rvi_call),
|
|
.io_out_last_stage_ftb_entry_always_taken_0
|
|
(_ittage_io_out_last_stage_ftb_entry_always_taken_0),
|
|
.io_out_last_stage_ftb_entry_always_taken_1
|
|
(_ittage_io_out_last_stage_ftb_entry_always_taken_1),
|
|
.io_s0_fire_3 (io_s0_fire_3),
|
|
.io_s1_fire_3 (io_s1_fire_3),
|
|
.io_s2_fire_0 (io_s2_fire_0),
|
|
.io_s2_fire_1 (io_s2_fire_1),
|
|
.io_s2_fire_2 (io_s2_fire_2),
|
|
.io_s2_fire_3 (io_s2_fire_3),
|
|
.io_update_valid (io_update_valid),
|
|
.io_update_bits_pc (io_update_bits_pc),
|
|
.io_update_bits_spec_info_folded_hist_hist_14_folded_hist
|
|
(io_update_bits_spec_info_folded_hist_hist_14_folded_hist),
|
|
.io_update_bits_spec_info_folded_hist_hist_13_folded_hist
|
|
(io_update_bits_spec_info_folded_hist_hist_13_folded_hist),
|
|
.io_update_bits_spec_info_folded_hist_hist_12_folded_hist
|
|
(io_update_bits_spec_info_folded_hist_hist_12_folded_hist),
|
|
.io_update_bits_spec_info_folded_hist_hist_10_folded_hist
|
|
(io_update_bits_spec_info_folded_hist_hist_10_folded_hist),
|
|
.io_update_bits_spec_info_folded_hist_hist_6_folded_hist
|
|
(io_update_bits_spec_info_folded_hist_hist_6_folded_hist),
|
|
.io_update_bits_spec_info_folded_hist_hist_4_folded_hist
|
|
(io_update_bits_spec_info_folded_hist_hist_4_folded_hist),
|
|
.io_update_bits_spec_info_folded_hist_hist_3_folded_hist
|
|
(io_update_bits_spec_info_folded_hist_hist_3_folded_hist),
|
|
.io_update_bits_spec_info_folded_hist_hist_2_folded_hist
|
|
(io_update_bits_spec_info_folded_hist_hist_2_folded_hist),
|
|
.io_update_bits_ftb_entry_tailSlot_offset
|
|
(io_update_bits_ftb_entry_tailSlot_offset),
|
|
.io_update_bits_ftb_entry_tailSlot_sharing
|
|
(io_update_bits_ftb_entry_tailSlot_sharing),
|
|
.io_update_bits_ftb_entry_tailSlot_valid
|
|
(io_update_bits_ftb_entry_tailSlot_valid),
|
|
.io_update_bits_ftb_entry_isRet
|
|
(io_update_bits_ftb_entry_isRet),
|
|
.io_update_bits_ftb_entry_isJalr
|
|
(io_update_bits_ftb_entry_isJalr),
|
|
.io_update_bits_cfi_idx_valid
|
|
(io_update_bits_cfi_idx_valid),
|
|
.io_update_bits_cfi_idx_bits
|
|
(io_update_bits_cfi_idx_bits),
|
|
.io_update_bits_jmp_taken
|
|
(io_update_bits_jmp_taken),
|
|
.io_update_bits_mispred_mask_2
|
|
(io_update_bits_mispred_mask_2),
|
|
.io_update_bits_meta
|
|
({25'h0, io_update_bits_meta[222:25]}),
|
|
.io_update_bits_full_target
|
|
(io_update_bits_full_target)
|
|
);
|
|
DelayN_1 ubtb_io_ctrl_delay (
|
|
.clock (clock),
|
|
.io_in_ubtb_enable (io_ctrl_ubtb_enable),
|
|
.io_in_btb_enable (io_ctrl_btb_enable),
|
|
.io_in_tage_enable (io_ctrl_tage_enable),
|
|
.io_in_sc_enable (io_ctrl_sc_enable),
|
|
.io_in_ras_enable (io_ctrl_ras_enable),
|
|
.io_out_ubtb_enable (_ubtb_io_ctrl_delay_io_out_ubtb_enable),
|
|
.io_out_btb_enable (/* unused */),
|
|
.io_out_tage_enable (/* unused */),
|
|
.io_out_sc_enable (/* unused */),
|
|
.io_out_ras_enable (/* unused */)
|
|
);
|
|
DelayN_1 tage_io_ctrl_delay (
|
|
.clock (clock),
|
|
.io_in_ubtb_enable (io_ctrl_ubtb_enable),
|
|
.io_in_btb_enable (io_ctrl_btb_enable),
|
|
.io_in_tage_enable (io_ctrl_tage_enable),
|
|
.io_in_sc_enable (io_ctrl_sc_enable),
|
|
.io_in_ras_enable (io_ctrl_ras_enable),
|
|
.io_out_ubtb_enable (/* unused */),
|
|
.io_out_btb_enable (/* unused */),
|
|
.io_out_tage_enable (_tage_io_ctrl_delay_io_out_tage_enable),
|
|
.io_out_sc_enable (_tage_io_ctrl_delay_io_out_sc_enable),
|
|
.io_out_ras_enable (/* unused */)
|
|
);
|
|
DelayN_1 ftb_io_ctrl_delay (
|
|
.clock (clock),
|
|
.io_in_ubtb_enable (io_ctrl_ubtb_enable),
|
|
.io_in_btb_enable (io_ctrl_btb_enable),
|
|
.io_in_tage_enable (io_ctrl_tage_enable),
|
|
.io_in_sc_enable (io_ctrl_sc_enable),
|
|
.io_in_ras_enable (io_ctrl_ras_enable),
|
|
.io_out_ubtb_enable (/* unused */),
|
|
.io_out_btb_enable (_ftb_io_ctrl_delay_io_out_btb_enable),
|
|
.io_out_tage_enable (/* unused */),
|
|
.io_out_sc_enable (/* unused */),
|
|
.io_out_ras_enable (/* unused */)
|
|
);
|
|
DelayN_1 ras_io_ctrl_delay (
|
|
.clock (clock),
|
|
.io_in_ubtb_enable (io_ctrl_ubtb_enable),
|
|
.io_in_btb_enable (io_ctrl_btb_enable),
|
|
.io_in_tage_enable (io_ctrl_tage_enable),
|
|
.io_in_sc_enable (io_ctrl_sc_enable),
|
|
.io_in_ras_enable (io_ctrl_ras_enable),
|
|
.io_out_ubtb_enable (/* unused */),
|
|
.io_out_btb_enable (/* unused */),
|
|
.io_out_tage_enable (/* unused */),
|
|
.io_out_sc_enable (/* unused */),
|
|
.io_out_ras_enable (_ras_io_ctrl_delay_io_out_ras_enable)
|
|
);
|
|
assign io_out_last_stage_meta =
|
|
{_ubtb_io_out_last_stage_meta[5:0],
|
|
_tage_io_out_last_stage_meta[87:0],
|
|
_ftb_io_out_last_stage_meta[2:0],
|
|
_ittage_io_out_last_stage_meta[100:0],
|
|
_ras_io_out_last_stage_meta[24:0]};
|
|
assign io_s1_ready = _tage_io_s1_ready & _ftb_io_s1_ready;
|
|
assign io_perf_0_value = io_perf_0_value_REG_1;
|
|
assign io_perf_1_value = io_perf_1_value_REG_1;
|
|
assign io_perf_2_value = io_perf_2_value_REG_1;
|
|
assign io_perf_3_value = io_perf_3_value_REG_1;
|
|
assign io_perf_4_value = io_perf_4_value_REG_1;
|
|
assign io_perf_5_value = io_perf_5_value_REG_1;
|
|
assign io_perf_6_value = io_perf_6_value_REG_1;
|
|
endmodule
|
|
|