From 95f192c870a21662c8530e27f63d87ba993c5efe Mon Sep 17 00:00:00 2001 From: Miical <879754743@qq.com> Date: Fri, 31 May 2024 20:08:10 +0800 Subject: [PATCH] Change the FTQ bundle to new bundle --- tests/uFTB-with-ftq/env/bpu_top.py | 2 +- tests/uFTB-with-ftq/env/bundle.py | 68 +++++++++++----------- tests/uFTB-with-ftq/tests/test_with_ftq.py | 9 +-- 3 files changed, 41 insertions(+), 38 deletions(-) diff --git a/tests/uFTB-with-ftq/env/bpu_top.py b/tests/uFTB-with-ftq/env/bpu_top.py index 0150c0d..ae15146 100644 --- a/tests/uFTB-with-ftq/env/bpu_top.py +++ b/tests/uFTB-with-ftq/env/bpu_top.py @@ -136,7 +136,7 @@ class BPUTop: # Get dut output and generate bpu output - dut_output = self.dut_out.collect() + dut_output = self.dut_out.as_dict() bpu_output = self.generate_bpu_output(dut_output) ftb_entry = FTBEntry.from_full_pred_dict(self.s1_pc, dut_output["s1"]["full_pred"]) diff --git a/tests/uFTB-with-ftq/env/bundle.py b/tests/uFTB-with-ftq/env/bundle.py index 200d473..9313775 100644 --- a/tests/uFTB-with-ftq/env/bundle.py +++ b/tests/uFTB-with-ftq/env/bundle.py @@ -1,51 +1,53 @@ from mlvp import Bundle class PipelineCtrlBundle(Bundle): - signals_list = ["s0_fire_0", "s0_fire_1", "s0_fire_2", "s0_fire_3", - "s1_fire_0", "s1_fire_1", "s1_fire_2", "s1_fire_3", - "s2_fire_0", "s2_fire_1", "s2_fire_2", "s2_fire_3", - "s3_fire_0", "s3_fire_1", "s3_fire_2", "s3_fire_3", - "s1_ready", "s2_ready", "s3_ready", - "s2_redirect", "s3_redirect"] + signals = ["s0_fire_0", "s0_fire_1", "s0_fire_2", "s0_fire_3", + "s1_fire_0", "s1_fire_1", "s1_fire_2", "s1_fire_3", + "s2_fire_0", "s2_fire_1", "s2_fire_2", "s2_fire_3", + "s3_fire_0", "s3_fire_1", "s3_fire_2", "s3_fire_3", + "s1_ready", "s2_ready", "s3_ready", + "s2_redirect", "s3_redirect"] class EnableCtrlBundle(Bundle): - signals_list = ["ubtb_enable", "btb_enable", "bim_enable", "tage_enable", - "sc_enable", "ras_enable", "loop_enable"] + signals = ["ubtb_enable", "btb_enable", "bim_enable", "tage_enable", + "sc_enable", "ras_enable", "loop_enable"] class FTBEntryBundle(Bundle): - signals_list = ["brSlots_0_offset", "brSlots_0_lower", "brSlots_0_tarStat", "brSlots_0_valid", - "tailSlot_offset", "tailSlot_lower", "tailSlot_tarStat", "tailSlot_sharing", "tailSlot_valid", - "pftAddr", "carry", "isCall", "isRet", "isJalr", "last_may_be_rvi_call", - "always_taken_0", "always_taken_1"] + signals = ["brSlots_0_offset", "brSlots_0_lower", "brSlots_0_tarStat", "brSlots_0_valid", + "tailSlot_offset", "tailSlot_lower", "tailSlot_tarStat", "tailSlot_sharing", "tailSlot_valid", + "pftAddr", "carry", "isCall", "isRet", "isJalr", "last_may_be_rvi_call", + "always_taken_0", "always_taken_1"] class UpdateBundle(Bundle): - signals_list = ["valid", "bits_pc", "bits_br_taken_mask_0", "bits_br_taken_mask_1"] + signals = ["valid", "bits_pc", "bits_br_taken_mask_0", "bits_br_taken_mask_1"] - sub_bundles = [ - ("ftb_entry", lambda dut: FTBEntryBundle.from_prefix(dut, "bits_ftb_entry_")) - ] + def __init__(self): + super().__init__() + self.ftb_entry = FTBEntryBundle.from_prefix("bits_ftb_entry_") class FullBranchPredirectionBundle(Bundle): - signals_list = ["hit", "slot_valids_0", "slot_valids_1", "targets_0", "targets_1", - "offsets_0", "offsets_1", "fallThroughAddr", "fallThroughErr", - "is_jal", "is_jalr", "is_call", "is_ret", "is_br_sharing", - "last_may_be_rvi_call", - "br_taken_mask_0", "br_taken_mask_1", - "jalr_target"] + signals = ["hit", "slot_valids_0", "slot_valids_1", "targets_0", "targets_1", + "offsets_0", "offsets_1", "fallThroughAddr", "fallThroughErr", + "is_jal", "is_jalr", "is_call", "is_ret", "is_br_sharing", + "last_may_be_rvi_call", + "br_taken_mask_0", "br_taken_mask_1", + "jalr_target"] class BranchPredictionBundle(Bundle): - signals_list = ["pc_3", "valid", "hasRedirect", "ftq_idx"] - sub_bundles = [ - ("full_pred", lambda dut: FullBranchPredirectionBundle.from_regex(dut, r"full_pred_\d_(.*)")) - ] + signals = ["pc_3", "valid", "hasRedirect", "ftq_idx"] + + def __init__(self): + super().__init__() + self.full_pred = FullBranchPredirectionBundle.from_regex(r"full_pred_\d_(.*)") class BranchPredictionResp(Bundle): - signals_list = ["last_stage_meta"] - sub_bundles = [ - ("s1", lambda dut: BranchPredictionBundle.from_prefix(dut, "s1_")), - ("s2", lambda dut: BranchPredictionBundle.from_prefix(dut, "s2_")), - ("s3", lambda dut: BranchPredictionBundle.from_prefix(dut, "s3_")), - ("last_stage_ftb_entry", lambda dut: FTBEntryBundle.from_prefix(dut, "last_stage_ftb_entry_")) - ] + signals = ["last_stage_meta"] + + def __init__(self): + super().__init__() + self.s1 = BranchPredictionBundle.from_prefix("s1_") + self.s2 = BranchPredictionBundle.from_prefix("s2_") + self.s3 = BranchPredictionBundle.from_prefix("s3_") + self.last_stage_ftb_entry = FTBEntryBundle.from_prefix("last_stage_ftb_entry_") diff --git a/tests/uFTB-with-ftq/tests/test_with_ftq.py b/tests/uFTB-with-ftq/tests/test_with_ftq.py index a8dcfec..1d8ebfa 100644 --- a/tests/uFTB-with-ftq/tests/test_with_ftq.py +++ b/tests/uFTB-with-ftq/tests/test_with_ftq.py @@ -24,10 +24,10 @@ def set_imm_mode(uFTB): async def uftb_test(uFTB): - uFTB_update = UpdateBundle.from_prefix(uFTB, "io_update_") - uFTB_out = BranchPredictionResp.from_prefix(uFTB, "io_out_") - pipeline_ctrl = PipelineCtrlBundle.from_prefix(uFTB, "io_") - enable_ctrl = EnableCtrlBundle.from_prefix(uFTB, "io_ctrl_") + uFTB_update = UpdateBundle.from_prefix("io_update_").set_name("uFTB_update").bind(uFTB) + uFTB_out = BranchPredictionResp.from_prefix("io_out_").set_name("uFTB_out").bind(uFTB) + pipeline_ctrl = PipelineCtrlBundle.from_prefix("io_").set_name("pipeline_ctrl").bind(uFTB) + enable_ctrl = EnableCtrlBundle.from_prefix("io_ctrl_").set_name("enable_ctrl").bind(uFTB) mlvp.create_task(mlvp.start_clock(uFTB)) mlvp.create_task(BPUTop(uFTB, uFTB_out, uFTB_update, pipeline_ctrl, enable_ctrl).run()) @@ -74,3 +74,4 @@ def test_uftb(request): pred_stat.summary() set_func_coverage(request, [g1, g2]) set_line_coverage(request, "report/uftb_with_ftq_coverage.dat") +