forked from TencentOS/TencentOS-kernel
driver: megaraid: update to 07.707.51.00-rc1
this driver originates from kernel v5.1 upstream commit : e93c9c99a629c61837d5a7fc2120cd2b6c70dbdd Signed-off-by: lennychen <lennychen@tencent.com>
This commit is contained in:
parent
015ab8d0bb
commit
de2e1a582c
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@ -19,6 +19,7 @@
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#include <linux/types.h>
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#include <linux/semaphore.h>
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#include <linux/timer.h>
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#include "mbox_defs.h"
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@ -153,6 +154,11 @@ typedef struct uioc {
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} __attribute__ ((aligned(1024),packed)) uioc_t;
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/* For on-stack uioc timers. */
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struct uioc_timeout {
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struct timer_list timer;
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uioc_t *uioc;
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};
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/**
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* struct mraid_hba_info - information about the controller
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@ -201,13 +201,6 @@ int mraid_debug_level = CL_ANN;
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module_param_named(debug_level, mraid_debug_level, int, 0);
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MODULE_PARM_DESC(debug_level, "Debug level for driver (default=0)");
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/*
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* ### global data ###
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*/
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static uint8_t megaraid_mbox_version[8] =
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{ 0x02, 0x20, 0x04, 0x06, 3, 7, 20, 5 };
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/*
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* PCI table for all supported controllers.
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*/
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@ -343,7 +336,6 @@ static struct scsi_host_template megaraid_template_g = {
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.eh_abort_handler = megaraid_abort_handler,
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.eh_host_reset_handler = megaraid_reset_handler,
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.change_queue_depth = scsi_change_queue_depth,
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.use_clustering = ENABLE_CLUSTERING,
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.no_write_same = 1,
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.sdev_attrs = megaraid_sdev_attrs,
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.shost_attrs = megaraid_shost_attrs,
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@ -457,10 +449,9 @@ megaraid_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
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// Setup the default DMA mask. This would be changed later on
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// depending on hardware capabilities
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if (pci_set_dma_mask(adapter->pdev, DMA_BIT_MASK(32)) != 0) {
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if (dma_set_mask(&adapter->pdev->dev, DMA_BIT_MASK(32))) {
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con_log(CL_ANN, (KERN_WARNING
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"megaraid: pci_set_dma_mask failed:%d\n", __LINE__));
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"megaraid: dma_set_mask failed:%d\n", __LINE__));
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goto out_free_adapter;
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}
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@ -484,7 +475,7 @@ megaraid_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
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// Start the mailbox based controller
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if (megaraid_init_mbox(adapter) != 0) {
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con_log(CL_ANN, (KERN_WARNING
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"megaraid: maibox adapter did not initialize\n"));
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"megaraid: mailbox adapter did not initialize\n"));
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goto out_free_adapter;
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}
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@ -878,11 +869,12 @@ megaraid_init_mbox(adapter_t *adapter)
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adapter->pdev->device == PCI_DEVICE_ID_PERC4_DI_EVERGLADES) ||
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(adapter->pdev->vendor == PCI_VENDOR_ID_DELL &&
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adapter->pdev->device == PCI_DEVICE_ID_PERC4E_DI_KOBUK)) {
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if (pci_set_dma_mask(adapter->pdev, DMA_BIT_MASK(64))) {
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if (dma_set_mask(&adapter->pdev->dev, DMA_BIT_MASK(64))) {
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con_log(CL_ANN, (KERN_WARNING
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"megaraid: DMA mask for 64-bit failed\n"));
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if (pci_set_dma_mask (adapter->pdev, DMA_BIT_MASK(32))) {
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if (dma_set_mask(&adapter->pdev->dev,
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DMA_BIT_MASK(32))) {
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con_log(CL_ANN, (KERN_WARNING
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"megaraid: 32-bit DMA mask failed\n"));
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goto out_free_sysfs_res;
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@ -950,7 +942,7 @@ megaraid_fini_mbox(adapter_t *adapter)
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* megaraid_alloc_cmd_packets - allocate shared mailbox
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* @adapter : soft state of the raid controller
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*
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* Allocate and align the shared mailbox. This maibox is used to issue
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* Allocate and align the shared mailbox. This mailbox is used to issue
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* all the commands. For IO based controllers, the mailbox is also registered
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* with the FW. Allocate memory for all commands as well.
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* This is our big allocator.
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@ -975,9 +967,10 @@ megaraid_alloc_cmd_packets(adapter_t *adapter)
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* Allocate the common 16-byte aligned memory for the handshake
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* mailbox.
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*/
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raid_dev->una_mbox64 = pci_zalloc_consistent(adapter->pdev,
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sizeof(mbox64_t),
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&raid_dev->una_mbox64_dma);
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raid_dev->una_mbox64 = dma_alloc_coherent(&adapter->pdev->dev,
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sizeof(mbox64_t),
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&raid_dev->una_mbox64_dma,
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GFP_KERNEL);
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if (!raid_dev->una_mbox64) {
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con_log(CL_ANN, (KERN_WARNING
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@ -1003,8 +996,8 @@ megaraid_alloc_cmd_packets(adapter_t *adapter)
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align;
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// Allocate memory for commands issued internally
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adapter->ibuf = pci_zalloc_consistent(pdev, MBOX_IBUF_SIZE,
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&adapter->ibuf_dma_h);
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adapter->ibuf = dma_alloc_coherent(&pdev->dev, MBOX_IBUF_SIZE,
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&adapter->ibuf_dma_h, GFP_KERNEL);
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if (!adapter->ibuf) {
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con_log(CL_ANN, (KERN_WARNING
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@ -1082,7 +1075,7 @@ megaraid_alloc_cmd_packets(adapter_t *adapter)
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scb->scp = NULL;
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scb->state = SCB_FREE;
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scb->dma_direction = PCI_DMA_NONE;
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scb->dma_direction = DMA_NONE;
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scb->dma_type = MRAID_DMA_NONE;
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scb->dev_channel = -1;
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scb->dev_target = -1;
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@ -1098,10 +1091,10 @@ out_teardown_dma_pools:
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out_free_scb_list:
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kfree(adapter->kscb_list);
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out_free_ibuf:
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pci_free_consistent(pdev, MBOX_IBUF_SIZE, (void *)adapter->ibuf,
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dma_free_coherent(&pdev->dev, MBOX_IBUF_SIZE, (void *)adapter->ibuf,
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adapter->ibuf_dma_h);
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out_free_common_mbox:
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pci_free_consistent(adapter->pdev, sizeof(mbox64_t),
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dma_free_coherent(&adapter->pdev->dev, sizeof(mbox64_t),
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(caddr_t)raid_dev->una_mbox64, raid_dev->una_mbox64_dma);
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return -1;
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@ -1123,10 +1116,10 @@ megaraid_free_cmd_packets(adapter_t *adapter)
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kfree(adapter->kscb_list);
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pci_free_consistent(adapter->pdev, MBOX_IBUF_SIZE,
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dma_free_coherent(&adapter->pdev->dev, MBOX_IBUF_SIZE,
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(void *)adapter->ibuf, adapter->ibuf_dma_h);
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pci_free_consistent(adapter->pdev, sizeof(mbox64_t),
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dma_free_coherent(&adapter->pdev->dev, sizeof(mbox64_t),
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(caddr_t)raid_dev->una_mbox64, raid_dev->una_mbox64_dma);
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return;
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}
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@ -1250,8 +1243,7 @@ megaraid_mbox_teardown_dma_pools(adapter_t *adapter)
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dma_pool_free(raid_dev->sg_pool_handle, sg_pci_blk[i].vaddr,
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sg_pci_blk[i].dma_addr);
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}
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if (raid_dev->sg_pool_handle)
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dma_pool_destroy(raid_dev->sg_pool_handle);
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dma_pool_destroy(raid_dev->sg_pool_handle);
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epthru_pci_blk = raid_dev->epthru_pool;
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@ -1259,8 +1251,7 @@ megaraid_mbox_teardown_dma_pools(adapter_t *adapter)
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dma_pool_free(raid_dev->epthru_pool_handle,
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epthru_pci_blk[i].vaddr, epthru_pci_blk[i].dma_addr);
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}
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if (raid_dev->epthru_pool_handle)
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dma_pool_destroy(raid_dev->epthru_pool_handle);
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dma_pool_destroy(raid_dev->epthru_pool_handle);
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mbox_pci_blk = raid_dev->mbox_pool;
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@ -1268,8 +1259,7 @@ megaraid_mbox_teardown_dma_pools(adapter_t *adapter)
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dma_pool_free(raid_dev->mbox_pool_handle,
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mbox_pci_blk[i].vaddr, mbox_pci_blk[i].dma_addr);
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}
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if (raid_dev->mbox_pool_handle)
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dma_pool_destroy(raid_dev->mbox_pool_handle);
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dma_pool_destroy(raid_dev->mbox_pool_handle);
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return;
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}
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@ -1428,12 +1418,6 @@ mbox_post_cmd(adapter_t *adapter, scb_t *scb)
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adapter->outstanding_cmds++;
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if (scb->dma_direction == PCI_DMA_TODEVICE)
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pci_dma_sync_sg_for_device(adapter->pdev,
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scsi_sglist(scb->scp),
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scsi_sg_count(scb->scp),
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PCI_DMA_TODEVICE);
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mbox->busy = 1; // Set busy
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mbox->poll = 0;
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mbox->ack = 0;
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@ -2180,31 +2164,6 @@ megaraid_isr(int irq, void *devp)
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}
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/**
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* megaraid_mbox_sync_scb - sync kernel buffers
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* @adapter : controller's soft state
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* @scb : pointer to the resource packet
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*
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* DMA sync if required.
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*/
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static void
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megaraid_mbox_sync_scb(adapter_t *adapter, scb_t *scb)
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{
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mbox_ccb_t *ccb;
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ccb = (mbox_ccb_t *)scb->ccb;
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if (scb->dma_direction == PCI_DMA_FROMDEVICE)
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pci_dma_sync_sg_for_cpu(adapter->pdev,
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scsi_sglist(scb->scp),
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scsi_sg_count(scb->scp),
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PCI_DMA_FROMDEVICE);
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scsi_dma_unmap(scb->scp);
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return;
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}
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/**
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* megaraid_mbox_dpc - the tasklet to complete the commands from completed list
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* @devp : pointer to HBA soft state
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@ -2403,9 +2362,7 @@ megaraid_mbox_dpc(unsigned long devp)
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megaraid_mbox_display_scb(adapter, scb);
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}
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// Free our internal resources and call the mid-layer callback
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// routine
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megaraid_mbox_sync_scb(adapter, scb);
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scsi_dma_unmap(scp);
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// remove from local clist
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list_del_init(&scb->list);
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@ -2577,7 +2534,6 @@ megaraid_reset_handler(struct scsi_cmnd *scp)
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uint8_t raw_mbox[sizeof(mbox_t)];
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int rval;
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int recovery_window;
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int recovering;
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int i;
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uioc_t *kioc;
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@ -2591,7 +2547,6 @@ megaraid_reset_handler(struct scsi_cmnd *scp)
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return FAILED;
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}
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// Under exceptional conditions, FW can take up to 3 minutes to
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// complete command processing. Wait for additional 2 minutes for the
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// pending commands counter to go down to 0. If it doesn't, let the
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@ -2640,8 +2595,6 @@ megaraid_reset_handler(struct scsi_cmnd *scp)
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recovery_window = MBOX_RESET_WAIT + MBOX_RESET_EXT_WAIT;
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recovering = adapter->outstanding_cmds;
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for (i = 0; i < recovery_window; i++) {
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megaraid_ack_sequence(adapter);
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@ -2725,13 +2678,10 @@ static int
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mbox_post_sync_cmd(adapter_t *adapter, uint8_t raw_mbox[])
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{
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mraid_device_t *raid_dev = ADAP2RAIDDEV(adapter);
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mbox64_t *mbox64;
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mbox_t *mbox;
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uint8_t status;
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int i;
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mbox64 = raid_dev->mbox64;
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mbox = raid_dev->mbox;
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/*
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@ -2948,9 +2898,8 @@ megaraid_mbox_product_info(adapter_t *adapter)
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* Issue an ENQUIRY3 command to find out certain adapter parameters,
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* e.g., max channels, max commands etc.
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*/
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pinfo = pci_zalloc_consistent(adapter->pdev, sizeof(mraid_pinfo_t),
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&pinfo_dma_h);
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pinfo = dma_alloc_coherent(&adapter->pdev->dev, sizeof(mraid_pinfo_t),
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&pinfo_dma_h, GFP_KERNEL);
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if (pinfo == NULL) {
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con_log(CL_ANN, (KERN_WARNING
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"megaraid: out of memory, %s %d\n", __func__,
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@ -2971,7 +2920,7 @@ megaraid_mbox_product_info(adapter_t *adapter)
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con_log(CL_ANN, (KERN_WARNING "megaraid: Inquiry3 failed\n"));
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pci_free_consistent(adapter->pdev, sizeof(mraid_pinfo_t),
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dma_free_coherent(&adapter->pdev->dev, sizeof(mraid_pinfo_t),
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pinfo, pinfo_dma_h);
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return -1;
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@ -3002,7 +2951,7 @@ megaraid_mbox_product_info(adapter_t *adapter)
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con_log(CL_ANN, (KERN_WARNING
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"megaraid: product info failed\n"));
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pci_free_consistent(adapter->pdev, sizeof(mraid_pinfo_t),
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dma_free_coherent(&adapter->pdev->dev, sizeof(mraid_pinfo_t),
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pinfo, pinfo_dma_h);
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return -1;
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@ -3038,7 +2987,7 @@ megaraid_mbox_product_info(adapter_t *adapter)
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"megaraid: fw version:[%s] bios version:[%s]\n",
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adapter->fw_version, adapter->bios_version));
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pci_free_consistent(adapter->pdev, sizeof(mraid_pinfo_t), pinfo,
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dma_free_coherent(&adapter->pdev->dev, sizeof(mraid_pinfo_t), pinfo,
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pinfo_dma_h);
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return 0;
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@ -3135,7 +3084,6 @@ megaraid_mbox_support_ha(adapter_t *adapter, uint16_t *init_id)
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static int
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megaraid_mbox_support_random_del(adapter_t *adapter)
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{
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mbox_t *mbox;
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uint8_t raw_mbox[sizeof(mbox_t)];
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int rval;
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@ -3157,8 +3105,6 @@ megaraid_mbox_support_random_del(adapter_t *adapter)
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return 0;
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}
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mbox = (mbox_t *)raw_mbox;
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memset((caddr_t)raw_mbox, 0, sizeof(mbox_t));
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raw_mbox[0] = FC_DEL_LOGDRV;
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@ -3263,12 +3209,8 @@ megaraid_mbox_enum_raid_scsi(adapter_t *adapter)
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static void
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megaraid_mbox_flush_cache(adapter_t *adapter)
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{
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mbox_t *mbox;
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uint8_t raw_mbox[sizeof(mbox_t)];
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mbox = (mbox_t *)raw_mbox;
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memset((caddr_t)raw_mbox, 0, sizeof(mbox_t));
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raw_mbox[0] = FLUSH_ADAPTER;
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@ -3299,7 +3241,6 @@ megaraid_mbox_fire_sync_cmd(adapter_t *adapter)
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mbox_t *mbox;
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uint8_t raw_mbox[sizeof(mbox_t)];
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mraid_device_t *raid_dev = ADAP2RAIDDEV(adapter);
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mbox64_t *mbox64;
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int status = 0;
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int i;
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uint32_t dword;
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@ -3310,7 +3251,6 @@ megaraid_mbox_fire_sync_cmd(adapter_t *adapter)
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raw_mbox[0] = 0xFF;
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mbox64 = raid_dev->mbox64;
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mbox = raid_dev->mbox;
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/* Wait until mailbox is free */
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@ -3515,7 +3455,7 @@ megaraid_cmm_register(adapter_t *adapter)
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scb->scp = NULL;
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scb->state = SCB_FREE;
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scb->dma_direction = PCI_DMA_NONE;
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scb->dma_direction = DMA_NONE;
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scb->dma_type = MRAID_DMA_NONE;
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scb->dev_channel = -1;
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scb->dev_target = -1;
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@ -3653,7 +3593,7 @@ megaraid_mbox_mm_command(adapter_t *adapter, uioc_t *kioc)
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scb->state = SCB_ACTIVE;
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scb->dma_type = MRAID_DMA_NONE;
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scb->dma_direction = PCI_DMA_NONE;
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scb->dma_direction = DMA_NONE;
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ccb = (mbox_ccb_t *)scb->ccb;
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mbox64 = (mbox64_t *)(unsigned long)kioc->cmdbuf;
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@ -3794,10 +3734,6 @@ megaraid_mbox_mm_done(adapter_t *adapter, scb_t *scb)
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static int
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gather_hbainfo(adapter_t *adapter, mraid_hba_info_t *hinfo)
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{
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uint8_t dmajor;
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dmajor = megaraid_mbox_version[0];
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hinfo->pci_vendor_id = adapter->pdev->vendor;
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hinfo->pci_device_id = adapter->pdev->device;
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hinfo->subsys_vendor_id = adapter->pdev->subsystem_vendor;
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@ -3843,8 +3779,8 @@ megaraid_sysfs_alloc_resources(adapter_t *adapter)
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raid_dev->sysfs_mbox64 = kmalloc(sizeof(mbox64_t), GFP_KERNEL);
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raid_dev->sysfs_buffer = pci_alloc_consistent(adapter->pdev,
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PAGE_SIZE, &raid_dev->sysfs_buffer_dma);
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raid_dev->sysfs_buffer = dma_alloc_coherent(&adapter->pdev->dev,
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PAGE_SIZE, &raid_dev->sysfs_buffer_dma, GFP_KERNEL);
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|
||||
if (!raid_dev->sysfs_uioc || !raid_dev->sysfs_mbox64 ||
|
||||
!raid_dev->sysfs_buffer) {
|
||||
|
|
@ -3881,7 +3817,7 @@ megaraid_sysfs_free_resources(adapter_t *adapter)
|
|||
kfree(raid_dev->sysfs_mbox64);
|
||||
|
||||
if (raid_dev->sysfs_buffer) {
|
||||
pci_free_consistent(adapter->pdev, PAGE_SIZE,
|
||||
dma_free_coherent(&adapter->pdev->dev, PAGE_SIZE,
|
||||
raid_dev->sysfs_buffer, raid_dev->sysfs_buffer_dma);
|
||||
}
|
||||
}
|
||||
|
|
@ -3904,19 +3840,19 @@ megaraid_sysfs_get_ldmap_done(uioc_t *uioc)
|
|||
wake_up(&raid_dev->sysfs_wait_q);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* megaraid_sysfs_get_ldmap_timeout - timeout handling for get ldmap
|
||||
* @data : timed out packet
|
||||
* @t : timed out timer
|
||||
*
|
||||
* Timeout routine to recover and return to application, in case the adapter
|
||||
* has stopped responding. A timeout of 60 seconds for this command seems like
|
||||
* a good value.
|
||||
*/
|
||||
static void
|
||||
megaraid_sysfs_get_ldmap_timeout(unsigned long data)
|
||||
megaraid_sysfs_get_ldmap_timeout(struct timer_list *t)
|
||||
{
|
||||
uioc_t *uioc = (uioc_t *)data;
|
||||
struct uioc_timeout *timeout = from_timer(timeout, t, timer);
|
||||
uioc_t *uioc = timeout->uioc;
|
||||
adapter_t *adapter = (adapter_t *)uioc->buf_vaddr;
|
||||
mraid_device_t *raid_dev = ADAP2RAIDDEV(adapter);
|
||||
|
||||
|
|
@ -3951,8 +3887,7 @@ megaraid_sysfs_get_ldmap(adapter_t *adapter)
|
|||
mbox64_t *mbox64;
|
||||
mbox_t *mbox;
|
||||
char *raw_mbox;
|
||||
struct timer_list sysfs_timer;
|
||||
struct timer_list *timerp;
|
||||
struct uioc_timeout timeout;
|
||||
caddr_t ldmap;
|
||||
int rval = 0;
|
||||
|
||||
|
|
@ -3988,14 +3923,13 @@ megaraid_sysfs_get_ldmap(adapter_t *adapter)
|
|||
/*
|
||||
* Setup a timer to recover from a non-responding controller
|
||||
*/
|
||||
timerp = &sysfs_timer;
|
||||
init_timer(timerp);
|
||||
timeout.uioc = uioc;
|
||||
setup_timer_on_stack(&timeout.timer,
|
||||
(TIMER_FUNC_TYPE)megaraid_sysfs_get_ldmap_timeout,
|
||||
(TIMER_DATA_TYPE)&timeout.timer);
|
||||
|
||||
timerp->function = megaraid_sysfs_get_ldmap_timeout;
|
||||
timerp->data = (unsigned long)uioc;
|
||||
timerp->expires = jiffies + 60 * HZ;
|
||||
|
||||
add_timer(timerp);
|
||||
timeout.timer.expires = jiffies + 60 * HZ;
|
||||
add_timer(&timeout.timer);
|
||||
|
||||
/*
|
||||
* Send the command to the firmware
|
||||
|
|
@ -4033,7 +3967,8 @@ megaraid_sysfs_get_ldmap(adapter_t *adapter)
|
|||
}
|
||||
|
||||
|
||||
del_timer_sync(timerp);
|
||||
del_timer_sync(&timeout.timer);
|
||||
destroy_timer_on_stack(&timeout.timer);
|
||||
|
||||
mutex_unlock(&raid_dev->sysfs_mtx);
|
||||
|
||||
|
|
|
|||
|
|
@ -117,7 +117,7 @@
|
|||
* @raw_mbox : raw mailbox pointer
|
||||
* @mbox : mailbox
|
||||
* @mbox64 : extended mailbox
|
||||
* @mbox_dma_h : maibox dma address
|
||||
* @mbox_dma_h : mailbox dma address
|
||||
* @sgl64 : 64-bit scatter-gather list
|
||||
* @sgl32 : 32-bit scatter-gather list
|
||||
* @sgl_dma_h : dma handle for the scatter-gather list
|
||||
|
|
|
|||
|
|
@ -35,7 +35,7 @@ static int kioc_to_mimd(uioc_t *, mimd_t __user *);
|
|||
static int handle_drvrcmd(void __user *, uint8_t, int *);
|
||||
static int lld_ioctl(mraid_mmadp_t *, uioc_t *);
|
||||
static void ioctl_done(uioc_t *);
|
||||
static void lld_timedout(unsigned long);
|
||||
static void lld_timedout(struct timer_list *);
|
||||
static void hinfo_to_cinfo(mraid_hba_info_t *, mcontroller_t *);
|
||||
static mraid_mmadp_t *mraid_mm_get_adapter(mimd_t __user *, int *);
|
||||
static uioc_t *mraid_mm_alloc_kioc(mraid_mmadp_t *);
|
||||
|
|
@ -686,8 +686,7 @@ static int
|
|||
lld_ioctl(mraid_mmadp_t *adp, uioc_t *kioc)
|
||||
{
|
||||
int rval;
|
||||
struct timer_list timer;
|
||||
struct timer_list *tp = NULL;
|
||||
struct uioc_timeout timeout = { };
|
||||
|
||||
kioc->status = -ENODATA;
|
||||
rval = adp->issue_uioc(adp->drvr_data, kioc, IOCTL_ISSUE);
|
||||
|
|
@ -698,14 +697,14 @@ lld_ioctl(mraid_mmadp_t *adp, uioc_t *kioc)
|
|||
* Start the timer
|
||||
*/
|
||||
if (adp->timeout > 0) {
|
||||
tp = &timer;
|
||||
init_timer(tp);
|
||||
timeout.uioc = kioc;
|
||||
setup_timer_on_stack(&timeout.timer,
|
||||
(TIMER_FUNC_TYPE)lld_timedout,
|
||||
(TIMER_DATA_TYPE)&timeout.timer);
|
||||
|
||||
tp->function = lld_timedout;
|
||||
tp->data = (unsigned long)kioc;
|
||||
tp->expires = jiffies + adp->timeout * HZ;
|
||||
timeout.timer.expires = jiffies + adp->timeout * HZ;
|
||||
|
||||
add_timer(tp);
|
||||
add_timer(&timeout.timer);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -713,8 +712,9 @@ lld_ioctl(mraid_mmadp_t *adp, uioc_t *kioc)
|
|||
* call, the ioctl either completed successfully or timedout.
|
||||
*/
|
||||
wait_event(wait_q, (kioc->status != -ENODATA));
|
||||
if (tp) {
|
||||
del_timer_sync(tp);
|
||||
if (timeout.timer.function) {
|
||||
del_timer_sync(&timeout.timer);
|
||||
destroy_timer_on_stack(&timeout.timer);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -783,12 +783,13 @@ ioctl_done(uioc_t *kioc)
|
|||
|
||||
/**
|
||||
* lld_timedout - callback from the expired timer
|
||||
* @ptr : ioctl packet that timed out
|
||||
* @t : timer that timed out
|
||||
*/
|
||||
static void
|
||||
lld_timedout(unsigned long ptr)
|
||||
lld_timedout(struct timer_list *t)
|
||||
{
|
||||
uioc_t *kioc = (uioc_t *)ptr;
|
||||
struct uioc_timeout *timeout = from_timer(timeout, t, timer);
|
||||
uioc_t *kioc = timeout->uioc;
|
||||
|
||||
kioc->status = -ETIME;
|
||||
kioc->timedout = 1;
|
||||
|
|
@ -936,10 +937,12 @@ mraid_mm_register_adp(mraid_mmadp_t *lld_adp)
|
|||
* Allocate single blocks of memory for all required kiocs,
|
||||
* mailboxes and passthru structures.
|
||||
*/
|
||||
adapter->kioc_list = kmalloc(sizeof(uioc_t) * lld_adp->max_kioc,
|
||||
GFP_KERNEL);
|
||||
adapter->mbox_list = kmalloc(sizeof(mbox64_t) * lld_adp->max_kioc,
|
||||
GFP_KERNEL);
|
||||
adapter->kioc_list = kmalloc_array(lld_adp->max_kioc,
|
||||
sizeof(uioc_t),
|
||||
GFP_KERNEL);
|
||||
adapter->mbox_list = kmalloc_array(lld_adp->max_kioc,
|
||||
sizeof(mbox64_t),
|
||||
GFP_KERNEL);
|
||||
adapter->pthru_dma_pool = dma_pool_create("megaraid mm pthru pool",
|
||||
&adapter->pdev->dev,
|
||||
sizeof(mraid_passthru_t),
|
||||
|
|
@ -1016,8 +1019,7 @@ memalloc_error:
|
|||
kfree(adapter->kioc_list);
|
||||
kfree(adapter->mbox_list);
|
||||
|
||||
if (adapter->pthru_dma_pool)
|
||||
dma_pool_destroy(adapter->pthru_dma_pool);
|
||||
dma_pool_destroy(adapter->pthru_dma_pool);
|
||||
|
||||
kfree(adapter);
|
||||
|
||||
|
|
|
|||
|
|
@ -2,7 +2,8 @@
|
|||
* Linux MegaRAID driver for SAS based RAID controllers
|
||||
*
|
||||
* Copyright (c) 2003-2013 LSI Corporation
|
||||
* Copyright (c) 2013-2014 Avago Technologies
|
||||
* Copyright (c) 2013-2016 Avago Technologies
|
||||
* Copyright (c) 2016-2018 Broadcom Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
|
|
@ -19,14 +20,11 @@
|
|||
*
|
||||
* FILE: megaraid_sas.h
|
||||
*
|
||||
* Authors: Avago Technologies
|
||||
* Kashyap Desai <kashyap.desai@avagotech.com>
|
||||
* Sumit Saxena <sumit.saxena@avagotech.com>
|
||||
* Authors: Broadcom Inc.
|
||||
* Kashyap Desai <kashyap.desai@broadcom.com>
|
||||
* Sumit Saxena <sumit.saxena@broadcom.com>
|
||||
*
|
||||
* Send feedback to: megaraidlinux.pdl@avagotech.com
|
||||
*
|
||||
* Mail to: Avago Technologies, 350 West Trimble Road, Building 90,
|
||||
* San Jose, California 95131
|
||||
* Send feedback to: megaraidlinux.pdl@broadcom.com
|
||||
*/
|
||||
|
||||
#ifndef LSI_MEGARAID_SAS_H
|
||||
|
|
@ -35,8 +33,8 @@
|
|||
/*
|
||||
* MegaRAID SAS Driver meta data
|
||||
*/
|
||||
#define MEGASAS_VERSION "07.702.06.00-rc1"
|
||||
#define MEGASAS_RELDATE "June 21, 2017"
|
||||
#define MEGASAS_VERSION "07.707.51.00-rc1"
|
||||
#define MEGASAS_RELDATE "February 7, 2019"
|
||||
|
||||
/*
|
||||
* Device IDs
|
||||
|
|
@ -57,10 +55,15 @@
|
|||
#define PCI_DEVICE_ID_LSI_CUTLASS_52 0x0052
|
||||
#define PCI_DEVICE_ID_LSI_CUTLASS_53 0x0053
|
||||
#define PCI_DEVICE_ID_LSI_VENTURA 0x0014
|
||||
#define PCI_DEVICE_ID_LSI_CRUSADER 0x0015
|
||||
#define PCI_DEVICE_ID_LSI_HARPOON 0x0016
|
||||
#define PCI_DEVICE_ID_LSI_TOMCAT 0x0017
|
||||
#define PCI_DEVICE_ID_LSI_VENTURA_4PORT 0x001B
|
||||
#define PCI_DEVICE_ID_LSI_CRUSADER_4PORT 0x001C
|
||||
#define PCI_DEVICE_ID_LSI_AERO_10E1 0x10e1
|
||||
#define PCI_DEVICE_ID_LSI_AERO_10E2 0x10e2
|
||||
#define PCI_DEVICE_ID_LSI_AERO_10E5 0x10e5
|
||||
#define PCI_DEVICE_ID_LSI_AERO_10E6 0x10e6
|
||||
|
||||
/*
|
||||
* Intel HBA SSDIDs
|
||||
|
|
@ -141,6 +144,7 @@
|
|||
* CLR_HANDSHAKE: FW is waiting for HANDSHAKE from BIOS or Driver
|
||||
* HOTPLUG : Resume from Hotplug
|
||||
* MFI_STOP_ADP : Send signal to FW to stop processing
|
||||
* MFI_ADP_TRIGGER_SNAP_DUMP: Inform firmware to initiate snap dump
|
||||
*/
|
||||
#define WRITE_SEQUENCE_OFFSET (0x0000000FC) /* I20 */
|
||||
#define HOST_DIAGNOSTIC_OFFSET (0x000000F8) /* I20 */
|
||||
|
|
@ -157,6 +161,7 @@
|
|||
#define MFI_RESET_FLAGS MFI_INIT_READY| \
|
||||
MFI_INIT_MFIMODE| \
|
||||
MFI_INIT_ABORT
|
||||
#define MFI_ADP_TRIGGER_SNAP_DUMP 0x00000100
|
||||
#define MPI2_IOCINIT_MSGFLAG_RDPQ_ARRAY_MODE (0x01)
|
||||
|
||||
/*
|
||||
|
|
@ -186,16 +191,20 @@
|
|||
/*
|
||||
* MFI command opcodes
|
||||
*/
|
||||
#define MFI_CMD_INIT 0x00
|
||||
#define MFI_CMD_LD_READ 0x01
|
||||
#define MFI_CMD_LD_WRITE 0x02
|
||||
#define MFI_CMD_LD_SCSI_IO 0x03
|
||||
#define MFI_CMD_PD_SCSI_IO 0x04
|
||||
#define MFI_CMD_DCMD 0x05
|
||||
#define MFI_CMD_ABORT 0x06
|
||||
#define MFI_CMD_SMP 0x07
|
||||
#define MFI_CMD_STP 0x08
|
||||
#define MFI_CMD_INVALID 0xff
|
||||
enum MFI_CMD_OP {
|
||||
MFI_CMD_INIT = 0x0,
|
||||
MFI_CMD_LD_READ = 0x1,
|
||||
MFI_CMD_LD_WRITE = 0x2,
|
||||
MFI_CMD_LD_SCSI_IO = 0x3,
|
||||
MFI_CMD_PD_SCSI_IO = 0x4,
|
||||
MFI_CMD_DCMD = 0x5,
|
||||
MFI_CMD_ABORT = 0x6,
|
||||
MFI_CMD_SMP = 0x7,
|
||||
MFI_CMD_STP = 0x8,
|
||||
MFI_CMD_NVME = 0x9,
|
||||
MFI_CMD_OP_COUNT,
|
||||
MFI_CMD_INVALID = 0xff
|
||||
};
|
||||
|
||||
#define MR_DCMD_CTRL_GET_INFO 0x01010000
|
||||
#define MR_DCMD_LD_GET_LIST 0x03010000
|
||||
|
|
@ -226,7 +235,7 @@
|
|||
/*
|
||||
* Global functions
|
||||
*/
|
||||
extern u8 MR_ValidateMapInfo(struct megasas_instance *instance);
|
||||
extern u8 MR_ValidateMapInfo(struct megasas_instance *instance, u64 map_id);
|
||||
|
||||
|
||||
/*
|
||||
|
|
@ -704,7 +713,8 @@ struct MR_TARGET_PROPERTIES {
|
|||
u32 max_io_size_kb;
|
||||
u32 device_qdepth;
|
||||
u32 sector_size;
|
||||
u8 reserved[500];
|
||||
u8 reset_tmo;
|
||||
u8 reserved[499];
|
||||
} __packed;
|
||||
|
||||
/*
|
||||
|
|
@ -780,6 +790,38 @@ struct MR_LD_TARGETID_LIST {
|
|||
u8 targetId[MAX_LOGICAL_DRIVES_EXT];
|
||||
};
|
||||
|
||||
struct MR_HOST_DEVICE_LIST_ENTRY {
|
||||
struct {
|
||||
union {
|
||||
struct {
|
||||
#if defined(__BIG_ENDIAN_BITFIELD)
|
||||
u8 reserved:7;
|
||||
u8 is_sys_pd:1;
|
||||
#else
|
||||
u8 is_sys_pd:1;
|
||||
u8 reserved:7;
|
||||
#endif
|
||||
} bits;
|
||||
u8 byte;
|
||||
} u;
|
||||
} flags;
|
||||
u8 scsi_type;
|
||||
__le16 target_id;
|
||||
u8 reserved[4];
|
||||
__le64 sas_addr[2];
|
||||
} __packed;
|
||||
|
||||
struct MR_HOST_DEVICE_LIST {
|
||||
__le32 size;
|
||||
__le32 count;
|
||||
__le32 reserved[2];
|
||||
struct MR_HOST_DEVICE_LIST_ENTRY host_device_list[1];
|
||||
} __packed;
|
||||
|
||||
#define HOST_DEVICE_LIST_SZ (sizeof(struct MR_HOST_DEVICE_LIST) + \
|
||||
(sizeof(struct MR_HOST_DEVICE_LIST_ENTRY) * \
|
||||
(MEGASAS_MAX_PD + MAX_LOGICAL_DRIVES_EXT - 1)))
|
||||
|
||||
|
||||
/*
|
||||
* SAS controller properties
|
||||
|
|
@ -854,8 +896,26 @@ struct megasas_ctrl_prop {
|
|||
u32 reserved:18;
|
||||
#endif
|
||||
} OnOffProperties;
|
||||
u8 autoSnapVDSpace;
|
||||
u8 viewSpace;
|
||||
|
||||
union {
|
||||
u8 autoSnapVDSpace;
|
||||
u8 viewSpace;
|
||||
struct {
|
||||
#if defined(__BIG_ENDIAN_BITFIELD)
|
||||
u16 reserved3:9;
|
||||
u16 enable_fw_dev_list:1;
|
||||
u16 reserved2:1;
|
||||
u16 enable_snap_dump:1;
|
||||
u16 reserved1:4;
|
||||
#else
|
||||
u16 reserved1:4;
|
||||
u16 enable_snap_dump:1;
|
||||
u16 reserved2:1;
|
||||
u16 enable_fw_dev_list:1;
|
||||
u16 reserved3:9;
|
||||
#endif
|
||||
} on_off_properties2;
|
||||
};
|
||||
__le16 spinDownTime;
|
||||
u8 reserved[24];
|
||||
} __packed;
|
||||
|
|
@ -1348,7 +1408,13 @@ struct megasas_ctrl_info {
|
|||
|
||||
struct {
|
||||
#if defined(__BIG_ENDIAN_BITFIELD)
|
||||
u16 reserved:8;
|
||||
u16 reserved:2;
|
||||
u16 support_nvme_passthru:1;
|
||||
u16 support_pl_debug_info:1;
|
||||
u16 support_flash_comp_info:1;
|
||||
u16 support_host_info:1;
|
||||
u16 support_dual_fw_update:1;
|
||||
u16 support_ssc_rev3:1;
|
||||
u16 fw_swaps_bbu_vpd_info:1;
|
||||
u16 support_pd_map_target_id:1;
|
||||
u16 support_ses_ctrl_in_multipathcfg:1;
|
||||
|
|
@ -1373,10 +1439,35 @@ struct megasas_ctrl_info {
|
|||
* provide the data in little endian order
|
||||
*/
|
||||
u16 fw_swaps_bbu_vpd_info:1;
|
||||
u16 reserved:8;
|
||||
u16 support_ssc_rev3:1;
|
||||
/* FW supports CacheCade 3.0, only one SSCD creation allowed */
|
||||
u16 support_dual_fw_update:1;
|
||||
/* FW supports dual firmware update feature */
|
||||
u16 support_host_info:1;
|
||||
/* FW supports MR_DCMD_CTRL_HOST_INFO_SET/GET */
|
||||
u16 support_flash_comp_info:1;
|
||||
/* FW supports MR_DCMD_CTRL_FLASH_COMP_INFO_GET */
|
||||
u16 support_pl_debug_info:1;
|
||||
/* FW supports retrieval of PL debug information through apps */
|
||||
u16 support_nvme_passthru:1;
|
||||
/* FW supports NVMe passthru commands */
|
||||
u16 reserved:2;
|
||||
#endif
|
||||
} adapter_operations4;
|
||||
u8 pad[0x800 - 0x7FE]; /* 0x7FE pad to 2K for expansion */
|
||||
|
||||
u32 size;
|
||||
u32 pad1;
|
||||
|
||||
u8 reserved6[64];
|
||||
|
||||
u32 rsvdForAdptOp[64];
|
||||
|
||||
u8 reserved7[3];
|
||||
|
||||
u8 TaskAbortTO; /* Timeout value in seconds used by Abort Task TM */
|
||||
u8 MaxResetTO; /* Max Supported Reset timeout in seconds. */
|
||||
u8 reserved8[3];
|
||||
} __packed;
|
||||
|
||||
/*
|
||||
|
|
@ -1448,7 +1539,7 @@ enum FW_BOOT_CONTEXT {
|
|||
#define MEGASAS_IOCTL_CMD 0
|
||||
#define MEGASAS_DEFAULT_CMD_TIMEOUT 90
|
||||
#define MEGASAS_THROTTLE_QUEUE_DEPTH 16
|
||||
#define MEGASAS_BLOCKED_CMD_TIMEOUT 60
|
||||
#define MEGASAS_DEFAULT_TM_TIMEOUT 50
|
||||
/*
|
||||
* FW reports the maximum of number of commands that it can accept (maximum
|
||||
* commands that can be outstanding) at any time. The driver must report a
|
||||
|
|
@ -1504,11 +1595,18 @@ enum FW_BOOT_CONTEXT {
|
|||
|
||||
#define MR_CAN_HANDLE_SYNC_CACHE_OFFSET 0X01000000
|
||||
|
||||
#define MR_CAN_HANDLE_64_BIT_DMA_OFFSET (1 << 25)
|
||||
|
||||
#define MEGASAS_WATCHDOG_THREAD_INTERVAL 1000
|
||||
#define MEGASAS_WAIT_FOR_NEXT_DMA_MSECS 20
|
||||
#define MEGASAS_WATCHDOG_WAIT_COUNT 50
|
||||
|
||||
enum MR_ADAPTER_TYPE {
|
||||
MFI_SERIES = 1,
|
||||
THUNDERBOLT_SERIES = 2,
|
||||
INVADER_SERIES = 3,
|
||||
VENTURA_SERIES = 4,
|
||||
AERO_SERIES = 5,
|
||||
};
|
||||
|
||||
/*
|
||||
|
|
@ -1548,11 +1646,10 @@ struct megasas_register_set {
|
|||
|
||||
u32 reserved_3[3]; /*00A4h*/
|
||||
|
||||
u32 outbound_scratch_pad ; /*00B0h*/
|
||||
u32 outbound_scratch_pad_2; /*00B4h*/
|
||||
u32 outbound_scratch_pad_3; /*00B8h*/
|
||||
u32 outbound_scratch_pad_4; /*00BCh*/
|
||||
|
||||
u32 outbound_scratch_pad_0; /*00B0h*/
|
||||
u32 outbound_scratch_pad_1; /*00B4h*/
|
||||
u32 outbound_scratch_pad_2; /*00B8h*/
|
||||
u32 outbound_scratch_pad_3; /*00BCh*/
|
||||
|
||||
u32 inbound_low_queue_port ; /*00C0h*/
|
||||
|
||||
|
|
@ -1624,7 +1721,10 @@ union megasas_sgl_frame {
|
|||
typedef union _MFI_CAPABILITIES {
|
||||
struct {
|
||||
#if defined(__BIG_ENDIAN_BITFIELD)
|
||||
u32 reserved:19;
|
||||
u32 reserved:16;
|
||||
u32 support_fw_exposed_dev_list:1;
|
||||
u32 support_nvme_passthru:1;
|
||||
u32 support_64bit_mode:1;
|
||||
u32 support_pd_map_target_id:1;
|
||||
u32 support_qd_throttling:1;
|
||||
u32 support_fp_rlbypass:1;
|
||||
|
|
@ -1652,7 +1752,10 @@ typedef union _MFI_CAPABILITIES {
|
|||
u32 support_fp_rlbypass:1;
|
||||
u32 support_qd_throttling:1;
|
||||
u32 support_pd_map_target_id:1;
|
||||
u32 reserved:19;
|
||||
u32 support_64bit_mode:1;
|
||||
u32 support_nvme_passthru:1;
|
||||
u32 support_fw_exposed_dev_list:1;
|
||||
u32 reserved:16;
|
||||
#endif
|
||||
} mfi_capabilities;
|
||||
__le32 reg;
|
||||
|
|
@ -1886,7 +1989,9 @@ struct MR_PRIV_DEVICE {
|
|||
bool is_tm_capable;
|
||||
bool tm_busy;
|
||||
atomic_t r1_ldio_hint;
|
||||
u8 interface_type;
|
||||
u8 interface_type;
|
||||
u8 task_abort_tmo;
|
||||
u8 target_reset_tmo;
|
||||
};
|
||||
struct megasas_cmd;
|
||||
|
||||
|
|
@ -2122,6 +2227,25 @@ struct megasas_instance {
|
|||
|
||||
u32 *crash_dump_buf;
|
||||
dma_addr_t crash_dump_h;
|
||||
|
||||
struct MR_PD_LIST *pd_list_buf;
|
||||
dma_addr_t pd_list_buf_h;
|
||||
|
||||
struct megasas_ctrl_info *ctrl_info_buf;
|
||||
dma_addr_t ctrl_info_buf_h;
|
||||
|
||||
struct MR_LD_LIST *ld_list_buf;
|
||||
dma_addr_t ld_list_buf_h;
|
||||
|
||||
struct MR_LD_TARGETID_LIST *ld_targetid_list_buf;
|
||||
dma_addr_t ld_targetid_list_buf_h;
|
||||
|
||||
struct MR_HOST_DEVICE_LIST *host_device_list_buf;
|
||||
dma_addr_t host_device_list_buf_h;
|
||||
|
||||
struct MR_SNAPDUMP_PROPERTIES *snapdump_prop;
|
||||
dma_addr_t snapdump_prop_h;
|
||||
|
||||
void *crash_buf[MAX_CRASH_DUMP_SIZE];
|
||||
unsigned int fw_crash_buffer_size;
|
||||
unsigned int fw_crash_state;
|
||||
|
|
@ -2168,7 +2292,6 @@ struct megasas_instance {
|
|||
struct megasas_evt_detail *evt_detail;
|
||||
dma_addr_t evt_detail_h;
|
||||
struct megasas_cmd *aen_cmd;
|
||||
struct mutex hba_mutex;
|
||||
struct semaphore ioctl_sem;
|
||||
|
||||
struct Scsi_Host *host;
|
||||
|
|
@ -2192,7 +2315,9 @@ struct megasas_instance {
|
|||
struct megasas_instance_template *instancet;
|
||||
struct tasklet_struct isr_tasklet;
|
||||
struct work_struct work_init;
|
||||
struct work_struct crash_init;
|
||||
struct delayed_work fw_fault_work;
|
||||
struct workqueue_struct *fw_fault_work_q;
|
||||
char fault_handler_work_q_name[48];
|
||||
|
||||
u8 flag;
|
||||
u8 unload;
|
||||
|
|
@ -2218,8 +2343,6 @@ struct megasas_instance {
|
|||
|
||||
/* Ptr to hba specific information */
|
||||
void *ctrl_context;
|
||||
u32 ctrl_context_pages;
|
||||
struct megasas_ctrl_info *ctrl_info;
|
||||
unsigned int msix_vectors;
|
||||
struct megasas_irq_context irq_context[MEGASAS_MAX_MSIX_QUEUES];
|
||||
u64 map_id;
|
||||
|
|
@ -2250,6 +2373,12 @@ struct megasas_instance {
|
|||
u8 r1_ldio_hint_default;
|
||||
u32 nvme_page_size;
|
||||
u8 adapter_type;
|
||||
bool consistent_mask_64bit;
|
||||
bool support_nvme_passthru;
|
||||
u8 task_abort_tmo;
|
||||
u8 max_reset_tmo;
|
||||
u8 snapdump_wait_time;
|
||||
u8 enable_fw_dev_list;
|
||||
};
|
||||
struct MR_LD_VF_MAP {
|
||||
u32 size;
|
||||
|
|
@ -2326,9 +2455,9 @@ struct megasas_instance_template {
|
|||
void (*enable_intr)(struct megasas_instance *);
|
||||
void (*disable_intr)(struct megasas_instance *);
|
||||
|
||||
int (*clear_intr)(struct megasas_register_set __iomem *);
|
||||
int (*clear_intr)(struct megasas_instance *);
|
||||
|
||||
u32 (*read_fw_status_reg)(struct megasas_register_set __iomem *);
|
||||
u32 (*read_fw_status_reg)(struct megasas_instance *);
|
||||
int (*adp_reset)(struct megasas_instance *, \
|
||||
struct megasas_register_set __iomem *);
|
||||
int (*check_reset)(struct megasas_instance *, \
|
||||
|
|
@ -2471,11 +2600,15 @@ int megasas_get_ctrl_info(struct megasas_instance *instance);
|
|||
/* PD sequence */
|
||||
int
|
||||
megasas_sync_pd_seq_num(struct megasas_instance *instance, bool pend);
|
||||
void megasas_set_dynamic_target_properties(struct scsi_device *sdev);
|
||||
void megasas_set_dynamic_target_properties(struct scsi_device *sdev,
|
||||
bool is_target_prop);
|
||||
int megasas_get_target_prop(struct megasas_instance *instance,
|
||||
struct scsi_device *sdev);
|
||||
void megasas_get_snapdump_properties(struct megasas_instance *instance);
|
||||
|
||||
int megasas_set_crash_dump_params(struct megasas_instance *instance,
|
||||
u8 crash_buf_state);
|
||||
void megasas_free_host_crash_buffer(struct megasas_instance *instance);
|
||||
void megasas_fusion_crash_dump_wq(struct work_struct *work);
|
||||
|
||||
void megasas_return_cmd_fusion(struct megasas_instance *instance,
|
||||
struct megasas_cmd_fusion *cmd);
|
||||
|
|
@ -2496,4 +2629,10 @@ int megasas_reset_target_fusion(struct scsi_cmnd *scmd);
|
|||
u32 mega_mod64(u64 dividend, u32 divisor);
|
||||
int megasas_alloc_fusion_context(struct megasas_instance *instance);
|
||||
void megasas_free_fusion_context(struct megasas_instance *instance);
|
||||
int megasas_fusion_start_watchdog(struct megasas_instance *instance);
|
||||
void megasas_fusion_stop_watchdog(struct megasas_instance *instance);
|
||||
|
||||
void megasas_set_dma_settings(struct megasas_instance *instance,
|
||||
struct megasas_dcmd_frame *dcmd,
|
||||
dma_addr_t dma_addr, u32 dma_len);
|
||||
#endif /*LSI_MEGARAID_SAS_H */
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -2,7 +2,8 @@
|
|||
* Linux MegaRAID driver for SAS based RAID controllers
|
||||
*
|
||||
* Copyright (c) 2009-2013 LSI Corporation
|
||||
* Copyright (c) 2013-2014 Avago Technologies
|
||||
* Copyright (c) 2013-2016 Avago Technologies
|
||||
* Copyright (c) 2016-2018 Broadcom Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
|
|
@ -19,17 +20,14 @@
|
|||
*
|
||||
* FILE: megaraid_sas_fp.c
|
||||
*
|
||||
* Authors: Avago Technologies
|
||||
* Authors: Broadcom Inc.
|
||||
* Sumant Patro
|
||||
* Varad Talamacki
|
||||
* Manoj Jose
|
||||
* Kashyap Desai <kashyap.desai@avagotech.com>
|
||||
* Sumit Saxena <sumit.saxena@avagotech.com>
|
||||
* Kashyap Desai <kashyap.desai@broadcom.com>
|
||||
* Sumit Saxena <sumit.saxena@broadcom.com>
|
||||
*
|
||||
* Send feedback to: megaraidlinux.pdl@avagotech.com
|
||||
*
|
||||
* Mail to: Avago Technologies, 350 West Trimble Road, Building 90,
|
||||
* San Jose, California 95131
|
||||
* Send feedback to: megaraidlinux.pdl@broadcom.com
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
|
|
@ -168,7 +166,7 @@ static struct MR_LD_SPAN *MR_LdSpanPtrGet(u32 ld, u32 span,
|
|||
/*
|
||||
* This function will Populate Driver Map using firmware raid map
|
||||
*/
|
||||
static int MR_PopulateDrvRaidMap(struct megasas_instance *instance)
|
||||
static int MR_PopulateDrvRaidMap(struct megasas_instance *instance, u64 map_id)
|
||||
{
|
||||
struct fusion_context *fusion = instance->ctrl_context;
|
||||
struct MR_FW_RAID_MAP_ALL *fw_map_old = NULL;
|
||||
|
|
@ -181,7 +179,7 @@ static int MR_PopulateDrvRaidMap(struct megasas_instance *instance)
|
|||
|
||||
|
||||
struct MR_DRV_RAID_MAP_ALL *drv_map =
|
||||
fusion->ld_drv_map[(instance->map_id & 1)];
|
||||
fusion->ld_drv_map[(map_id & 1)];
|
||||
struct MR_DRV_RAID_MAP *pDrvRaidMap = &drv_map->raidMap;
|
||||
void *raid_map_data = NULL;
|
||||
|
||||
|
|
@ -190,7 +188,7 @@ static int MR_PopulateDrvRaidMap(struct megasas_instance *instance)
|
|||
0xff, (sizeof(u16) * MAX_LOGICAL_DRIVES_DYN));
|
||||
|
||||
if (instance->max_raid_mapsize) {
|
||||
fw_map_dyn = fusion->ld_map[(instance->map_id & 1)];
|
||||
fw_map_dyn = fusion->ld_map[(map_id & 1)];
|
||||
desc_table =
|
||||
(struct MR_RAID_MAP_DESC_TABLE *)((void *)fw_map_dyn + le32_to_cpu(fw_map_dyn->desc_table_offset));
|
||||
if (desc_table != fw_map_dyn->raid_map_desc_table)
|
||||
|
|
@ -255,7 +253,7 @@ static int MR_PopulateDrvRaidMap(struct megasas_instance *instance)
|
|||
|
||||
} else if (instance->supportmax256vd) {
|
||||
fw_map_ext =
|
||||
(struct MR_FW_RAID_MAP_EXT *)fusion->ld_map[(instance->map_id & 1)];
|
||||
(struct MR_FW_RAID_MAP_EXT *)fusion->ld_map[(map_id & 1)];
|
||||
ld_count = (u16)le16_to_cpu(fw_map_ext->ldCount);
|
||||
if (ld_count > MAX_LOGICAL_DRIVES_EXT) {
|
||||
dev_dbg(&instance->pdev->dev, "megaraid_sas: LD count exposed in RAID map in not valid\n");
|
||||
|
|
@ -282,7 +280,7 @@ static int MR_PopulateDrvRaidMap(struct megasas_instance *instance)
|
|||
cpu_to_le32(sizeof(struct MR_FW_RAID_MAP_EXT));
|
||||
} else {
|
||||
fw_map_old = (struct MR_FW_RAID_MAP_ALL *)
|
||||
fusion->ld_map[(instance->map_id & 1)];
|
||||
fusion->ld_map[(map_id & 1)];
|
||||
pFwRaidMap = &fw_map_old->raidMap;
|
||||
ld_count = (u16)le32_to_cpu(pFwRaidMap->ldCount);
|
||||
if (ld_count > MAX_LOGICAL_DRIVES) {
|
||||
|
|
@ -313,7 +311,7 @@ static int MR_PopulateDrvRaidMap(struct megasas_instance *instance)
|
|||
/*
|
||||
* This function will validate Map info data provided by FW
|
||||
*/
|
||||
u8 MR_ValidateMapInfo(struct megasas_instance *instance)
|
||||
u8 MR_ValidateMapInfo(struct megasas_instance *instance, u64 map_id)
|
||||
{
|
||||
struct fusion_context *fusion;
|
||||
struct MR_DRV_RAID_MAP_ALL *drv_map;
|
||||
|
|
@ -325,11 +323,11 @@ u8 MR_ValidateMapInfo(struct megasas_instance *instance)
|
|||
u16 ld;
|
||||
u32 expected_size;
|
||||
|
||||
if (MR_PopulateDrvRaidMap(instance))
|
||||
if (MR_PopulateDrvRaidMap(instance, map_id))
|
||||
return 0;
|
||||
|
||||
fusion = instance->ctrl_context;
|
||||
drv_map = fusion->ld_drv_map[(instance->map_id & 1)];
|
||||
drv_map = fusion->ld_drv_map[(map_id & 1)];
|
||||
pDrvRaidMap = &drv_map->raidMap;
|
||||
|
||||
lbInfo = fusion->load_balance_info;
|
||||
|
|
@ -745,7 +743,7 @@ static u8 mr_spanset_get_phy_params(struct megasas_instance *instance, u32 ld,
|
|||
*pDevHandle = MR_PdDevHandleGet(pd, map);
|
||||
*pPdInterface = MR_PdInterfaceTypeGet(pd, map);
|
||||
/* get second pd also for raid 1/10 fast path writes*/
|
||||
if ((instance->adapter_type == VENTURA_SERIES) &&
|
||||
if ((instance->adapter_type >= VENTURA_SERIES) &&
|
||||
(raid->level == 1) &&
|
||||
!io_info->isRead) {
|
||||
r1_alt_pd = MR_ArPdGet(arRef, physArm + 1, map);
|
||||
|
|
@ -770,7 +768,7 @@ static u8 mr_spanset_get_phy_params(struct megasas_instance *instance, u32 ld,
|
|||
}
|
||||
|
||||
*pdBlock += stripRef + le64_to_cpu(MR_LdSpanPtrGet(ld, span, map)->startBlk);
|
||||
if (instance->adapter_type == VENTURA_SERIES) {
|
||||
if (instance->adapter_type >= VENTURA_SERIES) {
|
||||
((struct RAID_CONTEXT_G35 *)pRAID_Context)->span_arm =
|
||||
(span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
|
||||
io_info->span_arm =
|
||||
|
|
@ -861,7 +859,7 @@ u8 MR_GetPhyParams(struct megasas_instance *instance, u32 ld, u64 stripRow,
|
|||
*pDevHandle = MR_PdDevHandleGet(pd, map);
|
||||
*pPdInterface = MR_PdInterfaceTypeGet(pd, map);
|
||||
/* get second pd also for raid 1/10 fast path writes*/
|
||||
if ((instance->adapter_type == VENTURA_SERIES) &&
|
||||
if ((instance->adapter_type >= VENTURA_SERIES) &&
|
||||
(raid->level == 1) &&
|
||||
!io_info->isRead) {
|
||||
r1_alt_pd = MR_ArPdGet(arRef, physArm + 1, map);
|
||||
|
|
@ -888,7 +886,7 @@ u8 MR_GetPhyParams(struct megasas_instance *instance, u32 ld, u64 stripRow,
|
|||
}
|
||||
|
||||
*pdBlock += stripRef + le64_to_cpu(MR_LdSpanPtrGet(ld, span, map)->startBlk);
|
||||
if (instance->adapter_type == VENTURA_SERIES) {
|
||||
if (instance->adapter_type >= VENTURA_SERIES) {
|
||||
((struct RAID_CONTEXT_G35 *)pRAID_Context)->span_arm =
|
||||
(span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
|
||||
io_info->span_arm =
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -2,7 +2,8 @@
|
|||
* Linux MegaRAID driver for SAS based RAID controllers
|
||||
*
|
||||
* Copyright (c) 2009-2013 LSI Corporation
|
||||
* Copyright (c) 2013-2014 Avago Technologies
|
||||
* Copyright (c) 2013-2016 Avago Technologies
|
||||
* Copyright (c) 2016-2018 Broadcom Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
|
|
@ -19,16 +20,13 @@
|
|||
*
|
||||
* FILE: megaraid_sas_fusion.h
|
||||
*
|
||||
* Authors: Avago Technologies
|
||||
* Authors: Broadcom Inc.
|
||||
* Manoj Jose
|
||||
* Sumant Patro
|
||||
* Kashyap Desai <kashyap.desai@avagotech.com>
|
||||
* Sumit Saxena <sumit.saxena@avagotech.com>
|
||||
* Kashyap Desai <kashyap.desai@broadcom.com>
|
||||
* Sumit Saxena <sumit.saxena@broadcom.com>
|
||||
*
|
||||
* Send feedback to: megaraidlinux.pdl@avagotech.com
|
||||
*
|
||||
* Mail to: Avago Technologies, 350 West Trimble Road, Building 90,
|
||||
* San Jose, California 95131
|
||||
* Send feedback to: megaraidlinux.pdl@broadcom.com
|
||||
*/
|
||||
|
||||
#ifndef _MEGARAID_SAS_FUSION_H_
|
||||
|
|
@ -51,6 +49,8 @@
|
|||
#define HOST_DIAG_RESET_ADAPTER 0x4
|
||||
#define MEGASAS_FUSION_MAX_RESET_TRIES 3
|
||||
#define MAX_MSIX_QUEUES_FUSION 128
|
||||
#define RDPQ_MAX_INDEX_IN_ONE_CHUNK 16
|
||||
#define RDPQ_MAX_CHUNK_COUNT (MAX_MSIX_QUEUES_FUSION / RDPQ_MAX_INDEX_IN_ONE_CHUNK)
|
||||
|
||||
/* Invader defines */
|
||||
#define MPI2_TYPE_CUDA 0x2
|
||||
|
|
@ -103,6 +103,8 @@ enum MR_RAID_FLAGS_IO_SUB_TYPE {
|
|||
#define THRESHOLD_REPLY_COUNT 50
|
||||
#define RAID_1_PEER_CMDS 2
|
||||
#define JBOD_MAPS_COUNT 2
|
||||
#define MEGASAS_REDUCE_QD_COUNT 64
|
||||
#define IOC_INIT_FRAME_SIZE 4096
|
||||
|
||||
/*
|
||||
* Raid Context structure which describes MegaRAID specific IO Parameters
|
||||
|
|
@ -721,6 +723,8 @@ struct MPI2_IOC_INIT_REQUEST {
|
|||
#define MR_DCMD_CTRL_SHARED_HOST_MEM_ALLOC 0x010e8485 /* SR-IOV HB alloc*/
|
||||
#define MR_DCMD_LD_VF_MAP_GET_ALL_LDS_111 0x03200200
|
||||
#define MR_DCMD_LD_VF_MAP_GET_ALL_LDS 0x03150200
|
||||
#define MR_DCMD_CTRL_SNAPDUMP_GET_PROPERTIES 0x01200100
|
||||
#define MR_DCMD_CTRL_DEVICE_LIST_GET 0x01190600
|
||||
|
||||
struct MR_DEV_HANDLE_INFO {
|
||||
__le16 curDevHdl;
|
||||
|
|
@ -1059,6 +1063,9 @@ struct MR_FW_RAID_MAP_DYNAMIC {
|
|||
#define MPI26_IEEE_SGE_FLAGS_NSF_NVME_PRP (0x08)
|
||||
#define MPI26_IEEE_SGE_FLAGS_NSF_NVME_SGL (0x10)
|
||||
|
||||
#define MEGASAS_DEFAULT_SNAP_DUMP_WAIT_TIME 15
|
||||
#define MEGASAS_MAX_SNAP_DUMP_WAIT_TIME 60
|
||||
|
||||
struct megasas_register_set;
|
||||
struct megasas_instance;
|
||||
|
||||
|
|
@ -1264,6 +1271,12 @@ struct MPI2_IOC_INIT_RDPQ_ARRAY_ENTRY {
|
|||
u32 Reserved2;
|
||||
};
|
||||
|
||||
struct rdpq_alloc_detail {
|
||||
struct dma_pool *dma_pool_ptr;
|
||||
dma_addr_t pool_entry_phys;
|
||||
union MPI2_REPLY_DESCRIPTORS_UNION *pool_entry_virt;
|
||||
};
|
||||
|
||||
struct fusion_context {
|
||||
struct megasas_cmd_fusion **cmd_list;
|
||||
dma_addr_t req_frames_desc_phys;
|
||||
|
|
@ -1276,9 +1289,14 @@ struct fusion_context {
|
|||
struct dma_pool *sg_dma_pool;
|
||||
struct dma_pool *sense_dma_pool;
|
||||
|
||||
u8 *sense;
|
||||
dma_addr_t sense_phys_addr;
|
||||
|
||||
dma_addr_t reply_frames_desc_phys[MAX_MSIX_QUEUES_FUSION];
|
||||
union MPI2_REPLY_DESCRIPTORS_UNION *reply_frames_desc[MAX_MSIX_QUEUES_FUSION];
|
||||
struct rdpq_alloc_detail rdpq_tracker[RDPQ_MAX_CHUNK_COUNT];
|
||||
struct dma_pool *reply_frames_desc_pool;
|
||||
struct dma_pool *reply_frames_desc_pool_align;
|
||||
|
||||
u16 last_reply_idx[MAX_MSIX_QUEUES_FUSION];
|
||||
|
||||
|
|
@ -1312,8 +1330,13 @@ struct fusion_context {
|
|||
u8 fast_path_io;
|
||||
struct LD_LOAD_BALANCE_INFO *load_balance_info;
|
||||
u32 load_balance_info_pages;
|
||||
LD_SPAN_INFO log_to_span[MAX_LOGICAL_DRIVES_EXT];
|
||||
LD_SPAN_INFO *log_to_span;
|
||||
u32 log_to_span_pages;
|
||||
struct LD_STREAM_DETECT **stream_detect_by_ld;
|
||||
dma_addr_t ioc_init_request_phys;
|
||||
struct MPI2_IOC_INIT_REQUEST *ioc_init_request;
|
||||
struct megasas_cmd *ioc_init_cmd;
|
||||
|
||||
};
|
||||
|
||||
union desc_value {
|
||||
|
|
@ -1324,6 +1347,20 @@ union desc_value {
|
|||
} u;
|
||||
};
|
||||
|
||||
enum CMD_RET_VALUES {
|
||||
REFIRE_CMD = 1,
|
||||
COMPLETE_CMD = 2,
|
||||
RETURN_CMD = 3,
|
||||
};
|
||||
|
||||
struct MR_SNAPDUMP_PROPERTIES {
|
||||
u8 offload_num;
|
||||
u8 max_num_supported;
|
||||
u8 cur_num_supported;
|
||||
u8 trigger_min_num_sec_before_ocr;
|
||||
u8 reserved[12];
|
||||
};
|
||||
|
||||
void megasas_free_cmds_fusion(struct megasas_instance *instance);
|
||||
int megasas_ioc_init_fusion(struct megasas_instance *instance);
|
||||
u8 megasas_get_map_info(struct megasas_instance *instance);
|
||||
|
|
|
|||
Loading…
Reference in New Issue