board_perf:add support for fire stm32h743iit6 board

Gd32f310gstart

arch/arm/arm-v6m/cortex-m0/armcc/port_c.c

@@ -1,3 +1,20 @@
+/*----------------------------------------------------------------------------
+ * Tencent is pleased to support the open source community by making TencentOS
+ * available.
+ *
+ * Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
+ * If you have downloaded a copy of the TencentOS binary from Tencent, please
+ * note that the TencentOS binary is licensed under the BSD 3-Clause License.
+ *
+ * If you have downloaded a copy of the TencentOS source code from Tencent,
+ * please note that TencentOS source code is licensed under the BSD 3-Clause
+ * License, except for the third-party components listed below which are
+ * subject to different license terms. Your integration of TencentOS into your
+ * own projects may require compliance with the BSD 3-Clause License, as well
+ * as the other licenses applicable to the third-party components included
+ * within TencentOS.
+ *---------------------------------------------------------------------------*/
+
 #include "tos_k.h"
 #include "core_cm0.h"
 

arch/arm/arm-v6m/cortex-m0/gcc/port_c.c

@@ -1,3 +1,20 @@
+/*----------------------------------------------------------------------------
+ * Tencent is pleased to support the open source community by making TencentOS
+ * available.
+ *
+ * Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
+ * If you have downloaded a copy of the TencentOS binary from Tencent, please
+ * note that the TencentOS binary is licensed under the BSD 3-Clause License.
+ *
+ * If you have downloaded a copy of the TencentOS source code from Tencent,
+ * please note that TencentOS source code is licensed under the BSD 3-Clause
+ * License, except for the third-party components listed below which are
+ * subject to different license terms. Your integration of TencentOS into your
+ * own projects may require compliance with the BSD 3-Clause License, as well
+ * as the other licenses applicable to the third-party components included
+ * within TencentOS.
+ *---------------------------------------------------------------------------*/
+ 
 #include "tos_k.h"
 #include "core_cm0.h"
 

arch/arm/arm-v6m/cortex-m0/iccarm/port_c.c

@@ -1,3 +1,20 @@
+/*----------------------------------------------------------------------------
+ * Tencent is pleased to support the open source community by making TencentOS
+ * available.
+ *
+ * Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
+ * If you have downloaded a copy of the TencentOS binary from Tencent, please
+ * note that the TencentOS binary is licensed under the BSD 3-Clause License.
+ *
+ * If you have downloaded a copy of the TencentOS source code from Tencent,
+ * please note that TencentOS source code is licensed under the BSD 3-Clause
+ * License, except for the third-party components listed below which are
+ * subject to different license terms. Your integration of TencentOS into your
+ * own projects may require compliance with the BSD 3-Clause License, as well
+ * as the other licenses applicable to the third-party components included
+ * within TencentOS.
+ *---------------------------------------------------------------------------*/
+
 #include "tos_k.h"
 #include "core_cm0.h"
 

board/ALIENTEK_EXPLORER_STM32F407ZGT6/KEIL/modbus/startup_stm32f407xx.s

@@ -1,438 +0,0 @@
-;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
-;* File Name          : startup_stm32f407xx.s
-;* Author             : MCD Application Team
-;* Description        : STM32F407xx devices vector table for MDK-ARM toolchain. 
-;*                      This module performs:
-;*                      - Set the initial SP
-;*                      - Set the initial PC == Reset_Handler
-;*                      - Set the vector table entries with the exceptions ISR address
-;*                      - Branches to __main in the C library (which eventually
-;*                        calls main()).
-;*                      After Reset the CortexM4 processor is in Thread mode,
-;*                      priority is Privileged, and the Stack is set to Main.
-;* <<< Use Configuration Wizard in Context Menu >>>   
-;*******************************************************************************
-; 
-;* Redistribution and use in source and binary forms, with or without modification,
-;* are permitted provided that the following conditions are met:
-;*   1. Redistributions of source code must retain the above copyright notice,
-;*      this list of conditions and the following disclaimer.
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
-;*      this list of conditions and the following disclaimer in the documentation
-;*      and/or other materials provided with the distribution.
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
-;*      may be used to endorse or promote products derived from this software
-;*      without specific prior written permission.
-;*
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-; 
-;*******************************************************************************
-
-; Amount of memory (in bytes) allocated for Stack
-; Tailor this value to your application needs
-; <h> Stack Configuration
-;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Stack_Size		EQU     0x400
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-
-
-; <h> Heap Configuration
-;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Heap_Size      EQU     0x200
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
-                PRESERVE8
-                THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
-                AREA    RESET, DATA, READONLY
-                EXPORT  __Vectors
-                EXPORT  __Vectors_End
-                EXPORT  __Vectors_Size
-
-__Vectors       DCD     __initial_sp               ; Top of Stack
-                DCD     Reset_Handler              ; Reset Handler
-                DCD     NMI_Handler                ; NMI Handler
-                DCD     HardFault_Handler          ; Hard Fault Handler
-                DCD     MemManage_Handler          ; MPU Fault Handler
-                DCD     BusFault_Handler           ; Bus Fault Handler
-                DCD     UsageFault_Handler         ; Usage Fault Handler
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     0                          ; Reserved
-                DCD     SVC_Handler                ; SVCall Handler
-                DCD     DebugMon_Handler           ; Debug Monitor Handler
-                DCD     0                          ; Reserved
-                DCD     PendSV_Handler             ; PendSV Handler
-                DCD     SysTick_Handler            ; SysTick Handler
-
-                ; External Interrupts
-                DCD     WWDG_IRQHandler                   ; Window WatchDog                                        
-                DCD     PVD_IRQHandler                    ; PVD through EXTI Line detection                        
-                DCD     TAMP_STAMP_IRQHandler             ; Tamper and TimeStamps through the EXTI line            
-                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line                       
-                DCD     FLASH_IRQHandler                  ; FLASH                                           
-                DCD     RCC_IRQHandler                    ; RCC                                             
-                DCD     EXTI0_IRQHandler                  ; EXTI Line0                                             
-                DCD     EXTI1_IRQHandler                  ; EXTI Line1                                             
-                DCD     EXTI2_IRQHandler                  ; EXTI Line2                                             
-                DCD     EXTI3_IRQHandler                  ; EXTI Line3                                             
-                DCD     EXTI4_IRQHandler                  ; EXTI Line4                                             
-                DCD     DMA1_Stream0_IRQHandler           ; DMA1 Stream 0                                   
-                DCD     DMA1_Stream1_IRQHandler           ; DMA1 Stream 1                                   
-                DCD     DMA1_Stream2_IRQHandler           ; DMA1 Stream 2                                   
-                DCD     DMA1_Stream3_IRQHandler           ; DMA1 Stream 3                                   
-                DCD     DMA1_Stream4_IRQHandler           ; DMA1 Stream 4                                   
-                DCD     DMA1_Stream5_IRQHandler           ; DMA1 Stream 5                                   
-                DCD     DMA1_Stream6_IRQHandler           ; DMA1 Stream 6                                   
-                DCD     ADC_IRQHandler                    ; ADC1, ADC2 and ADC3s                            
-                DCD     CAN1_TX_IRQHandler                ; CAN1 TX                                                
-                DCD     CAN1_RX0_IRQHandler               ; CAN1 RX0                                               
-                DCD     CAN1_RX1_IRQHandler               ; CAN1 RX1                                               
-                DCD     CAN1_SCE_IRQHandler               ; CAN1 SCE                                               
-                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s                                    
-                DCD     TIM1_BRK_TIM9_IRQHandler          ; TIM1 Break and TIM9                   
-                DCD     TIM1_UP_TIM10_IRQHandler          ; TIM1 Update and TIM10                 
-                DCD     TIM1_TRG_COM_TIM11_IRQHandler     ; TIM1 Trigger and Commutation and TIM11
-                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare                                   
-                DCD     TIM2_IRQHandler                   ; TIM2                                            
-                DCD     TIM3_IRQHandler                   ; TIM3                                            
-                DCD     TIM4_IRQHandler                   ; TIM4                                            
-                DCD     I2C1_EV_IRQHandler                ; I2C1 Event                                             
-                DCD     I2C1_ER_IRQHandler                ; I2C1 Error                                             
-                DCD     I2C2_EV_IRQHandler                ; I2C2 Event                                             
-                DCD     I2C2_ER_IRQHandler                ; I2C2 Error                                               
-                DCD     SPI1_IRQHandler                   ; SPI1                                            
-                DCD     SPI2_IRQHandler                   ; SPI2                                            
-                DCD     USART1_IRQHandler                 ; USART1                                          
-                DCD     USART2_IRQHandler                 ; USART2                                          
-                DCD     USART3_IRQHandler                 ; USART3                                          
-                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]s                                  
-                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line                  
-                DCD     OTG_FS_WKUP_IRQHandler            ; USB OTG FS Wakeup through EXTI line                        
-                DCD     TIM8_BRK_TIM12_IRQHandler         ; TIM8 Break and TIM12                  
-                DCD     TIM8_UP_TIM13_IRQHandler          ; TIM8 Update and TIM13                 
-                DCD     TIM8_TRG_COM_TIM14_IRQHandler     ; TIM8 Trigger and Commutation and TIM14
-                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare                                   
-                DCD     DMA1_Stream7_IRQHandler           ; DMA1 Stream7                                           
-                DCD     FMC_IRQHandler                    ; FMC                                             
-                DCD     SDIO_IRQHandler                   ; SDIO                                            
-                DCD     TIM5_IRQHandler                   ; TIM5                                            
-                DCD     SPI3_IRQHandler                   ; SPI3                                            
-                DCD     UART4_IRQHandler                  ; UART4                                           
-                DCD     UART5_IRQHandler                  ; UART5                                           
-                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&2 underrun errors                   
-                DCD     TIM7_IRQHandler                   ; TIM7                   
-                DCD     DMA2_Stream0_IRQHandler           ; DMA2 Stream 0                                   
-                DCD     DMA2_Stream1_IRQHandler           ; DMA2 Stream 1                                   
-                DCD     DMA2_Stream2_IRQHandler           ; DMA2 Stream 2                                   
-                DCD     DMA2_Stream3_IRQHandler           ; DMA2 Stream 3                                   
-                DCD     DMA2_Stream4_IRQHandler           ; DMA2 Stream 4                                   
-                DCD     ETH_IRQHandler                    ; Ethernet                                        
-                DCD     ETH_WKUP_IRQHandler               ; Ethernet Wakeup through EXTI line                      
-                DCD     CAN2_TX_IRQHandler                ; CAN2 TX                                                
-                DCD     CAN2_RX0_IRQHandler               ; CAN2 RX0                                               
-                DCD     CAN2_RX1_IRQHandler               ; CAN2 RX1                                               
-                DCD     CAN2_SCE_IRQHandler               ; CAN2 SCE                                               
-                DCD     OTG_FS_IRQHandler                 ; USB OTG FS                                      
-                DCD     DMA2_Stream5_IRQHandler           ; DMA2 Stream 5                                   
-                DCD     DMA2_Stream6_IRQHandler           ; DMA2 Stream 6                                   
-                DCD     DMA2_Stream7_IRQHandler           ; DMA2 Stream 7                                   
-                DCD     USART6_IRQHandler                 ; USART6                                           
-                DCD     I2C3_EV_IRQHandler                ; I2C3 event                                             
-                DCD     I2C3_ER_IRQHandler                ; I2C3 error                                             
-                DCD     OTG_HS_EP1_OUT_IRQHandler         ; USB OTG HS End Point 1 Out                      
-                DCD     OTG_HS_EP1_IN_IRQHandler          ; USB OTG HS End Point 1 In                       
-                DCD     OTG_HS_WKUP_IRQHandler            ; USB OTG HS Wakeup through EXTI                         
-                DCD     OTG_HS_IRQHandler                 ; USB OTG HS                                      
-                DCD     DCMI_IRQHandler                   ; DCMI  
-                DCD     0                                 ; Reserved				                              
-                DCD     HASH_RNG_IRQHandler               ; Hash and Rng
-                DCD     FPU_IRQHandler                    ; FPU
-                
-                                         
-__Vectors_End
-
-__Vectors_Size  EQU  __Vectors_End - __Vectors
-
-                AREA    |.text|, CODE, READONLY
-
-; Reset handler
-Reset_Handler    PROC
-                 EXPORT  Reset_Handler             [WEAK]
-        IMPORT  SystemInit
-        IMPORT  __main
-
-                 LDR     R0, =SystemInit
-                 BLX     R0
-                 LDR     R0, =__main
-                 BX      R0
-                 ENDP
-
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler     PROC
-                EXPORT  NMI_Handler                [WEAK]
-                B       .
-                ENDP
-HardFault_Handler\
-                PROC
-                EXPORT  HardFault_Handler          [WEAK]
-                B       .
-                ENDP
-MemManage_Handler\
-                PROC
-                EXPORT  MemManage_Handler          [WEAK]
-                B       .
-                ENDP
-BusFault_Handler\
-                PROC
-                EXPORT  BusFault_Handler           [WEAK]
-                B       .
-                ENDP
-UsageFault_Handler\
-                PROC
-                EXPORT  UsageFault_Handler         [WEAK]
-                B       .
-                ENDP
-SVC_Handler     PROC
-                EXPORT  SVC_Handler                [WEAK]
-                B       .
-                ENDP
-DebugMon_Handler\
-                PROC
-                EXPORT  DebugMon_Handler           [WEAK]
-                B       .
-                ENDP
-PendSV_Handler  PROC
-                EXPORT  PendSV_Handler             [WEAK]
-                B       .
-                ENDP
-SysTick_Handler PROC
-                EXPORT  SysTick_Handler            [WEAK]
-                B       .
-                ENDP
-
-Default_Handler PROC
-
-                EXPORT  WWDG_IRQHandler                   [WEAK]                                        
-                EXPORT  PVD_IRQHandler                    [WEAK]                      
-                EXPORT  TAMP_STAMP_IRQHandler             [WEAK]         
-                EXPORT  RTC_WKUP_IRQHandler               [WEAK]                     
-                EXPORT  FLASH_IRQHandler                  [WEAK]                                         
-                EXPORT  RCC_IRQHandler                    [WEAK]                                            
-                EXPORT  EXTI0_IRQHandler                  [WEAK]                                            
-                EXPORT  EXTI1_IRQHandler                  [WEAK]                                             
-                EXPORT  EXTI2_IRQHandler                  [WEAK]                                            
-                EXPORT  EXTI3_IRQHandler                  [WEAK]                                           
-                EXPORT  EXTI4_IRQHandler                  [WEAK]                                            
-                EXPORT  DMA1_Stream0_IRQHandler           [WEAK]                                
-                EXPORT  DMA1_Stream1_IRQHandler           [WEAK]                                   
-                EXPORT  DMA1_Stream2_IRQHandler           [WEAK]                                   
-                EXPORT  DMA1_Stream3_IRQHandler           [WEAK]                                   
-                EXPORT  DMA1_Stream4_IRQHandler           [WEAK]                                   
-                EXPORT  DMA1_Stream5_IRQHandler           [WEAK]                                   
-                EXPORT  DMA1_Stream6_IRQHandler           [WEAK]                                   
-                EXPORT  ADC_IRQHandler                    [WEAK]                         
-                EXPORT  CAN1_TX_IRQHandler                [WEAK]                                                
-                EXPORT  CAN1_RX0_IRQHandler               [WEAK]                                               
-                EXPORT  CAN1_RX1_IRQHandler               [WEAK]                                                
-                EXPORT  CAN1_SCE_IRQHandler               [WEAK]                                                
-                EXPORT  EXTI9_5_IRQHandler                [WEAK]                                    
-                EXPORT  TIM1_BRK_TIM9_IRQHandler          [WEAK]                  
-                EXPORT  TIM1_UP_TIM10_IRQHandler          [WEAK]                
-                EXPORT  TIM1_TRG_COM_TIM11_IRQHandler     [WEAK] 
-                EXPORT  TIM1_CC_IRQHandler                [WEAK]                                   
-                EXPORT  TIM2_IRQHandler                   [WEAK]                                            
-                EXPORT  TIM3_IRQHandler                   [WEAK]                                            
-                EXPORT  TIM4_IRQHandler                   [WEAK]                                            
-                EXPORT  I2C1_EV_IRQHandler                [WEAK]                                             
-                EXPORT  I2C1_ER_IRQHandler                [WEAK]                                             
-                EXPORT  I2C2_EV_IRQHandler                [WEAK]                                            
-                EXPORT  I2C2_ER_IRQHandler                [WEAK]                                               
-                EXPORT  SPI1_IRQHandler                   [WEAK]                                           
-                EXPORT  SPI2_IRQHandler                   [WEAK]                                            
-                EXPORT  USART1_IRQHandler                 [WEAK]                                          
-                EXPORT  USART2_IRQHandler                 [WEAK]                                          
-                EXPORT  USART3_IRQHandler                 [WEAK]                                         
-                EXPORT  EXTI15_10_IRQHandler              [WEAK]                                  
-                EXPORT  RTC_Alarm_IRQHandler              [WEAK]                  
-                EXPORT  OTG_FS_WKUP_IRQHandler            [WEAK]                        
-                EXPORT  TIM8_BRK_TIM12_IRQHandler         [WEAK]                 
-                EXPORT  TIM8_UP_TIM13_IRQHandler          [WEAK]                 
-                EXPORT  TIM8_TRG_COM_TIM14_IRQHandler     [WEAK] 
-                EXPORT  TIM8_CC_IRQHandler                [WEAK]                                   
-                EXPORT  DMA1_Stream7_IRQHandler           [WEAK]                                          
-                EXPORT  FMC_IRQHandler                    [WEAK]                                             
-                EXPORT  SDIO_IRQHandler                   [WEAK]                                             
-                EXPORT  TIM5_IRQHandler                   [WEAK]                                             
-                EXPORT  SPI3_IRQHandler                   [WEAK]                                             
-                EXPORT  UART4_IRQHandler                  [WEAK]                                            
-                EXPORT  UART5_IRQHandler                  [WEAK]                                            
-                EXPORT  TIM6_DAC_IRQHandler               [WEAK]                   
-                EXPORT  TIM7_IRQHandler                   [WEAK]                    
-                EXPORT  DMA2_Stream0_IRQHandler           [WEAK]                                  
-                EXPORT  DMA2_Stream1_IRQHandler           [WEAK]                                   
-                EXPORT  DMA2_Stream2_IRQHandler           [WEAK]                                    
-                EXPORT  DMA2_Stream3_IRQHandler           [WEAK]                                    
-                EXPORT  DMA2_Stream4_IRQHandler           [WEAK]                                 
-                EXPORT  ETH_IRQHandler                    [WEAK]                                         
-                EXPORT  ETH_WKUP_IRQHandler               [WEAK]                     
-                EXPORT  CAN2_TX_IRQHandler                [WEAK]                                               
-                EXPORT  CAN2_RX0_IRQHandler               [WEAK]                                               
-                EXPORT  CAN2_RX1_IRQHandler               [WEAK]                                               
-                EXPORT  CAN2_SCE_IRQHandler               [WEAK]                                               
-                EXPORT  OTG_FS_IRQHandler                 [WEAK]                                       
-                EXPORT  DMA2_Stream5_IRQHandler           [WEAK]                                   
-                EXPORT  DMA2_Stream6_IRQHandler           [WEAK]                                   
-                EXPORT  DMA2_Stream7_IRQHandler           [WEAK]                                   
-                EXPORT  USART6_IRQHandler                 [WEAK]                                           
-                EXPORT  I2C3_EV_IRQHandler                [WEAK]                                              
-                EXPORT  I2C3_ER_IRQHandler                [WEAK]                                              
-                EXPORT  OTG_HS_EP1_OUT_IRQHandler         [WEAK]                      
-                EXPORT  OTG_HS_EP1_IN_IRQHandler          [WEAK]                      
-                EXPORT  OTG_HS_WKUP_IRQHandler            [WEAK]                        
-                EXPORT  OTG_HS_IRQHandler                 [WEAK]                                      
-                EXPORT  DCMI_IRQHandler                   [WEAK]                                                                                 
-                EXPORT  HASH_RNG_IRQHandler               [WEAK]
-                EXPORT  FPU_IRQHandler                    [WEAK]
-                
-WWDG_IRQHandler                                                       
-PVD_IRQHandler                                      
-TAMP_STAMP_IRQHandler                  
-RTC_WKUP_IRQHandler                                
-FLASH_IRQHandler                                                       
-RCC_IRQHandler                                                            
-EXTI0_IRQHandler                                                          
-EXTI1_IRQHandler                                                           
-EXTI2_IRQHandler                                                          
-EXTI3_IRQHandler                                                         
-EXTI4_IRQHandler                                                          
-DMA1_Stream0_IRQHandler                                       
-DMA1_Stream1_IRQHandler                                          
-DMA1_Stream2_IRQHandler                                          
-DMA1_Stream3_IRQHandler                                          
-DMA1_Stream4_IRQHandler                                          
-DMA1_Stream5_IRQHandler                                          
-DMA1_Stream6_IRQHandler                                          
-ADC_IRQHandler                                         
-CAN1_TX_IRQHandler                                                            
-CAN1_RX0_IRQHandler                                                          
-CAN1_RX1_IRQHandler                                                           
-CAN1_SCE_IRQHandler                                                           
-EXTI9_5_IRQHandler                                                
-TIM1_BRK_TIM9_IRQHandler                        
-TIM1_UP_TIM10_IRQHandler                      
-TIM1_TRG_COM_TIM11_IRQHandler  
-TIM1_CC_IRQHandler                                               
-TIM2_IRQHandler                                                           
-TIM3_IRQHandler                                                           
-TIM4_IRQHandler                                                           
-I2C1_EV_IRQHandler                                                         
-I2C1_ER_IRQHandler                                                         
-I2C2_EV_IRQHandler                                                        
-I2C2_ER_IRQHandler                                                           
-SPI1_IRQHandler                                                          
-SPI2_IRQHandler                                                           
-USART1_IRQHandler                                                       
-USART2_IRQHandler                                                       
-USART3_IRQHandler                                                      
-EXTI15_10_IRQHandler                                            
-RTC_Alarm_IRQHandler                            
-OTG_FS_WKUP_IRQHandler                                
-TIM8_BRK_TIM12_IRQHandler                      
-TIM8_UP_TIM13_IRQHandler                       
-TIM8_TRG_COM_TIM14_IRQHandler  
-TIM8_CC_IRQHandler                                               
-DMA1_Stream7_IRQHandler                                                 
-FMC_IRQHandler                                                            
-SDIO_IRQHandler                                                            
-TIM5_IRQHandler                                                            
-SPI3_IRQHandler                                                            
-UART4_IRQHandler                                                          
-UART5_IRQHandler                                                          
-TIM6_DAC_IRQHandler                            
-TIM7_IRQHandler                              
-DMA2_Stream0_IRQHandler                                         
-DMA2_Stream1_IRQHandler                                          
-DMA2_Stream2_IRQHandler                                           
-DMA2_Stream3_IRQHandler                                           
-DMA2_Stream4_IRQHandler                                        
-ETH_IRQHandler                                                         
-ETH_WKUP_IRQHandler                                
-CAN2_TX_IRQHandler                                                           
-CAN2_RX0_IRQHandler                                                          
-CAN2_RX1_IRQHandler                                                          
-CAN2_SCE_IRQHandler                                                          
-OTG_FS_IRQHandler                                                    
-DMA2_Stream5_IRQHandler                                          
-DMA2_Stream6_IRQHandler                                          
-DMA2_Stream7_IRQHandler                                          
-USART6_IRQHandler                                                        
-I2C3_EV_IRQHandler                                                          
-I2C3_ER_IRQHandler                                                          
-OTG_HS_EP1_OUT_IRQHandler                           
-OTG_HS_EP1_IN_IRQHandler                            
-OTG_HS_WKUP_IRQHandler                                
-OTG_HS_IRQHandler                                                   
-DCMI_IRQHandler                                                                                                             
-HASH_RNG_IRQHandler
-FPU_IRQHandler  
-           
-                B       .
-
-                ENDP
-
-                ALIGN
-
-;*******************************************************************************
-; User Stack and Heap initialization
-;*******************************************************************************
-                 IF      :DEF:__MICROLIB
-                
-                 EXPORT  __initial_sp
-                 EXPORT  __heap_base
-                 EXPORT  __heap_limit
-                
-                 ELSE
-                
-                 IMPORT  __use_two_region_memory
-                 EXPORT  __user_initial_stackheap
-                 
-__user_initial_stackheap
-
-                 LDR     R0, =  Heap_Mem
-                 LDR     R1, =(Stack_Mem + Stack_Size)
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
-                 LDR     R3, = Stack_Mem
-                 BX      LR
-
-                 ALIGN
-
-                 ENDIF
-
-                 END
-
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

board/BDW01-STM32L496VG/BSP/app/mqttclient_iot_explorer.c

@@ -2,7 +2,7 @@
 #include "mcu_init.h"
 #include "tos_k.h"
 #include "mqttclient.h"
-#include "cjson.h"
+#include "cJSON.h"
 #include "sal_module_wrapper.h"
 
 

board/BearPi_STM32L562RE/KEIL/mqttclient_iot_explorer/demo/mqttclient_iot_explorer.c

@@ -2,7 +2,7 @@
 #include "mcu_init.h"
 #include "tos_k.h"
 #include "mqttclient.h"
-#include "cjson.h"
+#include "cJSON.h"
 #include "sal_module_wrapper.h"
 
 #define USE_ESP8266

board/Fire_STM32H743IIT6/BSP/.mxproject

@@ -0,0 +1,29 @@
+[PreviousGenFiles]
+AdvancedFolderStructure=true
+HeaderFileListSize=5
+HeaderFiles#0=D:/MCU/Fire-STM32H743II/project/TencentOS-Tiny/Core/Inc/gpio.h
+HeaderFiles#1=D:/MCU/Fire-STM32H743II/project/TencentOS-Tiny/Core/Inc/usart.h
+HeaderFiles#2=D:/MCU/Fire-STM32H743II/project/TencentOS-Tiny/Core/Inc/stm32h7xx_it.h
+HeaderFiles#3=D:/MCU/Fire-STM32H743II/project/TencentOS-Tiny/Core/Inc/stm32h7xx_hal_conf.h
+HeaderFiles#4=D:/MCU/Fire-STM32H743II/project/TencentOS-Tiny/Core/Inc/main.h
+HeaderFolderListSize=1
+HeaderPath#0=D:/MCU/Fire-STM32H743II/project/TencentOS-Tiny/Core/Inc
+HeaderFiles=;
+SourceFileListSize=5
+SourceFiles#0=D:/MCU/Fire-STM32H743II/project/TencentOS-Tiny/Core/Src/gpio.c
+SourceFiles#1=D:/MCU/Fire-STM32H743II/project/TencentOS-Tiny/Core/Src/usart.c
+SourceFiles#2=D:/MCU/Fire-STM32H743II/project/TencentOS-Tiny/Core/Src/stm32h7xx_it.c
+SourceFiles#3=D:/MCU/Fire-STM32H743II/project/TencentOS-Tiny/Core/Src/stm32h7xx_hal_msp.c
+SourceFiles#4=D:/MCU/Fire-STM32H743II/project/TencentOS-Tiny/Core/Src/main.c
+SourceFolderListSize=1
+SourcePath#0=D:/MCU/Fire-STM32H743II/project/TencentOS-Tiny/Core/Src
+SourceFiles=;
+
+[PreviousLibFiles]
+LibFiles=Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_cortex.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_tim.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_tim_ex.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_uart.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_uart_ex.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_rcc.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_rcc_ex.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_flash.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_flash_ex.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_gpio.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_gpio_ex.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_hsem.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_dma.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_dma_ex.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_mdma.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_pwr.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_pwr_ex.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_def.h;Drivers\STM32H7xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_i2c.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_i2c_ex.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_exti.h;Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_cortex.c;Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_tim.c;Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_tim_ex.c;Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_uart.c;Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_uart_ex.c;Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_rcc.c;Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_rcc_ex.c;Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_flash.c;Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_flash_ex.c;Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_gpio.c;Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_hsem.c;Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_dma.c;Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_dma_ex.c;Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_mdma.c;Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_pwr.c;Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_pwr_ex.c;Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal.c;Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_i2c.c;Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_i2c_ex.c;Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_exti.c;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_cortex.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_tim.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_tim_ex.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_uart.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_uart_ex.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_rcc.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_rcc_ex.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_flash.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_flash_ex.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_gpio.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_gpio_ex.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_hsem.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_dma.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_dma_ex.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_mdma.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_pwr.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_pwr_ex.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_def.h;Drivers\STM32H7xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_i2c.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_i2c_ex.h;Drivers\STM32H7xx_HAL_Driver\Inc\stm32h7xx_hal_exti.h;Drivers\CMSIS\Device\ST\STM32H7xx\Include\stm32h743xx.h;Drivers\CMSIS\Device\ST\STM32H7xx\Include\stm32h7xx.h;Drivers\CMSIS\Device\ST\STM32H7xx\Include\system_stm32h7xx.h;Drivers\CMSIS\Device\ST\STM32H7xx\Source\Templates\system_stm32h7xx.c;Drivers\CMSIS\Include\cmsis_armcc.h;Drivers\CMSIS\Include\cmsis_armclang.h;Drivers\CMSIS\Include\cmsis_armclang_ltm.h;Drivers\CMSIS\Include\cmsis_compiler.h;Drivers\CMSIS\Include\cmsis_gcc.h;Drivers\CMSIS\Include\cmsis_iccarm.h;Drivers\CMSIS\Include\cmsis_version.h;Drivers\CMSIS\Include\core_armv81mml.h;Drivers\CMSIS\Include\core_armv8mbl.h;Drivers\CMSIS\Include\core_armv8mml.h;Drivers\CMSIS\Include\core_cm0.h;Drivers\CMSIS\Include\core_cm0plus.h;Drivers\CMSIS\Include\core_cm1.h;Drivers\CMSIS\Include\core_cm23.h;Drivers\CMSIS\Include\core_cm3.h;Drivers\CMSIS\Include\core_cm33.h;Drivers\CMSIS\Include\core_cm35p.h;Drivers\CMSIS\Include\core_cm4.h;Drivers\CMSIS\Include\core_cm7.h;Drivers\CMSIS\Include\core_sc000.h;Drivers\CMSIS\Include\core_sc300.h;Drivers\CMSIS\Include\mpu_armv7.h;Drivers\CMSIS\Include\mpu_armv8.h;Drivers\CMSIS\Include\tz_context.h;
+
+[PreviousUsedKeilFiles]
+SourceFiles=..\Core\Src\main.c;..\Core\Src\gpio.c;..\Core\Src\usart.c;..\Core\Src\stm32h7xx_it.c;..\Core\Src\stm32h7xx_hal_msp.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_cortex.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_tim.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_tim_ex.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_uart.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_uart_ex.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_rcc.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_rcc_ex.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_flash.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_flash_ex.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_gpio.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_hsem.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_dma.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_dma_ex.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_mdma.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_pwr.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_pwr_ex.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_i2c.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_i2c_ex.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_exti.c;..\Drivers\CMSIS\Device\ST\STM32H7xx\Source\Templates\system_stm32h7xx.c;..\Core\Src\system_stm32h7xx.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_cortex.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_tim.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_tim_ex.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_uart.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_uart_ex.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_rcc.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_rcc_ex.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_flash.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_flash_ex.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_gpio.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_hsem.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_dma.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_dma_ex.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_mdma.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_pwr.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_pwr_ex.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_i2c.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_i2c_ex.c;..\Drivers\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_exti.c;..\Drivers\CMSIS\Device\ST\STM32H7xx\Source\Templates\system_stm32h7xx.c;..\Core\Src\system_stm32h7xx.c;;;
+HeaderPath=..\Drivers\STM32H7xx_HAL_Driver\Inc;..\Drivers\STM32H7xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32H7xx\Include;..\Drivers\CMSIS\Include;..\Core\Inc;
+CDefines=USE_HAL_DRIVER;STM32H743xx;USE_HAL_DRIVER;USE_HAL_DRIVER;
+

board/Fire_STM32H743IIT6/BSP/Core/Inc/gpio.h

@@ -0,0 +1,49 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    gpio.h
+  * @brief   This file contains all the function prototypes for
+  *          the gpio.c file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2022 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __GPIO_H__
+#define __GPIO_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+void MX_GPIO_Init(void);
+
+/* USER CODE BEGIN Prototypes */
+
+/* USER CODE END Prototypes */
+
+#ifdef __cplusplus
+}
+#endif
+#endif /*__ GPIO_H__ */
+

board/Fire_STM32H743IIT6/BSP/Core/Inc/main.h

@@ -0,0 +1,68 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           : main.h
+  * @brief          : Header for main.c file.
+  *                   This file contains the common defines of the application.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2022 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32h7xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */

board/Fire_STM32H743IIT6/BSP/Core/Inc/mcu_init.h

@@ -0,0 +1,21 @@
+#ifndef __MCU_INIT_H
+#define __MCU_INIT_H
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#include <stdio.h>
+     
+#include "main.h"
+#include "usart.h"
+#include "gpio.h"
+     
+#include "tos_k.h"
+
+void board_init(void);
+void SystemClock_Config(void);
+
+#ifdef __cplusplus
+}
+#endif
+#endif /*__ __MCU_INIT_H */

board/Fire_STM32H743IIT6/BSP/Core/Inc/stm32h7xx_hal_conf.h

@@ -0,0 +1,510 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32h7xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32H7xx_HAL_CONF_H
+#define STM32H7xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+#define HAL_MODULE_ENABLED
+
+  /* #define HAL_ADC_MODULE_ENABLED   */
+/* #define HAL_FDCAN_MODULE_ENABLED   */
+/* #define HAL_FMAC_MODULE_ENABLED   */
+/* #define HAL_CEC_MODULE_ENABLED   */
+/* #define HAL_COMP_MODULE_ENABLED   */
+/* #define HAL_CORDIC_MODULE_ENABLED   */
+/* #define HAL_CRC_MODULE_ENABLED   */
+/* #define HAL_CRYP_MODULE_ENABLED   */
+/* #define HAL_DAC_MODULE_ENABLED   */
+/* #define HAL_DCMI_MODULE_ENABLED   */
+/* #define HAL_DMA2D_MODULE_ENABLED   */
+/* #define HAL_ETH_MODULE_ENABLED   */
+/* #define HAL_NAND_MODULE_ENABLED   */
+/* #define HAL_NOR_MODULE_ENABLED   */
+/* #define HAL_OTFDEC_MODULE_ENABLED   */
+/* #define HAL_SRAM_MODULE_ENABLED   */
+/* #define HAL_SDRAM_MODULE_ENABLED   */
+/* #define HAL_HASH_MODULE_ENABLED   */
+/* #define HAL_HRTIM_MODULE_ENABLED   */
+/* #define HAL_HSEM_MODULE_ENABLED   */
+/* #define HAL_GFXMMU_MODULE_ENABLED   */
+/* #define HAL_JPEG_MODULE_ENABLED   */
+/* #define HAL_OPAMP_MODULE_ENABLED   */
+/* #define HAL_OSPI_MODULE_ENABLED   */
+/* #define HAL_OSPI_MODULE_ENABLED   */
+/* #define HAL_I2S_MODULE_ENABLED   */
+/* #define HAL_SMBUS_MODULE_ENABLED   */
+/* #define HAL_IWDG_MODULE_ENABLED   */
+/* #define HAL_LPTIM_MODULE_ENABLED   */
+/* #define HAL_LTDC_MODULE_ENABLED   */
+/* #define HAL_QSPI_MODULE_ENABLED   */
+/* #define HAL_RAMECC_MODULE_ENABLED   */
+/* #define HAL_RNG_MODULE_ENABLED   */
+/* #define HAL_RTC_MODULE_ENABLED   */
+/* #define HAL_SAI_MODULE_ENABLED   */
+/* #define HAL_SD_MODULE_ENABLED   */
+/* #define HAL_MMC_MODULE_ENABLED   */
+/* #define HAL_SPDIFRX_MODULE_ENABLED   */
+/* #define HAL_SPI_MODULE_ENABLED   */
+/* #define HAL_SWPMI_MODULE_ENABLED   */
+/* #define HAL_TIM_MODULE_ENABLED   */
+#define HAL_UART_MODULE_ENABLED
+/* #define HAL_USART_MODULE_ENABLED   */
+/* #define HAL_IRDA_MODULE_ENABLED   */
+/* #define HAL_SMARTCARD_MODULE_ENABLED   */
+/* #define HAL_WWDG_MODULE_ENABLED   */
+/* #define HAL_PCD_MODULE_ENABLED   */
+/* #define HAL_HCD_MODULE_ENABLED   */
+/* #define HAL_DFSDM_MODULE_ENABLED   */
+/* #define HAL_DSI_MODULE_ENABLED   */
+/* #define HAL_JPEG_MODULE_ENABLED   */
+/* #define HAL_MDIOS_MODULE_ENABLED   */
+/* #define HAL_PSSI_MODULE_ENABLED   */
+/* #define HAL_DTS_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_MDMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_I2C_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+#define HAL_HSEM_MODULE_ENABLED
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+#define HSE_VALUE    (25000000UL) /*!< Value of the External oscillator in Hz : FPGA case fixed to 60MHZ */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal  oscillator (CSI) default value.
+  *        This value is the default CSI value after Reset.
+  */
+#if !defined  (CSI_VALUE)
+  #define CSI_VALUE    (4000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* CSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (64000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+  #define LSE_VALUE    (32768UL) /*!< Value of the External oscillator in Hz*/
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+  #define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+#if !defined  (LSI_VALUE)
+  #define LSI_VALUE  (32000UL)              /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
+                                              The real value may vary depending on the variations
+                                              in voltage and temperature.*/
+
+/**
+  * @brief External clock source for I2S peripheral
+  *        This value is used by the I2S HAL module to compute the I2S clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+  #define EXTERNAL_CLOCK_VALUE    12288000UL /*!< Value of the External clock in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+#define  VDD_VALUE                    (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY            (15UL) /*!< tick interrupt priority */
+#define  USE_RTOS                     0
+#define  USE_SD_TRANSCEIVER           0U               /*!< use uSD Transceiver */
+#define  USE_SPI_CRC	              0U               /*!< use CRC in SPI */
+
+#define  USE_HAL_ADC_REGISTER_CALLBACKS     0U /* ADC register callback disabled     */
+#define  USE_HAL_CEC_REGISTER_CALLBACKS     0U /* CEC register callback disabled     */
+#define  USE_HAL_COMP_REGISTER_CALLBACKS    0U /* COMP register callback disabled    */
+#define  USE_HAL_CORDIC_REGISTER_CALLBACKS  0U /* CORDIC register callback disabled  */
+#define  USE_HAL_CRYP_REGISTER_CALLBACKS    0U /* CRYP register callback disabled    */
+#define  USE_HAL_DAC_REGISTER_CALLBACKS     0U /* DAC register callback disabled     */
+#define  USE_HAL_DCMI_REGISTER_CALLBACKS    0U /* DCMI register callback disabled    */
+#define  USE_HAL_DFSDM_REGISTER_CALLBACKS   0U /* DFSDM register callback disabled   */
+#define  USE_HAL_DMA2D_REGISTER_CALLBACKS   0U /* DMA2D register callback disabled   */
+#define  USE_HAL_DSI_REGISTER_CALLBACKS     0U /* DSI register callback disabled     */
+#define  USE_HAL_DTS_REGISTER_CALLBACKS     0U /* DTS register callback disabled     */
+#define  USE_HAL_ETH_REGISTER_CALLBACKS     0U /* ETH register callback disabled     */
+#define  USE_HAL_FDCAN_REGISTER_CALLBACKS   0U /* FDCAN register callback disabled   */
+#define  USE_HAL_FMAC_REGISTER_CALLBACKS    0U /* FMAC register callback disabled  */
+#define  USE_HAL_NAND_REGISTER_CALLBACKS    0U /* NAND register callback disabled    */
+#define  USE_HAL_NOR_REGISTER_CALLBACKS     0U /* NOR register callback disabled     */
+#define  USE_HAL_SDRAM_REGISTER_CALLBACKS   0U /* SDRAM register callback disabled   */
+#define  USE_HAL_SRAM_REGISTER_CALLBACKS    0U /* SRAM register callback disabled    */
+#define  USE_HAL_HASH_REGISTER_CALLBACKS    0U /* HASH register callback disabled    */
+#define  USE_HAL_HCD_REGISTER_CALLBACKS     0U /* HCD register callback disabled     */
+#define  USE_HAL_GFXMMU_REGISTER_CALLBACKS  0U /* GFXMMU register callback disabled  */
+#define  USE_HAL_HRTIM_REGISTER_CALLBACKS   0U /* HRTIM register callback disabled   */
+#define  USE_HAL_I2C_REGISTER_CALLBACKS     0U /* I2C register callback disabled     */
+#define  USE_HAL_I2S_REGISTER_CALLBACKS     0U /* I2S register callback disabled     */
+#define  USE_HAL_IRDA_REGISTER_CALLBACKS    0U /* IRDA register callback disabled    */
+#define  USE_HAL_JPEG_REGISTER_CALLBACKS    0U /* JPEG register callback disabled    */
+#define  USE_HAL_LPTIM_REGISTER_CALLBACKS   0U /* LPTIM register callback disabled   */
+#define  USE_HAL_LTDC_REGISTER_CALLBACKS    0U /* LTDC register callback disabled    */
+#define  USE_HAL_MDIOS_REGISTER_CALLBACKS   0U /* MDIO register callback disabled    */
+#define  USE_HAL_MMC_REGISTER_CALLBACKS     0U /* MMC register callback disabled     */
+#define  USE_HAL_OPAMP_REGISTER_CALLBACKS   0U /* MDIO register callback disabled    */
+#define  USE_HAL_OSPI_REGISTER_CALLBACKS    0U /* OSPI register callback disabled    */
+#define  USE_HAL_OTFDEC_REGISTER_CALLBACKS  0U /* OTFDEC register callback disabled  */
+#define  USE_HAL_PCD_REGISTER_CALLBACKS     0U /* PCD register callback disabled     */
+#define  USE_HAL_QSPI_REGISTER_CALLBACKS    0U /* QSPI register callback disabled    */
+#define  USE_HAL_RNG_REGISTER_CALLBACKS     0U /* RNG register callback disabled     */
+#define  USE_HAL_RTC_REGISTER_CALLBACKS     0U /* RTC register callback disabled     */
+#define  USE_HAL_SAI_REGISTER_CALLBACKS     0U /* SAI register callback disabled     */
+#define  USE_HAL_SD_REGISTER_CALLBACKS      0U /* SD register callback disabled      */
+#define  USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U /* SMARTCARD register callback disabled */
+#define  USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */
+#define  USE_HAL_SMBUS_REGISTER_CALLBACKS   0U /* SMBUS register callback disabled   */
+#define  USE_HAL_SPI_REGISTER_CALLBACKS     0U /* SPI register callback disabled     */
+#define  USE_HAL_SWPMI_REGISTER_CALLBACKS   0U /* SWPMI register callback disabled   */
+#define  USE_HAL_TIM_REGISTER_CALLBACKS     0U /* TIM register callback disabled     */
+#define  USE_HAL_UART_REGISTER_CALLBACKS    0U /* UART register callback disabled    */
+#define  USE_HAL_USART_REGISTER_CALLBACKS   0U /* USART register callback disabled   */
+#define  USE_HAL_WWDG_REGISTER_CALLBACKS    0U /* WWDG register callback disabled    */
+
+/* ########################### Ethernet Configuration ######################### */
+#define ETH_TX_DESC_CNT         4  /* number of Ethernet Tx DMA descriptors */
+#define ETH_RX_DESC_CNT         4  /* number of Ethernet Rx DMA descriptors */
+
+#define ETH_MAC_ADDR0    (0x02UL)
+#define ETH_MAC_ADDR1    (0x00UL)
+#define ETH_MAC_ADDR2    (0x00UL)
+#define ETH_MAC_ADDR3    (0x00UL)
+#define ETH_MAC_ADDR4    (0x00UL)
+#define ETH_MAC_ADDR5    (0x00UL)
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+  #include "stm32h7xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+  #include "stm32h7xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+  #include "stm32h7xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_MDMA_MODULE_ENABLED
+ #include "stm32h7xx_hal_mdma.h"
+#endif /* HAL_MDMA_MODULE_ENABLED */
+
+#ifdef HAL_HASH_MODULE_ENABLED
+  #include "stm32h7xx_hal_hash.h"
+#endif /* HAL_HASH_MODULE_ENABLED */
+
+#ifdef HAL_DCMI_MODULE_ENABLED
+  #include "stm32h7xx_hal_dcmi.h"
+#endif /* HAL_DCMI_MODULE_ENABLED */
+
+#ifdef HAL_DMA2D_MODULE_ENABLED
+  #include "stm32h7xx_hal_dma2d.h"
+#endif /* HAL_DMA2D_MODULE_ENABLED */
+
+#ifdef HAL_DSI_MODULE_ENABLED
+  #include "stm32h7xx_hal_dsi.h"
+#endif /* HAL_DSI_MODULE_ENABLED */
+
+#ifdef HAL_DFSDM_MODULE_ENABLED
+  #include "stm32h7xx_hal_dfsdm.h"
+#endif /* HAL_DFSDM_MODULE_ENABLED */
+
+#ifdef HAL_DTS_MODULE_ENABLED
+ #include "stm32h7xx_hal_dts.h"
+#endif /* HAL_DTS_MODULE_ENABLED */
+
+#ifdef HAL_ETH_MODULE_ENABLED
+  #include "stm32h7xx_hal_eth.h"
+#endif /* HAL_ETH_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+  #include "stm32h7xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+  #include "stm32h7xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+  #include "stm32h7xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+  #include "stm32h7xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_CEC_MODULE_ENABLED
+  #include "stm32h7xx_hal_cec.h"
+#endif /* HAL_CEC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+  #include "stm32h7xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+  #include "stm32h7xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+  #include "stm32h7xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+  #include "stm32h7xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+  #include "stm32h7xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+  #include "stm32h7xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_GFXMMU_MODULE_ENABLED
+  #include "stm32h7xx_hal_gfxmmu.h"
+#endif /* HAL_GFXMMU_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+  #include "stm32h7xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+  #include "stm32h7xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_HSEM_MODULE_ENABLED
+  #include "stm32h7xx_hal_hsem.h"
+#endif /* HAL_HSEM_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+  #include "stm32h7xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+  #include "stm32h7xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+  #include "stm32h7xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+ #include "stm32h7xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+ #include "stm32h7xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+ #include "stm32h7xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_JPEG_MODULE_ENABLED
+ #include "stm32h7xx_hal_jpeg.h"
+#endif /* HAL_JPEG_MODULE_ENABLED */
+
+#ifdef HAL_MDIOS_MODULE_ENABLED
+ #include "stm32h7xx_hal_mdios.h"
+#endif /* HAL_MDIOS_MODULE_ENABLED */
+
+#ifdef HAL_MMC_MODULE_ENABLED
+ #include "stm32h7xx_hal_mmc.h"
+#endif /* HAL_MMC_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32h7xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_LTDC_MODULE_ENABLED
+#include "stm32h7xx_hal_ltdc.h"
+#endif /* HAL_LTDC_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32h7xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_OSPI_MODULE_ENABLED
+ #include "stm32h7xx_hal_ospi.h"
+#endif /* HAL_OSPI_MODULE_ENABLED */
+
+#ifdef HAL_OTFDEC_MODULE_ENABLED
+#include "stm32h7xx_hal_otfdec.h"
+#endif /* HAL_OTFDEC_MODULE_ENABLED */
+
+#ifdef HAL_PSSI_MODULE_ENABLED
+ #include "stm32h7xx_hal_pssi.h"
+#endif /* HAL_PSSI_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+ #include "stm32h7xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+ #include "stm32h7xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RAMECC_MODULE_ENABLED
+ #include "stm32h7xx_hal_ramecc.h"
+#endif /* HAL_RAMECC_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+ #include "stm32h7xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+ #include "stm32h7xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+ #include "stm32h7xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SD_MODULE_ENABLED
+ #include "stm32h7xx_hal_sd.h"
+#endif /* HAL_SD_MODULE_ENABLED */
+
+#ifdef HAL_SDRAM_MODULE_ENABLED
+ #include "stm32h7xx_hal_sdram.h"
+#endif /* HAL_SDRAM_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+ #include "stm32h7xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SPDIFRX_MODULE_ENABLED
+ #include "stm32h7xx_hal_spdifrx.h"
+#endif /* HAL_SPDIFRX_MODULE_ENABLED */
+
+#ifdef HAL_SWPMI_MODULE_ENABLED
+ #include "stm32h7xx_hal_swpmi.h"
+#endif /* HAL_SWPMI_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+ #include "stm32h7xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+ #include "stm32h7xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+ #include "stm32h7xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+ #include "stm32h7xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+ #include "stm32h7xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+ #include "stm32h7xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+ #include "stm32h7xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+ #include "stm32h7xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_HCD_MODULE_ENABLED
+ #include "stm32h7xx_hal_hcd.h"
+#endif /* HAL_HCD_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+  void assert_failed(uint8_t *file, uint32_t line);
+#else
+  #define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32H7xx_HAL_CONF_H */

board/Fire_STM32H743IIT6/BSP/Core/Inc/stm32h7xx_it.h

@@ -0,0 +1,68 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32h7xx_it.h
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2022 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+ ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32H7xx_IT_H
+#define __STM32H7xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void USART1_IRQHandler(void);
+void USART2_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32H7xx_IT_H */

board/Fire_STM32H743IIT6/BSP/Core/Inc/usart.h

@@ -0,0 +1,55 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    usart.h
+  * @brief   This file contains all the function prototypes for
+  *          the usart.c file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2022 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __USART_H__
+#define __USART_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+extern UART_HandleTypeDef huart1;
+
+extern UART_HandleTypeDef huart2;
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+void MX_USART1_UART_Init(void);
+void MX_USART2_UART_Init(void);
+
+/* USER CODE BEGIN Prototypes */
+
+/* USER CODE END Prototypes */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USART_H__ */
+

board/Fire_STM32H743IIT6/BSP/Core/Src/gpio.c

@@ -0,0 +1,53 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    gpio.c
+  * @brief   This file provides code for the configuration
+  *          of all used GPIO pins.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2022 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "gpio.h"
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/*----------------------------------------------------------------------------*/
+/* Configure GPIO                                                             */
+/*----------------------------------------------------------------------------*/
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+
+/** Configure pins
+     PC14-OSC32_IN (OSC32_IN)   ------> RCC_OSC32_IN
+     PC15-OSC32_OUT (OSC32_OUT)   ------> RCC_OSC32_OUT
+     PH0-OSC_IN (PH0)   ------> RCC_OSC_IN
+     PH1-OSC_OUT (PH1)   ------> RCC_OSC_OUT
+*/
+void MX_GPIO_Init(void)
+{
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOC_CLK_ENABLE();
+  __HAL_RCC_GPIOH_CLK_ENABLE();
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+
+}
+
+/* USER CODE BEGIN 2 */
+
+/* USER CODE END 2 */

board/Fire_STM32H743IIT6/BSP/Core/Src/main.c

@@ -0,0 +1,25 @@
+#include "mcu_init.h"
+
+#define APPLICATION_TASK_STK_SIZE       4096
+k_task_t application_task;
+uint8_t application_task_stk[APPLICATION_TASK_STK_SIZE];
+
+extern void application_entry(void *arg);
+
+__weak void application_entry(void *arg)
+{
+    while (1) {
+        printf("This is a demo task,please use your task entry!\r\n");
+        tos_task_delay(1000);
+    }
+}
+
+int main(void)
+{
+    board_init();
+    printf("Welcome to TencentOS tiny(%s)\r\n", TOS_VERSION);
+    tos_knl_init(); // TencentOS Tiny kernel initialize
+    tos_task_create(&application_task, "application_task", application_entry, NULL, 4, application_task_stk, APPLICATION_TASK_STK_SIZE, 0);
+    tos_knl_start();
+}
+

board/Fire_STM32H743IIT6/BSP/Core/Src/mcu_init.c

@@ -0,0 +1,157 @@
+#include "mcu_init.h"
+
+static void MPU_Config(void);
+
+int fputc(int ch, FILE *f)
+{
+    while((USART1->ISR & 0X40) == 0);
+    USART1->TDR = (uint8_t) ch;
+    return ch;
+}
+
+int _write(int fd, char *ptr, int len)
+{
+    (void)HAL_UART_Transmit(&huart1, (uint8_t *)ptr, len, 0xFFFF);
+    return len;
+}
+
+int fgetc(FILE *f)
+{
+    /* Place your implementation of fgetc here */
+    /* e.g. readwrite a character to the USART2 and Loop until the end of transmission */
+    uint8_t ch = 0;
+    HAL_UART_Receive(&huart1, &ch, 1,30000);
+    return ch;
+}
+
+void board_init(void)
+{
+    MPU_Config();
+
+    /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+    HAL_Init();
+    SystemClock_Config();
+
+    MX_GPIO_Init();
+    MX_USART1_UART_Init();
+    MX_USART2_UART_Init();
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+    RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+    RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+    /** Supply configuration update enable
+    */
+    HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
+
+    /** Configure the main internal regulator output voltage
+    */
+    __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
+
+    while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
+
+    /** Initializes the RCC Oscillators according to the specified parameters
+    * in the RCC_OscInitTypeDef structure.
+    */
+    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+    RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+    RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+    RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+    RCC_OscInitStruct.PLL.PLLM = 10;
+    RCC_OscInitStruct.PLL.PLLN = 360;
+    RCC_OscInitStruct.PLL.PLLP = 2;
+    RCC_OscInitStruct.PLL.PLLQ = 2;
+    RCC_OscInitStruct.PLL.PLLR = 2;
+    RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_1;
+    RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
+    RCC_OscInitStruct.PLL.PLLFRACN = 0;
+    if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+    {
+        Error_Handler();
+    }
+
+    /** Initializes the CPU, AHB and APB buses clocks
+    */
+    RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
+                              |RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1;
+    RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+    RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
+    RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
+    RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
+    RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
+    RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
+    RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
+
+    if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK)
+    {
+        Error_Handler();
+    }
+}
+
+/* MPU Configuration */
+
+void MPU_Config(void)
+{
+  MPU_Region_InitTypeDef MPU_InitStruct = {0};
+
+  /* Disables the MPU */
+  HAL_MPU_Disable();
+
+  /** Initializes and configures the Region and the memory to be protected
+  */
+  MPU_InitStruct.Enable = MPU_REGION_ENABLE;
+  MPU_InitStruct.Number = MPU_REGION_NUMBER0;
+  MPU_InitStruct.BaseAddress = 0x0;
+  MPU_InitStruct.Size = MPU_REGION_SIZE_4GB;
+  MPU_InitStruct.SubRegionDisable = 0x87;
+  MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
+  MPU_InitStruct.AccessPermission = MPU_REGION_NO_ACCESS;
+  MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;
+  MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;
+  MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;
+  MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
+
+  HAL_MPU_ConfigRegion(&MPU_InitStruct);
+  /* Enables the MPU */
+  HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
+
+}
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  __disable_irq();
+  while (1)
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */

board/Fire_STM32H743IIT6/BSP/Core/Src/stm32h7xx_hal_msp.c

@@ -0,0 +1,80 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file         stm32h7xx_hal_msp.c
+  * @brief        This file provides code for the MSP Initialization
+  *               and de-Initialization codes.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2022 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */

board/Fire_STM32H743IIT6/BSP/Core/Src/stm32h7xx_it.c

@@ -0,0 +1,238 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32h7xx_it.c
+  * @brief   Interrupt Service Routines.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2022 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32h7xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "tos_k.h"
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern UART_HandleTypeDef huart1;
+extern UART_HandleTypeDef huart2;
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+  while (1)
+  {
+  }
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Pre-fetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+__weak void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+    /* USER CODE BEGIN SysTick_IRQn 0 */
+
+    /* USER CODE END SysTick_IRQn 0 */
+    HAL_IncTick();
+    /* USER CODE BEGIN SysTick_IRQn 1 */
+    if (tos_knl_is_running()) {
+        tos_knl_irq_enter();
+        tos_tick_handler();
+        tos_knl_irq_leave();
+    }
+
+    /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32H7xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32h7xx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles USART1 global interrupt.
+  */
+void USART1_IRQHandler(void)
+{
+  /* USER CODE BEGIN USART1_IRQn 0 */
+
+  /* USER CODE END USART1_IRQn 0 */
+  HAL_UART_IRQHandler(&huart1);
+  /* USER CODE BEGIN USART1_IRQn 1 */
+
+  /* USER CODE END USART1_IRQn 1 */
+}
+
+/**
+  * @brief This function handles USART2 global interrupt.
+  */
+void USART2_IRQHandler(void)
+{
+  /* USER CODE BEGIN USART2_IRQn 0 */
+
+  /* USER CODE END USART2_IRQn 0 */
+  HAL_UART_IRQHandler(&huart2);
+  /* USER CODE BEGIN USART2_IRQn 1 */
+
+  /* USER CODE END USART2_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */

board/Fire_STM32H743IIT6/BSP/Core/Src/stm32h7xx_it_module.c

@@ -0,0 +1,246 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32h7xx_it.c
+  * @brief   Interrupt Service Routines.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2022 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32h7xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "tos_k.h"
+#include "tos_at.h"
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern UART_HandleTypeDef huart1;
+extern UART_HandleTypeDef huart2;
+/* USER CODE BEGIN EV */
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+  while (1)
+  {
+  }
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Pre-fetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+__weak void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+    /* USER CODE BEGIN SysTick_IRQn 0 */
+
+    /* USER CODE END SysTick_IRQn 0 */
+    HAL_IncTick();
+    /* USER CODE BEGIN SysTick_IRQn 1 */
+    if (tos_knl_is_running()) {
+        tos_knl_irq_enter();
+        tos_tick_handler();
+        tos_knl_irq_leave();
+    }
+
+    /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32H7xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32h7xx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles USART1 global interrupt.
+  */
+void USART1_IRQHandler(void)
+{
+  /* USER CODE BEGIN USART1_IRQn 0 */
+
+  /* USER CODE END USART1_IRQn 0 */
+  HAL_UART_IRQHandler(&huart1);
+  /* USER CODE BEGIN USART1_IRQn 1 */
+
+  /* USER CODE END USART1_IRQn 1 */
+}
+
+/**
+  * @brief This function handles USART2 global interrupt.
+  */
+void USART2_IRQHandler(void)
+{
+  /* USER CODE BEGIN USART2_IRQn 0 */
+    tos_knl_irq_enter();
+    /* USER CODE END USART2_IRQn 0 */
+    HAL_UART_IRQHandler(&huart2);
+    /* USER CODE BEGIN USART2_IRQn 1 */
+    tos_knl_irq_leave();
+    /* USER CODE END USART2_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
+{
+    extern uint8_t data;
+
+    if (huart->Instance == USART2) {
+        HAL_UART_Receive_IT(&huart2, &data, 1);
+        tos_at_uart_input_byte(data);
+    }
+}
+/* USER CODE END 1 */

board/Fire_STM32H743IIT6/BSP/Core/Src/system_stm32h7xx.c

@@ -0,0 +1,450 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32h7xx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-Mx Device Peripheral Access Layer System Source File.
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32h7xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock, it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32h7xx_system
+  * @{
+  */
+
+/** @addtogroup STM32H7xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32h7xx.h"
+#include <math.h>
+
+#if !defined  (HSE_VALUE)
+#define HSE_VALUE    ((uint32_t)25000000) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (CSI_VALUE)
+  #define CSI_VALUE    ((uint32_t)4000000) /*!< Value of the Internal oscillator in Hz*/
+#endif /* CSI_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    ((uint32_t)64000000) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32H7xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32H7xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to use initialized data in D2 domain SRAM (AHB SRAM) */
+/* #define DATA_IN_D2_SRAM */
+
+/* Note: Following vector table addresses must be defined in line with linker
+         configuration. */
+/*!< Uncomment the following line if you need to relocate the vector table
+     anywhere in FLASH BANK1 or AXI SRAM, else the vector table is kept at the automatic
+     remap of boot address selected */
+/* #define USER_VECT_TAB_ADDRESS */
+
+#if defined(USER_VECT_TAB_ADDRESS)
+#if defined(DUAL_CORE) && defined(CORE_CM4)
+/*!< Uncomment the following line if you need to relocate your vector Table
+     in D2 AXI SRAM else user remap will be done in FLASH BANK2. */
+/* #define VECT_TAB_SRAM */
+#if defined(VECT_TAB_SRAM)
+#define VECT_TAB_BASE_ADDRESS   D2_AXISRAM_BASE   /*!< Vector Table base address field.
+                                                       This value must be a multiple of 0x300. */
+#define VECT_TAB_OFFSET         0x00000000U       /*!< Vector Table base offset field.
+                                                       This value must be a multiple of 0x300. */
+#else
+#define VECT_TAB_BASE_ADDRESS   FLASH_BANK2_BASE  /*!< Vector Table base address field.
+                                                       This value must be a multiple of 0x300. */
+#define VECT_TAB_OFFSET         0x00000000U       /*!< Vector Table base offset field.
+                                                       This value must be a multiple of 0x300. */
+#endif /* VECT_TAB_SRAM */
+#else
+/*!< Uncomment the following line if you need to relocate your vector Table
+     in D1 AXI SRAM else user remap will be done in FLASH BANK1. */
+/* #define VECT_TAB_SRAM */
+#if defined(VECT_TAB_SRAM)
+#define VECT_TAB_BASE_ADDRESS   D1_AXISRAM_BASE   /*!< Vector Table base address field.
+                                                       This value must be a multiple of 0x300. */
+#define VECT_TAB_OFFSET         0x00000000U       /*!< Vector Table base offset field.
+                                                       This value must be a multiple of 0x300. */
+#else
+#define VECT_TAB_BASE_ADDRESS   FLASH_BANK1_BASE  /*!< Vector Table base address field.
+                                                       This value must be a multiple of 0x300. */
+#define VECT_TAB_OFFSET         0x00000000U       /*!< Vector Table base offset field.
+                                                       This value must be a multiple of 0x300. */
+#endif /* VECT_TAB_SRAM */
+#endif /* DUAL_CORE && CORE_CM4 */
+#endif /* USER_VECT_TAB_ADDRESS */
+/******************************************************************************/
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32H7xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32H7xx_System_Private_Variables
+  * @{
+  */
+  /* This variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+  uint32_t SystemCoreClock = 64000000;
+  uint32_t SystemD2Clock = 64000000;
+  const  uint8_t D1CorePrescTable[16] = {0, 0, 0, 0, 1, 2, 3, 4, 1, 2, 3, 4, 6, 7, 8, 9};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32H7xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32H7xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system
+  *         Initialize the FPU setting and  vector table location
+  *         configuration.
+  * @param  None
+  * @retval None
+  */
+void SystemInit (void)
+{
+#if defined (DATA_IN_D2_SRAM)
+ __IO uint32_t tmpreg;
+#endif /* DATA_IN_D2_SRAM */
+
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
+  #endif
+  /* Reset the RCC clock configuration to the default reset state ------------*/
+
+   /* Increasing the CPU frequency */
+  if(FLASH_LATENCY_DEFAULT  > (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY)))
+  {
+    /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
+    MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (uint32_t)(FLASH_LATENCY_DEFAULT));
+  }
+
+  /* Set HSION bit */
+  RCC->CR |= RCC_CR_HSION;
+
+  /* Reset CFGR register */
+  RCC->CFGR = 0x00000000;
+
+  /* Reset HSEON, HSECSSON, CSION, HSI48ON, CSIKERON, PLL1ON, PLL2ON and PLL3ON bits */
+  RCC->CR &= 0xEAF6ED7FU;
+
+   /* Decreasing the number of wait states because of lower CPU frequency */
+  if(FLASH_LATENCY_DEFAULT  < (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY)))
+  {
+    /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
+    MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (uint32_t)(FLASH_LATENCY_DEFAULT));
+  }
+
+#if defined(D3_SRAM_BASE)
+  /* Reset D1CFGR register */
+  RCC->D1CFGR = 0x00000000;
+
+  /* Reset D2CFGR register */
+  RCC->D2CFGR = 0x00000000;
+
+  /* Reset D3CFGR register */
+  RCC->D3CFGR = 0x00000000;
+#else
+  /* Reset CDCFGR1 register */
+  RCC->CDCFGR1 = 0x00000000;
+
+  /* Reset CDCFGR2 register */
+  RCC->CDCFGR2 = 0x00000000;
+
+  /* Reset SRDCFGR register */
+  RCC->SRDCFGR = 0x00000000;
+#endif
+  /* Reset PLLCKSELR register */
+  RCC->PLLCKSELR = 0x02020200;
+
+  /* Reset PLLCFGR register */
+  RCC->PLLCFGR = 0x01FF0000;
+  /* Reset PLL1DIVR register */
+  RCC->PLL1DIVR = 0x01010280;
+  /* Reset PLL1FRACR register */
+  RCC->PLL1FRACR = 0x00000000;
+
+  /* Reset PLL2DIVR register */
+  RCC->PLL2DIVR = 0x01010280;
+
+  /* Reset PLL2FRACR register */
+
+  RCC->PLL2FRACR = 0x00000000;
+  /* Reset PLL3DIVR register */
+  RCC->PLL3DIVR = 0x01010280;
+
+  /* Reset PLL3FRACR register */
+  RCC->PLL3FRACR = 0x00000000;
+
+  /* Reset HSEBYP bit */
+  RCC->CR &= 0xFFFBFFFFU;
+
+  /* Disable all interrupts */
+  RCC->CIER = 0x00000000;
+
+#if (STM32H7_DEV_ID == 0x450UL)
+  /* dual core CM7 or single core line */
+  if((DBGMCU->IDCODE & 0xFFFF0000U) < 0x20000000U)
+  {
+    /* if stm32h7 revY*/
+    /* Change  the switch matrix read issuing capability to 1 for the AXI SRAM target (Target 7) */
+    *((__IO uint32_t*)0x51008108) = 0x000000001U;
+  }
+#endif /* STM32H7_DEV_ID */
+
+#if defined(DATA_IN_D2_SRAM)
+  /* in case of initialized data in D2 SRAM (AHB SRAM), enable the D2 SRAM clock (AHB SRAM clock) */
+#if defined(RCC_AHB2ENR_D2SRAM3EN)
+  RCC->AHB2ENR |= (RCC_AHB2ENR_D2SRAM1EN | RCC_AHB2ENR_D2SRAM2EN | RCC_AHB2ENR_D2SRAM3EN);
+#elif defined(RCC_AHB2ENR_D2SRAM2EN)
+  RCC->AHB2ENR |= (RCC_AHB2ENR_D2SRAM1EN | RCC_AHB2ENR_D2SRAM2EN);
+#else
+  RCC->AHB2ENR |= (RCC_AHB2ENR_AHBSRAM1EN | RCC_AHB2ENR_AHBSRAM2EN);
+#endif /* RCC_AHB2ENR_D2SRAM3EN */
+
+  tmpreg = RCC->AHB2ENR;
+  (void) tmpreg;
+#endif /* DATA_IN_D2_SRAM */
+
+#if defined(DUAL_CORE) && defined(CORE_CM4)
+  /* Configure the Vector Table location add offset address for cortex-M4 ------------------*/
+#if defined(USER_VECT_TAB_ADDRESS)
+  SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal D2 AXI-RAM or in Internal FLASH */
+#endif /* USER_VECT_TAB_ADDRESS */
+
+#else
+  /*
+   * Disable the FMC bank1 (enabled after reset).
+   * This, prevents CPU speculation access on this bank which blocks the use of FMC during
+   * 24us. During this time the others FMC master (such as LTDC) cannot use it!
+   */
+  FMC_Bank1_R->BTCR[0] = 0x000030D2;
+
+  /* Configure the Vector Table location -------------------------------------*/
+#if defined(USER_VECT_TAB_ADDRESS)
+  SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal D1 AXI-RAM or in Internal FLASH */
+#endif /* USER_VECT_TAB_ADDRESS */
+
+#endif /*DUAL_CORE && CORE_CM4*/
+}
+
+/**
+   * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock , it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is CSI, SystemCoreClock will contain the CSI_VALUE(*)
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the CSI_VALUE(*),
+  *             HSI_VALUE(**) or HSE_VALUE(***) multiplied/divided by the PLL factors.
+  *
+  *         (*) CSI_VALUE is a constant defined in stm32h7xx_hal.h file (default value
+  *             4 MHz) but the real value may vary depending on the variations
+  *             in voltage and temperature.
+  *         (**) HSI_VALUE is a constant defined in stm32h7xx_hal.h file (default value
+  *             64 MHz) but the real value may vary depending on the variations
+  *             in voltage and temperature.
+  *
+  *         (***)HSE_VALUE is a constant defined in stm32h7xx_hal.h file (default value
+  *              25 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate (void)
+{
+  uint32_t pllp, pllsource, pllm, pllfracen, hsivalue, tmp;
+  uint32_t common_system_clock;
+  float_t fracn1, pllvco;
+
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+  case RCC_CFGR_SWS_HSI:  /* HSI used as system clock source */
+    common_system_clock = (uint32_t) (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV)>> 3));
+    break;
+
+  case RCC_CFGR_SWS_CSI:  /* CSI used as system clock  source */
+    common_system_clock = CSI_VALUE;
+    break;
+
+  case RCC_CFGR_SWS_HSE:  /* HSE used as system clock  source */
+    common_system_clock = HSE_VALUE;
+    break;
+
+  case RCC_CFGR_SWS_PLL1:  /* PLL1 used as system clock  source */
+
+    /* PLL_VCO = (HSE_VALUE or HSI_VALUE or CSI_VALUE/ PLLM) * PLLN
+    SYSCLK = PLL_VCO / PLLR
+    */
+    pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC);
+    pllm = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1)>> 4)  ;
+    pllfracen = ((RCC->PLLCFGR & RCC_PLLCFGR_PLL1FRACEN)>>RCC_PLLCFGR_PLL1FRACEN_Pos);
+    fracn1 = (float_t)(uint32_t)(pllfracen* ((RCC->PLL1FRACR & RCC_PLL1FRACR_FRACN1)>> 3));
+
+    if (pllm != 0U)
+    {
+      switch (pllsource)
+      {
+        case RCC_PLLCKSELR_PLLSRC_HSI:  /* HSI used as PLL clock source */
+
+        hsivalue = (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV)>> 3)) ;
+        pllvco = ( (float_t)hsivalue / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 );
+
+        break;
+
+        case RCC_PLLCKSELR_PLLSRC_CSI:  /* CSI used as PLL clock source */
+          pllvco = ((float_t)CSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 );
+        break;
+
+        case RCC_PLLCKSELR_PLLSRC_HSE:  /* HSE used as PLL clock source */
+          pllvco = ((float_t)HSE_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 );
+        break;
+
+      default:
+          hsivalue = (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV)>> 3)) ;
+          pllvco = ((float_t)hsivalue / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 );
+        break;
+      }
+      pllp = (((RCC->PLL1DIVR & RCC_PLL1DIVR_P1) >>9) + 1U ) ;
+      common_system_clock =  (uint32_t)(float_t)(pllvco/(float_t)pllp);
+    }
+    else
+    {
+      common_system_clock = 0U;
+    }
+    break;
+
+  default:
+    common_system_clock = (uint32_t) (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV)>> 3));
+    break;
+  }
+
+  /* Compute SystemClock frequency --------------------------------------------------*/
+#if defined (RCC_D1CFGR_D1CPRE)
+  tmp = D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_D1CPRE)>> RCC_D1CFGR_D1CPRE_Pos];
+
+  /* common_system_clock frequency : CM7 CPU frequency  */
+  common_system_clock >>= tmp;
+
+  /* SystemD2Clock frequency : CM4 CPU, AXI and AHBs Clock frequency  */
+  SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_HPRE)>> RCC_D1CFGR_HPRE_Pos]) & 0x1FU));
+
+#else
+  tmp = D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_CDCPRE)>> RCC_CDCFGR1_CDCPRE_Pos];
+
+  /* common_system_clock frequency : CM7 CPU frequency  */
+  common_system_clock >>= tmp;
+
+  /* SystemD2Clock frequency : AXI and AHBs Clock frequency  */
+  SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_HPRE)>> RCC_CDCFGR1_HPRE_Pos]) & 0x1FU));
+
+#endif
+
+#if defined(DUAL_CORE) && defined(CORE_CM4)
+  SystemCoreClock = SystemD2Clock;
+#else
+  SystemCoreClock = common_system_clock;
+#endif /* DUAL_CORE && CORE_CM4 */
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */

board/Fire_STM32H743IIT6/BSP/Core/Src/usart.c

@@ -0,0 +1,247 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    usart.c
+  * @brief   This file provides code for the configuration
+  *          of the USART instances.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2022 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "usart.h"
+
+/* USER CODE BEGIN 0 */
+uint8_t data;
+/* USER CODE END 0 */
+
+UART_HandleTypeDef huart1;
+UART_HandleTypeDef huart2;
+
+/* USART1 init function */
+
+void MX_USART1_UART_Init(void)
+{
+
+  /* USER CODE BEGIN USART1_Init 0 */
+
+  /* USER CODE END USART1_Init 0 */
+
+  /* USER CODE BEGIN USART1_Init 1 */
+
+  /* USER CODE END USART1_Init 1 */
+  huart1.Instance = USART1;
+  huart1.Init.BaudRate = 115200;
+  huart1.Init.WordLength = UART_WORDLENGTH_8B;
+  huart1.Init.StopBits = UART_STOPBITS_1;
+  huart1.Init.Parity = UART_PARITY_NONE;
+  huart1.Init.Mode = UART_MODE_TX_RX;
+  huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+  huart1.Init.OverSampling = UART_OVERSAMPLING_16;
+  huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
+  huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1;
+  huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
+  if (HAL_UART_Init(&huart1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_UARTEx_SetTxFifoThreshold(&huart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_UARTEx_SetRxFifoThreshold(&huart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_UARTEx_DisableFifoMode(&huart1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN USART1_Init 2 */
+
+  /* USER CODE END USART1_Init 2 */
+
+}
+/* USART2 init function */
+
+void MX_USART2_UART_Init(void)
+{
+
+  /* USER CODE BEGIN USART2_Init 0 */
+
+  /* USER CODE END USART2_Init 0 */
+
+  /* USER CODE BEGIN USART2_Init 1 */
+
+  /* USER CODE END USART2_Init 1 */
+  huart2.Instance = USART2;
+  huart2.Init.BaudRate = 115200;
+  huart2.Init.WordLength = UART_WORDLENGTH_8B;
+  huart2.Init.StopBits = UART_STOPBITS_1;
+  huart2.Init.Parity = UART_PARITY_NONE;
+  huart2.Init.Mode = UART_MODE_TX_RX;
+  huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+  huart2.Init.OverSampling = UART_OVERSAMPLING_16;
+  huart2.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
+  huart2.Init.ClockPrescaler = UART_PRESCALER_DIV1;
+  huart2.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
+  if (HAL_UART_Init(&huart2) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_UARTEx_SetTxFifoThreshold(&huart2, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_UARTEx_SetRxFifoThreshold(&huart2, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_UARTEx_DisableFifoMode(&huart2) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN USART2_Init 2 */
+  HAL_UART_Receive_IT(&huart2, &data, 1);
+  /* USER CODE END USART2_Init 2 */
+
+}
+
+void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
+{
+
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
+  if(uartHandle->Instance==USART1)
+  {
+  /* USER CODE BEGIN USART1_MspInit 0 */
+
+  /* USER CODE END USART1_MspInit 0 */
+
+  /** Initializes the peripherals clock
+  */
+    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1;
+    PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_D2PCLK2;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* USART1 clock enable */
+    __HAL_RCC_USART1_CLK_ENABLE();
+
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+    /**USART1 GPIO Configuration
+    PA9     ------> USART1_TX
+    PA10     ------> USART1_RX
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+    /* USART1 interrupt Init */
+    HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
+    HAL_NVIC_EnableIRQ(USART1_IRQn);
+  /* USER CODE BEGIN USART1_MspInit 1 */
+
+  /* USER CODE END USART1_MspInit 1 */
+  }
+  else if(uartHandle->Instance==USART2)
+  {
+  /* USER CODE BEGIN USART2_MspInit 0 */
+
+  /* USER CODE END USART2_MspInit 0 */
+
+  /** Initializes the peripherals clock
+  */
+    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART2;
+    PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* USART2 clock enable */
+    __HAL_RCC_USART2_CLK_ENABLE();
+
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+    /**USART2 GPIO Configuration
+    PA2     ------> USART2_TX
+    PA3     ------> USART2_RX
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+    /* USART2 interrupt Init */
+    HAL_NVIC_SetPriority(USART2_IRQn, 0, 0);
+    HAL_NVIC_EnableIRQ(USART2_IRQn);
+  /* USER CODE BEGIN USART2_MspInit 1 */
+
+  /* USER CODE END USART2_MspInit 1 */
+  }
+}
+
+void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
+{
+
+  if(uartHandle->Instance==USART1)
+  {
+  /* USER CODE BEGIN USART1_MspDeInit 0 */
+
+  /* USER CODE END USART1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_USART1_CLK_DISABLE();
+
+    /**USART1 GPIO Configuration
+    PA9     ------> USART1_TX
+    PA10     ------> USART1_RX
+    */
+    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10);
+
+    /* USART1 interrupt Deinit */
+    HAL_NVIC_DisableIRQ(USART1_IRQn);
+  /* USER CODE BEGIN USART1_MspDeInit 1 */
+
+  /* USER CODE END USART1_MspDeInit 1 */
+  }
+  else if(uartHandle->Instance==USART2)
+  {
+  /* USER CODE BEGIN USART2_MspDeInit 0 */
+
+  /* USER CODE END USART2_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_USART2_CLK_DISABLE();
+
+    /**USART2 GPIO Configuration
+    PA2     ------> USART2_TX
+    PA3     ------> USART2_RX
+    */
+    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_2|GPIO_PIN_3);
+
+    /* USART2 interrupt Deinit */
+    HAL_NVIC_DisableIRQ(USART2_IRQn);
+  /* USER CODE BEGIN USART2_MspDeInit 1 */
+
+  /* USER CODE END USART2_MspDeInit 1 */
+  }
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */

board/Fire_STM32H743IIT6/BSP/TencentOS-Tiny.ioc

@@ -0,0 +1,174 @@
+#MicroXplorer Configuration settings - do not modify
+CORTEX_M7.IPParameters=default_mode_Activation
+CORTEX_M7.default_mode_Activation=1
+File.Version=6
+GPIO.groupedBy=
+KeepUserPlacement=false
+Mcu.CPN=STM32H743IIT6
+Mcu.Family=STM32H7
+Mcu.IP0=CORTEX_M7
+Mcu.IP1=NVIC
+Mcu.IP2=RCC
+Mcu.IP3=SYS
+Mcu.IP4=USART1
+Mcu.IP5=USART2
+Mcu.IPNb=6
+Mcu.Name=STM32H743IITx
+Mcu.Package=LQFP176
+Mcu.Pin0=PC14-OSC32_IN (OSC32_IN)
+Mcu.Pin1=PC15-OSC32_OUT (OSC32_OUT)
+Mcu.Pin2=PH0-OSC_IN (PH0)
+Mcu.Pin3=PH1-OSC_OUT (PH1)
+Mcu.Pin4=PA2
+Mcu.Pin5=PA3
+Mcu.Pin6=PA9
+Mcu.Pin7=PA10
+Mcu.Pin8=VP_SYS_VS_Systick
+Mcu.PinsNb=9
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32H743IITx
+MxCube.Version=6.5.0
+MxDb.Version=DB.6.0.50
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true
+NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:true
+NVIC.USART1_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
+NVIC.USART2_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true
+PA10.Locked=true
+PA10.Mode=Asynchronous
+PA10.Signal=USART1_RX
+PA2.Mode=Asynchronous
+PA2.Signal=USART2_TX
+PA3.Mode=Asynchronous
+PA3.Signal=USART2_RX
+PA9.Locked=true
+PA9.Mode=Asynchronous
+PA9.Signal=USART1_TX
+PC14-OSC32_IN\ (OSC32_IN).Mode=LSE-External-Oscillator
+PC14-OSC32_IN\ (OSC32_IN).Signal=RCC_OSC32_IN
+PC15-OSC32_OUT\ (OSC32_OUT).Mode=LSE-External-Oscillator
+PC15-OSC32_OUT\ (OSC32_OUT).Signal=RCC_OSC32_OUT
+PH0-OSC_IN\ (PH0).Mode=HSE-External-Oscillator
+PH0-OSC_IN\ (PH0).Signal=RCC_OSC_IN
+PH1-OSC_OUT\ (PH1).Mode=HSE-External-Oscillator
+PH1-OSC_OUT\ (PH1).Signal=RCC_OSC_OUT
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=true
+ProjectManager.CustomerFirmwarePackage=
+ProjectManager.DefaultFWLocation=true
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32H743IITx
+ProjectManager.FirmwarePackage=STM32Cube FW_H7 V1.10.0
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=0
+ProjectManager.MainLocation=Core/Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=TencentOS-Tiny.ioc
+ProjectManager.ProjectName=TencentOS-Tiny
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=MDK-ARM V5.27
+ProjectManager.ToolChainLocation=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_USART1_UART_Init-USART1-false-HAL-true,4-MX_USART2_UART_Init-USART2-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true
+RCC.ADCFreq_Value=50390625
+RCC.AHB12Freq_Value=225000000
+RCC.AHB4Freq_Value=225000000
+RCC.APB1Freq_Value=112500000
+RCC.APB2Freq_Value=112500000
+RCC.APB3Freq_Value=112500000
+RCC.APB4Freq_Value=112500000
+RCC.AXIClockFreq_Value=225000000
+RCC.CECFreq_Value=32000
+RCC.CKPERFreq_Value=64000000
+RCC.CortexFreq_Value=450000000
+RCC.CpuClockFreq_Value=450000000
+RCC.D1CPREFreq_Value=450000000
+RCC.D1PPRE=RCC_APB3_DIV2
+RCC.D2PPRE1=RCC_APB1_DIV2
+RCC.D2PPRE2=RCC_APB2_DIV2
+RCC.D3PPRE=RCC_APB4_DIV2
+RCC.DFSDMACLkFreq_Value=450000000
+RCC.DFSDMFreq_Value=112500000
+RCC.DIVM1=10
+RCC.DIVN1=360
+RCC.DIVP1Freq_Value=450000000
+RCC.DIVP2Freq_Value=50390625
+RCC.DIVP3Freq_Value=50390625
+RCC.DIVQ1Freq_Value=450000000
+RCC.DIVQ2Freq_Value=50390625
+RCC.DIVQ3Freq_Value=50390625
+RCC.DIVR1Freq_Value=450000000
+RCC.DIVR2Freq_Value=50390625
+RCC.DIVR3Freq_Value=50390625
+RCC.FDCANFreq_Value=450000000
+RCC.FMCFreq_Value=225000000
+RCC.FamilyName=M
+RCC.HCLK3ClockFreq_Value=225000000
+RCC.HCLKFreq_Value=225000000
+RCC.HPRE=RCC_HCLK_DIV2
+RCC.HRTIMFreq_Value=225000000
+RCC.I2C123Freq_Value=112500000
+RCC.I2C4Freq_Value=112500000
+RCC.IPParameters=ADCFreq_Value,AHB12Freq_Value,AHB4Freq_Value,APB1Freq_Value,APB2Freq_Value,APB3Freq_Value,APB4Freq_Value,AXIClockFreq_Value,CECFreq_Value,CKPERFreq_Value,CortexFreq_Value,CpuClockFreq_Value,D1CPREFreq_Value,D1PPRE,D2PPRE1,D2PPRE2,D3PPRE,DFSDMACLkFreq_Value,DFSDMFreq_Value,DIVM1,DIVN1,DIVP1Freq_Value,DIVP2Freq_Value,DIVP3Freq_Value,DIVQ1Freq_Value,DIVQ2Freq_Value,DIVQ3Freq_Value,DIVR1Freq_Value,DIVR2Freq_Value,DIVR3Freq_Value,FDCANFreq_Value,FMCFreq_Value,FamilyName,HCLK3ClockFreq_Value,HCLKFreq_Value,HPRE,HRTIMFreq_Value,I2C123Freq_Value,I2C4Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPTIM345Freq_Value,LPUART1Freq_Value,LTDCFreq_Value,MCO1PinFreq_Value,MCO2PinFreq_Value,PLLSourceVirtual,QSPIFreq_Value,RNGFreq_Value,RTCFreq_Value,SAI1Freq_Value,SAI23Freq_Value,SAI4AFreq_Value,SAI4BFreq_Value,SDMMCFreq_Value,SPDIFRXFreq_Value,SPI123Freq_Value,SPI45Freq_Value,SPI6Freq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,Tim1OutputFreq_Value,Tim2OutputFreq_Value,TraceFreq_Value,USART16Freq_Value,USART234578Freq_Value,USBFreq_Value,VCO1OutputFreq_Value,VCO2OutputFreq_Value,VCO3OutputFreq_Value,VCOInput1Freq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value
+RCC.LPTIM1Freq_Value=112500000
+RCC.LPTIM2Freq_Value=112500000
+RCC.LPTIM345Freq_Value=112500000
+RCC.LPUART1Freq_Value=112500000
+RCC.LTDCFreq_Value=50390625
+RCC.MCO1PinFreq_Value=64000000
+RCC.MCO2PinFreq_Value=450000000
+RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE
+RCC.QSPIFreq_Value=225000000
+RCC.RNGFreq_Value=48000000
+RCC.RTCFreq_Value=32000
+RCC.SAI1Freq_Value=450000000
+RCC.SAI23Freq_Value=450000000
+RCC.SAI4AFreq_Value=450000000
+RCC.SAI4BFreq_Value=450000000
+RCC.SDMMCFreq_Value=450000000
+RCC.SPDIFRXFreq_Value=450000000
+RCC.SPI123Freq_Value=450000000
+RCC.SPI45Freq_Value=112500000
+RCC.SPI6Freq_Value=112500000
+RCC.SWPMI1Freq_Value=112500000
+RCC.SYSCLKFreq_VALUE=450000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.Tim1OutputFreq_Value=225000000
+RCC.Tim2OutputFreq_Value=225000000
+RCC.TraceFreq_Value=64000000
+RCC.USART16Freq_Value=112500000
+RCC.USART234578Freq_Value=112500000
+RCC.USBFreq_Value=450000000
+RCC.VCO1OutputFreq_Value=900000000
+RCC.VCO2OutputFreq_Value=100781250
+RCC.VCO3OutputFreq_Value=100781250
+RCC.VCOInput1Freq_Value=2500000
+RCC.VCOInput2Freq_Value=781250
+RCC.VCOInput3Freq_Value=781250
+USART1.IPParameters=VirtualMode-Asynchronous
+USART1.VirtualMode-Asynchronous=VM_ASYNC
+USART2.IPParameters=VirtualMode-Asynchronous
+USART2.VirtualMode-Asynchronous=VM_ASYNC
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom

board/Fire_STM32H743IIT6/KEIL/hello_world/startup_stm32h743xx.s

@@ -0,0 +1,609 @@
+;********************************************************************************
+;* File Name          : startup_stm32h743xx.s
+;* @author  MCD Application Team
+;* Description        : STM32H7xx devices vector table for MDK-ARM toolchain. 
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;* <<< Use Configuration Wizard in Context Menu >>>   
+;******************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2017 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;*
+;*******************************************************************************
+
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp                      ; Top of Stack
+                DCD     Reset_Handler                     ; Reset Handler
+                DCD     NMI_Handler                       ; NMI Handler
+                DCD     HardFault_Handler                 ; Hard Fault Handler
+                DCD     MemManage_Handler                 ; MPU Fault Handler
+                DCD     BusFault_Handler                  ; Bus Fault Handler
+                DCD     UsageFault_Handler                ; Usage Fault Handler
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     SVC_Handler                       ; SVCall Handler
+                DCD     DebugMon_Handler                  ; Debug Monitor Handler
+                DCD     0                                 ; Reserved
+                DCD     PendSV_Handler                    ; PendSV Handler
+                DCD     SysTick_Handler                   ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog interrupt ( wwdg1_it)                                         
+                DCD     PVD_AVD_IRQHandler                ; PVD/AVD through EXTI Line detection                        
+                DCD     TAMP_STAMP_IRQHandler             ; Tamper and TimeStamps through the EXTI line            
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line                       
+                DCD     FLASH_IRQHandler                  ; FLASH                                           
+                DCD     RCC_IRQHandler                    ; RCC                                             
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0                                             
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1                                             
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2                                             
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3                                             
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4 
+                DCD     DMA1_Stream0_IRQHandler           ; DMA1 Stream 0
+                DCD     DMA1_Stream1_IRQHandler           ; DMA1 Stream 1                                   
+                DCD     DMA1_Stream2_IRQHandler           ; DMA1 Stream 2                                   
+                DCD     DMA1_Stream3_IRQHandler           ; DMA1 Stream 3                                   
+                DCD     DMA1_Stream4_IRQHandler           ; DMA1 Stream 4                                   
+                DCD     DMA1_Stream5_IRQHandler           ; DMA1 Stream 5                                   
+                DCD     DMA1_Stream6_IRQHandler           ; DMA1 Stream 6  
+                DCD     ADC_IRQHandler                    ; ADC1, ADC2                             
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0                        
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0                               
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1                        
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1                                               
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s                                    
+                DCD     TIM1_BRK_IRQHandler               ; TIM1 Break interrupt                   
+                DCD     TIM1_UP_IRQHandler                ; TIM1 Update Interrupt                 
+                DCD     TIM1_TRG_COM_IRQHandler           ; TIM1 Trigger and Commutation Interrupt 
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare                                   
+                DCD     TIM2_IRQHandler                   ; TIM2                                            
+                DCD     TIM3_IRQHandler                   ; TIM3                                            
+                DCD     TIM4_IRQHandler                   ; TIM4                                            
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event                                             
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error                                             
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event                                             
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error                                               
+                DCD     SPI1_IRQHandler                   ; SPI1                                            
+                DCD     SPI2_IRQHandler                   ; SPI2                                            
+                DCD     USART1_IRQHandler                 ; USART1                                          
+                DCD     USART2_IRQHandler                 ; USART2                                          
+                DCD     USART3_IRQHandler                 ; USART3                                          
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]  
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     0                                 ; Reserved                                          
+                DCD     TIM8_BRK_TIM12_IRQHandler         ; TIM8 Break Interrupt and TIM12 global interrupt                 
+                DCD     TIM8_UP_TIM13_IRQHandler          ; TIM8 Update Interrupt and TIM13 global interrupt
+                DCD     TIM8_TRG_COM_TIM14_IRQHandler     ; TIM8 Trigger and Commutation Interrupt and TIM14 global interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     DMA1_Stream7_IRQHandler           ; DMA1 Stream7                                           
+                DCD     FMC_IRQHandler                    ; FMC                             
+                DCD     SDMMC1_IRQHandler                 ; SDMMC1                            
+                DCD     TIM5_IRQHandler                   ; TIM5                            
+                DCD     SPI3_IRQHandler                   ; SPI3                            
+                DCD     UART4_IRQHandler                  ; UART4                           
+                DCD     UART5_IRQHandler                  ; UART5                           
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&2 underrun errors           
+                DCD     TIM7_IRQHandler                   ; TIM7           
+                DCD     DMA2_Stream0_IRQHandler           ; DMA2 Stream 0                   
+                DCD     DMA2_Stream1_IRQHandler           ; DMA2 Stream 1                   
+                DCD     DMA2_Stream2_IRQHandler           ; DMA2 Stream 2                   
+                DCD     DMA2_Stream3_IRQHandler           ; DMA2 Stream 3                   
+                DCD     DMA2_Stream4_IRQHandler           ; DMA2 Stream 4                   
+                DCD     ETH_IRQHandler                    ; Ethernet                        
+                DCD     ETH_WKUP_IRQHandler               ; Ethernet Wakeup through EXTI line              
+                DCD     FDCAN_CAL_IRQHandler              ; FDCAN calibration unit interrupt                        
+                DCD     0                                 ; Reserved                              
+                DCD     0                                 ; Reserved 
+                DCD     0                                 ; Reserved 
+                DCD     0                                 ; Reserved                      
+                DCD     DMA2_Stream5_IRQHandler           ; DMA2 Stream 5                   
+                DCD     DMA2_Stream6_IRQHandler           ; DMA2 Stream 6                   
+                DCD     DMA2_Stream7_IRQHandler           ; DMA2 Stream 7                   
+                DCD     USART6_IRQHandler                 ; USART6                           
+                DCD     I2C3_EV_IRQHandler                ; I2C3 event                             
+                DCD     I2C3_ER_IRQHandler                ; I2C3 error                             
+                DCD     OTG_HS_EP1_OUT_IRQHandler         ; USB OTG HS End Point 1 Out                      
+                DCD     OTG_HS_EP1_IN_IRQHandler          ; USB OTG HS End Point 1 In                       
+                DCD     OTG_HS_WKUP_IRQHandler            ; USB OTG HS Wakeup through EXTI                         
+                DCD     OTG_HS_IRQHandler                 ; USB OTG HS                    
+                DCD     DCMI_IRQHandler                   ; DCMI                            
+                DCD     0                                 ; Reserved                                     
+                DCD     RNG_IRQHandler                    ; Rng
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     UART7_IRQHandler                  ; UART7
+                DCD     UART8_IRQHandler                  ; UART8
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     SPI5_IRQHandler                   ; SPI5
+                DCD     SPI6_IRQHandler                   ; SPI6
+                DCD     SAI1_IRQHandler                   ; SAI1
+                DCD     LTDC_IRQHandler                   ; LTDC
+                DCD     LTDC_ER_IRQHandler                ; LTDC error
+                DCD     DMA2D_IRQHandler                  ; DMA2D
+                DCD     SAI2_IRQHandler                   ; SAI2
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     LPTIM1_IRQHandler                 ; LPTIM1
+                DCD     CEC_IRQHandler                    ; HDMI_CEC
+                DCD     I2C4_EV_IRQHandler                ; I2C4 Event                             
+                DCD     I2C4_ER_IRQHandler                ; I2C4 Error 
+                DCD     SPDIF_RX_IRQHandler               ; SPDIF_RX
+                DCD     OTG_FS_EP1_OUT_IRQHandler         ; USB OTG FS End Point 1 Out                      
+                DCD     OTG_FS_EP1_IN_IRQHandler          ; USB OTG FS End Point 1 In                       
+                DCD     OTG_FS_WKUP_IRQHandler            ; USB OTG FS Wakeup through EXTI                         
+                DCD     OTG_FS_IRQHandler                 ; USB OTG FS                 
+                DCD     DMAMUX1_OVR_IRQHandler            ; DMAMUX1 Overrun interrupt  
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts                              
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt                                    
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt                                    
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt                                    
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt                                    
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt                                    
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt 
+                DCD     DFSDM1_FLT0_IRQHandler            ; DFSDM Filter0 Interrupt   
+                DCD     DFSDM1_FLT1_IRQHandler            ; DFSDM Filter1 Interrupt                                            
+                DCD     DFSDM1_FLT2_IRQHandler            ; DFSDM Filter2 Interrupt                                            
+                DCD     DFSDM1_FLT3_IRQHandler            ; DFSDM Filter3 Interrupt                                                                                    
+                DCD     SAI3_IRQHandler                   ; SAI3 global Interrupt                                             
+                DCD     SWPMI1_IRQHandler                 ; Serial Wire Interface 1 global interrupt                          
+                DCD     TIM15_IRQHandler                  ; TIM15 global Interrupt                                            
+                DCD     TIM16_IRQHandler                  ; TIM16 global Interrupt                                            
+                DCD     TIM17_IRQHandler                  ; TIM17 global Interrupt                                            
+                DCD     MDIOS_WKUP_IRQHandler             ; MDIOS Wakeup  Interrupt                                           
+                DCD     MDIOS_IRQHandler                  ; MDIOS global Interrupt                                            
+                DCD     JPEG_IRQHandler                   ; JPEG global Interrupt                                             
+                DCD     MDMA_IRQHandler                   ; MDMA global Interrupt                                             
+                DCD     0                                 ; Reserved                                               
+                DCD     SDMMC2_IRQHandler                 ; SDMMC2 global Interrupt                                           
+                DCD     HSEM1_IRQHandler                  ; HSEM1 global Interrupt                                             
+                DCD     0                                 ; Reserved                                              
+                DCD     ADC3_IRQHandler                   ; ADC3 global Interrupt                                              
+                DCD     DMAMUX2_OVR_IRQHandler            ; DMAMUX Overrun interrupt                                           
+                DCD     BDMA_Channel0_IRQHandler          ; BDMA Channel 0 global Interrupt                                    
+                DCD     BDMA_Channel1_IRQHandler          ; BDMA Channel 1 global Interrupt                                    
+                DCD     BDMA_Channel2_IRQHandler          ; BDMA Channel 2 global Interrupt                                    
+                DCD     BDMA_Channel3_IRQHandler          ; BDMA Channel 3 global Interrupt                                    
+                DCD     BDMA_Channel4_IRQHandler          ; BDMA Channel 4 global Interrupt                                    
+                DCD     BDMA_Channel5_IRQHandler          ; BDMA Channel 5 global Interrupt                                    
+                DCD     BDMA_Channel6_IRQHandler          ; BDMA Channel 6 global Interrupt                                    
+                DCD     BDMA_Channel7_IRQHandler          ; BDMA Channel 7 global Interrupt                                    
+                DCD     COMP1_IRQHandler                  ; COMP1 global Interrupt                                            
+                DCD     LPTIM2_IRQHandler                 ; LP TIM2 global interrupt                                          
+                DCD     LPTIM3_IRQHandler                 ; LP TIM3 global interrupt                                          
+                DCD     LPTIM4_IRQHandler                 ; LP TIM4 global interrupt                                          
+                DCD     LPTIM5_IRQHandler                 ; LP TIM5 global interrupt                                          
+                DCD     LPUART1_IRQHandler                ; LP UART1 interrupt                                                
+                DCD     0                                 ; Reserved                                                                              
+                DCD     CRS_IRQHandler                    ; Clock Recovery Global Interrupt                                   
+                DCD     ECC_IRQHandler                    ; ECC diagnostic Global Interrupt                                              
+                DCD     SAI4_IRQHandler                   ; SAI4 global interrupt                                                
+                DCD     0                                 ; Reserved                                 
+                DCD     0                                 ; Reserved                                    
+                DCD     WAKEUP_PIN_IRQHandler             ; Interrupt for all 6 wake-up pins 
+                
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler                    [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                      [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler                [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler                [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler                 [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler               [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                      [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler                  [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler                    [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler                   [WEAK]
+                B       .
+                ENDP                                     
+                                                          
+Default_Handler PROC                                      
+
+                EXPORT  WWDG_IRQHandler                   [WEAK]                                       
+                EXPORT  PVD_AVD_IRQHandler                [WEAK]                         
+                EXPORT  TAMP_STAMP_IRQHandler             [WEAK]   
+                EXPORT  RTC_WKUP_IRQHandler               [WEAK]             
+                EXPORT  FLASH_IRQHandler                  [WEAK]                                        
+                EXPORT  RCC_IRQHandler                    [WEAK]                                          
+                EXPORT  EXTI0_IRQHandler                  [WEAK]                                            
+                EXPORT  EXTI1_IRQHandler                  [WEAK]                                           
+                EXPORT  EXTI2_IRQHandler                  [WEAK]                                            
+                EXPORT  EXTI3_IRQHandler                  [WEAK]                                            
+                EXPORT  EXTI4_IRQHandler                  [WEAK]
+                EXPORT  DMA1_Stream0_IRQHandler           [WEAK] 
+                EXPORT  DMA1_Stream1_IRQHandler           [WEAK]                        
+                EXPORT  DMA1_Stream2_IRQHandler           [WEAK]                     
+                EXPORT  DMA1_Stream3_IRQHandler           [WEAK]                    
+                EXPORT  DMA1_Stream4_IRQHandler           [WEAK]                        
+                EXPORT  DMA1_Stream5_IRQHandler           [WEAK]                          
+                EXPORT  DMA1_Stream6_IRQHandler           [WEAK]
+                EXPORT  DMA1_Stream7_IRQHandler           [WEAK]
+                EXPORT  ADC_IRQHandler                    [WEAK]                          
+                EXPORT  FDCAN1_IT0_IRQHandler             [WEAK]                                            
+                EXPORT  FDCAN2_IT0_IRQHandler             [WEAK] 
+                EXPORT  FDCAN1_IT1_IRQHandler             [WEAK]                                            
+                EXPORT  FDCAN2_IT1_IRQHandler             [WEAK]   
+                EXPORT  EXTI9_5_IRQHandler                [WEAK]                                    
+                EXPORT  TIM1_BRK_IRQHandler               [WEAK]                  
+                EXPORT  TIM1_UP_IRQHandler                [WEAK]                
+                EXPORT  TIM1_TRG_COM_IRQHandler           [WEAK] 
+                EXPORT  TIM1_CC_IRQHandler                [WEAK]                                   
+                EXPORT  TIM2_IRQHandler                   [WEAK]                                            
+                EXPORT  TIM3_IRQHandler                   [WEAK]                                            
+                EXPORT  TIM4_IRQHandler                   [WEAK]                                            
+                EXPORT  I2C1_EV_IRQHandler                [WEAK]                                             
+                EXPORT  I2C1_ER_IRQHandler                [WEAK]                                             
+                EXPORT  I2C2_EV_IRQHandler                [WEAK]                                            
+                EXPORT  I2C2_ER_IRQHandler                [WEAK]                                               
+                EXPORT  SPI1_IRQHandler                   [WEAK]                                           
+                EXPORT  SPI2_IRQHandler                   [WEAK]                                            
+                EXPORT  USART1_IRQHandler                 [WEAK]                                          
+                EXPORT  USART2_IRQHandler                 [WEAK]                                          
+                EXPORT  USART3_IRQHandler                 [WEAK]                                         
+                EXPORT  EXTI15_10_IRQHandler              [WEAK]                                  
+                EXPORT  RTC_Alarm_IRQHandler              [WEAK]                                       
+                EXPORT  TIM8_BRK_TIM12_IRQHandler         [WEAK]                 
+                EXPORT  TIM8_UP_TIM13_IRQHandler          [WEAK]                 
+                EXPORT  TIM8_TRG_COM_TIM14_IRQHandler     [WEAK] 
+                EXPORT  TIM8_CC_IRQHandler                [WEAK]                                   
+                EXPORT  DMA1_Stream7_IRQHandler           [WEAK]                                          
+                EXPORT  FMC_IRQHandler                    [WEAK]                                             
+                EXPORT  SDMMC1_IRQHandler                 [WEAK]                                             
+                EXPORT  TIM5_IRQHandler                   [WEAK]                                             
+                EXPORT  SPI3_IRQHandler                   [WEAK]                                             
+                EXPORT  UART4_IRQHandler                  [WEAK]                                            
+                EXPORT  UART5_IRQHandler                  [WEAK]                                            
+                EXPORT  TIM6_DAC_IRQHandler               [WEAK]                   
+                EXPORT  TIM7_IRQHandler                   [WEAK]                    
+                EXPORT  DMA2_Stream0_IRQHandler           [WEAK]                                  
+                EXPORT  DMA2_Stream1_IRQHandler           [WEAK]                                   
+                EXPORT  DMA2_Stream2_IRQHandler           [WEAK]                                    
+                EXPORT  DMA2_Stream3_IRQHandler           [WEAK]                                    
+                EXPORT  DMA2_Stream4_IRQHandler           [WEAK]                                 
+                EXPORT  ETH_IRQHandler                    [WEAK]                                         
+                EXPORT  ETH_WKUP_IRQHandler               [WEAK]                     
+                EXPORT  FDCAN_CAL_IRQHandler              [WEAK]                                                                                                                                                                              
+                EXPORT  DMA2_Stream5_IRQHandler           [WEAK]                                   
+                EXPORT  DMA2_Stream6_IRQHandler           [WEAK]                                   
+                EXPORT  DMA2_Stream7_IRQHandler           [WEAK]                                   
+                EXPORT  USART6_IRQHandler                 [WEAK]                                           
+                EXPORT  I2C3_EV_IRQHandler                [WEAK]                                              
+                EXPORT  I2C3_ER_IRQHandler                [WEAK]                                              
+                EXPORT  OTG_HS_EP1_OUT_IRQHandler         [WEAK]                      
+                EXPORT  OTG_HS_EP1_IN_IRQHandler          [WEAK]                      
+                EXPORT  OTG_HS_WKUP_IRQHandler            [WEAK]                        
+                EXPORT  OTG_HS_IRQHandler                 [WEAK]                                      
+                EXPORT  DCMI_IRQHandler                   [WEAK]                                             
+                EXPORT  RNG_IRQHandler                    [WEAK]
+                EXPORT  FPU_IRQHandler                    [WEAK]
+                EXPORT  UART7_IRQHandler                  [WEAK]
+                EXPORT  UART8_IRQHandler                  [WEAK]
+                EXPORT  SPI4_IRQHandler                   [WEAK]
+                EXPORT  SPI5_IRQHandler                   [WEAK]
+                EXPORT  SPI6_IRQHandler                   [WEAK]
+                EXPORT  SAI1_IRQHandler                   [WEAK]
+                EXPORT  LTDC_IRQHandler                   [WEAK]
+                EXPORT  LTDC_ER_IRQHandler                [WEAK]
+                EXPORT  DMA2D_IRQHandler                  [WEAK]
+                EXPORT  SAI2_IRQHandler                   [WEAK]   
+                EXPORT  QUADSPI_IRQHandler                [WEAK]
+                EXPORT  LPTIM1_IRQHandler                 [WEAK]
+                EXPORT  CEC_IRQHandler                    [WEAK]   
+                EXPORT  I2C4_EV_IRQHandler                [WEAK]
+                EXPORT  I2C4_ER_IRQHandler                [WEAK] 
+                EXPORT  SPDIF_RX_IRQHandler               [WEAK]
+                EXPORT  OTG_FS_EP1_OUT_IRQHandler         [WEAK]
+                EXPORT  OTG_FS_EP1_IN_IRQHandler          [WEAK]                      
+                EXPORT  OTG_FS_WKUP_IRQHandler            [WEAK]                      
+                EXPORT  OTG_FS_IRQHandler                 [WEAK]                        
+                EXPORT  DMAMUX1_OVR_IRQHandler            [WEAK]
+                EXPORT  HRTIM1_Master_IRQHandler          [WEAK] 
+                EXPORT  HRTIM1_TIMA_IRQHandler            [WEAK]                                      
+                EXPORT  HRTIM1_TIMB_IRQHandler            [WEAK]                                      
+                EXPORT  HRTIM1_TIMC_IRQHandler            [WEAK]                                      
+                EXPORT  HRTIM1_TIMD_IRQHandler            [WEAK]                                      
+                EXPORT  HRTIM1_TIME_IRQHandler            [WEAK]                                      
+                EXPORT  HRTIM1_FLT_IRQHandler             [WEAK]
+                EXPORT  DFSDM1_FLT0_IRQHandler            [WEAK] 
+                EXPORT  DFSDM1_FLT1_IRQHandler            [WEAK]                                             
+                EXPORT  DFSDM1_FLT2_IRQHandler            [WEAK]                                             
+                EXPORT  DFSDM1_FLT3_IRQHandler            [WEAK]                                                                                        
+                EXPORT  SAI3_IRQHandler                   [WEAK]                                             
+                EXPORT  SWPMI1_IRQHandler                 [WEAK]                            
+                EXPORT  TIM15_IRQHandler                  [WEAK]                                             
+                EXPORT  TIM16_IRQHandler                  [WEAK]                                              
+                EXPORT  TIM17_IRQHandler                  [WEAK]                                            
+                EXPORT  MDIOS_WKUP_IRQHandler             [WEAK]                                             
+                EXPORT  MDIOS_IRQHandler                  [WEAK]                                              
+                EXPORT  JPEG_IRQHandler                   [WEAK]                                               
+                EXPORT  MDMA_IRQHandler                   [WEAK]                                                                                             
+                EXPORT  SDMMC2_IRQHandler                 [WEAK]                                             
+                EXPORT  HSEM1_IRQHandler                  [WEAK]                                                                                                             
+                EXPORT  ADC3_IRQHandler                   [WEAK]                                                
+                EXPORT  DMAMUX2_OVR_IRQHandler            [WEAK]                                            
+                EXPORT  BDMA_Channel0_IRQHandler          [WEAK]                                      
+                EXPORT  BDMA_Channel1_IRQHandler          [WEAK]                                      
+                EXPORT  BDMA_Channel2_IRQHandler          [WEAK]                                      
+                EXPORT  BDMA_Channel3_IRQHandler          [WEAK]                                      
+                EXPORT  BDMA_Channel4_IRQHandler          [WEAK]                                     
+                EXPORT  BDMA_Channel5_IRQHandler          [WEAK]                                      
+                EXPORT  BDMA_Channel6_IRQHandler          [WEAK]                                      
+                EXPORT  BDMA_Channel7_IRQHandler          [WEAK]                                     
+                EXPORT  COMP1_IRQHandler                  [WEAK]                                              
+                EXPORT  LPTIM2_IRQHandler                 [WEAK]                                           
+                EXPORT  LPTIM3_IRQHandler                 [WEAK]                                            
+                EXPORT  LPTIM4_IRQHandler                 [WEAK]                                            
+                EXPORT  LPTIM5_IRQHandler                 [WEAK]                                            
+                EXPORT  LPUART1_IRQHandler                [WEAK]                                                  
+                EXPORT  CRS_IRQHandler                    [WEAK]
+                EXPORT  ECC_IRQHandler                    [WEAK] 				
+                EXPORT  SAI4_IRQHandler                   [WEAK]                                                                                     
+                EXPORT  WAKEUP_PIN_IRQHandler             [WEAK] 
+
+
+WWDG_IRQHandler                                                          
+PVD_AVD_IRQHandler                                             
+TAMP_STAMP_IRQHandler                
+RTC_WKUP_IRQHandler                            
+FLASH_IRQHandler                                                          
+RCC_IRQHandler                                                              
+EXTI0_IRQHandler                                                              
+EXTI1_IRQHandler                                                             
+EXTI2_IRQHandler                                                              
+EXTI3_IRQHandler                                                              
+EXTI4_IRQHandler 
+DMA1_Stream0_IRQHandler
+DMA1_Stream1_IRQHandler                                  
+DMA1_Stream2_IRQHandler                               
+DMA1_Stream3_IRQHandler                              
+DMA1_Stream4_IRQHandler                                  
+DMA1_Stream5_IRQHandler                                    
+DMA1_Stream6_IRQHandler                   
+ADC_IRQHandler                                           
+FDCAN1_IT0_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+FDCAN2_IT1_IRQHandler
+EXTI9_5_IRQHandler                                                
+TIM1_BRK_IRQHandler                        
+TIM1_UP_IRQHandler                      
+TIM1_TRG_COM_IRQHandler  
+TIM1_CC_IRQHandler                                               
+TIM2_IRQHandler                                                           
+TIM3_IRQHandler                                                           
+TIM4_IRQHandler                                                           
+I2C1_EV_IRQHandler                                                         
+I2C1_ER_IRQHandler                                                         
+I2C2_EV_IRQHandler                                                        
+I2C2_ER_IRQHandler                                                           
+SPI1_IRQHandler                                                          
+SPI2_IRQHandler                                                           
+USART1_IRQHandler                                                       
+USART2_IRQHandler                                                       
+USART3_IRQHandler                                                      
+EXTI15_10_IRQHandler                                            
+RTC_Alarm_IRQHandler                                                           
+TIM8_BRK_TIM12_IRQHandler                      
+TIM8_UP_TIM13_IRQHandler                       
+TIM8_TRG_COM_TIM14_IRQHandler  
+TIM8_CC_IRQHandler                                               
+DMA1_Stream7_IRQHandler                                                 
+FMC_IRQHandler                                                            
+SDMMC1_IRQHandler                                                            
+TIM5_IRQHandler                                                            
+SPI3_IRQHandler                                                            
+UART4_IRQHandler                                                          
+UART5_IRQHandler                                                          
+TIM6_DAC_IRQHandler                            
+TIM7_IRQHandler                              
+DMA2_Stream0_IRQHandler                                         
+DMA2_Stream1_IRQHandler                                          
+DMA2_Stream2_IRQHandler                                           
+DMA2_Stream3_IRQHandler                                           
+DMA2_Stream4_IRQHandler                                        
+ETH_IRQHandler                                                         
+ETH_WKUP_IRQHandler                                
+FDCAN_CAL_IRQHandler                                                                                                                                                                                                                            
+DMA2_Stream5_IRQHandler                                          
+DMA2_Stream6_IRQHandler                                          
+DMA2_Stream7_IRQHandler                                          
+USART6_IRQHandler                                                        
+I2C3_EV_IRQHandler                                                          
+I2C3_ER_IRQHandler                                                          
+OTG_HS_EP1_OUT_IRQHandler 
+OTG_HS_EP1_IN_IRQHandler 
+OTG_HS_WKUP_IRQHandler   
+OTG_HS_IRQHandler        
+DCMI_IRQHandler                                                            
+RNG_IRQHandler
+FPU_IRQHandler  
+UART7_IRQHandler                  
+UART8_IRQHandler                  
+SPI4_IRQHandler                   
+SPI5_IRQHandler                   
+SPI6_IRQHandler                   
+SAI1_IRQHandler                   
+LTDC_IRQHandler                   
+LTDC_ER_IRQHandler                 
+DMA2D_IRQHandler   
+SAI2_IRQHandler        
+QUADSPI_IRQHandler
+LPTIM1_IRQHandler
+CEC_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPDIF_RX_IRQHandler
+OTG_FS_EP1_OUT_IRQHandler
+OTG_FS_EP1_IN_IRQHandler 
+OTG_FS_WKUP_IRQHandler   
+OTG_FS_IRQHandler        
+DMAMUX1_OVR_IRQHandler
+HRTIM1_Master_IRQHandler               
+HRTIM1_TIMA_IRQHandler                                                      
+HRTIM1_TIMB_IRQHandler                                                      
+HRTIM1_TIMC_IRQHandler                                                      
+HRTIM1_TIMD_IRQHandler                                                      
+HRTIM1_TIME_IRQHandler                                                      
+HRTIM1_FLT_IRQHandler 
+DFSDM1_FLT0_IRQHandler
+DFSDM1_FLT1_IRQHandler                                                                
+DFSDM1_FLT2_IRQHandler                                                                
+DFSDM1_FLT3_IRQHandler                                                                                                                                
+SAI3_IRQHandler                                                                    
+SWPMI1_IRQHandler                                                 
+TIM15_IRQHandler                                                                   
+TIM16_IRQHandler                                                                    
+TIM17_IRQHandler                                                                  
+MDIOS_WKUP_IRQHandler                                                              
+MDIOS_IRQHandler                                                                    
+JPEG_IRQHandler                                                                      
+MDMA_IRQHandler                                                                                                                                            
+SDMMC2_IRQHandler                                                                  
+HSEM1_IRQHandler                                                                                                                                       
+ADC3_IRQHandler                                                                       
+DMAMUX2_OVR_IRQHandler                                                            
+BDMA_Channel0_IRQHandler                                                     
+BDMA_Channel1_IRQHandler                                                     
+BDMA_Channel2_IRQHandler                                                     
+BDMA_Channel3_IRQHandler                                                     
+BDMA_Channel4_IRQHandler                                                    
+BDMA_Channel5_IRQHandler                                                     
+BDMA_Channel6_IRQHandler                                                     
+BDMA_Channel7_IRQHandler                                                    
+COMP1_IRQHandler                                                                    
+LPTIM2_IRQHandler                                                                
+LPTIM3_IRQHandler                                                                 
+LPTIM4_IRQHandler                                                                 
+LPTIM5_IRQHandler                                                                 
+LPUART1_IRQHandler                                                                                                                         
+CRS_IRQHandler
+ECC_IRQHandler                                                            
+SAI4_IRQHandler      
+WAKEUP_PIN_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+                
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+                
+                 ELSE
+                
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+                 
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+

board/Fire_STM32H743IIT6/KEIL/mqtt_client_iot_exporer/startup_stm32h743xx.s

@@ -0,0 +1,609 @@
+;********************************************************************************
+;* File Name          : startup_stm32h743xx.s
+;* @author  MCD Application Team
+;* Description        : STM32H7xx devices vector table for MDK-ARM toolchain. 
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;* <<< Use Configuration Wizard in Context Menu >>>   
+;******************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2017 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;*
+;*******************************************************************************
+
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp                      ; Top of Stack
+                DCD     Reset_Handler                     ; Reset Handler
+                DCD     NMI_Handler                       ; NMI Handler
+                DCD     HardFault_Handler                 ; Hard Fault Handler
+                DCD     MemManage_Handler                 ; MPU Fault Handler
+                DCD     BusFault_Handler                  ; Bus Fault Handler
+                DCD     UsageFault_Handler                ; Usage Fault Handler
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     SVC_Handler                       ; SVCall Handler
+                DCD     DebugMon_Handler                  ; Debug Monitor Handler
+                DCD     0                                 ; Reserved
+                DCD     PendSV_Handler                    ; PendSV Handler
+                DCD     SysTick_Handler                   ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog interrupt ( wwdg1_it)                                         
+                DCD     PVD_AVD_IRQHandler                ; PVD/AVD through EXTI Line detection                        
+                DCD     TAMP_STAMP_IRQHandler             ; Tamper and TimeStamps through the EXTI line            
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line                       
+                DCD     FLASH_IRQHandler                  ; FLASH                                           
+                DCD     RCC_IRQHandler                    ; RCC                                             
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0                                             
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1                                             
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2                                             
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3                                             
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4 
+                DCD     DMA1_Stream0_IRQHandler           ; DMA1 Stream 0
+                DCD     DMA1_Stream1_IRQHandler           ; DMA1 Stream 1                                   
+                DCD     DMA1_Stream2_IRQHandler           ; DMA1 Stream 2                                   
+                DCD     DMA1_Stream3_IRQHandler           ; DMA1 Stream 3                                   
+                DCD     DMA1_Stream4_IRQHandler           ; DMA1 Stream 4                                   
+                DCD     DMA1_Stream5_IRQHandler           ; DMA1 Stream 5                                   
+                DCD     DMA1_Stream6_IRQHandler           ; DMA1 Stream 6  
+                DCD     ADC_IRQHandler                    ; ADC1, ADC2                             
+                DCD     FDCAN1_IT0_IRQHandler             ; FDCAN1 interrupt line 0                        
+                DCD     FDCAN2_IT0_IRQHandler             ; FDCAN2 interrupt line 0                               
+                DCD     FDCAN1_IT1_IRQHandler             ; FDCAN1 interrupt line 1                        
+                DCD     FDCAN2_IT1_IRQHandler             ; FDCAN2 interrupt line 1                                               
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s                                    
+                DCD     TIM1_BRK_IRQHandler               ; TIM1 Break interrupt                   
+                DCD     TIM1_UP_IRQHandler                ; TIM1 Update Interrupt                 
+                DCD     TIM1_TRG_COM_IRQHandler           ; TIM1 Trigger and Commutation Interrupt 
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare                                   
+                DCD     TIM2_IRQHandler                   ; TIM2                                            
+                DCD     TIM3_IRQHandler                   ; TIM3                                            
+                DCD     TIM4_IRQHandler                   ; TIM4                                            
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event                                             
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error                                             
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event                                             
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error                                               
+                DCD     SPI1_IRQHandler                   ; SPI1                                            
+                DCD     SPI2_IRQHandler                   ; SPI2                                            
+                DCD     USART1_IRQHandler                 ; USART1                                          
+                DCD     USART2_IRQHandler                 ; USART2                                          
+                DCD     USART3_IRQHandler                 ; USART3                                          
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]  
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     0                                 ; Reserved                                          
+                DCD     TIM8_BRK_TIM12_IRQHandler         ; TIM8 Break Interrupt and TIM12 global interrupt                 
+                DCD     TIM8_UP_TIM13_IRQHandler          ; TIM8 Update Interrupt and TIM13 global interrupt
+                DCD     TIM8_TRG_COM_TIM14_IRQHandler     ; TIM8 Trigger and Commutation Interrupt and TIM14 global interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     DMA1_Stream7_IRQHandler           ; DMA1 Stream7                                           
+                DCD     FMC_IRQHandler                    ; FMC                             
+                DCD     SDMMC1_IRQHandler                 ; SDMMC1                            
+                DCD     TIM5_IRQHandler                   ; TIM5                            
+                DCD     SPI3_IRQHandler                   ; SPI3                            
+                DCD     UART4_IRQHandler                  ; UART4                           
+                DCD     UART5_IRQHandler                  ; UART5                           
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&2 underrun errors           
+                DCD     TIM7_IRQHandler                   ; TIM7           
+                DCD     DMA2_Stream0_IRQHandler           ; DMA2 Stream 0                   
+                DCD     DMA2_Stream1_IRQHandler           ; DMA2 Stream 1                   
+                DCD     DMA2_Stream2_IRQHandler           ; DMA2 Stream 2                   
+                DCD     DMA2_Stream3_IRQHandler           ; DMA2 Stream 3                   
+                DCD     DMA2_Stream4_IRQHandler           ; DMA2 Stream 4                   
+                DCD     ETH_IRQHandler                    ; Ethernet                        
+                DCD     ETH_WKUP_IRQHandler               ; Ethernet Wakeup through EXTI line              
+                DCD     FDCAN_CAL_IRQHandler              ; FDCAN calibration unit interrupt                        
+                DCD     0                                 ; Reserved                              
+                DCD     0                                 ; Reserved 
+                DCD     0                                 ; Reserved 
+                DCD     0                                 ; Reserved                      
+                DCD     DMA2_Stream5_IRQHandler           ; DMA2 Stream 5                   
+                DCD     DMA2_Stream6_IRQHandler           ; DMA2 Stream 6                   
+                DCD     DMA2_Stream7_IRQHandler           ; DMA2 Stream 7                   
+                DCD     USART6_IRQHandler                 ; USART6                           
+                DCD     I2C3_EV_IRQHandler                ; I2C3 event                             
+                DCD     I2C3_ER_IRQHandler                ; I2C3 error                             
+                DCD     OTG_HS_EP1_OUT_IRQHandler         ; USB OTG HS End Point 1 Out                      
+                DCD     OTG_HS_EP1_IN_IRQHandler          ; USB OTG HS End Point 1 In                       
+                DCD     OTG_HS_WKUP_IRQHandler            ; USB OTG HS Wakeup through EXTI                         
+                DCD     OTG_HS_IRQHandler                 ; USB OTG HS                    
+                DCD     DCMI_IRQHandler                   ; DCMI                            
+                DCD     0                                 ; Reserved                                     
+                DCD     RNG_IRQHandler                    ; Rng
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     UART7_IRQHandler                  ; UART7
+                DCD     UART8_IRQHandler                  ; UART8
+                DCD     SPI4_IRQHandler                   ; SPI4
+                DCD     SPI5_IRQHandler                   ; SPI5
+                DCD     SPI6_IRQHandler                   ; SPI6
+                DCD     SAI1_IRQHandler                   ; SAI1
+                DCD     LTDC_IRQHandler                   ; LTDC
+                DCD     LTDC_ER_IRQHandler                ; LTDC error
+                DCD     DMA2D_IRQHandler                  ; DMA2D
+                DCD     SAI2_IRQHandler                   ; SAI2
+                DCD     QUADSPI_IRQHandler                ; QUADSPI
+                DCD     LPTIM1_IRQHandler                 ; LPTIM1
+                DCD     CEC_IRQHandler                    ; HDMI_CEC
+                DCD     I2C4_EV_IRQHandler                ; I2C4 Event                             
+                DCD     I2C4_ER_IRQHandler                ; I2C4 Error 
+                DCD     SPDIF_RX_IRQHandler               ; SPDIF_RX
+                DCD     OTG_FS_EP1_OUT_IRQHandler         ; USB OTG FS End Point 1 Out                      
+                DCD     OTG_FS_EP1_IN_IRQHandler          ; USB OTG FS End Point 1 In                       
+                DCD     OTG_FS_WKUP_IRQHandler            ; USB OTG FS Wakeup through EXTI                         
+                DCD     OTG_FS_IRQHandler                 ; USB OTG FS                 
+                DCD     DMAMUX1_OVR_IRQHandler            ; DMAMUX1 Overrun interrupt  
+                DCD     HRTIM1_Master_IRQHandler          ; HRTIM Master Timer global Interrupts                              
+                DCD     HRTIM1_TIMA_IRQHandler            ; HRTIM Timer A global Interrupt                                    
+                DCD     HRTIM1_TIMB_IRQHandler            ; HRTIM Timer B global Interrupt                                    
+                DCD     HRTIM1_TIMC_IRQHandler            ; HRTIM Timer C global Interrupt                                    
+                DCD     HRTIM1_TIMD_IRQHandler            ; HRTIM Timer D global Interrupt                                    
+                DCD     HRTIM1_TIME_IRQHandler            ; HRTIM Timer E global Interrupt                                    
+                DCD     HRTIM1_FLT_IRQHandler             ; HRTIM Fault global Interrupt 
+                DCD     DFSDM1_FLT0_IRQHandler            ; DFSDM Filter0 Interrupt   
+                DCD     DFSDM1_FLT1_IRQHandler            ; DFSDM Filter1 Interrupt                                            
+                DCD     DFSDM1_FLT2_IRQHandler            ; DFSDM Filter2 Interrupt                                            
+                DCD     DFSDM1_FLT3_IRQHandler            ; DFSDM Filter3 Interrupt                                                                                    
+                DCD     SAI3_IRQHandler                   ; SAI3 global Interrupt                                             
+                DCD     SWPMI1_IRQHandler                 ; Serial Wire Interface 1 global interrupt                          
+                DCD     TIM15_IRQHandler                  ; TIM15 global Interrupt                                            
+                DCD     TIM16_IRQHandler                  ; TIM16 global Interrupt                                            
+                DCD     TIM17_IRQHandler                  ; TIM17 global Interrupt                                            
+                DCD     MDIOS_WKUP_IRQHandler             ; MDIOS Wakeup  Interrupt                                           
+                DCD     MDIOS_IRQHandler                  ; MDIOS global Interrupt                                            
+                DCD     JPEG_IRQHandler                   ; JPEG global Interrupt                                             
+                DCD     MDMA_IRQHandler                   ; MDMA global Interrupt                                             
+                DCD     0                                 ; Reserved                                               
+                DCD     SDMMC2_IRQHandler                 ; SDMMC2 global Interrupt                                           
+                DCD     HSEM1_IRQHandler                  ; HSEM1 global Interrupt                                             
+                DCD     0                                 ; Reserved                                              
+                DCD     ADC3_IRQHandler                   ; ADC3 global Interrupt                                              
+                DCD     DMAMUX2_OVR_IRQHandler            ; DMAMUX Overrun interrupt                                           
+                DCD     BDMA_Channel0_IRQHandler          ; BDMA Channel 0 global Interrupt                                    
+                DCD     BDMA_Channel1_IRQHandler          ; BDMA Channel 1 global Interrupt                                    
+                DCD     BDMA_Channel2_IRQHandler          ; BDMA Channel 2 global Interrupt                                    
+                DCD     BDMA_Channel3_IRQHandler          ; BDMA Channel 3 global Interrupt                                    
+                DCD     BDMA_Channel4_IRQHandler          ; BDMA Channel 4 global Interrupt                                    
+                DCD     BDMA_Channel5_IRQHandler          ; BDMA Channel 5 global Interrupt                                    
+                DCD     BDMA_Channel6_IRQHandler          ; BDMA Channel 6 global Interrupt                                    
+                DCD     BDMA_Channel7_IRQHandler          ; BDMA Channel 7 global Interrupt                                    
+                DCD     COMP1_IRQHandler                  ; COMP1 global Interrupt                                            
+                DCD     LPTIM2_IRQHandler                 ; LP TIM2 global interrupt                                          
+                DCD     LPTIM3_IRQHandler                 ; LP TIM3 global interrupt                                          
+                DCD     LPTIM4_IRQHandler                 ; LP TIM4 global interrupt                                          
+                DCD     LPTIM5_IRQHandler                 ; LP TIM5 global interrupt                                          
+                DCD     LPUART1_IRQHandler                ; LP UART1 interrupt                                                
+                DCD     0                                 ; Reserved                                                                              
+                DCD     CRS_IRQHandler                    ; Clock Recovery Global Interrupt                                   
+                DCD     ECC_IRQHandler                    ; ECC diagnostic Global Interrupt                                              
+                DCD     SAI4_IRQHandler                   ; SAI4 global interrupt                                                
+                DCD     0                                 ; Reserved                                 
+                DCD     0                                 ; Reserved                                    
+                DCD     WAKEUP_PIN_IRQHandler             ; Interrupt for all 6 wake-up pins 
+                
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler                    [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                      [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler                [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler                [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler                 [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler               [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                      [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler                  [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler                    [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler                   [WEAK]
+                B       .
+                ENDP                                     
+                                                          
+Default_Handler PROC                                      
+
+                EXPORT  WWDG_IRQHandler                   [WEAK]                                       
+                EXPORT  PVD_AVD_IRQHandler                [WEAK]                         
+                EXPORT  TAMP_STAMP_IRQHandler             [WEAK]   
+                EXPORT  RTC_WKUP_IRQHandler               [WEAK]             
+                EXPORT  FLASH_IRQHandler                  [WEAK]                                        
+                EXPORT  RCC_IRQHandler                    [WEAK]                                          
+                EXPORT  EXTI0_IRQHandler                  [WEAK]                                            
+                EXPORT  EXTI1_IRQHandler                  [WEAK]                                           
+                EXPORT  EXTI2_IRQHandler                  [WEAK]                                            
+                EXPORT  EXTI3_IRQHandler                  [WEAK]                                            
+                EXPORT  EXTI4_IRQHandler                  [WEAK]
+                EXPORT  DMA1_Stream0_IRQHandler           [WEAK] 
+                EXPORT  DMA1_Stream1_IRQHandler           [WEAK]                        
+                EXPORT  DMA1_Stream2_IRQHandler           [WEAK]                     
+                EXPORT  DMA1_Stream3_IRQHandler           [WEAK]                    
+                EXPORT  DMA1_Stream4_IRQHandler           [WEAK]                        
+                EXPORT  DMA1_Stream5_IRQHandler           [WEAK]                          
+                EXPORT  DMA1_Stream6_IRQHandler           [WEAK]
+                EXPORT  DMA1_Stream7_IRQHandler           [WEAK]
+                EXPORT  ADC_IRQHandler                    [WEAK]                          
+                EXPORT  FDCAN1_IT0_IRQHandler             [WEAK]                                            
+                EXPORT  FDCAN2_IT0_IRQHandler             [WEAK] 
+                EXPORT  FDCAN1_IT1_IRQHandler             [WEAK]                                            
+                EXPORT  FDCAN2_IT1_IRQHandler             [WEAK]   
+                EXPORT  EXTI9_5_IRQHandler                [WEAK]                                    
+                EXPORT  TIM1_BRK_IRQHandler               [WEAK]                  
+                EXPORT  TIM1_UP_IRQHandler                [WEAK]                
+                EXPORT  TIM1_TRG_COM_IRQHandler           [WEAK] 
+                EXPORT  TIM1_CC_IRQHandler                [WEAK]                                   
+                EXPORT  TIM2_IRQHandler                   [WEAK]                                            
+                EXPORT  TIM3_IRQHandler                   [WEAK]                                            
+                EXPORT  TIM4_IRQHandler                   [WEAK]                                            
+                EXPORT  I2C1_EV_IRQHandler                [WEAK]                                             
+                EXPORT  I2C1_ER_IRQHandler                [WEAK]                                             
+                EXPORT  I2C2_EV_IRQHandler                [WEAK]                                            
+                EXPORT  I2C2_ER_IRQHandler                [WEAK]                                               
+                EXPORT  SPI1_IRQHandler                   [WEAK]                                           
+                EXPORT  SPI2_IRQHandler                   [WEAK]                                            
+                EXPORT  USART1_IRQHandler                 [WEAK]                                          
+                EXPORT  USART2_IRQHandler                 [WEAK]                                          
+                EXPORT  USART3_IRQHandler                 [WEAK]                                         
+                EXPORT  EXTI15_10_IRQHandler              [WEAK]                                  
+                EXPORT  RTC_Alarm_IRQHandler              [WEAK]                                       
+                EXPORT  TIM8_BRK_TIM12_IRQHandler         [WEAK]                 
+                EXPORT  TIM8_UP_TIM13_IRQHandler          [WEAK]                 
+                EXPORT  TIM8_TRG_COM_TIM14_IRQHandler     [WEAK] 
+                EXPORT  TIM8_CC_IRQHandler                [WEAK]                                   
+                EXPORT  DMA1_Stream7_IRQHandler           [WEAK]                                          
+                EXPORT  FMC_IRQHandler                    [WEAK]                                             
+                EXPORT  SDMMC1_IRQHandler                 [WEAK]                                             
+                EXPORT  TIM5_IRQHandler                   [WEAK]                                             
+                EXPORT  SPI3_IRQHandler                   [WEAK]                                             
+                EXPORT  UART4_IRQHandler                  [WEAK]                                            
+                EXPORT  UART5_IRQHandler                  [WEAK]                                            
+                EXPORT  TIM6_DAC_IRQHandler               [WEAK]                   
+                EXPORT  TIM7_IRQHandler                   [WEAK]                    
+                EXPORT  DMA2_Stream0_IRQHandler           [WEAK]                                  
+                EXPORT  DMA2_Stream1_IRQHandler           [WEAK]                                   
+                EXPORT  DMA2_Stream2_IRQHandler           [WEAK]                                    
+                EXPORT  DMA2_Stream3_IRQHandler           [WEAK]                                    
+                EXPORT  DMA2_Stream4_IRQHandler           [WEAK]                                 
+                EXPORT  ETH_IRQHandler                    [WEAK]                                         
+                EXPORT  ETH_WKUP_IRQHandler               [WEAK]                     
+                EXPORT  FDCAN_CAL_IRQHandler              [WEAK]                                                                                                                                                                              
+                EXPORT  DMA2_Stream5_IRQHandler           [WEAK]                                   
+                EXPORT  DMA2_Stream6_IRQHandler           [WEAK]                                   
+                EXPORT  DMA2_Stream7_IRQHandler           [WEAK]                                   
+                EXPORT  USART6_IRQHandler                 [WEAK]                                           
+                EXPORT  I2C3_EV_IRQHandler                [WEAK]                                              
+                EXPORT  I2C3_ER_IRQHandler                [WEAK]                                              
+                EXPORT  OTG_HS_EP1_OUT_IRQHandler         [WEAK]                      
+                EXPORT  OTG_HS_EP1_IN_IRQHandler          [WEAK]                      
+                EXPORT  OTG_HS_WKUP_IRQHandler            [WEAK]                        
+                EXPORT  OTG_HS_IRQHandler                 [WEAK]                                      
+                EXPORT  DCMI_IRQHandler                   [WEAK]                                             
+                EXPORT  RNG_IRQHandler                    [WEAK]
+                EXPORT  FPU_IRQHandler                    [WEAK]
+                EXPORT  UART7_IRQHandler                  [WEAK]
+                EXPORT  UART8_IRQHandler                  [WEAK]
+                EXPORT  SPI4_IRQHandler                   [WEAK]
+                EXPORT  SPI5_IRQHandler                   [WEAK]
+                EXPORT  SPI6_IRQHandler                   [WEAK]
+                EXPORT  SAI1_IRQHandler                   [WEAK]
+                EXPORT  LTDC_IRQHandler                   [WEAK]
+                EXPORT  LTDC_ER_IRQHandler                [WEAK]
+                EXPORT  DMA2D_IRQHandler                  [WEAK]
+                EXPORT  SAI2_IRQHandler                   [WEAK]   
+                EXPORT  QUADSPI_IRQHandler                [WEAK]
+                EXPORT  LPTIM1_IRQHandler                 [WEAK]
+                EXPORT  CEC_IRQHandler                    [WEAK]   
+                EXPORT  I2C4_EV_IRQHandler                [WEAK]
+                EXPORT  I2C4_ER_IRQHandler                [WEAK] 
+                EXPORT  SPDIF_RX_IRQHandler               [WEAK]
+                EXPORT  OTG_FS_EP1_OUT_IRQHandler         [WEAK]
+                EXPORT  OTG_FS_EP1_IN_IRQHandler          [WEAK]                      
+                EXPORT  OTG_FS_WKUP_IRQHandler            [WEAK]                      
+                EXPORT  OTG_FS_IRQHandler                 [WEAK]                        
+                EXPORT  DMAMUX1_OVR_IRQHandler            [WEAK]
+                EXPORT  HRTIM1_Master_IRQHandler          [WEAK] 
+                EXPORT  HRTIM1_TIMA_IRQHandler            [WEAK]                                      
+                EXPORT  HRTIM1_TIMB_IRQHandler            [WEAK]                                      
+                EXPORT  HRTIM1_TIMC_IRQHandler            [WEAK]                                      
+                EXPORT  HRTIM1_TIMD_IRQHandler            [WEAK]                                      
+                EXPORT  HRTIM1_TIME_IRQHandler            [WEAK]                                      
+                EXPORT  HRTIM1_FLT_IRQHandler             [WEAK]
+                EXPORT  DFSDM1_FLT0_IRQHandler            [WEAK] 
+                EXPORT  DFSDM1_FLT1_IRQHandler            [WEAK]                                             
+                EXPORT  DFSDM1_FLT2_IRQHandler            [WEAK]                                             
+                EXPORT  DFSDM1_FLT3_IRQHandler            [WEAK]                                                                                        
+                EXPORT  SAI3_IRQHandler                   [WEAK]                                             
+                EXPORT  SWPMI1_IRQHandler                 [WEAK]                            
+                EXPORT  TIM15_IRQHandler                  [WEAK]                                             
+                EXPORT  TIM16_IRQHandler                  [WEAK]                                              
+                EXPORT  TIM17_IRQHandler                  [WEAK]                                            
+                EXPORT  MDIOS_WKUP_IRQHandler             [WEAK]                                             
+                EXPORT  MDIOS_IRQHandler                  [WEAK]                                              
+                EXPORT  JPEG_IRQHandler                   [WEAK]                                               
+                EXPORT  MDMA_IRQHandler                   [WEAK]                                                                                             
+                EXPORT  SDMMC2_IRQHandler                 [WEAK]                                             
+                EXPORT  HSEM1_IRQHandler                  [WEAK]                                                                                                             
+                EXPORT  ADC3_IRQHandler                   [WEAK]                                                
+                EXPORT  DMAMUX2_OVR_IRQHandler            [WEAK]                                            
+                EXPORT  BDMA_Channel0_IRQHandler          [WEAK]                                      
+                EXPORT  BDMA_Channel1_IRQHandler          [WEAK]                                      
+                EXPORT  BDMA_Channel2_IRQHandler          [WEAK]                                      
+                EXPORT  BDMA_Channel3_IRQHandler          [WEAK]                                      
+                EXPORT  BDMA_Channel4_IRQHandler          [WEAK]                                     
+                EXPORT  BDMA_Channel5_IRQHandler          [WEAK]                                      
+                EXPORT  BDMA_Channel6_IRQHandler          [WEAK]                                      
+                EXPORT  BDMA_Channel7_IRQHandler          [WEAK]                                     
+                EXPORT  COMP1_IRQHandler                  [WEAK]                                              
+                EXPORT  LPTIM2_IRQHandler                 [WEAK]                                           
+                EXPORT  LPTIM3_IRQHandler                 [WEAK]                                            
+                EXPORT  LPTIM4_IRQHandler                 [WEAK]                                            
+                EXPORT  LPTIM5_IRQHandler                 [WEAK]                                            
+                EXPORT  LPUART1_IRQHandler                [WEAK]                                                  
+                EXPORT  CRS_IRQHandler                    [WEAK]
+                EXPORT  ECC_IRQHandler                    [WEAK] 				
+                EXPORT  SAI4_IRQHandler                   [WEAK]                                                                                     
+                EXPORT  WAKEUP_PIN_IRQHandler             [WEAK] 
+
+
+WWDG_IRQHandler                                                          
+PVD_AVD_IRQHandler                                             
+TAMP_STAMP_IRQHandler                
+RTC_WKUP_IRQHandler                            
+FLASH_IRQHandler                                                          
+RCC_IRQHandler                                                              
+EXTI0_IRQHandler                                                              
+EXTI1_IRQHandler                                                             
+EXTI2_IRQHandler                                                              
+EXTI3_IRQHandler                                                              
+EXTI4_IRQHandler 
+DMA1_Stream0_IRQHandler
+DMA1_Stream1_IRQHandler                                  
+DMA1_Stream2_IRQHandler                               
+DMA1_Stream3_IRQHandler                              
+DMA1_Stream4_IRQHandler                                  
+DMA1_Stream5_IRQHandler                                    
+DMA1_Stream6_IRQHandler                   
+ADC_IRQHandler                                           
+FDCAN1_IT0_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+FDCAN2_IT1_IRQHandler
+EXTI9_5_IRQHandler                                                
+TIM1_BRK_IRQHandler                        
+TIM1_UP_IRQHandler                      
+TIM1_TRG_COM_IRQHandler  
+TIM1_CC_IRQHandler                                               
+TIM2_IRQHandler                                                           
+TIM3_IRQHandler                                                           
+TIM4_IRQHandler                                                           
+I2C1_EV_IRQHandler                                                         
+I2C1_ER_IRQHandler                                                         
+I2C2_EV_IRQHandler                                                        
+I2C2_ER_IRQHandler                                                           
+SPI1_IRQHandler                                                          
+SPI2_IRQHandler                                                           
+USART1_IRQHandler                                                       
+USART2_IRQHandler                                                       
+USART3_IRQHandler                                                      
+EXTI15_10_IRQHandler                                            
+RTC_Alarm_IRQHandler                                                           
+TIM8_BRK_TIM12_IRQHandler                      
+TIM8_UP_TIM13_IRQHandler                       
+TIM8_TRG_COM_TIM14_IRQHandler  
+TIM8_CC_IRQHandler                                               
+DMA1_Stream7_IRQHandler                                                 
+FMC_IRQHandler                                                            
+SDMMC1_IRQHandler                                                            
+TIM5_IRQHandler                                                            
+SPI3_IRQHandler                                                            
+UART4_IRQHandler                                                          
+UART5_IRQHandler                                                          
+TIM6_DAC_IRQHandler                            
+TIM7_IRQHandler                              
+DMA2_Stream0_IRQHandler                                         
+DMA2_Stream1_IRQHandler                                          
+DMA2_Stream2_IRQHandler                                           
+DMA2_Stream3_IRQHandler                                           
+DMA2_Stream4_IRQHandler                                        
+ETH_IRQHandler                                                         
+ETH_WKUP_IRQHandler                                
+FDCAN_CAL_IRQHandler                                                                                                                                                                                                                            
+DMA2_Stream5_IRQHandler                                          
+DMA2_Stream6_IRQHandler                                          
+DMA2_Stream7_IRQHandler                                          
+USART6_IRQHandler                                                        
+I2C3_EV_IRQHandler                                                          
+I2C3_ER_IRQHandler                                                          
+OTG_HS_EP1_OUT_IRQHandler 
+OTG_HS_EP1_IN_IRQHandler 
+OTG_HS_WKUP_IRQHandler   
+OTG_HS_IRQHandler        
+DCMI_IRQHandler                                                            
+RNG_IRQHandler
+FPU_IRQHandler  
+UART7_IRQHandler                  
+UART8_IRQHandler                  
+SPI4_IRQHandler                   
+SPI5_IRQHandler                   
+SPI6_IRQHandler                   
+SAI1_IRQHandler                   
+LTDC_IRQHandler                   
+LTDC_ER_IRQHandler                 
+DMA2D_IRQHandler   
+SAI2_IRQHandler        
+QUADSPI_IRQHandler
+LPTIM1_IRQHandler
+CEC_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPDIF_RX_IRQHandler
+OTG_FS_EP1_OUT_IRQHandler
+OTG_FS_EP1_IN_IRQHandler 
+OTG_FS_WKUP_IRQHandler   
+OTG_FS_IRQHandler        
+DMAMUX1_OVR_IRQHandler
+HRTIM1_Master_IRQHandler               
+HRTIM1_TIMA_IRQHandler                                                      
+HRTIM1_TIMB_IRQHandler                                                      
+HRTIM1_TIMC_IRQHandler                                                      
+HRTIM1_TIMD_IRQHandler                                                      
+HRTIM1_TIME_IRQHandler                                                      
+HRTIM1_FLT_IRQHandler 
+DFSDM1_FLT0_IRQHandler
+DFSDM1_FLT1_IRQHandler                                                                
+DFSDM1_FLT2_IRQHandler                                                                
+DFSDM1_FLT3_IRQHandler                                                                                                                                
+SAI3_IRQHandler                                                                    
+SWPMI1_IRQHandler                                                 
+TIM15_IRQHandler                                                                   
+TIM16_IRQHandler                                                                    
+TIM17_IRQHandler                                                                  
+MDIOS_WKUP_IRQHandler                                                              
+MDIOS_IRQHandler                                                                    
+JPEG_IRQHandler                                                                      
+MDMA_IRQHandler                                                                                                                                            
+SDMMC2_IRQHandler                                                                  
+HSEM1_IRQHandler                                                                                                                                       
+ADC3_IRQHandler                                                                       
+DMAMUX2_OVR_IRQHandler                                                            
+BDMA_Channel0_IRQHandler                                                     
+BDMA_Channel1_IRQHandler                                                     
+BDMA_Channel2_IRQHandler                                                     
+BDMA_Channel3_IRQHandler                                                     
+BDMA_Channel4_IRQHandler                                                    
+BDMA_Channel5_IRQHandler                                                     
+BDMA_Channel6_IRQHandler                                                     
+BDMA_Channel7_IRQHandler                                                    
+COMP1_IRQHandler                                                                    
+LPTIM2_IRQHandler                                                                
+LPTIM3_IRQHandler                                                                 
+LPTIM4_IRQHandler                                                                 
+LPTIM5_IRQHandler                                                                 
+LPUART1_IRQHandler                                                                                                                         
+CRS_IRQHandler
+ECC_IRQHandler                                                            
+SAI4_IRQHandler      
+WAKEUP_PIN_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+                
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+                
+                 ELSE
+                
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+                 
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+

board/Fire_STM32H743IIT6/TOS_CONFIG/mqtt_config.h

@@ -0,0 +1,48 @@
+/*
+ * @Author: jiejie
+ * @Github: https://github.com/jiejieTop
+ * @LastEditTime: 2020-06-17 19:31:41
+ * @Description: the code belongs to jiejie, please keep the author information and source code according to the license.
+ */
+#ifndef _MQTT_CONFIG_H_
+#define _MQTT_CONFIG_H_
+
+//#define             MQTT_LOG_IS_SALOF
+
+#define             MQTT_NETSOCKET_USING_AT
+
+#define             MQTT_LOG_LEVEL                      MQTT_LOG_DEBUG_LEVEL   //MQTT_LOG_WARN_LEVEL MQTT_LOG_DEBUG_LEVEL
+
+#ifdef MQTT_LOG_IS_SALOF
+    #define         SALOF_USING_LOG                     (1U)
+    #define         SALOF_USING_SALOF                   (1U)
+    #define         SALOF_LOG_LEVEL                     MQTT_LOG_LEVEL
+    #define         SALOF_OS                            SALOF_USING_TENCENTOS
+    #define         SALOF_USING_IDLE_HOOK               (0U)
+    #define         SALOF_LOG_COLOR                     (1U)
+    #define         SALOF_LOG_TS                        (0U)
+    #define         SALOF_LOG_TAR                       (0U)
+    #define         SALOF_BUFF_SIZE                     512
+    #define         SALOF_FIFO_SIZE                     4096
+    #define         SALOF_TASK_STACK_SIZE               1024
+    #define         SALOF_TASK_TICK                     50
+#endif
+
+#define     MQTT_MAX_PACKET_ID                  (0xFFFF - 1)
+#define     MQTT_TOPIC_LEN_MAX                  64
+#define     MQTT_ACK_HANDLER_NUM_MAX            64
+#define     MQTT_DEFAULT_BUF_SIZE               1024
+#define     MQTT_DEFAULT_CMD_TIMEOUT            10000
+#define     MQTT_MAX_CMD_TIMEOUT                20000
+#define     MQTT_MIN_CMD_TIMEOUT                10000
+#define     MQTT_KEEP_ALIVE_INTERVAL            50         // unit: second
+#define     MQTT_VERSION                        4           // 4 is mqtt 3.1.1
+#define     MQTT_RECONNECT_DEFAULT_DURATION     1000
+#define     MQTT_THREAD_STACK_SIZE              2048
+#define     MQTT_THREAD_PRIO                    5
+#define     MQTT_THREAD_TICK                    50
+
+
+#define     MQTT_NETWORK_TYPE_NO_TLS
+
+#endif /* _MQTT_CONFIG_H_ */

board/Fire_STM32H743IIT6/TOS_CONFIG/tos_config.h

@@ -0,0 +1,39 @@
+#ifndef _TOS_CONFIG_H_
+#define  _TOS_CONFIG_H_
+
+#include "stm32h7xx.h"
+
+#define TOS_CFG_TASK_PRIO_MAX           10u
+
+#define TOS_CFG_ROUND_ROBIN_EN          1u
+
+#define TOS_CFG_OBJECT_VERIFY_EN        1u
+
+#define TOS_CFG_OBJ_DYNAMIC_CREATE_EN   1u
+
+#define TOS_CFG_EVENT_EN                1u
+
+#define TOS_CFG_MMBLK_EN                1u
+
+#define TOS_CFG_MMHEAP_EN               1u
+
+#define TOS_CFG_MMHEAP_DEFAULT_POOL_SIZE        0x20000
+
+#define TOS_CFG_MUTEX_EN                1u
+
+#define TOS_CFG_TIMER_EN                1u
+
+#define TOS_CFG_SEM_EN                  1u
+
+#define TOS_CFG_IDLE_TASK_STK_SIZE      128u
+
+#define TOS_CFG_CPU_TICK_PER_SECOND     1000u
+
+#define TOS_CFG_CPU_CLOCK               (SystemCoreClock)
+
+#define TOS_CFG_TIMER_AS_PROC           1u
+
+#define TOS_CFG_MAIL_QUEUE_EN           1u
+
+#endif
+

board/GD32F310G_START/BSP/Inc/gd32f3x0_it.h

@@ -0,0 +1,60 @@
+/*!
+    \file    gd32f3x0_it.h
+    \brief   the header file of the ISR
+
+    \version 2022-03-06, V1.0.0, demo for GD32F3x0
+*/
+
+/*
+    Copyright (c) 2022, GigaDevice Semiconductor Inc.
+
+    Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    1. Redistributions of source code must retain the above copyright notice, this 
+       list of conditions and the following disclaimer.
+    2. Redistributions in binary form must reproduce the above copyright notice, 
+       this list of conditions and the following disclaimer in the documentation 
+       and/or other materials provided with the distribution.
+    3. Neither the name of the copyright holder nor the names of its contributors 
+       may be used to endorse or promote products derived from this software without 
+       specific prior written permission.
+
+    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 
+IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
+INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 
+NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 
+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 
+WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+OF SUCH DAMAGE.
+*/
+
+#ifndef GD32F3X0_IT_H
+#define GD32F3X0_IT_H
+
+#include "gd32f3x0.h"
+
+/* function declarations */
+/* this function handles NMI exception */
+void NMI_Handler(void);
+/* this function handles HardFault exception */
+void HardFault_Handler(void);
+/* this function handles MemManage exception */
+void MemManage_Handler(void);
+/* this function handles BusFault exception */
+void BusFault_Handler(void);
+/* this function handles UsageFault exception */
+void UsageFault_Handler(void);
+/* this function handles SVC exception */
+void SVC_Handler(void);
+/* this function handles DebugMon exception */
+void DebugMon_Handler(void);
+/* this function handles PendSV exception */
+void PendSV_Handler(void);
+/* this function handles SysTick exception */
+void SysTick_Handler(void);
+
+#endif /* GD32F3X0_IT_H */

board/GD32F310G_START/BSP/Inc/gd32f3x0_libopt.h

@@ -0,0 +1,65 @@
+/*!
+    \file    gd32f3x0_libopt.h
+    \brief   library optional for gd32f3x0
+
+    \version 2022-03-06, V1.0.0, demo for GD32F3x0
+*/
+
+/*
+    Copyright (c) 2022, GigaDevice Semiconductor Inc.
+
+    Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    1. Redistributions of source code must retain the above copyright notice, this 
+       list of conditions and the following disclaimer.
+    2. Redistributions in binary form must reproduce the above copyright notice, 
+       this list of conditions and the following disclaimer in the documentation 
+       and/or other materials provided with the distribution.
+    3. Neither the name of the copyright holder nor the names of its contributors 
+       may be used to endorse or promote products derived from this software without 
+       specific prior written permission.
+
+    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 
+IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
+INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 
+NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 
+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 
+WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+OF SUCH DAMAGE.
+*/
+
+#ifndef GD32F3X0_LIBOPT_H
+#define GD32F3X0_LIBOPT_H
+
+#include "gd32f3x0_adc.h"
+#include "gd32f3x0_crc.h"
+#include "gd32f3x0_ctc.h"
+#include "gd32f3x0_dbg.h"
+#include "gd32f3x0_dma.h"
+#include "gd32f3x0_exti.h"
+#include "gd32f3x0_fmc.h"
+#include "gd32f3x0_gpio.h"
+#include "gd32f3x0_syscfg.h"
+#include "gd32f3x0_i2c.h"
+#include "gd32f3x0_fwdgt.h"
+#include "gd32f3x0_pmu.h"
+#include "gd32f3x0_rcu.h"
+#include "gd32f3x0_rtc.h"
+#include "gd32f3x0_spi.h"
+#include "gd32f3x0_timer.h"
+#include "gd32f3x0_usart.h"
+#include "gd32f3x0_wwdgt.h"
+#include "gd32f3x0_misc.h"
+#include "gd32f3x0_tsi.h"
+
+#ifdef GD32F350
+#include "gd32f3x0_cec.h"
+#include "gd32f3x0_cmp.h"
+#include "gd32f3x0_dac.h"
+#endif /* GD32F350 */
+
+#endif /* GD32F3X0_LIBOPT_H */

board/GD32F310G_START/BSP/Inc/gpio.h

@@ -0,0 +1,30 @@
+/******************************************************************************
+* File:             gpio.h
+*
+* Author:           iysheng@163.com  
+* Created:          04/14/22 
+*****************************************************************************/
+
+#ifndef __GPIO_H__
+#define __GPIO_H__
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "gd32f3x0_libopt.h"
+
+#define LED_Pin       GPIO_PIN_1
+#define LED_GPIO_Port GPIOA
+
+/**
+  * @brief GPIO inint
+  * @param void: 
+  * retval N/A.
+  */
+void board_gpio_init(void);
+
+#ifdef __cplusplus
+}
+#endif
+#endif /*__PINOUT_H__ */

board/GD32F310G_START/BSP/Inc/main.h

@@ -0,0 +1,36 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           : main.h
+  * @brief          : Header for main.c file.
+  *                   This file contains the common defines of the application.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

board/GD32F310G_START/BSP/Inc/mcu_init.h

@@ -0,0 +1,18 @@
+#ifndef __MCU_INIT_H
+#define __MCU_INIT_H
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#include "main.h"
+#include "usart.h"
+#include "gpio.h"
+#include "tos_k.h"
+
+void board_init(void);
+void SystemClock_Config(void);
+
+#ifdef __cplusplus
+}
+#endif
+#endif /*__ __MCU_INIT_H */

board/GD32F310G_START/BSP/Inc/tickless/bsp_pm_device.h

@@ -0,0 +1,11 @@
+#ifndef _PM_DEVICE_H_
+#define  _PM_DEVICE_H_
+
+#if TOS_CFG_PWR_MGR_EN > 0u 
+
+extern k_pm_device_t pm_device_uart;
+
+#endif
+
+#endif
+

board/GD32F310G_START/BSP/Inc/tickless/bsp_tickless_alarm.h

@@ -0,0 +1,17 @@
+#ifndef _TICKLESS_ALARM_H_
+#define  _TICKLESS_ALARM_H_
+
+#if TOS_CFG_TICKLESS_EN > 0u
+
+extern k_tickless_wkup_alarm_t tickless_wkup_alarm_systick;
+
+extern k_tickless_wkup_alarm_t tickless_wkup_alarm_tim;
+
+extern k_tickless_wkup_alarm_t tickless_wkup_alarm_rtc_wkupirq;
+
+extern k_tickless_wkup_alarm_t tickless_wkup_alarm_rtc_alarmirq;
+
+#endif
+
+#endif
+

board/GD32F310G_START/BSP/Inc/usart.h

@@ -0,0 +1,25 @@
+/******************************************************************************
+* File:             usart.h
+*
+* Author:           iysheng@163.com  
+* Created:          04/14/22 
+* Description:      
+*****************************************************************************/
+#ifndef __USART_H__
+#define __USART_H__
+#ifdef __cplusplus
+extern "C" {
+#endif
+#include "gd32f3x0_libopt.h"
+
+/**
+  * @brief 板级 usart 硬件初始化
+  * @param void: 
+  * retval N/A.
+  */
+int board_usart_init(void);
+
+#ifdef __cplusplus
+}
+#endif
+#endif /*__USART_H__ */

board/GD32F310G_START/BSP/Src/gd32f3x0_it.c

@@ -0,0 +1,151 @@
+/*!
+    \file    gd32f3x0_it.c
+    \brief   interrupt service routines
+
+    \version 2022-03-06, V1.0.0, demo for GD32F3x0
+*/
+
+/*
+    Copyright (c) 2022, GigaDevice Semiconductor Inc.
+
+    Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    1. Redistributions of source code must retain the above copyright notice, this 
+       list of conditions and the following disclaimer.
+    2. Redistributions in binary form must reproduce the above copyright notice, 
+       this list of conditions and the following disclaimer in the documentation 
+       and/or other materials provided with the distribution.
+    3. Neither the name of the copyright holder nor the names of its contributors 
+       may be used to endorse or promote products derived from this software without 
+       specific prior written permission.
+
+    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 
+IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
+INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 
+NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 
+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 
+WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+OF SUCH DAMAGE.
+*/
+
+#include "gd32f3x0_it.h"
+#include "tos_k.h"
+#include "tos_shell.h"
+
+/*!
+    \brief      this function handles NMI exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void NMI_Handler(void)
+{
+}
+
+/*!
+    \brief      this function handles HardFault exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void HardFault_Handler(void)
+{
+    /* if Hard Fault exception occurs, go to infinite loop */
+    while(1){
+    }
+}
+
+/*!
+    \brief      this function handles MemManage exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void MemManage_Handler(void)
+{
+    /* if Memory Manage exception occurs, go to infinite loop */
+    while(1){
+    }
+}
+
+/*!
+    \brief      this function handles BusFault exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void BusFault_Handler(void)
+{
+    /* if Bus Fault exception occurs, go to infinite loop */
+    while(1){
+    }
+}
+
+/*!
+    \brief      this function handles UsageFault exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void UsageFault_Handler(void)
+{
+    /* if Usage Fault exception occurs, go to infinite loop */
+    while(1){
+    }
+}
+
+/*!
+    \brief      this function handles SVC exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void SVC_Handler(void)
+{
+}
+
+/*!
+    \brief      this function handles DebugMon exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void DebugMon_Handler(void)
+{
+}
+
+/*!
+    \brief      this function handles SysTick exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void SysTick_Handler(void)
+{
+  if (tos_knl_is_running())
+  {
+    tos_knl_irq_enter();
+    tos_tick_handler();
+    tos_knl_irq_leave();
+  }
+}
+
+void USART0_IRQHandler(void)
+{
+    tos_knl_irq_enter();
+    if (SET == usart_interrupt_flag_get(USART0, USART_INT_FLAG_RBNE))
+    {
+        usart_flag_clear(USART0, USART_FLAG_ORERR);
+        tos_shell_input_byte((uint8_t)usart_data_receive(USART0));
+    }
+    if (SET == usart_interrupt_flag_get(USART0, USART_INT_FLAG_RBNE_ORERR))
+    {
+        usart_interrupt_flag_clear(USART0, USART_INT_FLAG_RBNE_ORERR);
+    }
+    tos_knl_irq_leave();
+}
+

board/GD32F310G_START/BSP/Src/gpio.c

@@ -0,0 +1,29 @@
+/******************************************************************************
+* File:             gpio.c
+*
+* Author:           iysheng@163.com  
+* Created:          04/14/22 
+*                   gpio hardware init
+*****************************************************************************/
+
+#include "gpio.h"
+
+/**
+  * @brief GPIO inint
+  * @param void: 
+  * retval N/A.
+  */
+void board_gpio_init(void)
+{
+    rcu_periph_clock_enable(RCU_GPIOA);
+    rcu_periph_clock_enable(RCU_GPIOA);
+    gpio_mode_set(GPIOA, GPIO_MODE_AF, GPIO_PUPD_PULLUP, GPIO_PIN_9);
+    gpio_mode_set(GPIOA, GPIO_MODE_AF, GPIO_PUPD_PULLUP, GPIO_PIN_10);
+    gpio_output_options_set(GPIOA, GPIO_OTYPE_PP, GPIO_OSPEED_10MHZ, GPIO_PIN_10);
+    gpio_output_options_set(GPIOA, GPIO_OTYPE_PP, GPIO_OSPEED_10MHZ, GPIO_PIN_9);
+    gpio_af_set(GPIOA, GPIO_AF_1, GPIO_PIN_9);
+    gpio_af_set(GPIOA, GPIO_AF_1, GPIO_PIN_10);
+    gpio_mode_set(GPIOA, GPIO_MODE_OUTPUT, GPIO_PUPD_PULLUP, GPIO_PIN_1);
+    gpio_bit_set(GPIOA, GPIO_PIN_1);
+}
+

board/GD32F310G_START/BSP/Src/main.c

@@ -0,0 +1,37 @@
+#include "mcu_init.h"
+#include "tos_shell.h"
+
+#define APPLICATION_TASK_STK_SIZE       0x100
+k_task_t application_task;
+uint8_t application_task_stk[APPLICATION_TASK_STK_SIZE];
+static char gs_cmd_buffer[32];
+
+__attribute__ ((__weak__)) void application_entry(void *arg)
+{
+    while (1) {
+        gpio_bit_toggle(LED_GPIO_Port, LED_Pin);
+        tos_task_delay(1000);
+    }
+}
+
+static void board_shell_output_t(const char ch)
+{
+    if (ch == '\n')
+    {
+        while(RESET == usart_flag_get(USART0, USART_FLAG_TBE));
+        usart_data_transmit(USART0, '\r');
+    }
+    while(RESET == usart_flag_get(USART0, USART_FLAG_TBE));
+    usart_data_transmit(USART0, ch);
+}
+
+int main(void)
+{
+    board_init();
+    printf("Welcome to TencentOS tiny(%s)\r\n", TOS_VERSION);
+    tos_knl_init();
+    tos_task_create(&application_task, "application_task", application_entry, NULL, 4, application_task_stk, APPLICATION_TASK_STK_SIZE, 0);
+    tos_shell_init(gs_cmd_buffer, sizeof(gs_cmd_buffer), board_shell_output_t, NULL);
+    tos_knl_start();
+}
+

board/GD32F310G_START/BSP/Src/mcu_init.c

@@ -0,0 +1,36 @@
+#include "mcu_init.h"
+
+#define USART_CONSOLE (USART0)
+int fputc(int ch, FILE *f)
+{
+  if (ch == '\n') {
+    while(RESET == usart_flag_get(USART_CONSOLE, USART_FLAG_TBE));
+    /* Auto complete return char */
+    usart_data_transmit(USART_CONSOLE, '\r');
+  }
+  while(RESET == usart_flag_get(USART_CONSOLE, USART_FLAG_TBE));
+  usart_data_transmit(USART_CONSOLE, ch);
+  return ch;
+}
+
+int _write(int fd, char *ptr, int len)
+{
+    int i = 0;
+    for (; i < len; i++)
+    {
+        if (*(ptr + i) == '\n') {
+          while(RESET == usart_flag_get(USART_CONSOLE, USART_FLAG_TBE));
+          /* Auto complete return char */
+          usart_data_transmit(USART_CONSOLE, '\r');
+        }
+        while(RESET == usart_flag_get(USART_CONSOLE, USART_FLAG_TBE));
+        usart_data_transmit(USART_CONSOLE, *(ptr + i));
+    }
+    return len;
+}
+
+void board_init(void)
+{
+    board_gpio_init();
+    board_usart_init();
+}

board/GD32F310G_START/BSP/Src/tickless/bsp_pm_device.c

@@ -0,0 +1,31 @@
+#include "tos_k.h"
+#include "mcu_init.h"
+
+#if TOS_CFG_PWR_MGR_EN > 0u
+
+static int pm_device_uart_init(void)
+{
+    return 0;
+}
+
+static int pm_device_uart_suspend(void)
+{
+    return 0;
+}
+
+static int pm_device_uart_resume(void)
+{
+    SystemClock_Config();
+
+    return 0;
+}
+
+k_pm_device_t pm_device_uart = {
+    .name       = "uart",
+    .init       = pm_device_uart_init,
+    .suspend    = pm_device_uart_suspend,
+    .resume     = pm_device_uart_resume,
+};
+
+#endif
+

board/GD32F310G_START/BSP/Src/tickless/bsp_pwr_mgr.c

@@ -0,0 +1,26 @@
+#include "tos_k.h"
+#include "tickless/bsp_pm_device.h"
+#include "tickless/bsp_tickless_alarm.h"
+
+int tos_bsp_tickless_setup(void)
+{
+#if TOS_CFG_TICKLESS_EN > 0u
+    tos_pm_device_register(&pm_device_uart);
+
+    /* we set a default one shot timer here(systick) */
+    // tos_tickless_wkup_alarm_install(TOS_LOW_POWER_MODE_SLEEP, &tickless_wkup_alarm_systick);
+    tos_tickless_wkup_alarm_install(TOS_LOW_POWER_MODE_SLEEP, &tickless_wkup_alarm_tim);
+    tos_tickless_wkup_alarm_init(TOS_LOW_POWER_MODE_SLEEP);
+
+    tos_tickless_wkup_alarm_install(TOS_LOW_POWER_MODE_STOP, &tickless_wkup_alarm_rtc_wkupirq);
+    tos_tickless_wkup_alarm_init(TOS_LOW_POWER_MODE_STOP);
+
+    tos_tickless_wkup_alarm_install(TOS_LOW_POWER_MODE_STANDBY, &tickless_wkup_alarm_rtc_alarmirq);
+    tos_tickless_wkup_alarm_init(TOS_LOW_POWER_MODE_STANDBY);
+
+    tos_pm_cpu_lpwr_mode_set(TOS_LOW_POWER_MODE_SLEEP);
+#endif
+
+    return 0;
+}
+

board/GD32F310G_START/BSP/Src/tickless/bsp_tickless_alarm.c

@@ -0,0 +1,440 @@
+#include "tos_k.h"
+
+#include "stm32l4xx_hal.h"
+#include "stm32l4xx_hal_tim.h"
+#include "stm32l4xx_hal_rtc.h"
+
+#if TOS_CFG_TICKLESS_EN > 0u
+
+/*
+    systick本身也被实现为tickless的唤醒闹钟，实现原理是，当系统要进入tickless模式时，
+    把systick的触发时间拉长
+    比如说，下一个任务或者软件定时器是6000ms后执行，那么这6000ms内systick没有必要一直来，
+    可以把systick的中断间隔设置为6000ms后再来（实际上systick内部的计时寄存器只有24位，systick
+    最大的中断间隔其实很小，可以参考tickless_systick_wkup_alarm_max_delay实现），但即使是这样，
+    功耗依然会比在进入idle时仅仅使得cpu进入sleep模式要低（因为systick步长拉长了，cpu可以在sleep
+    模式中停留更久）
+
+    实际上，tickless_systick_wkup_alarm_dismiss（tickless_wkup_alarm_dismiss）接口设计是有缺陷的，
+    因为CPU从tickless中醒来，可能并不是因为闹钟时间到了，有可能是外部中断引起的CPU唤醒，因此一个较
+    为完备的实现应该是，让tickless_wkup_alarm_dismiss接口返回实际睡眠的时间（可以通过闹钟的计时寄存
+    器的值换算出来）。此缺陷后期会完善修复，现阶段对硬件尚不熟悉。
+
+    注意，systick只能作为sleep模式下的唤醒闹钟。（参考tos_pm.h）
+
+    目前这一块实现尚不完备，有很懂这方面的朋友欢迎赐教~
+ */
+static void tickless_systick_suspend(void)
+{
+    cpu_systick_suspend();
+    cpu_systick_pending_reset();
+}
+
+static void tickless_systick_resume(void)
+{
+    cpu_systick_resume();
+}
+
+static void tickless_systick_wkup_alarm_expires_set(k_time_t millisecond)
+{
+    cpu_systick_expires_set(millisecond);
+}
+
+static int tickless_systick_wkup_alarm_setup(k_time_t millisecond)
+{
+    tickless_systick_suspend();
+    tickless_systick_wkup_alarm_expires_set(millisecond);
+    tickless_systick_resume();
+    return 0;
+}
+
+static int tickless_systick_wkup_alarm_dismiss(void)
+{
+    // TODO:
+    // if not wakeup by systick(that's say another interrupt), need to identify this and fix
+    return 0;
+}
+
+static k_time_t tickless_systick_wkup_alarm_max_delay(void)
+{
+    return cpu_systick_max_delay_millisecond();
+}
+
+k_tickless_wkup_alarm_t tickless_wkup_alarm_systick = {
+    .init       = K_NULL,
+    .setup      = tickless_systick_wkup_alarm_setup,
+    .dismiss    = tickless_systick_wkup_alarm_dismiss,
+    .max_delay  = tickless_systick_wkup_alarm_max_delay,
+};
+
+
+/////////////////////////////////////////////////////////////////////////////////////////////
+/////////////////////////////////////////////////////////////////////////////////////////////
+/*
+   利用timer6实现的tickless唤醒闹钟，可以作为SLEEP模式下的唤醒源。（参考tos_pm.h）
+   目前这一块实现尚不完备，有很懂这方面的朋友欢迎赐教~
+ */
+static TIM_HandleTypeDef tim6;
+
+void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *tim_handler)
+{
+    if (tim_handler->Instance == TIM6) {
+        __HAL_RCC_TIM6_CLK_ENABLE();
+
+        /* TIM6 interrupt Init */
+        HAL_NVIC_SetPriority(TIM6_DAC_IRQn, 0, 0);
+        HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
+    }
+}
+
+void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef *tim_handler)
+{
+    if (tim_handler->Instance == TIM6) {
+        /* Peripheral clock disable */
+        __HAL_RCC_TIM6_CLK_DISABLE();
+
+        /* TIM6 interrupt Deinit */
+        HAL_NVIC_DisableIRQ(TIM6_DAC_IRQn);
+    }
+}
+
+static int tickless_tim6_wkup_alarm_init(void)
+{
+    tim6.Instance = TIM6;
+    tim6.Init.Prescaler = 0;
+    tim6.Init.CounterMode = TIM_COUNTERMODE_UP;
+    tim6.Init.Period = 0;
+    tim6.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+    tim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+    HAL_TIM_Base_Init(&tim6);
+    return 0;
+}
+
+static int tickless_tim6_wkup_alarm_setup(k_time_t millisecond)
+{
+    tim6.Init.Prescaler = 8000 - 1;
+    tim6.Init.Period = (millisecond * 10) - 1;
+
+    HAL_TIM_Base_Stop(&tim6);
+    __HAL_TIM_CLEAR_IT(&tim6, TIM_IT_UPDATE);
+
+    HAL_TIM_Base_Init(&tim6);
+    HAL_TIM_Base_Start_IT(&tim6);
+    return 0;
+}
+
+static int tickless_tim6_wkup_alarm_dismiss(void)
+{
+    TOS_CPU_CPSR_ALLOC();
+
+    TOS_CPU_INT_DISABLE();
+
+    HAL_TIM_Base_Stop(&tim6);
+    HAL_TIM_Base_Stop_IT(&tim6);
+
+    TOS_CPU_INT_ENABLE();
+    return 0;
+}
+
+static k_time_t tickless_tim6_wkup_alarm_max_delay(void)
+{
+    k_time_t millisecond;
+    uint32_t max_period;
+
+    max_period = ~((uint32_t)0u);
+    millisecond = (max_period - 1) / 10;
+    return millisecond;
+}
+
+void TIM6_DAC_IRQHandler(void)
+{
+    HAL_TIM_IRQHandler(&tim6);
+}
+
+k_tickless_wkup_alarm_t tickless_wkup_alarm_tim = {
+    .init       = tickless_tim6_wkup_alarm_init,
+    .setup      = tickless_tim6_wkup_alarm_setup,
+    .dismiss    = tickless_tim6_wkup_alarm_dismiss,
+    .max_delay  = tickless_tim6_wkup_alarm_max_delay,
+};
+
+
+/////////////////////////////////////////////////////////////////////////////////////////////
+/////////////////////////////////////////////////////////////////////////////////////////////
+/*
+   利用rtc wakeup中断实现的tickless唤醒闹钟，可以作为SLEEP、STOP模式下的唤醒源。（参考tos_pm.h）
+   目前这一块实现尚不完备，有很懂这方面的朋友欢迎赐教~
+ */
+static RTC_HandleTypeDef rtc_handler;
+
+static HAL_StatusTypeDef tickless_rtc_time_set(uint8_t hour, uint8_t minu, uint8_t sec, uint8_t format)
+{
+    RTC_TimeTypeDef rtc_time;
+
+    rtc_time.Hours = hour;
+    rtc_time.Minutes = minu;
+    rtc_time.Seconds = sec;
+    rtc_time.TimeFormat = format;
+    rtc_time.DayLightSaving = RTC_DAYLIGHTSAVING_NONE;
+    rtc_time.StoreOperation = RTC_STOREOPERATION_RESET;
+    return HAL_RTC_SetTime(&rtc_handler, &rtc_time, RTC_FORMAT_BIN);
+}
+
+static HAL_StatusTypeDef tickless_rtc_date_set(uint8_t year, uint8_t month, uint8_t date, uint8_t week)
+{
+    RTC_DateTypeDef rtc_date;
+
+    rtc_date.Date = date;
+    rtc_date.Month = month;
+    rtc_date.WeekDay = week;
+    rtc_date.Year = year;
+    return HAL_RTC_SetDate(&rtc_handler, &rtc_date, RTC_FORMAT_BIN);
+}
+
+static int tickless_rtc_wkup_alarm_init(void)
+{
+    rtc_handler.Instance = RTC;
+    rtc_handler.Init.HourFormat = RTC_HOURFORMAT_24;
+    rtc_handler.Init.AsynchPrediv = 0X7F;
+    rtc_handler.Init.SynchPrediv = 0XFF;
+    rtc_handler.Init.OutPut = RTC_OUTPUT_DISABLE;
+    rtc_handler.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH;
+    rtc_handler.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN;
+
+    if (HAL_RTC_Init(&rtc_handler) != HAL_OK) {
+        return -1;
+    }
+
+    if (HAL_RTCEx_BKUPRead(&rtc_handler, RTC_BKP_DR0) != 0X5050) {
+        tickless_rtc_time_set(23, 59, 56, RTC_HOURFORMAT12_PM);
+        tickless_rtc_date_set(15, 12, 27, 7);
+        HAL_RTCEx_BKUPWrite(&rtc_handler, RTC_BKP_DR0,0X5050);
+    }
+
+    return 0;
+}
+
+static int tickless_rtc_wkupirq_wkup_alarm_setup(k_time_t millisecond)
+{
+    uint32_t wkup_clock = RTC_WAKEUPCLOCK_CK_SPRE_16BITS;
+    if (millisecond < 1000) {
+        millisecond = 1000;
+    }
+    uint32_t wkup_count = (millisecond / 1000) - 1;
+
+    __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(&rtc_handler, RTC_FLAG_WUTF);
+
+    HAL_RTCEx_SetWakeUpTimer_IT(&rtc_handler, wkup_count, wkup_clock);
+
+    HAL_NVIC_SetPriority(RTC_WKUP_IRQn, 0x02, 0x02);
+    HAL_NVIC_EnableIRQ(RTC_WKUP_IRQn);
+    return 0;
+}
+
+static int tickless_rtc_wkupirq_wkup_alarm_dismiss(void)
+{
+#if defined(STM32F4) || defined(STM32L4)
+    __HAL_PWR_CLEAR_FLAG(PWR_FLAG_WU);
+#endif
+
+    __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(&rtc_handler, RTC_FLAG_WUTF);
+
+    if (HAL_RTCEx_DeactivateWakeUpTimer(&rtc_handler) != HAL_OK) {
+        return -1;
+    }
+
+    HAL_NVIC_DisableIRQ(RTC_WKUP_IRQn);
+    return 0;
+}
+
+static k_time_t tickless_rtc_wkupirq_wkup_alarm_max_delay(void)
+{
+    return 0xFFFF * K_TIME_MILLISEC_PER_SEC;
+}
+
+void HAL_RTC_MspInit(RTC_HandleTypeDef *rtc_handler)
+{
+    RCC_OscInitTypeDef rcc_osc;
+    RCC_PeriphCLKInitTypeDef periph_clock;
+
+    __HAL_RCC_PWR_CLK_ENABLE();
+    HAL_PWR_EnableBkUpAccess();
+
+    rcc_osc.OscillatorType = RCC_OSCILLATORTYPE_LSE;
+    rcc_osc.PLL.PLLState = RCC_PLL_NONE;
+    rcc_osc.LSEState = RCC_LSE_ON;
+    HAL_RCC_OscConfig(&rcc_osc);
+
+    periph_clock.PeriphClockSelection = RCC_PERIPHCLK_RTC;
+    periph_clock.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
+    HAL_RCCEx_PeriphCLKConfig(&periph_clock);
+
+    __HAL_RCC_RTC_ENABLE();
+}
+
+void RTC_WKUP_IRQHandler(void)
+{
+    HAL_RTCEx_WakeUpTimerIRQHandler(&rtc_handler);
+}
+
+void HAL_RTCEx_WakeUpTimerEventCallback(RTC_HandleTypeDef *rtc_handler)
+{
+}
+
+k_tickless_wkup_alarm_t tickless_wkup_alarm_rtc_wkupirq = {
+    .init       = tickless_rtc_wkup_alarm_init,
+    .setup      = tickless_rtc_wkupirq_wkup_alarm_setup,
+    .dismiss    = tickless_rtc_wkupirq_wkup_alarm_dismiss,
+    .max_delay  = tickless_rtc_wkupirq_wkup_alarm_max_delay,
+};
+
+
+
+/////////////////////////////////////////////////////////////////////////////////////////////
+/////////////////////////////////////////////////////////////////////////////////////////////
+/*
+   利用rtc alarm中断实现的tickless唤醒闹钟，可以作为SLEEP、STOP、STANDBY模式下的唤醒源。（参考tos_pm.h）
+   目前这一块实现尚不完备，有很懂这方面的朋友欢迎赐教~
+ */
+static int tickless_rtc_alarmirq_wkup_alarm_setup(k_time_t millisecond)
+{
+    uint8_t hour, minute, second, subsecond, date;
+
+    RTC_AlarmTypeDef rtc_alarm;
+    RTC_TimeTypeDef rtc_time;
+    RTC_DateTypeDef rtc_date;
+
+    HAL_RTC_GetTime(&rtc_handler, &rtc_time, RTC_FORMAT_BIN);
+    HAL_RTC_GetDate(&rtc_handler, &rtc_date, RTC_FORMAT_BIN);
+
+    hour = rtc_time.Hours;
+    minute = rtc_time.Minutes;
+    second = rtc_time.Seconds;
+#if 0
+    date = rtc_date.Date;
+#else
+    date = rtc_date.WeekDay;
+#endif
+
+    printf("before >>>  %d  %d %d %d\n", date, hour, minute, second);
+
+    /* I know it's ugly, I will find a elegant way. Welcome to tell me, 3ks~ */
+    second += millisecond / K_TIME_MILLISEC_PER_SEC;
+    if (second >= 60) {
+        minute += 1;
+        second -= 60;
+    }
+    if (minute >= 60) {
+        hour += 1;
+        minute -= 60;
+    }
+    if (hour >= 24) {
+        date += 1;
+        hour -= 24;
+    }
+
+    printf("after >>>  %d  %d %d %d\n", date, hour, minute, second);
+
+    rtc_alarm.AlarmTime.Hours = hour;
+    rtc_alarm.AlarmTime.Minutes = minute;
+    rtc_alarm.AlarmTime.Seconds = second;
+    rtc_alarm.AlarmTime.SubSeconds = 0;
+    rtc_alarm.AlarmTime.TimeFormat = RTC_HOURFORMAT12_AM;
+
+    rtc_alarm.AlarmMask = RTC_ALARMMASK_NONE;
+    rtc_alarm.AlarmSubSecondMask = RTC_ALARMSUBSECONDMASK_NONE;
+    rtc_alarm.AlarmDateWeekDaySel = RTC_ALARMDATEWEEKDAYSEL_WEEKDAY; // RTC_ALARMDATEWEEKDAYSEL_DATE; // RTC_ALARMDATEWEEKDAYSEL_WEEKDAY;
+    rtc_alarm.AlarmDateWeekDay = date;
+    rtc_alarm.Alarm = RTC_ALARM_A;
+    HAL_RTC_SetAlarm_IT(&rtc_handler, &rtc_alarm, RTC_FORMAT_BIN);
+
+    HAL_NVIC_SetPriority(RTC_Alarm_IRQn, 0x01, 0x02);
+    HAL_NVIC_EnableIRQ(RTC_Alarm_IRQn);
+
+
+    // __HAL_PWR_GET_FLAG(PWR_FLAG_WU)
+
+
+    __HAL_RCC_AHB1_FORCE_RESET();       //复位所有IO口
+    __HAL_RCC_PWR_CLK_ENABLE();         //使能PWR时钟
+
+    // __HAL_RCC_BACKUPRESET_FORCE();      //复位备份区域
+    HAL_PWR_EnableBkUpAccess();         //后备区域访问使能
+
+    __HAL_PWR_CLEAR_FLAG(PWR_FLAG_SB);
+    __HAL_RTC_WRITEPROTECTION_DISABLE(&rtc_handler);//关闭RTC写保护
+
+    //关闭RTC相关中断
+    __HAL_RTC_WAKEUPTIMER_DISABLE_IT(&rtc_handler,RTC_IT_WUT);
+#if 0
+    __HAL_RTC_TIMESTAMP_DISABLE_IT(&rtc_handler,RTC_IT_TS);
+    __HAL_RTC_ALARM_DISABLE_IT(&rtc_handler,RTC_IT_ALRA|RTC_IT_ALRB);
+#endif
+
+    //清除RTC相关中断标志位
+    __HAL_RTC_ALARM_CLEAR_FLAG(&rtc_handler,RTC_FLAG_ALRAF|RTC_FLAG_ALRBF);
+    __HAL_RTC_TIMESTAMP_CLEAR_FLAG(&rtc_handler,RTC_FLAG_TSF);
+    __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(&rtc_handler,RTC_FLAG_WUTF);
+
+    // __HAL_RCC_BACKUPRESET_RELEASE();                    //备份区域复位结束
+    __HAL_RTC_WRITEPROTECTION_ENABLE(&rtc_handler);     //使能RTC写保护
+
+
+#ifdef STM32F4
+    __HAL_PWR_CLEAR_FLAG(PWR_FLAG_WU);                  //清除Wake_UP标志
+#endif
+
+#ifdef STM32F7
+    // __HAL_PWR_CLEAR_WAKEUP_FLAG(PWR_WAKEUP_PIN_FLAG1);  //清除Wake_UP标志
+#endif
+
+    // HAL_PWR_EnableWakeUpPin(PWR_WAKEUP_PIN1);           //设置WKUP用于唤醒
+
+    return 0;
+}
+
+static int tickless_rtc_alarmirq_wkup_alarm_dismiss(void)
+{
+#if 1
+    // __HAL_PWR_GET_FLAG(PWR_FLAG_WU);
+
+    __HAL_PWR_CLEAR_FLAG(PWR_FLAG_WU);
+
+    // __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(&rtc_handler, RTC_FLAG_ALRAF);
+
+    __HAL_RTC_ALARM_CLEAR_FLAG(&rtc_handler, RTC_FLAG_ALRAF);
+
+#if 0
+    if (HAL_RTCEx_DeactivateWakeUpTimer(&rtc_handler) != HAL_OK) {
+        return -1;
+    }
+#endif
+
+    HAL_NVIC_DisableIRQ(RTC_Alarm_IRQn);
+    return 0;
+#endif
+}
+
+static k_time_t tickless_rtc_alarmirq_wkup_alarm_max_delay(void)
+{
+    return 0xFFFF; // just kidding, I will fix it out. Welcome to tell me, 3ks~ */
+}
+
+void RTC_Alarm_IRQHandler(void)
+{
+    HAL_RTC_AlarmIRQHandler(&rtc_handler);
+}
+
+void HAL_RTC_AlarmAEventCallback(RTC_HandleTypeDef *rtc_handler)
+{
+}
+
+k_tickless_wkup_alarm_t tickless_wkup_alarm_rtc_alarmirq = {
+    .init       = tickless_rtc_wkup_alarm_init,
+    .setup      = tickless_rtc_alarmirq_wkup_alarm_setup,
+    .dismiss    = tickless_rtc_alarmirq_wkup_alarm_dismiss,
+    .max_delay  = tickless_rtc_alarmirq_wkup_alarm_max_delay,
+};
+
+#endif
+

board/GD32F310G_START/BSP/Src/usart.c

@@ -0,0 +1,43 @@
+/**
+  ******************************************************************************
+  * File Name          : USART.c
+  * Description        : This file provides code for the configuration
+  *                      of the USART instances.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "usart.h"
+
+/**
+  * @brief 板级 usart 硬件初始化
+  * @param void:
+  * retval N/A.
+  */
+int board_usart_init(void)
+{
+    rcu_periph_clock_enable(RCU_USART0);
+    usart_deinit(RCU_USART0);
+    usart_baudrate_set(USART0, 115200);
+    usart_stop_bit_set(USART0, USART_STB_1BIT);
+    usart_word_length_set(USART0, USART_WL_8BIT);
+    usart_parity_config(USART0, USART_PM_NONE);
+    usart_transmit_config(USART0, USART_TRANSMIT_ENABLE);
+    usart_receive_config(USART0, USART_RECEIVE_ENABLE);
+    usart_interrupt_enable(USART0, USART_INT_RBNE);
+    usart_enable(USART0);
+    nvic_irq_enable(USART0_IRQn, 0, 0);
+
+    return 0;
+}

board/GD32F310G_START/GCC/hello_world/Makefile

@@ -0,0 +1,226 @@
+##########################################################################################################################
+# File automatically-generated by tool: [projectgenerator] version: [3.3.0] date: [Mon Aug 05 10:29:11 CST 2019]
+##########################################################################################################################
+
+# ------------------------------------------------
+# Generic Makefile (based on gcc)
+#
+# ChangeLog :
+#	2022-04-13 - Port to GD32F310-START
+#	2017-02-10 - Several enhancements + project update mode
+#   2015-07-22 - first version
+# ------------------------------------------------
+
+######################################
+# target
+######################################
+TARGET = TencentOS_tiny
+
+
+######################################
+# building variables
+######################################
+# debug build?
+DEBUG = 1
+# optimization
+OPT = -O2
+
+TOP_DIR = ../../../..
+#######################################
+# paths
+#######################################
+# Build path
+BUILD_DIR = build
+
+######################################
+# source
+######################################
+# C sources
+KERNEL_SRC =  \
+        ${wildcard $(TOP_DIR)/kernel/core/*.c}
+        C_SOURCES += $(KERNEL_SRC)
+
+ARCH_SRC =  \
+        ${wildcard $(TOP_DIR)/arch/arm/arm-v7m/cortex-m4/gcc/*.c} \
+        ${wildcard $(TOP_DIR)/arch/arm/arm-v7m/common/*.c}
+        C_SOURCES += $(ARCH_SRC)
+
+HAL_DRIVER_SRC =  \
+		$(TOP_DIR)/board/GD32F310G_START/BSP/Src/main.c \
+		$(TOP_DIR)/board/GD32F310G_START/BSP/Src/mcu_init.c \
+		$(TOP_DIR)/board/GD32F310G_START/BSP/Src/gd32f3x0_it.c \
+		$(TOP_DIR)/board/GD32F310G_START/BSP/Src/gpio.c \
+		$(TOP_DIR)/board/GD32F310G_START/BSP/Src/usart.c \
+		$(TOP_DIR)/platform/vendor_bsp/gd/GD32F3x0_Firmware_Library/CMSIS/GD/GD32F3x0/Source/system_gd32f3x0.c \
+		$(TOP_DIR)/platform/vendor_bsp/gd/GD32F3x0_Firmware_Library/GD32F3x0_standard_peripheral/Source/gd32f3x0_dbg.c \
+		$(TOP_DIR)/platform/vendor_bsp/gd/GD32F3x0_Firmware_Library/GD32F3x0_standard_peripheral/Source/gd32f3x0_dma.c \
+		$(TOP_DIR)/platform/vendor_bsp/gd/GD32F3x0_Firmware_Library/GD32F3x0_standard_peripheral/Source/gd32f3x0_exti.c \
+		$(TOP_DIR)/platform/vendor_bsp/gd/GD32F3x0_Firmware_Library/GD32F3x0_standard_peripheral/Source/gd32f3x0_fmc.c \
+		$(TOP_DIR)/platform/vendor_bsp/gd/GD32F3x0_Firmware_Library/GD32F3x0_standard_peripheral/Source/gd32f3x0_gpio.c \
+		$(TOP_DIR)/platform/vendor_bsp/gd/GD32F3x0_Firmware_Library/GD32F3x0_standard_peripheral/Source/gd32f3x0_misc.c \
+		$(TOP_DIR)/platform/vendor_bsp/gd/GD32F3x0_Firmware_Library/GD32F3x0_standard_peripheral/Source/gd32f3x0_pmu.c \
+		$(TOP_DIR)/platform/vendor_bsp/gd/GD32F3x0_Firmware_Library/GD32F3x0_standard_peripheral/Source/gd32f3x0_rcu.c \
+		$(TOP_DIR)/platform/vendor_bsp/gd/GD32F3x0_Firmware_Library/GD32F3x0_standard_peripheral/Source/gd32f3x0_syscfg.c \
+		$(TOP_DIR)/platform/vendor_bsp/gd/GD32F3x0_Firmware_Library/GD32F3x0_standard_peripheral/Source/gd32f3x0_timer.c \
+		$(TOP_DIR)/platform/vendor_bsp/gd/GD32F3x0_Firmware_Library/GD32F3x0_standard_peripheral/Source/gd32f3x0_usart.c
+        C_SOURCES += $(HAL_DRIVER_SRC) 
+
+# ASM sources
+ASM_SOURCES =  \
+$(TOP_DIR)/platform/vendor_bsp/gd/GD32F3x0_Firmware_Library/CMSIS/GD/GD32F3x0/Source/GCC/startup_gd32f3x0.s
+
+ASM_SOURCES_S =  \
+$(TOP_DIR)/arch/arm/arm-v7m/cortex-m4/gcc/port_s.S
+
+COMPONENTS_SRC = \
+		$(TOP_DIR)/components/shell/tos_shell.c \
+		$(TOP_DIR)/components/shell/tos_shell_commands.c
+        C_SOURCES += $(COMPONENTS_SRC) 
+
+#######################################
+# binaries
+#######################################
+PREFIX = arm-none-eabi-
+# The gcc compiler bin path can be either defined in make command via GCC_PATH variable (> make GCC_PATH=xxx)
+# either it can be added to the PATH environment variable.
+ifdef GCC_PATH
+CC = $(GCC_PATH)/$(PREFIX)gcc
+AS = $(GCC_PATH)/$(PREFIX)gcc -x assembler-with-cpp
+CP = $(GCC_PATH)/$(PREFIX)objcopy
+SZ = $(GCC_PATH)/$(PREFIX)size
+else
+CC = $(PREFIX)gcc
+AS = $(PREFIX)gcc -x assembler-with-cpp
+CP = $(PREFIX)objcopy
+SZ = $(PREFIX)size
+endif
+HEX = $(CP) -O ihex
+BIN = $(CP) -O binary -S
+ 
+#######################################
+# CFLAGS
+#######################################
+# cpu
+CPU = -mcpu=cortex-m4
+
+# fpu
+FPU = -mfpu=fpv4-sp-d16
+
+# float-abi
+FLOAT-ABI = -mfloat-abi=hard
+
+# mcu
+MCU = $(CPU) -mthumb $(FPU) $(FLOAT-ABI)
+
+# macros for gcc
+# AS defines
+AS_DEFS = 
+
+# C defines
+C_DEFS =  \
+-DGD32F310
+
+# AS includes
+AS_INCLUDES = 
+
+# C includes
+KERNEL_INC = \
+        -I $(TOP_DIR)/kernel/core/include  \
+        -I $(TOP_DIR)/kernel/pm/include  \
+        -I $(TOP_DIR)/kernel/hal/include \
+        -I $(TOP_DIR)/arch/arm/arm-v7m/common/include \
+        -I $(TOP_DIR)/arch/arm/arm-v7m/cortex-m4/gcc \
+        -I $(TOP_DIR)/board/GD32F310G_START/TOS-CONFIG
+C_INCLUDES += $(KERNEL_INC)
+
+CMSIS_INC = \
+        -I $(TOP_DIR)/osal/cmsis_os \
+        -I $(TOP_DIR)/platform/vendor_bsp/gd/GD32F3x0_Firmware_Library/CMSIS
+C_INCLUDES += $(CMSIS_INC)
+
+HAL_DRIVER_INC =  \
+		-I $(TOP_DIR)/board/GD32F310G_START/BSP/Inc \
+		-I $(TOP_DIR)/platform/vendor_bsp/gd/GD32F3x0_Firmware_Library/CMSIS/GD/GD32F3x0/Include \
+		-I $(TOP_DIR)/platform/vendor_bsp/gd/GD32F3x0_Firmware_Library/GD32F3x0_standard_peripheral/Include
+C_INCLUDES += $(HAL_DRIVER_INC)
+
+COMPONENTS_INC = \
+		-I $(TOP_DIR)/components/shell/include
+C_INCLUDES += $(COMPONENTS_INC)
+
+# compile gcc flags
+ASFLAGS = $(MCU) $(AS_DEFS) $(AS_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections
+
+CFLAGS = $(MCU) $(C_DEFS) $(C_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections
+
+ifeq ($(DEBUG), 1)
+CFLAGS += -g -gdwarf-2
+endif
+
+
+# Generate dependency information
+CFLAGS += -MMD -MP -MF"$(@:%.o=%.d)"
+
+
+#######################################
+# LDFLAGS
+#######################################
+# link script
+LDSCRIPT = gd32f310_flash.ld
+
+# libraries
+LIBS = -lc -lm -lnosys 
+LIBDIR = 
+LDFLAGS = $(MCU) -specs=nano.specs -T$(LDSCRIPT) $(LIBDIR) $(LIBS) -Wl,-Map=$(BUILD_DIR)/$(TARGET).map,--cref -Wl,--gc-sections
+
+# default action: build all
+all: $(BUILD_DIR)/$(TARGET).elf $(BUILD_DIR)/$(TARGET).hex $(BUILD_DIR)/$(TARGET).bin
+
+
+#######################################
+# build the application
+#######################################
+# list of objects
+OBJECTS = $(addprefix $(BUILD_DIR)/,$(notdir $(C_SOURCES:.c=.o)))
+vpath %.c $(sort $(dir $(C_SOURCES)))
+# list of ASM program objects
+OBJECTS += $(addprefix $(BUILD_DIR)/,$(notdir $(ASM_SOURCES:.s=.o)))
+vpath %.s $(sort $(dir $(ASM_SOURCES)))
+OBJECTS += $(addprefix $(BUILD_DIR)/,$(notdir $(ASM_SOURCES_S:.S=.o)))
+vpath %.S $(sort $(dir $(ASM_SOURCES_S)))
+
+$(BUILD_DIR)/%.o: %.c Makefile | $(BUILD_DIR) 
+	$(CC) -c $(CFLAGS) -Wa,-a,-ad,-alms=$(BUILD_DIR)/$(notdir $(<:.c=.lst)) $< -o $@
+
+$(BUILD_DIR)/%.o: %.s Makefile | $(BUILD_DIR)
+	$(AS) -c $(CFLAGS) $< -o $@
+	
+$(BUILD_DIR)/%.o: %.S Makefile | $(BUILD_DIR)
+	$(AS) -c $(CFLAGS) $< -o $@
+
+$(BUILD_DIR)/$(TARGET).elf: $(OBJECTS) Makefile
+	$(CC) $(OBJECTS) $(LDFLAGS) -o $@
+	$(SZ) $@
+
+$(BUILD_DIR)/%.hex: $(BUILD_DIR)/%.elf | $(BUILD_DIR)
+	$(HEX) $< $@
+	
+$(BUILD_DIR)/%.bin: $(BUILD_DIR)/%.elf | $(BUILD_DIR)
+	$(BIN) $< $@	
+	@cp $@ ./$(notdir $@)
+	
+$(BUILD_DIR):
+	mkdir $@		
+
+#######################################
+# clean up
+#######################################
+clean:
+	-rm -fR $(BUILD_DIR)
+  
+#######################################
+# dependencies
+#######################################
+-include $(wildcard $(BUILD_DIR)/*.d)
+
+# *** EOF ***

board/GD32F310G_START/GCC/hello_world/gd32f310_flash.ld

@@ -0,0 +1,156 @@
+/*
+ * linker script for GD32F3x0 with GNU ld
+ * bernard.xiong 2009-10-14
+ * iysheng 2022-04-14
+ */
+
+/* Program Entry, set to mark it as "used" and avoid gc */
+ENTRY(Reset_Handler)
+FLASH_SIZE = 0x10000;
+SRAM_SIZE  = 0x2000;
+HEAP_SIZE  = 0x800;
+STACK_SIZE = 0x200;
+
+MEMORY
+{
+    CODE (rx) : ORIGIN = 0x08000000, LENGTH = FLASH_SIZE
+    DATA (rw) : ORIGIN = 0x20000000, LENGTH = SRAM_SIZE
+    HEAP (rw) : ORIGIN = 0x20000000 + SRAM_SIZE - HEAP_SIZE, LENGTH = HEAP_SIZE
+}
+
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _stext = .;
+        KEEP(*(.isr_vector))            /* Startup code */
+        . = ALIGN(4);
+        *(.text)                        /* remaining code */
+        *(.text.*)                      /* remaining code */
+        *(.rodata)                      /* read-only data (constants) */
+        *(.rodata*)
+        *(.glue_7)
+        *(.glue_7t)
+        *(.gnu.linkonce.t*)
+
+        /* section information for finsh shell */
+        . = ALIGN(4);
+        __fsymtab_start = .;
+        KEEP(*(FSymTab))
+        __fsymtab_end = .;
+        . = ALIGN(4);
+        __vsymtab_start = .;
+        KEEP(*(VSymTab))
+        __vsymtab_end = .;
+        . = ALIGN(4);
+
+        /* section information for initial. */
+        . = ALIGN(4);
+        __rt_init_start = .;
+        KEEP(*(SORT(.rti_fn*)))
+        __rt_init_end = .;
+        . = ALIGN(4);
+
+        . = ALIGN(4);
+        _etext = .;
+    } > CODE = 0
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    __exidx_start = .;
+    .ARM.exidx :
+    {
+        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+
+        /* This is used by the startup in order to initialize the .data secion */
+        _sidata = .;
+    } > CODE
+    __exidx_end = .;
+
+    /* .data section which is used for initialized data */
+
+    .data : AT (_sidata)
+    {
+        . = ALIGN(4);
+        /* This is used by the startup in order to initialize the .data secion */
+        _sdata = . ;
+
+        *(.data)
+        *(.data.*)
+        *(.gnu.linkonce.d*)
+
+        . = ALIGN(4);
+        /* This is used by the startup in order to initialize the .data secion */
+        _edata = . ;
+    } >DATA
+
+    .stack : 
+    {
+        . = . + STACK_SIZE;
+        . = ALIGN(4);
+        _estack = .;
+    } >DATA
+
+    __bss_start = .;
+    .bss :
+    {
+        . = ALIGN(4);
+        /* This is used by the startup in order to initialize the .bss secion */
+        _sbss = .;
+
+        *(.bss)
+        *(.bss.*)
+        *(COMMON)
+
+        . = ALIGN(4);
+        /* This is used by the startup in order to initialize the .bss secion */
+        _ebss = . ;
+        *(.bss.init)
+    } > DATA
+    __bss_end = .;
+
+    .heap : {
+        __heap_start__ = .;
+        end = __heap_start__;
+        _end = end;
+        __end = end;
+        . = . + HEAP_SIZE;
+        /* . = . + Min_Heap_Size; */
+        __heap_end__ = .;
+        __HeapLimit = __heap_end__;
+    } > HEAP
+
+    /* Stabs debugging sections.  */
+    .stab          0 : { *(.stab) }
+    .stabstr       0 : { *(.stabstr) }
+    .stab.excl     0 : { *(.stab.excl) }
+    .stab.exclstr  0 : { *(.stab.exclstr) }
+    .stab.index    0 : { *(.stab.index) }
+    .stab.indexstr 0 : { *(.stab.indexstr) }
+    .comment       0 : { *(.comment) }
+    /* DWARF debug sections.
+     * Symbols in the DWARF debugging sections are relative to the beginning
+     * of the section so we begin them at 0.  */
+    /* DWARF 1 */
+    .debug          0 : { *(.debug) }
+    .line           0 : { *(.line) }
+    /* GNU DWARF 1 extensions */
+    .debug_srcinfo  0 : { *(.debug_srcinfo) }
+    .debug_sfnames  0 : { *(.debug_sfnames) }
+    /* DWARF 1.1 and DWARF 2 */
+    .debug_aranges  0 : { *(.debug_aranges) }
+    .debug_pubnames 0 : { *(.debug_pubnames) }
+    /* DWARF 2 */
+    .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
+    .debug_abbrev   0 : { *(.debug_abbrev) }
+    .debug_line     0 : { *(.debug_line) }
+    .debug_frame    0 : { *(.debug_frame) }
+    .debug_str      0 : { *(.debug_str) }
+    .debug_loc      0 : { *(.debug_loc) }
+    .debug_macinfo  0 : { *(.debug_macinfo) }
+    /* SGI/MIPS DWARF 2 extensions */
+    .debug_weaknames 0 : { *(.debug_weaknames) }
+    .debug_funcnames 0 : { *(.debug_funcnames) }
+    .debug_typenames 0 : { *(.debug_typenames) }
+    .debug_varnames  0 : { *(.debug_varnames) }
+}

board/GD32F310G_START/TOS-CONFIG/tickless/tos_config.h

@@ -0,0 +1,41 @@
+#ifndef _TOS_CONFIG_H_
+#define  _TOS_CONFIG_H_
+
+#include "stm32l4xx.h"
+
+#define TOS_CFG_TASK_PRIO_MAX           10u
+
+#define TOS_CFG_ROUND_ROBIN_EN          1u
+
+#define TOS_CFG_OBJECT_VERIFY_EN           1u
+
+#define TOS_CFG_TASK_DYNAMIC_CREATE_EN  0u
+
+#define TOS_CFG_EVENT_EN                1u
+
+#define TOS_CFG_MMBLK_EN                1u
+
+#define TOS_CFG_MMHEAP_EN               1u
+
+#define TOS_CFG_MMHEAP_DEFAULT_POOL_SIZE        0x6000
+
+#define TOS_CFG_MUTEX_EN                1u
+
+#define TOS_CFG_TIMER_EN                1u
+
+#define TOS_CFG_PWR_MGR_EN              1u
+
+#define TOS_CFG_TICKLESS_EN             1u
+
+#define TOS_CFG_SEM_EN                  1u
+
+#define TOS_CFG_IDLE_TASK_STK_SIZE      512u
+
+#define TOS_CFG_CPU_TICK_PER_SECOND     1000u
+
+#define TOS_CFG_CPU_CLOCK               (SystemCoreClock)
+
+#define TOS_CFG_TIMER_AS_PROC           1u
+
+#endif
+

board/GD32F310G_START/TOS-CONFIG/tos_config.h

@@ -0,0 +1,47 @@
+#ifndef _TOS_CONFIG_H_
+#define  _TOS_CONFIG_H_
+
+#include "gd32f3x0.h"
+
+#define TOS_CFG_TASK_PRIO_MAX           10u
+
+#define TOS_CFG_ROUND_ROBIN_EN          1u
+
+#define TOS_CFG_OBJECT_VERIFY_EN        1u
+
+#define TOS_CFG_TASK_DYNAMIC_CREATE_EN  0u
+
+#define TOS_CFG_EVENT_EN                1u
+
+#define TOS_CFG_MMBLK_EN                1u
+
+#define TOS_CFG_MMHEAP_EN               0u
+
+#define TOS_CFG_MMHEAP_DEFAULT_POOL_SIZE        0x400
+
+#define TOS_CFG_MUTEX_EN                1u
+
+#define TOS_CFG_TIMER_EN                1u
+
+#define TOS_CFG_PWR_MGR_EN              0u
+
+#define TOS_CFG_TICKLESS_EN             0u
+
+#define TOS_CFG_SEM_EN                  1u
+
+#define TOS_CFG_TASK_STACK_DRAUGHT_DEPTH_DETACT_EN      1u
+
+#define TOS_CFG_FAULT_BACKTRACE_EN      0u
+
+#define TOS_CFG_IDLE_TASK_STK_SIZE      128u
+
+#define TOS_CFG_CPU_TICK_PER_SECOND     1000u
+
+#define TOS_CFG_CPU_CLOCK               (SystemCoreClock)
+
+#define TOS_CFG_TIMER_AS_PROC           1u
+
+#define TOS_CFG_MAIL_QUEUE_EN           1u
+
+#endif
+

board/IoTClub_EVB_L2/KEIL/mqttclient_iot_explorer/demo/mqttclient_iot_explorer.c

@@ -2,7 +2,7 @@
 #include "mcu_init.h"
 #include "tos_k.h"
 #include "mqttclient.h"
-#include "cjson.h"
+#include "cJSON.h"
 #include "sal_module_wrapper.h"
 
 //#define USE_ESP8266

board/NUCLEO_STM32L496ZG/KEIL/hello_world/TencentOS_tiny.uvoptx

@@ -12,7 +12,7 @@
     <lExt>*.lib</lExt>
     <tExt>*.txt; *.h; *.inc</tExt>
     <pExt>*.plm</pExt>
-    <CppX>*.cpp</CppX>
+    <CppX>*.cpp;*.cc</CppX>
     <nMigrate>0</nMigrate>
   </Extensions>
 
@@ -26,7 +26,7 @@
     <ToolsetNumber>0x4</ToolsetNumber>
     <ToolsetName>ARM-ADS</ToolsetName>
     <TargetOption>
-      <CLKADS>80000000</CLKADS>
+      <CLKADS>8000000</CLKADS>
       <OPTTT>
         <gFlags>1</gFlags>
         <BeepAtEnd>1</BeepAtEnd>
@@ -93,7 +93,7 @@
         <tRbreak>1</tRbreak>
         <tRwatch>1</tRwatch>
         <tRmem>1</tRmem>
-        <tRfunc>1</tRfunc>
+        <tRfunc>0</tRfunc>
         <tRbox>1</tRbox>
         <tRtrace>1</tRtrace>
         <sRSysVw>1</sRSysVw>
@@ -119,72 +119,28 @@
       <TargetDriverDllRegistry>
         <SetRegEntry>
           <Number>0</Number>
-          <Key>ARMRTXEVENTFLAGS</Key>
-          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
-        </SetRegEntry>
-        <SetRegEntry>
-          <Number>0</Number>
-          <Key>DLGTARM</Key>
-          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
-        </SetRegEntry>
-        <SetRegEntry>
-          <Number>0</Number>
-          <Key>ARMDBGFLAGS</Key>
-          <Name></Name>
-        </SetRegEntry>
-        <SetRegEntry>
-          <Number>0</Number>
-          <Key>DLGUARM</Key>
-          <Name>(105=-1,-1,-1,-1,0)</Name>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U0667FF343339415043053749 -O206 -SF10000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP (ARM Core") -D00(2BA01477) -L00(0) -TO131090 -TC10000000 -TT10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32L4xx_1024.FLM -FS08000000 -FL0100000 -FP0($$Device:STM32L496ZGTx$CMSIS\Flash\STM32L4xx_1024.FLM)</Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
           <Key>UL2CM3</Key>
           <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32L4xx_1024 -FS08000000 -FL0100000 -FP0($$Device:STM32L496ZGTx$CMSIS\Flash\STM32L4xx_1024.FLM))</Name>
         </SetRegEntry>
-        <SetRegEntry>
-          <Number>0</Number>
-          <Key>ST-LINKIII-KEIL_SWO</Key>
-          <Name>-U0674FF525750877267153432 -O2254 -SF10000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32L4xx_1024.FLM -FS08000000 -FL0100000 -FP0($$Device:STM32L496ZGTx$CMSIS\Flash\STM32L4xx_1024.FLM)</Name>
-        </SetRegEntry>
       </TargetDriverDllRegistry>
-      <Breakpoint>
-        <Bp>
-          <Number>0</Number>
-          <Type>0</Type>
-          <LineNumber>573</LineNumber>
-          <EnabledFlag>1</EnabledFlag>
-          <Address>134226432</Address>
-          <ByteObject>0</ByteObject>
-          <HtxType>0</HtxType>
-          <ManyObjects>0</ManyObjects>
-          <SizeOfObject>0</SizeOfObject>
-          <BreakByAccess>0</BreakByAccess>
-          <BreakIfRCount>1</BreakIfRCount>
-          <Filename>..\..\..\..\kernel\core\tos_mmheap.c</Filename>
-          <ExecCommand></ExecCommand>
-          <Expression>\\TencentOS_tiny\../../../../kernel/core/tos_mmheap.c\573</Expression>
-        </Bp>
-      </Breakpoint>
-      <WatchWindow1>
-        <Ww>
-          <count>0</count>
-          <WinNumber>1</WinNumber>
-          <ItemText>k_mmheap_default_pool</ItemText>
-        </Ww>
-      </WatchWindow1>
+      <Breakpoint/>
       <Tracepoint>
         <THDelay>0</THDelay>
       </Tracepoint>
       <DebugFlag>
         <trace>0</trace>
-        <periodic>1</periodic>
-        <aLwin>1</aLwin>
+        <periodic>0</periodic>
+        <aLwin>0</aLwin>
         <aCover>0</aCover>
         <aSer1>0</aSer1>
         <aSer2>0</aSer2>
         <aPa>0</aPa>
-        <viewmode>1</viewmode>
+        <viewmode>0</viewmode>
         <vrSel>0</vrSel>
         <aSym>0</aSym>
         <aTbox>0</aTbox>
@@ -247,7 +203,7 @@
 
   <Group>
     <GroupName>Application/User</GroupName>
-    <tvExp>1</tvExp>
+    <tvExp>0</tvExp>
     <tvExpOptDlg>0</tvExpOptDlg>
     <cbSel>0</cbSel>
     <RteFlg>0</RteFlg>
@@ -258,8 +214,8 @@
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
       <bDave2>0</bDave2>
-      <PathWithFileName>..\..\BSP\Src\gpio.c</PathWithFileName>
-      <FilenameWithoutPath>gpio.c</FilenameWithoutPath>
+      <PathWithFileName>..\..\BSP\Src\main.c</PathWithFileName>
+      <FilenameWithoutPath>main.c</FilenameWithoutPath>
       <RteFlg>0</RteFlg>
       <bShared>0</bShared>
     </File>
@@ -270,8 +226,8 @@
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
       <bDave2>0</bDave2>
-      <PathWithFileName>..\..\BSP\Src\main.c</PathWithFileName>
-      <FilenameWithoutPath>main.c</FilenameWithoutPath>
+      <PathWithFileName>..\..\BSP\Src\gpio.c</PathWithFileName>
+      <FilenameWithoutPath>gpio.c</FilenameWithoutPath>
       <RteFlg>0</RteFlg>
       <bShared>0</bShared>
     </File>
@@ -335,6 +291,66 @@
       <RteFlg>0</RteFlg>
       <bShared>0</bShared>
     </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>9</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\BSP\Src\dcmi.c</PathWithFileName>
+      <FilenameWithoutPath>dcmi.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>10</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\BSP\Src\dma.c</PathWithFileName>
+      <FilenameWithoutPath>dma.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>11</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\BSP\Src\i2c.c</PathWithFileName>
+      <FilenameWithoutPath>i2c.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>12</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\BSP\Src\spi.c</PathWithFileName>
+      <FilenameWithoutPath>spi.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>13</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\BSP\Src\tim.c</PathWithFileName>
+      <FilenameWithoutPath>tim.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
   </Group>
 
   <Group>
@@ -345,7 +361,7 @@
     <RteFlg>0</RteFlg>
     <File>
       <GroupNumber>3</GroupNumber>
-      <FileNumber>9</FileNumber>
+      <FileNumber>14</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -357,7 +373,7 @@
     </File>
     <File>
       <GroupNumber>3</GroupNumber>
-      <FileNumber>10</FileNumber>
+      <FileNumber>15</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -369,7 +385,7 @@
     </File>
     <File>
       <GroupNumber>3</GroupNumber>
-      <FileNumber>11</FileNumber>
+      <FileNumber>16</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -381,7 +397,7 @@
     </File>
     <File>
       <GroupNumber>3</GroupNumber>
-      <FileNumber>12</FileNumber>
+      <FileNumber>17</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -393,7 +409,7 @@
     </File>
     <File>
       <GroupNumber>3</GroupNumber>
-      <FileNumber>13</FileNumber>
+      <FileNumber>18</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -405,7 +421,7 @@
     </File>
     <File>
       <GroupNumber>3</GroupNumber>
-      <FileNumber>14</FileNumber>
+      <FileNumber>19</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -417,7 +433,7 @@
     </File>
     <File>
       <GroupNumber>3</GroupNumber>
-      <FileNumber>15</FileNumber>
+      <FileNumber>20</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -429,7 +445,7 @@
     </File>
     <File>
       <GroupNumber>3</GroupNumber>
-      <FileNumber>16</FileNumber>
+      <FileNumber>21</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -441,7 +457,7 @@
     </File>
     <File>
       <GroupNumber>3</GroupNumber>
-      <FileNumber>17</FileNumber>
+      <FileNumber>22</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -453,7 +469,7 @@
     </File>
     <File>
       <GroupNumber>3</GroupNumber>
-      <FileNumber>18</FileNumber>
+      <FileNumber>23</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -465,7 +481,7 @@
     </File>
     <File>
       <GroupNumber>3</GroupNumber>
-      <FileNumber>19</FileNumber>
+      <FileNumber>24</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -477,7 +493,7 @@
     </File>
     <File>
       <GroupNumber>3</GroupNumber>
-      <FileNumber>20</FileNumber>
+      <FileNumber>25</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -489,7 +505,7 @@
     </File>
     <File>
       <GroupNumber>3</GroupNumber>
-      <FileNumber>21</FileNumber>
+      <FileNumber>26</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -501,7 +517,7 @@
     </File>
     <File>
       <GroupNumber>3</GroupNumber>
-      <FileNumber>22</FileNumber>
+      <FileNumber>27</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -513,7 +529,7 @@
     </File>
     <File>
       <GroupNumber>3</GroupNumber>
-      <FileNumber>23</FileNumber>
+      <FileNumber>28</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -525,7 +541,7 @@
     </File>
     <File>
       <GroupNumber>3</GroupNumber>
-      <FileNumber>24</FileNumber>
+      <FileNumber>29</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -537,7 +553,7 @@
     </File>
     <File>
       <GroupNumber>3</GroupNumber>
-      <FileNumber>25</FileNumber>
+      <FileNumber>30</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -549,7 +565,7 @@
     </File>
     <File>
       <GroupNumber>3</GroupNumber>
-      <FileNumber>26</FileNumber>
+      <FileNumber>31</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -561,7 +577,7 @@
     </File>
     <File>
       <GroupNumber>3</GroupNumber>
-      <FileNumber>27</FileNumber>
+      <FileNumber>32</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -571,6 +587,42 @@
       <RteFlg>0</RteFlg>
       <bShared>0</bShared>
     </File>
+    <File>
+      <GroupNumber>3</GroupNumber>
+      <FileNumber>33</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dcmi.c</PathWithFileName>
+      <FilenameWithoutPath>stm32l4xx_hal_dcmi.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>3</GroupNumber>
+      <FileNumber>34</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi.c</PathWithFileName>
+      <FilenameWithoutPath>stm32l4xx_hal_spi.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>3</GroupNumber>
+      <FileNumber>35</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi_ex.c</PathWithFileName>
+      <FilenameWithoutPath>stm32l4xx_hal_spi_ex.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
   </Group>
 
   <Group>
@@ -581,7 +633,7 @@
     <RteFlg>0</RteFlg>
     <File>
       <GroupNumber>4</GroupNumber>
-      <FileNumber>28</FileNumber>
+      <FileNumber>36</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -601,7 +653,7 @@
     <RteFlg>0</RteFlg>
     <File>
       <GroupNumber>5</GroupNumber>
-      <FileNumber>29</FileNumber>
+      <FileNumber>37</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -613,7 +665,7 @@
     </File>
     <File>
       <GroupNumber>5</GroupNumber>
-      <FileNumber>30</FileNumber>
+      <FileNumber>38</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -625,7 +677,7 @@
     </File>
     <File>
       <GroupNumber>5</GroupNumber>
-      <FileNumber>31</FileNumber>
+      <FileNumber>39</FileNumber>
       <FileType>2</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -645,7 +697,7 @@
     <RteFlg>0</RteFlg>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>32</FileNumber>
+      <FileNumber>40</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -657,7 +709,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>33</FileNumber>
+      <FileNumber>41</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -669,7 +721,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>34</FileNumber>
+      <FileNumber>42</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -681,7 +733,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>35</FileNumber>
+      <FileNumber>43</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -693,7 +745,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>36</FileNumber>
+      <FileNumber>44</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -705,7 +757,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>37</FileNumber>
+      <FileNumber>45</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -717,7 +769,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>38</FileNumber>
+      <FileNumber>46</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -729,7 +781,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>39</FileNumber>
+      <FileNumber>47</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -741,7 +793,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>40</FileNumber>
+      <FileNumber>48</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -753,7 +805,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>41</FileNumber>
+      <FileNumber>49</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -765,7 +817,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>42</FileNumber>
+      <FileNumber>50</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -777,7 +829,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>43</FileNumber>
+      <FileNumber>51</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -789,7 +841,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>44</FileNumber>
+      <FileNumber>52</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -801,7 +853,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>45</FileNumber>
+      <FileNumber>53</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -813,7 +865,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>46</FileNumber>
+      <FileNumber>54</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -825,7 +877,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>47</FileNumber>
+      <FileNumber>55</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -837,7 +889,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>48</FileNumber>
+      <FileNumber>56</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -849,7 +901,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>49</FileNumber>
+      <FileNumber>57</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -861,7 +913,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>50</FileNumber>
+      <FileNumber>58</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -873,7 +925,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>51</FileNumber>
+      <FileNumber>59</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -885,7 +937,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>52</FileNumber>
+      <FileNumber>60</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -897,7 +949,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>53</FileNumber>
+      <FileNumber>61</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -909,7 +961,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>54</FileNumber>
+      <FileNumber>62</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -921,7 +973,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>55</FileNumber>
+      <FileNumber>63</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -941,7 +993,7 @@
     <RteFlg>0</RteFlg>
     <File>
       <GroupNumber>7</GroupNumber>
-      <FileNumber>56</FileNumber>
+      <FileNumber>64</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -954,14 +1006,82 @@
   </Group>
 
   <Group>
-    <GroupName>examples</GroupName>
+    <GroupName>hal</GroupName>
     <tvExp>0</tvExp>
     <tvExpOptDlg>0</tvExpOptDlg>
     <cbSel>0</cbSel>
     <RteFlg>0</RteFlg>
     <File>
       <GroupNumber>8</GroupNumber>
-      <FileNumber>57</FileNumber>
+      <FileNumber>65</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\BSP\Hardware\Src\delay.c</PathWithFileName>
+      <FilenameWithoutPath>delay.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>8</GroupNumber>
+      <FileNumber>66</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\BSP\Hardware\Src\lcd_2inch4.c</PathWithFileName>
+      <FilenameWithoutPath>lcd_2inch4.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>8</GroupNumber>
+      <FileNumber>67</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\BSP\Hardware\Src\lcd_config.c</PathWithFileName>
+      <FilenameWithoutPath>lcd_config.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>8</GroupNumber>
+      <FileNumber>68</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\BSP\Hardware\Src\ov2640.c</PathWithFileName>
+      <FilenameWithoutPath>ov2640.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>8</GroupNumber>
+      <FileNumber>69</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\BSP\Hardware\Src\sccb.c</PathWithFileName>
+      <FilenameWithoutPath>sccb.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>examples</GroupName>
+    <tvExp>1</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>9</GroupNumber>
+      <FileNumber>70</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>

board/NUCLEO_STM32L496ZG/KEIL/hello_world/TencentOS_tiny.uvprojx

@@ -10,14 +10,14 @@
       <TargetName>TencentOS_tiny</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>5060750::V5.06 update 6 (build 750)::.\ARMCC</pCCUsed>
-      <uAC6>0</uAC6>
+      <pCCUsed>6140000::V6.14::ARMCLANG</pCCUsed>
+      <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>STM32L496ZGTx</Device>
           <Vendor>STMicroelectronics</Vendor>
-          <PackID>Keil.STM32L4xx_DFP.2.4.0</PackID>
-          <PackURL>http://www.keil.com/pack/</PackURL>
+          <PackID>Keil.STM32L4xx_DFP.2.5.0</PackID>
+          <PackURL>https://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000-0x2004FFFF) IROM(0x8000000-0x80FFFFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
           <StartupFile></StartupFile>
@@ -54,7 +54,7 @@
           <CreateLib>0</CreateLib>
           <CreateHexFile>1</CreateHexFile>
           <DebugInformation>1</DebugInformation>
-          <BrowseInformation>0</BrowseInformation>
+          <BrowseInformation>1</BrowseInformation>
           <ListingPath></ListingPath>
           <HexFormatSelection>1</HexFormatSelection>
           <Merge32K>0</Merge32K>
@@ -137,7 +137,7 @@
             <DriverSelection>4107</DriverSelection>
           </Flash1>
           <bUseTDR>1</bUseTDR>
-          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash2>BIN\UL2CM3.DLL</Flash2>
           <Flash3></Flash3>
           <Flash4></Flash4>
           <pFcarmOut></pFcarmOut>
@@ -322,14 +322,14 @@
             <PlainCh>0</PlainCh>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <wLevel>2</wLevel>
+            <wLevel>3</wLevel>
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>1</uC99>
             <uGnu>0</uGnu>
             <useXO>0</useXO>
-            <v6Lang>1</v6Lang>
-            <v6LangP>1</v6LangP>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
             <vShortEn>1</vShortEn>
             <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
@@ -337,9 +337,9 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>USE_HAL_DRIVER,STM32L496xx</Define>
+              <Define>USE_HAL_DRIVER,STM32L496xx,NUCLEO_STM32L496ZG</Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\BSP\Inc;..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Inc;..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Inc\Legacy;..\..\..\..\platform\vendor_bsp\st\CMSIS\Device\ST\STM32L4xx\Include;..\..\..\..\platform\vendor_bsp\st\CMSIS\Include;..\..\..\..\arch\arm\arm-v7m\common\include;..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc;..\..\..\..\kernel\core\include;..\..\..\..\kernel\pm\include;..\..\..\..\osal\cmsis_os;..\..\..\..\examples\hello_world;..\..\TOS_CONFIG;..\..\..\..\net\at\include;..\..\..\..\kernel\hal\include</IncludePath>
+              <IncludePath>..\..\BSP\Inc;..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Inc;..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Inc\Legacy;..\..\..\..\platform\vendor_bsp\st\CMSIS\Device\ST\STM32L4xx\Include;..\..\..\..\platform\vendor_bsp\st\CMSIS\Include;..\..\..\..\arch\arm\arm-v7m\common\include;..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc;..\..\..\..\kernel\core\include;..\..\..\..\kernel\pm\include;..\..\..\..\osal\cmsis_os;..\..\..\..\examples\hello_world;..\..\TOS_CONFIG;..\..\..\..\net\at\include;..\..\..\..\kernel\hal\include;..\..\BSP\Hardware\Inc</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -393,16 +393,16 @@
         <Group>
           <GroupName>Application/User</GroupName>
           <Files>
-            <File>
-              <FileName>gpio.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\BSP\Src\gpio.c</FilePath>
-            </File>
             <File>
               <FileName>main.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\BSP\Src\main.c</FilePath>
             </File>
+            <File>
+              <FileName>gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\BSP\Src\gpio.c</FilePath>
+            </File>
             <File>
               <FileName>stm32l4xx_hal_msp.c</FileName>
               <FileType>1</FileType>
@@ -428,6 +428,31 @@
               <FileType>1</FileType>
               <FilePath>..\..\BSP\Src\mcu_init.c</FilePath>
             </File>
+            <File>
+              <FileName>dcmi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\BSP\Src\dcmi.c</FilePath>
+            </File>
+            <File>
+              <FileName>dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\BSP\Src\dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\BSP\Src\i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\BSP\Src\spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\BSP\Src\tim.c</FilePath>
+            </File>
           </Files>
         </Group>
         <Group>
@@ -528,6 +553,21 @@
               <FileType>1</FileType>
               <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim_ex.c</FilePath>
             </File>
+            <File>
+              <FileName>stm32l4xx_hal_dcmi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dcmi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32l4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32l4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi_ex.c</FilePath>
+            </File>
           </Files>
         </Group>
         <Group>
@@ -695,6 +735,36 @@
             </File>
           </Files>
         </Group>
+        <Group>
+          <GroupName>hal</GroupName>
+          <Files>
+            <File>
+              <FileName>delay.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\BSP\Hardware\Src\delay.c</FilePath>
+            </File>
+            <File>
+              <FileName>lcd_2inch4.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\BSP\Hardware\Src\lcd_2inch4.c</FilePath>
+            </File>
+            <File>
+              <FileName>lcd_config.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\BSP\Hardware\Src\lcd_config.c</FilePath>
+            </File>
+            <File>
+              <FileName>ov2640.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\BSP\Hardware\Src\ov2640.c</FilePath>
+            </File>
+            <File>
+              <FileName>sccb.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\BSP\Hardware\Src\sccb.c</FilePath>
+            </File>
+          </Files>
+        </Group>
         <Group>
           <GroupName>examples</GroupName>
           <Files>
@@ -715,8 +785,8 @@
   <RTE>
     <apis/>
     <components>
-      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.4.0" condition="ARMv6_7_8-M Device">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
         <targetInfos>
           <targetInfo name="TencentOS_tiny"/>
         </targetInfos>

board/NUCLEO_STM32L496ZG/KEIL/nnom_mnist/TencentOS_tiny.uvprojx

@@ -7,18 +7,18 @@
 
   <Targets>
     <Target>
-      <TargetName>ALIENTEK_EXPLORER_STM32F407ZGT6</TargetName>
+      <TargetName>TencentOS_tiny</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::.\ARMCC</pCCUsed>
       <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
-          <Device>STM32F407ZGTx</Device>
+          <Device>STM32L496ZGTx</Device>
           <Vendor>STMicroelectronics</Vendor>
-          <PackID>Keil.STM32F4xx_DFP.2.14.0</PackID>
-          <PackURL>http://www.keil.com/pack/</PackURL>
-          <Cpu>IRAM(0x20000000-0x2001FFFF) IRAM2(0x10000000-0x1000FFFF) IROM(0x8000000-0x80FFFFF) CLOCK(25000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <PackID>Keil.STM32L4xx_DFP.2.5.0</PackID>
+          <PackURL>https://www.keil.com/pack/</PackURL>
+          <Cpu>IRAM(0x20000000-0x2004FFFF) IROM(0x8000000-0x80FFFFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
           <StartupFile></StartupFile>
           <FlashDriverDll></FlashDriverDll>
@@ -33,7 +33,7 @@
           <SLE66CMisc></SLE66CMisc>
           <SLE66AMisc></SLE66AMisc>
           <SLE66LinkerMisc></SLE66LinkerMisc>
-          <SFDFile>$$Device:STM32F407ZGTx$CMSIS\SVD\STM32F40x.svd</SFDFile>
+          <SFDFile>$$Device:STM32L496ZGTx$CMSIS\SVD\STM32L4x6.svd</SFDFile>
           <bCustSvd>0</bCustSvd>
           <UseEnv>0</UseEnv>
           <BinPath></BinPath>
@@ -48,13 +48,13 @@
             <NotGenerated>0</NotGenerated>
             <InvalidFlash>1</InvalidFlash>
           </TargetStatus>
-          <OutputDirectory>ALIENTEK_EXPLORER_STM32F407ZGT6\</OutputDirectory>
-          <OutputName>ALIENTEK_EXPLORER_STM32F407ZGT6</OutputName>
+          <OutputDirectory>TencentOS_tiny\</OutputDirectory>
+          <OutputName>TencentOS_tiny</OutputName>
           <CreateExecutable>1</CreateExecutable>
           <CreateLib>0</CreateLib>
-          <CreateHexFile>0</CreateHexFile>
+          <CreateHexFile>1</CreateHexFile>
           <DebugInformation>1</DebugInformation>
-          <BrowseInformation>0</BrowseInformation>
+          <BrowseInformation>1</BrowseInformation>
           <ListingPath></ListingPath>
           <HexFormatSelection>1</HexFormatSelection>
           <Merge32K>0</Merge32K>
@@ -134,11 +134,11 @@
             <RunIndependent>0</RunIndependent>
             <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
             <Capability>1</Capability>
-            <DriverSelection>4101</DriverSelection>
+            <DriverSelection>4107</DriverSelection>
           </Flash1>
           <bUseTDR>1</bUseTDR>
-          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
-          <Flash3>"" ()</Flash3>
+          <Flash2>BIN\UL2CM3.DLL</Flash2>
+          <Flash3></Flash3>
           <Flash4></Flash4>
           <pFcarmOut></pFcarmOut>
           <pFcarmGrp></pFcarmGrp>
@@ -185,7 +185,8 @@
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
             <RvdsMve>0</RvdsMve>
-            <hadIRAM2>1</hadIRAM2>
+            <RvdsCdeCp>0</RvdsCdeCp>
+            <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
             <useUlib>1</useUlib>
@@ -245,7 +246,7 @@
               <IRAM>
                 <Type>0</Type>
                 <StartAddress>0x20000000</StartAddress>
-                <Size>0x20000</Size>
+                <Size>0x50000</Size>
               </IRAM>
               <IROM>
                 <Type>1</Type>
@@ -300,12 +301,12 @@
               <OCR_RVCT9>
                 <Type>0</Type>
                 <StartAddress>0x20000000</StartAddress>
-                <Size>0x20000</Size>
+                <Size>0x50000</Size>
               </OCR_RVCT9>
               <OCR_RVCT10>
                 <Type>0</Type>
-                <StartAddress>0x10000000</StartAddress>
-                <Size>0x10000</Size>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
               </OCR_RVCT10>
             </OnChipMemories>
             <RvctStartVector></RvctStartVector>
@@ -327,8 +328,8 @@
             <uC99>1</uC99>
             <uGnu>0</uGnu>
             <useXO>0</useXO>
-            <v6Lang>1</v6Lang>
-            <v6LangP>1</v6LangP>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
             <vShortEn>1</vShortEn>
             <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
@@ -336,9 +337,9 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>USE_HAL_DRIVER,STM32F407xx,USE_HAL_DRIVER,STM32F407xx,USE_MODBUS</Define>
+              <Define>USE_HAL_DRIVER,STM32L496xx,NUCLEO_STM32L496ZG</Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\BSP\Inc;..\..\..\..\platform\vendor_bsp\st\STM32F4xx_HAL_Driver\Inc;..\..\..\..\platform\vendor_bsp\st\STM32F4xx_HAL_Driver\Inc\Legacy;..\..\..\..\platform\vendor_bsp\st\CMSIS\Device\ST\STM32F4xx\Include;..\..\..\..\platform\vendor_bsp\st\CMSIS\Include;..\..\..\..\arch\arm\arm-v7m\common\include;..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc;..\..\..\..\kernel\core\include;..\..\..\..\kernel\pm\include;..\..\..\..\osal\cmsis_os;..\..\TOS_CONFIG;..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\ascii;..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions;..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\include;..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\rtu;..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\tcp;..\..\..\..\components\connectivity\Modbus\porting\TencentOS_Tiny</IncludePath>
+              <IncludePath>..\..\BSP\Inc;..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Inc;..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Inc\Legacy;..\..\..\..\platform\vendor_bsp\st\CMSIS\Device\ST\STM32L4xx\Include;..\..\..\..\platform\vendor_bsp\st\CMSIS\Include;..\..\..\..\arch\arm\arm-v7m\common\include;..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc;..\..\..\..\kernel\core\include;..\..\..\..\kernel\pm\include;..\..\..\..\osal\cmsis_os;..\..\..\..\examples\hello_world;..\..\TOS_CONFIG;..\..\..\..\net\at\include;..\..\..\..\kernel\hal\include;..\..\BSP\Hardware\Inc;..\..\..\..\components\ai\nnom\inc;..\..\..\..\components\ai\nnom\inc\layers;..\..\..\..\components\ai\nnom\port;..\..\..\..\examples\nnom_mnist\data</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -351,7 +352,7 @@
             <NoWarn>0</NoWarn>
             <uSurpInc>0</uSurpInc>
             <useXO>0</useXO>
-            <uClangAs>0</uClangAs>
+            <ClangAsOpt>4</ClangAsOpt>
             <VariousControls>
               <MiscControls></MiscControls>
               <Define></Define>
@@ -383,24 +384,44 @@
           <GroupName>Application/MDK-ARM</GroupName>
           <Files>
             <File>
-              <FileName>startup_stm32f407xx.s</FileName>
+              <FileName>startup_stm32l496xx.s</FileName>
               <FileType>2</FileType>
-              <FilePath>startup_stm32f407xx.s</FilePath>
+              <FilePath>startup_stm32l496xx.s</FilePath>
             </File>
           </Files>
         </Group>
         <Group>
           <GroupName>Application/User</GroupName>
           <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\BSP\Src\main.c</FilePath>
+            </File>
             <File>
               <FileName>gpio.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\BSP\Src\gpio.c</FilePath>
             </File>
             <File>
-              <FileName>main.c</FileName>
+              <FileName>stm32l4xx_hal_msp.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\BSP\Src\main.c</FilePath>
+              <FilePath>..\..\BSP\Src\stm32l4xx_hal_msp.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32l4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\BSP\Src\stm32l4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>sys.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\BSP\Src\sys.c</FilePath>
+            </File>
+            <File>
+              <FileName>usart.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\BSP\Src\usart.c</FilePath>
             </File>
             <File>
               <FileName>mcu_init.c</FileName>
@@ -408,19 +429,24 @@
               <FilePath>..\..\BSP\Src\mcu_init.c</FilePath>
             </File>
             <File>
-              <FileName>stm32f4xx_hal_msp.c</FileName>
+              <FileName>dcmi.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\BSP\Src\stm32f4xx_hal_msp.c</FilePath>
+              <FilePath>..\..\BSP\Src\dcmi.c</FilePath>
             </File>
             <File>
-              <FileName>stm32f4xx_it.c</FileName>
+              <FileName>dma.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\BSP\Src\stm32f4xx_it.c</FilePath>
+              <FilePath>..\..\BSP\Src\dma.c</FilePath>
             </File>
             <File>
-              <FileName>usart.c</FileName>
+              <FileName>i2c.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\BSP\Src\usart.c</FilePath>
+              <FilePath>..\..\BSP\Src\i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\BSP\Src\spi.c</FilePath>
             </File>
             <File>
               <FileName>tim.c</FileName>
@@ -430,87 +456,117 @@
           </Files>
         </Group>
         <Group>
-          <GroupName>Drivers/STM32F4xx_HAL_Driver</GroupName>
+          <GroupName>Drivers/STM32L4xx_HAL_Driver</GroupName>
           <Files>
             <File>
-              <FileName>stm32f4xx_hal.c</FileName>
+              <FileName>stm32l4xx_hal_uart.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal.c</FilePath>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart.c</FilePath>
             </File>
             <File>
-              <FileName>stm32f4xx_hal_cortex.c</FileName>
+              <FileName>stm32l4xx_hal_uart_ex.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cortex.c</FilePath>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart_ex.c</FilePath>
             </File>
             <File>
-              <FileName>stm32f4xx_hal_dma.c</FileName>
+              <FileName>stm32l4xx_hal.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma.c</FilePath>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal.c</FilePath>
             </File>
             <File>
-              <FileName>stm32f4xx_hal_dma_ex.c</FileName>
+              <FileName>stm32l4xx_hal_i2c.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma_ex.c</FilePath>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c.c</FilePath>
             </File>
             <File>
-              <FileName>stm32f4xx_hal_exti.c</FileName>
+              <FileName>stm32l4xx_hal_i2c_ex.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_exti.c</FilePath>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c_ex.c</FilePath>
             </File>
             <File>
-              <FileName>stm32f4xx_hal_flash.c</FileName>
+              <FileName>stm32l4xx_hal_rcc.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash.c</FilePath>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc.c</FilePath>
             </File>
             <File>
-              <FileName>stm32f4xx_hal_flash_ex.c</FileName>
+              <FileName>stm32l4xx_hal_rcc_ex.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ex.c</FilePath>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc_ex.c</FilePath>
             </File>
             <File>
-              <FileName>stm32f4xx_hal_flash_ramfunc.c</FileName>
+              <FileName>stm32l4xx_hal_flash.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ramfunc.c</FilePath>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash.c</FilePath>
             </File>
             <File>
-              <FileName>stm32f4xx_hal_gpio.c</FileName>
+              <FileName>stm32l4xx_hal_flash_ex.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_gpio.c</FilePath>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash_ex.c</FilePath>
             </File>
             <File>
-              <FileName>stm32f4xx_hal_pwr.c</FileName>
+              <FileName>stm32l4xx_hal_flash_ramfunc.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr.c</FilePath>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash_ramfunc.c</FilePath>
             </File>
             <File>
-              <FileName>stm32f4xx_hal_pwr_ex.c</FileName>
+              <FileName>stm32l4xx_hal_gpio.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr_ex.c</FilePath>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_gpio.c</FilePath>
             </File>
             <File>
-              <FileName>stm32f4xx_hal_rcc.c</FileName>
+              <FileName>stm32l4xx_hal_dma.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc.c</FilePath>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma.c</FilePath>
             </File>
             <File>
-              <FileName>stm32f4xx_hal_rcc_ex.c</FileName>
+              <FileName>stm32l4xx_hal_dma_ex.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc_ex.c</FilePath>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma_ex.c</FilePath>
             </File>
             <File>
-              <FileName>stm32f4xx_hal_uart.c</FileName>
+              <FileName>stm32l4xx_hal_pwr.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_uart.c</FilePath>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr.c</FilePath>
             </File>
             <File>
-              <FileName>stm32f4xx_hal_tim.c</FileName>
+              <FileName>stm32l4xx_hal_pwr_ex.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim.c</FilePath>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr_ex.c</FilePath>
             </File>
             <File>
-              <FileName>stm32f4xx_hal_tim_ex.c</FileName>
+              <FileName>stm32l4xx_hal_cortex.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim_ex.c</FilePath>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cortex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32l4xx_hal_exti.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_exti.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32l4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32l4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32l4xx_hal_dcmi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dcmi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32l4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32l4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi_ex.c</FilePath>
             </File>
           </Files>
         </Group>
@@ -518,9 +574,9 @@
           <GroupName>Drivers/CMSIS</GroupName>
           <Files>
             <File>
-              <FileName>system_stm32f4xx.c</FileName>
+              <FileName>system_stm32l4xx.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\BSP\Src\system_stm32f4xx.c</FilePath>
+              <FilePath>..\..\BSP\Src\system_stm32l4xx.c</FilePath>
             </File>
           </Files>
         </Group>
@@ -547,6 +603,26 @@
         <Group>
           <GroupName>tos/kernel</GroupName>
           <Files>
+            <File>
+              <FileName>tos_binary_heap.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\kernel\core\tos_binary_heap.c</FilePath>
+            </File>
+            <File>
+              <FileName>tos_char_fifo.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\kernel\core\tos_char_fifo.c</FilePath>
+            </File>
+            <File>
+              <FileName>tos_completion.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\kernel\core\tos_completion.c</FilePath>
+            </File>
+            <File>
+              <FileName>tos_countdownlatch.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\kernel\core\tos_countdownlatch.c</FilePath>
+            </File>
             <File>
               <FileName>tos_event.c</FileName>
               <FileType>1</FileType>
@@ -557,6 +633,16 @@
               <FileType>1</FileType>
               <FilePath>..\..\..\..\kernel\core\tos_global.c</FilePath>
             </File>
+            <File>
+              <FileName>tos_mail_queue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\kernel\core\tos_mail_queue.c</FilePath>
+            </File>
+            <File>
+              <FileName>tos_message_queue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\kernel\core\tos_message_queue.c</FilePath>
+            </File>
             <File>
               <FileName>tos_mmblk.c</FileName>
               <FileType>1</FileType>
@@ -577,6 +663,26 @@
               <FileType>1</FileType>
               <FilePath>..\..\..\..\kernel\core\tos_pend.c</FilePath>
             </File>
+            <File>
+              <FileName>tos_priority_mail_queue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\kernel\core\tos_priority_mail_queue.c</FilePath>
+            </File>
+            <File>
+              <FileName>tos_priority_message_queue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\kernel\core\tos_priority_message_queue.c</FilePath>
+            </File>
+            <File>
+              <FileName>tos_priority_queue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\kernel\core\tos_priority_queue.c</FilePath>
+            </File>
+            <File>
+              <FileName>tos_ring_queue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\kernel\core\tos_ring_queue.c</FilePath>
+            </File>
             <File>
               <FileName>tos_robin.c</FileName>
               <FileType>1</FileType>
@@ -617,60 +723,10 @@
               <FileType>1</FileType>
               <FilePath>..\..\..\..\kernel\core\tos_timer.c</FilePath>
             </File>
-            <File>
-              <FileName>tos_binary_heap.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\..\kernel\core\tos_binary_heap.c</FilePath>
-            </File>
-            <File>
-              <FileName>tos_char_fifo.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\..\kernel\core\tos_char_fifo.c</FilePath>
-            </File>
-            <File>
-              <FileName>tos_completion.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\..\kernel\core\tos_completion.c</FilePath>
-            </File>
-            <File>
-              <FileName>tos_countdownlatch.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\..\kernel\core\tos_countdownlatch.c</FilePath>
-            </File>
-            <File>
-              <FileName>tos_mail_queue.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\..\kernel\core\tos_mail_queue.c</FilePath>
-            </File>
-            <File>
-              <FileName>tos_message_queue.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\..\kernel\core\tos_message_queue.c</FilePath>
-            </File>
-            <File>
-              <FileName>tos_priority_mail_queue.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\..\kernel\core\tos_priority_mail_queue.c</FilePath>
-            </File>
-            <File>
-              <FileName>tos_priority_message_queue.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\..\kernel\core\tos_priority_message_queue.c</FilePath>
-            </File>
-            <File>
-              <FileName>tos_priority_queue.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\..\kernel\core\tos_priority_queue.c</FilePath>
-            </File>
-            <File>
-              <FileName>tos_ring_queue.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\..\kernel\core\tos_ring_queue.c</FilePath>
-            </File>
           </Files>
         </Group>
         <Group>
-          <GroupName>tos/cmsis</GroupName>
+          <GroupName>tos/cmsis_os</GroupName>
           <Files>
             <File>
               <FileName>cmsis_os.c</FileName>
@@ -679,98 +735,198 @@
             </File>
           </Files>
         </Group>
+        <Group>
+          <GroupName>hal</GroupName>
+          <Files>
+            <File>
+              <FileName>delay.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\BSP\Hardware\Src\delay.c</FilePath>
+            </File>
+            <File>
+              <FileName>lcd_2inch4.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\BSP\Hardware\Src\lcd_2inch4.c</FilePath>
+            </File>
+            <File>
+              <FileName>lcd_config.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\BSP\Hardware\Src\lcd_config.c</FilePath>
+            </File>
+            <File>
+              <FileName>ov2640.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\BSP\Hardware\Src\ov2640.c</FilePath>
+            </File>
+            <File>
+              <FileName>sccb.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\BSP\Hardware\Src\sccb.c</FilePath>
+            </File>
+          </Files>
+        </Group>
         <Group>
           <GroupName>examples</GroupName>
           <Files>
             <File>
-              <FileName>modbus.c</FileName>
+              <FileName>nnom_mnsit_example.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\..\examples\modbus\modbus.c</FilePath>
+              <FilePath>..\..\..\..\examples\nnom_mnist\nnom_mnsit_example.c</FilePath>
             </File>
           </Files>
         </Group>
         <Group>
-          <GroupName>modbus_src</GroupName>
+          <GroupName>nnom</GroupName>
           <Files>
             <File>
-              <FileName>mbascii.c</FileName>
+              <FileName>nnom_local.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\ascii\mbascii.c</FilePath>
+              <FilePath>..\..\..\..\components\ai\nnom\src\backends\nnom_local.c</FilePath>
             </File>
             <File>
-              <FileName>mbfunccoils.c</FileName>
+              <FileName>nnom.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions\mbfunccoils.c</FilePath>
+              <FilePath>..\..\..\..\components\ai\nnom\src\core\nnom.c</FilePath>
             </File>
             <File>
-              <FileName>mbfuncdiag.c</FileName>
+              <FileName>nnom_layers.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions\mbfuncdiag.c</FilePath>
+              <FilePath>..\..\..\..\components\ai\nnom\src\core\nnom_layers.c</FilePath>
             </File>
             <File>
-              <FileName>mbfuncdisc.c</FileName>
+              <FileName>nnom_tensor.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions\mbfuncdisc.c</FilePath>
+              <FilePath>..\..\..\..\components\ai\nnom\src\core\nnom_tensor.c</FilePath>
             </File>
             <File>
-              <FileName>mbfuncholding.c</FileName>
+              <FileName>nnom_utils.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions\mbfuncholding.c</FilePath>
+              <FilePath>..\..\..\..\components\ai\nnom\src\core\nnom_utils.c</FilePath>
             </File>
             <File>
-              <FileName>mbfuncinput.c</FileName>
+              <FileName>nnom_activation.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions\mbfuncinput.c</FilePath>
+              <FilePath>..\..\..\..\components\ai\nnom\src\layers\nnom_activation.c</FilePath>
             </File>
             <File>
-              <FileName>mbfuncother.c</FileName>
+              <FileName>nnom_avgpool.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions\mbfuncother.c</FilePath>
+              <FilePath>..\..\..\..\components\ai\nnom\src\layers\nnom_avgpool.c</FilePath>
             </File>
             <File>
-              <FileName>mbutils.c</FileName>
+              <FileName>nnom_baselayer.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions\mbutils.c</FilePath>
+              <FilePath>..\..\..\..\components\ai\nnom\src\layers\nnom_baselayer.c</FilePath>
             </File>
             <File>
-              <FileName>mbcrc.c</FileName>
+              <FileName>nnom_concat.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\rtu\mbcrc.c</FilePath>
+              <FilePath>..\..\..\..\components\ai\nnom\src\layers\nnom_concat.c</FilePath>
             </File>
             <File>
-              <FileName>mbrtu.c</FileName>
+              <FileName>nnom_conv2d.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\rtu\mbrtu.c</FilePath>
+              <FilePath>..\..\..\..\components\ai\nnom\src\layers\nnom_conv2d.c</FilePath>
             </File>
             <File>
-              <FileName>mb.c</FileName>
+              <FileName>nnom_conv2d_trans.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\mb.c</FilePath>
+              <FilePath>..\..\..\..\components\ai\nnom\src\layers\nnom_conv2d_trans.c</FilePath>
             </File>
             <File>
-              <FileName>mbtcp.c</FileName>
+              <FileName>nnom_cropping.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\tcp\mbtcp.c</FilePath>
-            </File>
-          </Files>
-        </Group>
-        <Group>
-          <GroupName>modbus_port</GroupName>
-          <Files>
-            <File>
-              <FileName>portevent.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\..\components\connectivity\Modbus\porting\TencentOS_Tiny\portevent.c</FilePath>
+              <FilePath>..\..\..\..\components\ai\nnom\src\layers\nnom_cropping.c</FilePath>
             </File>
             <File>
-              <FileName>portserial.c</FileName>
+              <FileName>nnom_dense.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\..\components\connectivity\Modbus\porting\TencentOS_Tiny\portserial.c</FilePath>
+              <FilePath>..\..\..\..\components\ai\nnom\src\layers\nnom_dense.c</FilePath>
             </File>
             <File>
-              <FileName>porttimer.c</FileName>
+              <FileName>nnom_dw_conv2d.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\..\components\connectivity\Modbus\porting\TencentOS_Tiny\porttimer.c</FilePath>
+              <FilePath>..\..\..\..\components\ai\nnom\src\layers\nnom_dw_conv2d.c</FilePath>
+            </File>
+            <File>
+              <FileName>nnom_flatten.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\components\ai\nnom\src\layers\nnom_flatten.c</FilePath>
+            </File>
+            <File>
+              <FileName>nnom_global_pool.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\components\ai\nnom\src\layers\nnom_global_pool.c</FilePath>
+            </File>
+            <File>
+              <FileName>nnom_gru_cell.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\components\ai\nnom\src\layers\nnom_gru_cell.c</FilePath>
+            </File>
+            <File>
+              <FileName>nnom_input.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\components\ai\nnom\src\layers\nnom_input.c</FilePath>
+            </File>
+            <File>
+              <FileName>nnom_lambda.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\components\ai\nnom\src\layers\nnom_lambda.c</FilePath>
+            </File>
+            <File>
+              <FileName>nnom_lstm_cell.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\components\ai\nnom\src\layers\nnom_lstm_cell.c</FilePath>
+            </File>
+            <File>
+              <FileName>nnom_matrix.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\components\ai\nnom\src\layers\nnom_matrix.c</FilePath>
+            </File>
+            <File>
+              <FileName>nnom_maxpool.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\components\ai\nnom\src\layers\nnom_maxpool.c</FilePath>
+            </File>
+            <File>
+              <FileName>nnom_output.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\components\ai\nnom\src\layers\nnom_output.c</FilePath>
+            </File>
+            <File>
+              <FileName>nnom_rnn.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\components\ai\nnom\src\layers\nnom_rnn.c</FilePath>
+            </File>
+            <File>
+              <FileName>nnom_simple_cell.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\components\ai\nnom\src\layers\nnom_simple_cell.c</FilePath>
+            </File>
+            <File>
+              <FileName>nnom_softmax.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\components\ai\nnom\src\layers\nnom_softmax.c</FilePath>
+            </File>
+            <File>
+              <FileName>nnom_sumpool.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\components\ai\nnom\src\layers\nnom_sumpool.c</FilePath>
+            </File>
+            <File>
+              <FileName>nnom_upsample.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\components\ai\nnom\src\layers\nnom_upsample.c</FilePath>
+            </File>
+            <File>
+              <FileName>nnom_zero_padding.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\components\ai\nnom\src\layers\nnom_zero_padding.c</FilePath>
+            </File>
+            <File>
+              <FileName>nnom_local_q15.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\components\ai\nnom\src\backends\nnom_local_q15.c</FilePath>
             </File>
           </Files>
         </Group>
@@ -784,14 +940,29 @@
   <RTE>
     <apis/>
     <components>
-      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.4.0" condition="ARMv6_7_8-M Device">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
         <targetInfos>
-          <targetInfo name="ALIENTEK_EXPLORER_STM32F407ZGT6"/>
+          <targetInfo name="TencentOS_tiny"/>
         </targetInfos>
       </component>
     </components>
     <files/>
   </RTE>
 
+  <LayerInfo>
+    <Layers>
+      <Layer>
+        <LayName>&lt;Project Info&gt;</LayName>
+        <LayDesc></LayDesc>
+        <LayUrl></LayUrl>
+        <LayKeys></LayKeys>
+        <LayCat></LayCat>
+        <LayLic></LayLic>
+        <LayTarg>0</LayTarg>
+        <LayPrjMark>1</LayPrjMark>
+      </Layer>
+    </Layers>
+  </LayerInfo>
+
 </Project>

board/NUCLEO_STM32L496ZG/KEIL/nnom_mnist/startup_stm32l496xx.s

@@ -1,7 +1,7 @@
-;********************** COPYRIGHT(c) 2017  STMicroelectronics ******************
-;* File Name          : startup_stm32l431xx.s
+;*******************************************************************************
+;* File Name          : startup_stm32l496xx.s
 ;* Author             : MCD Application Team
-;* Description        : STM32L431xx Ultra Low Power devices vector table for MDK-ARM toolchain.
+;* Description        : STM32L496xx Ultra Low Power devices vector table for MDK-ARM toolchain.
 ;*                      This module performs:
 ;*                      - Set the initial SP
 ;*                      - Set the initial PC == Reset_Handler
@@ -13,27 +13,13 @@
 ;* <<< Use Configuration Wizard in Context Menu >>>
 ;*******************************************************************************
 ;*
-;* Redistribution and use in source and binary forms, with or without modification,
-;* are permitted provided that the following conditions are met:
-;*   1. Redistributions of source code must retain the above copyright notice,
-;*      this list of conditions and the following disclaimer.
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
-;*      this list of conditions and the following disclaimer in the documentation
-;*      and/or other materials provided with the distribution.
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
-;*      may be used to endorse or promote products derived from this software
-;*      without specific prior written permission.
+;* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+;* All rights reserved.</center></h2>
 ;*
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;* This software component is licensed by ST under BSD 3-Clause license,
+;* the "License"; You may not use this file except in compliance with the
+;* License. You may obtain a copy of the License at:
+;*                        opensource.org/licenses/BSD-3-Clause
 ;*
 ;*******************************************************************************
 ;
@@ -43,7 +29,7 @@
 ;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
 ; </h>
 
-Stack_Size		EQU     0x100
+Stack_Size		EQU     0x400
 
                 AREA    STACK, NOINIT, READWRITE, ALIGN=3
 Stack_Mem       SPACE   Stack_Size
@@ -54,7 +40,7 @@ __initial_sp
 ;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
 ; </h>
 
-Heap_Size      EQU     0x100
+Heap_Size      EQU     0x200
 
                 AREA    HEAP, NOINIT, READWRITE, ALIGN=3
 __heap_base
@@ -107,7 +93,7 @@ __Vectors       DCD     __initial_sp               ; Top of Stack
                 DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
                 DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
                 DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
-                DCD     ADC1_IRQHandler                   ; ADC1
+                DCD     ADC1_2_IRQHandler                 ; ADC1, ADC2
                 DCD     CAN1_TX_IRQHandler                ; CAN1 TX
                 DCD     CAN1_RX0_IRQHandler               ; CAN1 RX0
                 DCD     CAN1_RX1_IRQHandler               ; CAN1 RX1
@@ -115,11 +101,11 @@ __Vectors       DCD     __initial_sp               ; Top of Stack
                 DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
                 DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break and TIM15
                 DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
-                DCD     TIM1_TRG_COM_IRQHandler           ; TIM1 Trigger and Commutation
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger and Commutation and TIM17
                 DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
                 DCD     TIM2_IRQHandler                   ; TIM2
-                DCD     0                                 ; Reserved
-                DCD     0                                 ; Reserved
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
                 DCD     I2C1_EV_IRQHandler                ; I2C1 Event
                 DCD     I2C1_ER_IRQHandler                ; I2C1 Error
                 DCD     I2C2_EV_IRQHandler                ; I2C2 Event
@@ -131,18 +117,18 @@ __Vectors       DCD     __initial_sp               ; Top of Stack
                 DCD     USART3_IRQHandler                 ; USART3
                 DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
                 DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
-                DCD     0                                 ; Reserved
-                DCD     0                                 ; Reserved
-                DCD     0                                 ; Reserved
-                DCD     0                                 ; Reserved
-                DCD     0                                 ; Reserved
-                DCD     0                                 ; Reserved
-                DCD     0                                 ; Reserved
+                DCD     DFSDM1_FLT3_IRQHandler            ; DFSDM1 Filter 3 global Interrupt
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger and Commutation Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3 global  Interrupt
+                DCD     FMC_IRQHandler                    ; FMC
                 DCD     SDMMC1_IRQHandler                 ; SDMMC1
-                DCD     0                                 ; Reserved
+                DCD     TIM5_IRQHandler                   ; TIM5
                 DCD     SPI3_IRQHandler                   ; SPI3
-                DCD     0                                 ; Reserved
-                DCD     0                                 ; Reserved
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
                 DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&2 underrun errors
                 DCD     TIM7_IRQHandler                   ; TIM7
                 DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
@@ -150,13 +136,13 @@ __Vectors       DCD     __initial_sp               ; Top of Stack
                 DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
                 DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
                 DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
-                DCD     0                                 ; Reserved
-                DCD     0                                 ; Reserved
-                DCD     0                                 ; Reserved
+                DCD     DFSDM1_FLT0_IRQHandler            ; DFSDM1 Filter 0 global Interrupt
+                DCD     DFSDM1_FLT1_IRQHandler            ; DFSDM1 Filter 1 global Interrupt
+                DCD     DFSDM1_FLT2_IRQHandler            ; DFSDM1 Filter 2 global Interrupt
                 DCD     COMP_IRQHandler                   ; COMP Interrupt
                 DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
                 DCD     LPTIM2_IRQHandler                 ; LP TIM2 interrupt
-                DCD     0                                 ; Reserved
+                DCD     OTG_FS_IRQHandler                 ; USB OTG FS
                 DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
                 DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
                 DCD     LPUART1_IRQHandler                 ; LP UART1 interrupt
@@ -164,14 +150,22 @@ __Vectors       DCD     __initial_sp               ; Top of Stack
                 DCD     I2C3_EV_IRQHandler                ; I2C3 event
                 DCD     I2C3_ER_IRQHandler                ; I2C3 error
                 DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
-                DCD     0                                 ; Reserved
+                DCD     SAI2_IRQHandler                   ; Serial Audio Interface 2 global interrupt
                 DCD     SWPMI1_IRQHandler                 ; Serial Wire Interface 1 global interrupt
                 DCD     TSC_IRQHandler                    ; Touch Sense Controller global interrupt
-                DCD     0                                 ; Reserved
-                DCD     0                                 ; Reserved
+                DCD     LCD_IRQHandler                    ; LCD global interrupt
+                DCD     0                                 ; Reserved 
                 DCD     RNG_IRQHandler                    ; RNG global interrupt
                 DCD     FPU_IRQHandler                    ; FPU
-                DCD     CRS_IRQHandler                    ; CRS interrupt
+                DCD     CRS_IRQHandler                    ; CRS error
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     DCMI_IRQHandler                   ; DCMI global interrupt
+                DCD     CAN2_TX_IRQHandler                ; CAN2 TX
+                DCD     CAN2_RX0_IRQHandler               ; CAN2 RX0
+                DCD     CAN2_RX1_IRQHandler               ; CAN2 RX1
+                DCD     CAN2_SCE_IRQHandler               ; CAN2 SCE
+                DCD     DMA2D_IRQHandler                  ; DMA2D global interrupt                    
 
 __Vectors_End
 
@@ -255,7 +249,7 @@ Default_Handler PROC
         EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
         EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
         EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
-        EXPORT     ADC1_IRQHandler                   [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
         EXPORT     CAN1_TX_IRQHandler                [WEAK]
         EXPORT     CAN1_RX0_IRQHandler               [WEAK]
         EXPORT     CAN1_RX1_IRQHandler               [WEAK]
@@ -263,9 +257,11 @@ Default_Handler PROC
         EXPORT     EXTI9_5_IRQHandler                [WEAK]
         EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
         EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
-        EXPORT     TIM1_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
         EXPORT     TIM1_CC_IRQHandler                [WEAK]
         EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
         EXPORT     I2C1_EV_IRQHandler                [WEAK]
         EXPORT     I2C1_ER_IRQHandler                [WEAK]
         EXPORT     I2C2_EV_IRQHandler                [WEAK]
@@ -277,8 +273,18 @@ Default_Handler PROC
         EXPORT     USART3_IRQHandler                 [WEAK]
         EXPORT     EXTI15_10_IRQHandler              [WEAK]
         EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     DFSDM1_FLT3_IRQHandler                 [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
         EXPORT     SDMMC1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
         EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
         EXPORT     TIM6_DAC_IRQHandler               [WEAK]
         EXPORT     TIM7_IRQHandler                   [WEAK]
         EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
@@ -286,9 +292,13 @@ Default_Handler PROC
         EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
         EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
         EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     DFSDM1_FLT0_IRQHandler            [WEAK]
+        EXPORT     DFSDM1_FLT1_IRQHandler            [WEAK]
+        EXPORT     DFSDM1_FLT2_IRQHandler            [WEAK]
         EXPORT     COMP_IRQHandler                   [WEAK]
         EXPORT     LPTIM1_IRQHandler                 [WEAK]
         EXPORT     LPTIM2_IRQHandler                 [WEAK]
+        EXPORT     OTG_FS_IRQHandler                 [WEAK]
         EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
         EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
         EXPORT     LPUART1_IRQHandler                [WEAK]
@@ -296,11 +306,21 @@ Default_Handler PROC
         EXPORT     I2C3_EV_IRQHandler                [WEAK]
         EXPORT     I2C3_ER_IRQHandler                [WEAK]
         EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     SAI2_IRQHandler                   [WEAK]
         EXPORT     SWPMI1_IRQHandler                 [WEAK]
         EXPORT     TSC_IRQHandler                    [WEAK]
+        EXPORT     LCD_IRQHandler                    [WEAK]
         EXPORT     RNG_IRQHandler                    [WEAK]
         EXPORT     FPU_IRQHandler                    [WEAK]
         EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     DCMI_IRQHandler                   [WEAK]
+        EXPORT     CAN2_TX_IRQHandler                [WEAK]
+        EXPORT     CAN2_RX0_IRQHandler               [WEAK]
+        EXPORT     CAN2_RX1_IRQHandler               [WEAK]
+        EXPORT     CAN2_SCE_IRQHandler               [WEAK]
+        EXPORT     DMA2D_IRQHandler                  [WEAK]                  
 
 WWDG_IRQHandler
 PVD_PVM_IRQHandler
@@ -320,7 +340,7 @@ DMA1_Channel4_IRQHandler
 DMA1_Channel5_IRQHandler
 DMA1_Channel6_IRQHandler
 DMA1_Channel7_IRQHandler
-ADC1_IRQHandler
+ADC1_2_IRQHandler
 CAN1_TX_IRQHandler
 CAN1_RX0_IRQHandler
 CAN1_RX1_IRQHandler
@@ -328,9 +348,11 @@ CAN1_SCE_IRQHandler
 EXTI9_5_IRQHandler
 TIM1_BRK_TIM15_IRQHandler
 TIM1_UP_TIM16_IRQHandler
-TIM1_TRG_COM_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
 TIM1_CC_IRQHandler
 TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
 I2C1_EV_IRQHandler
 I2C1_ER_IRQHandler
 I2C2_EV_IRQHandler
@@ -342,8 +364,18 @@ USART2_IRQHandler
 USART3_IRQHandler
 EXTI15_10_IRQHandler
 RTC_Alarm_IRQHandler
+DFSDM1_FLT3_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
 SDMMC1_IRQHandler
+TIM5_IRQHandler
 SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
 TIM6_DAC_IRQHandler
 TIM7_IRQHandler
 DMA2_Channel1_IRQHandler
@@ -351,9 +383,13 @@ DMA2_Channel2_IRQHandler
 DMA2_Channel3_IRQHandler
 DMA2_Channel4_IRQHandler
 DMA2_Channel5_IRQHandler
+DFSDM1_FLT0_IRQHandler
+DFSDM1_FLT1_IRQHandler
+DFSDM1_FLT2_IRQHandler
 COMP_IRQHandler
 LPTIM1_IRQHandler
 LPTIM2_IRQHandler
+OTG_FS_IRQHandler
 DMA2_Channel6_IRQHandler
 DMA2_Channel7_IRQHandler
 LPUART1_IRQHandler
@@ -361,11 +397,21 @@ QUADSPI_IRQHandler
 I2C3_EV_IRQHandler
 I2C3_ER_IRQHandler
 SAI1_IRQHandler
+SAI2_IRQHandler
 SWPMI1_IRQHandler
 TSC_IRQHandler
+LCD_IRQHandler
 RNG_IRQHandler
-FPU_IRQHandler
-CRS_IRQHandler
+FPU_IRQHandler     
+CRS_IRQHandler     
+I2C4_EV_IRQHandler 
+I2C4_ER_IRQHandler 
+DCMI_IRQHandler    
+CAN2_TX_IRQHandler 
+CAN2_RX0_IRQHandler
+CAN2_RX1_IRQHandler
+CAN2_SCE_IRQHandler
+DMA2D_IRQHandler   
 
                 B       .
 

board/NUCLEO_STM32L496ZG/KEIL/tflitemicro_person_detection/TencentOS_tiny.uvoptx

@@ -117,6 +117,11 @@
         <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
       </DebugOpt>
       <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U0667FF343339415043053749 -O206 -SF10000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP (ARM Core") -D00(2BA01477) -L00(0) -TO131090 -TC10000000 -TT10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32L4xx_1024.FLM -FS08000000 -FL0100000 -FP0($$Device:STM32L496ZGTx$CMSIS\Flash\STM32L4xx_1024.FLM)</Name>
+        </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
           <Key>UL2CM3</Key>
@@ -168,7 +173,7 @@
       <pMultCmdsp></pMultCmdsp>
       <DebugDescription>
         <Enable>1</Enable>
-        <EnableFlashSeq>1</EnableFlashSeq>
+        <EnableFlashSeq>0</EnableFlashSeq>
         <EnableLog>0</EnableLog>
         <Protocol>2</Protocol>
         <DbgClock>10000000</DbgClock>
@@ -198,7 +203,7 @@
 
   <Group>
     <GroupName>Application/User</GroupName>
-    <tvExp>0</tvExp>
+    <tvExp>1</tvExp>
     <tvExpOptDlg>0</tvExpOptDlg>
     <cbSel>0</cbSel>
     <RteFlg>0</RteFlg>
@@ -622,7 +627,7 @@
 
   <Group>
     <GroupName>Drivers/CMSIS</GroupName>
-    <tvExp>1</tvExp>
+    <tvExp>0</tvExp>
     <tvExpOptDlg>0</tvExpOptDlg>
     <cbSel>0</cbSel>
     <RteFlg>0</RteFlg>
@@ -642,7 +647,7 @@
 
   <Group>
     <GroupName>tos/arch</GroupName>
-    <tvExp>1</tvExp>
+    <tvExp>0</tvExp>
     <tvExpOptDlg>0</tvExpOptDlg>
     <cbSel>0</cbSel>
     <RteFlg>0</RteFlg>
@@ -982,7 +987,7 @@
 
   <Group>
     <GroupName>tos/cmsis_os</GroupName>
-    <tvExp>1</tvExp>
+    <tvExp>0</tvExp>
     <tvExpOptDlg>0</tvExpOptDlg>
     <cbSel>0</cbSel>
     <RteFlg>0</RteFlg>
@@ -1002,7 +1007,7 @@
 
   <Group>
     <GroupName>hal</GroupName>
-    <tvExp>1</tvExp>
+    <tvExp>0</tvExp>
     <tvExpOptDlg>0</tvExpOptDlg>
     <cbSel>0</cbSel>
     <RteFlg>0</RteFlg>
@@ -1090,7 +1095,7 @@
 
   <Group>
     <GroupName>tensorflow</GroupName>
-    <tvExp>1</tvExp>
+    <tvExp>0</tvExp>
     <tvExpOptDlg>0</tvExpOptDlg>
     <cbSel>0</cbSel>
     <RteFlg>0</RteFlg>
@@ -1146,7 +1151,7 @@
       <GroupNumber>10</GroupNumber>
       <FileNumber>75</FileNumber>
       <FileType>8</FileType>
-      <tvExp>0</tvExp>
+      <tvExp>1</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
       <bDave2>0</bDave2>
       <PathWithFileName>..\..\..\..\examples\tflitemicro_person_detection\tflu_person_detection\main_functions.cc</PathWithFileName>

board/NUCLEO_STM32L496ZG/KEIL/tflitemicro_speech_detection/TencentOS_tiny.uvprojx

@@ -10,15 +10,15 @@
       <TargetName>TencentOS_tiny</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
-      <uAC6>0</uAC6>
+      <pCCUsed>6140000::V6.14::ARMCLANG</pCCUsed>
+      <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
-          <Device>STM32L431RCTx</Device>
+          <Device>STM32L496ZGTx</Device>
           <Vendor>STMicroelectronics</Vendor>
-          <PackID>Keil.STM32L4xx_DFP.2.2.0</PackID>
-          <PackURL>http://www.keil.com/pack</PackURL>
-          <Cpu>IRAM(0x20000000-0x2000FFFF) IROM(0x8000000-0x803FFFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <PackID>Keil.STM32L4xx_DFP.2.5.0</PackID>
+          <PackURL>https://www.keil.com/pack/</PackURL>
+          <Cpu>IRAM(0x20000000-0x2004FFFF) IROM(0x8000000-0x80FFFFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
           <StartupFile></StartupFile>
           <FlashDriverDll></FlashDriverDll>
@@ -33,7 +33,7 @@
           <SLE66CMisc></SLE66CMisc>
           <SLE66AMisc></SLE66AMisc>
           <SLE66LinkerMisc></SLE66LinkerMisc>
-          <SFDFile>$$Device:STM32L431RCTx$CMSIS\SVD\STM32L4x1.svd</SFDFile>
+          <SFDFile>$$Device:STM32L496ZGTx$CMSIS\SVD\STM32L4x6.svd</SFDFile>
           <bCustSvd>0</bCustSvd>
           <UseEnv>0</UseEnv>
           <BinPath></BinPath>
@@ -48,14 +48,14 @@
             <NotGenerated>0</NotGenerated>
             <InvalidFlash>1</InvalidFlash>
           </TargetStatus>
-          <OutputDirectory>.\obj\</OutputDirectory>
+          <OutputDirectory>TencentOS_tiny\</OutputDirectory>
           <OutputName>TencentOS_tiny</OutputName>
           <CreateExecutable>1</CreateExecutable>
           <CreateLib>0</CreateLib>
           <CreateHexFile>1</CreateHexFile>
           <DebugInformation>1</DebugInformation>
-          <BrowseInformation>0</BrowseInformation>
-          <ListingPath>.\list\</ListingPath>
+          <BrowseInformation>1</BrowseInformation>
+          <ListingPath></ListingPath>
           <HexFormatSelection>1</HexFormatSelection>
           <Merge32K>0</Merge32K>
           <CreateBatchFile>0</CreateBatchFile>
@@ -137,7 +137,7 @@
             <DriverSelection>4107</DriverSelection>
           </Flash1>
           <bUseTDR>1</bUseTDR>
-          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash2>BIN\UL2CM3.DLL</Flash2>
           <Flash3></Flash3>
           <Flash4></Flash4>
           <pFcarmOut></pFcarmOut>
@@ -185,10 +185,11 @@
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
             <RvdsMve>0</RvdsMve>
+            <RvdsCdeCp>0</RvdsCdeCp>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
-            <useUlib>1</useUlib>
+            <useUlib>0</useUlib>
             <EndSel>0</EndSel>
             <uLtcg>0</uLtcg>
             <nSecure>0</nSecure>
@@ -245,12 +246,12 @@
               <IRAM>
                 <Type>0</Type>
                 <StartAddress>0x20000000</StartAddress>
-                <Size>0x10000</Size>
+                <Size>0x50000</Size>
               </IRAM>
               <IROM>
                 <Type>1</Type>
                 <StartAddress>0x8000000</StartAddress>
-                <Size>0x40000</Size>
+                <Size>0x100000</Size>
               </IROM>
               <XRAM>
                 <Type>0</Type>
@@ -275,7 +276,7 @@
               <OCR_RVCT4>
                 <Type>1</Type>
                 <StartAddress>0x8000000</StartAddress>
-                <Size>0x40000</Size>
+                <Size>0x100000</Size>
               </OCR_RVCT4>
               <OCR_RVCT5>
                 <Type>1</Type>
@@ -300,7 +301,7 @@
               <OCR_RVCT9>
                 <Type>0</Type>
                 <StartAddress>0x20000000</StartAddress>
-                <Size>0x10000</Size>
+                <Size>0x50000</Size>
               </OCR_RVCT9>
               <OCR_RVCT10>
                 <Type>0</Type>
@@ -312,7 +313,7 @@
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
-            <Optim>1</Optim>
+            <Optim>4</Optim>
             <oTime>0</oTime>
             <SplitLS>0</SplitLS>
             <OneElfS>1</OneElfS>
@@ -321,14 +322,14 @@
             <PlainCh>0</PlainCh>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <wLevel>2</wLevel>
+            <wLevel>3</wLevel>
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>1</uC99>
             <uGnu>0</uGnu>
             <useXO>0</useXO>
-            <v6Lang>1</v6Lang>
-            <v6LangP>1</v6LangP>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
             <vShortEn>1</vShortEn>
             <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
@@ -336,9 +337,9 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>USE_HAL_DRIVER,STM32L431xx,NDEBUG</Define>
+              <Define>USE_HAL_DRIVER,STM32L496xx,NUCLEO_STM32L496ZG</Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\BSP\Inc;..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Inc;..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Legacy;..\..\..\..\platform\vendor_bsp\st\CMSIS\Device\ST\STM32L4xx\Include;..\..\..\..\platform\vendor_bsp\st\CMSIS\Include;..\..\..\..\kernel\core\include;..\..\TOS-CONFIG;..\..\..\..\platform\arch\arm\cortex-m4\keil;..\..\..\..\kernel\pm\include;..\..\..\..\osal\cmsis_os;..\..\..\..\arch\arm\arm-v7m\common\include;..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc;..\..\BSP\Hardware\DHT11;..\..\BSP\Hardware\OLED;..\..\BSP\Hardware\BH1750;..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\ascii;..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions;..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\include;..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\rtu;..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\tcp;..\..\BSP\Hardware\Modbus_Port</IncludePath>
+              <IncludePath>..\..\BSP\Inc;..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Inc;..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Inc\Legacy;..\..\..\..\platform\vendor_bsp\st\CMSIS\Device\ST\STM32L4xx\Include;..\..\..\..\platform\vendor_bsp\st\CMSIS\Include;..\..\..\..\arch\arm\arm-v7m\common\include;..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc;..\..\..\..\kernel\core\include;..\..\..\..\kernel\pm\include;..\..\..\..\osal\cmsis_os;..\..\..\..\examples\hello_world;..\..\TOS_CONFIG;..\..\..\..\net\at\include;..\..\..\..\kernel\hal\include;..\..\BSP\Hardware\Inc;..\..\..\..\components\ai\tflite_micro\ARM_CortexM4_lib;..\..\..\..\components\ai\tflite_micro\ARM_CortexM4_lib\third_party\flatbuffers\include;..\..\..\..\components\ai\tflite_micro\ARM_CortexM4_lib\third_party\gemmlowp;..\..\..\..\components\ai\tflite_micro\ARM_CortexM4_lib\third_party\kissfft;..\..\..\..\components\ai\tflite_micro\ARM_CortexM4_lib\third_party\ruy;..\..\..\..\components\ai\tflite_micro\ARM_CortexM4_lib\tensorflow\lite\micro\tools\make\downloads;..\..\..\..\examples\tflitemicro_person_detection\tflu_person_detection;..\..\..\..\examples\tflitemicro_speech_detection\tflu_speech_yes_or_no;..\..\..\..\examples\tflitemicro_speech_detection\tflu_speech_yes_or_no\micro_features</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -351,7 +352,7 @@
             <NoWarn>0</NoWarn>
             <uSurpInc>0</uSurpInc>
             <useXO>0</useXO>
-            <uClangAs>0</uClangAs>
+            <ClangAsOpt>4</ClangAsOpt>
             <VariousControls>
               <MiscControls></MiscControls>
               <Define></Define>
@@ -383,49 +384,59 @@
           <GroupName>Application/MDK-ARM</GroupName>
           <Files>
             <File>
-              <FileName>startup_stm32l431xx.s</FileName>
+              <FileName>startup_stm32l496xx.s</FileName>
               <FileType>2</FileType>
-              <FilePath>startup_stm32l431xx.s</FilePath>
+              <FilePath>startup_stm32l496xx.s</FilePath>
             </File>
           </Files>
         </Group>
         <Group>
           <GroupName>Application/User</GroupName>
           <Files>
-            <File>
-              <FileName>gpio.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\BSP\Src\gpio.c</FilePath>
-            </File>
             <File>
               <FileName>main.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\BSP\Src\main.c</FilePath>
             </File>
             <File>
-              <FileName>mcu_init.c</FileName>
+              <FileName>gpio.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\BSP\Src\mcu_init.c</FilePath>
+              <FilePath>..\..\BSP\Src\gpio.c</FilePath>
             </File>
             <File>
               <FileName>stm32l4xx_hal_msp.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\BSP\Src\stm32l4xx_hal_msp.c</FilePath>
             </File>
+            <File>
+              <FileName>stm32l4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\BSP\Src\stm32l4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>sys.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\BSP\Src\sys.c</FilePath>
+            </File>
             <File>
               <FileName>usart.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\BSP\Src\usart.c</FilePath>
             </File>
             <File>
-              <FileName>adc.c</FileName>
+              <FileName>mcu_init.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\BSP\Src\adc.c</FilePath>
+              <FilePath>..\..\BSP\Src\mcu_init.c</FilePath>
             </File>
             <File>
-              <FileName>dac.c</FileName>
+              <FileName>dcmi.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\BSP\Src\dac.c</FilePath>
+              <FilePath>..\..\BSP\Src\dcmi.c</FilePath>
+            </File>
+            <File>
+              <FileName>dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\BSP\Src\dma.c</FilePath>
             </File>
             <File>
               <FileName>i2c.c</FileName>
@@ -437,11 +448,6 @@
               <FileType>1</FileType>
               <FilePath>..\..\BSP\Src\spi.c</FilePath>
             </File>
-            <File>
-              <FileName>stm32l4xx_it_modbus.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\BSP\Src\stm32l4xx_it_modbus.c</FilePath>
-            </File>
             <File>
               <FileName>tim.c</FileName>
               <FileType>1</FileType>
@@ -449,29 +455,9 @@
             </File>
           </Files>
         </Group>
-        <Group>
-          <GroupName>examples</GroupName>
-          <Files>
-            <File>
-              <FileName>modbus.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\..\examples\modbus\modbus.c</FilePath>
-            </File>
-          </Files>
-        </Group>
         <Group>
           <GroupName>Drivers/STM32L4xx_HAL_Driver</GroupName>
           <Files>
-            <File>
-              <FileName>stm32l4xx_hal_tim.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim.c</FilePath>
-            </File>
-            <File>
-              <FileName>stm32l4xx_hal_tim_ex.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim_ex.c</FilePath>
-            </File>
             <File>
               <FileName>stm32l4xx_hal_uart.c</FileName>
               <FileType>1</FileType>
@@ -553,24 +539,24 @@
               <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cortex.c</FilePath>
             </File>
             <File>
-              <FileName>stm32l4xx_hal_adc_ex.c</FileName>
+              <FileName>stm32l4xx_hal_exti.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc_ex.c</FilePath>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_exti.c</FilePath>
             </File>
             <File>
-              <FileName>stm32l4xx_hal_adc.c</FileName>
+              <FileName>stm32l4xx_hal_tim.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc.c</FilePath>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim.c</FilePath>
             </File>
             <File>
-              <FileName>stm32l4xx_hal_dac.c</FileName>
+              <FileName>stm32l4xx_hal_tim_ex.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac.c</FilePath>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim_ex.c</FilePath>
             </File>
             <File>
-              <FileName>stm32l4xx_hal_dac_ex.c</FileName>
+              <FileName>stm32l4xx_hal_dcmi.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac_ex.c</FilePath>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dcmi.c</FilePath>
             </File>
             <File>
               <FileName>stm32l4xx_hal_spi.c</FileName>
@@ -595,22 +581,27 @@
           </Files>
         </Group>
         <Group>
-          <GroupName>Hardware</GroupName>
+          <GroupName>tos/arch</GroupName>
           <Files>
             <File>
-              <FileName>DHT11_BUS.c</FileName>
+              <FileName>tos_cpu.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\BSP\Hardware\DHT11\DHT11_BUS.c</FilePath>
+              <FilePath>..\..\..\..\arch\arm\arm-v7m\common\tos_cpu.c</FilePath>
             </File>
             <File>
-              <FileName>oled.c</FileName>
+              <FileName>port_c.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\BSP\Hardware\OLED\oled.c</FilePath>
+              <FilePath>..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc\port_c.c</FilePath>
+            </File>
+            <File>
+              <FileName>port_s.S</FileName>
+              <FileType>2</FileType>
+              <FilePath>..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc\port_s.S</FilePath>
             </File>
           </Files>
         </Group>
         <Group>
-          <GroupName>kernel</GroupName>
+          <GroupName>tos/kernel</GroupName>
           <Files>
             <File>
               <FileName>tos_binary_heap.c</FileName>
@@ -735,27 +726,7 @@
           </Files>
         </Group>
         <Group>
-          <GroupName>cpu</GroupName>
-          <Files>
-            <File>
-              <FileName>port_s.S</FileName>
-              <FileType>2</FileType>
-              <FilePath>..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc\port_s.S</FilePath>
-            </File>
-            <File>
-              <FileName>tos_cpu.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\..\arch\arm\arm-v7m\common\tos_cpu.c</FilePath>
-            </File>
-            <File>
-              <FileName>port_c.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc\port_c.c</FilePath>
-            </File>
-          </Files>
-        </Group>
-        <Group>
-          <GroupName>cmsis</GroupName>
+          <GroupName>tos/cmsis_os</GroupName>
           <Files>
             <File>
               <FileName>cmsis_os.c</FileName>
@@ -765,97 +736,77 @@
           </Files>
         </Group>
         <Group>
-          <GroupName>config</GroupName>
+          <GroupName>hal</GroupName>
           <Files>
             <File>
-              <FileName>tos_config.h</FileName>
-              <FileType>5</FileType>
-              <FilePath>..\..\TOS-CONFIG\tos_config.h</FilePath>
+              <FileName>delay.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\BSP\Hardware\Src\delay.c</FilePath>
+            </File>
+            <File>
+              <FileName>lcd_2inch4.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\BSP\Hardware\Src\lcd_2inch4.c</FilePath>
+            </File>
+            <File>
+              <FileName>lcd_config.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\BSP\Hardware\Src\lcd_config.c</FilePath>
+            </File>
+            <File>
+              <FileName>ov2640.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\BSP\Hardware\Src\ov2640.c</FilePath>
+            </File>
+            <File>
+              <FileName>sccb.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\BSP\Hardware\Src\sccb.c</FilePath>
             </File>
           </Files>
         </Group>
         <Group>
-          <GroupName>modbus_src</GroupName>
+          <GroupName>examples</GroupName>
           <Files>
             <File>
-              <FileName>mbascii.c</FileName>
+              <FileName>tflitemicro_speech_detection.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\ascii\mbascii.c</FilePath>
-            </File>
-            <File>
-              <FileName>mbfunccoils.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions\mbfunccoils.c</FilePath>
-            </File>
-            <File>
-              <FileName>mbfuncdiag.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions\mbfuncdiag.c</FilePath>
-            </File>
-            <File>
-              <FileName>mbfuncdisc.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions\mbfuncdisc.c</FilePath>
-            </File>
-            <File>
-              <FileName>mbfuncholding.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions\mbfuncholding.c</FilePath>
-            </File>
-            <File>
-              <FileName>mbfuncinput.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions\mbfuncinput.c</FilePath>
-            </File>
-            <File>
-              <FileName>mbfuncother.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions\mbfuncother.c</FilePath>
-            </File>
-            <File>
-              <FileName>mbutils.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions\mbutils.c</FilePath>
-            </File>
-            <File>
-              <FileName>mbcrc.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\rtu\mbcrc.c</FilePath>
-            </File>
-            <File>
-              <FileName>mbrtu.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\rtu\mbrtu.c</FilePath>
-            </File>
-            <File>
-              <FileName>mbtcp.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\tcp\mbtcp.c</FilePath>
-            </File>
-            <File>
-              <FileName>mb.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\mb.c</FilePath>
+              <FilePath>..\..\..\..\examples\tflitemicro_speech_detection\tflitemicro_speech_detection.c</FilePath>
             </File>
           </Files>
         </Group>
         <Group>
-          <GroupName>modbus_port</GroupName>
+          <GroupName>tensorflow</GroupName>
           <Files>
             <File>
-              <FileName>portevent.c</FileName>
+              <FileName>retarget.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\BSP\Hardware\Modbus_Port\portevent.c</FilePath>
+              <FilePath>..\..\..\..\components\ai\tflite_micro\KEIL\retarget.c</FilePath>
             </File>
             <File>
-              <FileName>portserial.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\BSP\Hardware\Modbus_Port\portserial.c</FilePath>
+              <FileName>tensorflow_lite_micro_M4.lib</FileName>
+              <FileType>4</FileType>
+              <FilePath>..\..\..\..\components\ai\tflite_micro\ARM_CortexM4_lib\tensorflow_lite_micro_M4.lib</FilePath>
             </File>
             <File>
-              <FileName>porttimer.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\BSP\Hardware\Modbus_Port\porttimer.c</FilePath>
+              <FileName>model.cc</FileName>
+              <FileType>8</FileType>
+              <FilePath>..\..\..\..\examples\tflitemicro_speech_detection\tflu_speech_yes_or_no\micro_features\model.cc</FilePath>
+            </File>
+            <File>
+              <FileName>no_micro_features_data.cc</FileName>
+              <FileType>8</FileType>
+              <FilePath>..\..\..\..\examples\tflitemicro_speech_detection\tflu_speech_yes_or_no\micro_features\no_micro_features_data.cc</FilePath>
+            </File>
+            <File>
+              <FileName>yes_micro_features_data.cc</FileName>
+              <FileType>8</FileType>
+              <FilePath>..\..\..\..\examples\tflitemicro_speech_detection\tflu_speech_yes_or_no\micro_features\yes_micro_features_data.cc</FilePath>
+            </File>
+            <File>
+              <FileName>micro_speech.cc</FileName>
+              <FileType>8</FileType>
+              <FilePath>..\..\..\..\examples\tflitemicro_speech_detection\tflu_speech_yes_or_no\micro_speech.cc</FilePath>
             </File>
           </Files>
         </Group>
@@ -869,8 +820,8 @@
   <RTE>
     <apis/>
     <components>
-      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.4.0" condition="ARMv6_7_8-M Device">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
         <targetInfos>
           <targetInfo name="TencentOS_tiny"/>
         </targetInfos>
@@ -879,4 +830,19 @@
     <files/>
   </RTE>
 
+  <LayerInfo>
+    <Layers>
+      <Layer>
+        <LayName>&lt;Project Info&gt;</LayName>
+        <LayDesc></LayDesc>
+        <LayUrl></LayUrl>
+        <LayKeys></LayKeys>
+        <LayCat></LayCat>
+        <LayLic></LayLic>
+        <LayTarg>0</LayTarg>
+        <LayPrjMark>1</LayPrjMark>
+      </Layer>
+    </Layers>
+  </LayerInfo>
+
 </Project>

board/NUCLEO_STM32L496ZG/KEIL/tflitemicro_speech_detection/startup_stm32l496xx.s

@@ -0,0 +1,450 @@
+;*******************************************************************************
+;* File Name          : startup_stm32l496xx.s
+;* Author             : MCD Application Team
+;* Description        : STM32L496xx Ultra Low Power devices vector table for MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;* <<< Use Configuration Wizard in Context Menu >>>
+;*******************************************************************************
+;*
+;* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+;* All rights reserved.</center></h2>
+;*
+;* This software component is licensed by ST under BSD 3-Clause license,
+;* the "License"; You may not use this file except in compliance with the
+;* License. You may obtain a copy of the License at:
+;*                        opensource.org/licenses/BSD-3-Clause
+;*
+;*******************************************************************************
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     TAMP_STAMP_IRQHandler             ; Tamper and TimeStamps through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_2_IRQHandler                 ; ADC1, ADC2
+                DCD     CAN1_TX_IRQHandler                ; CAN1 TX
+                DCD     CAN1_RX0_IRQHandler               ; CAN1 RX0
+                DCD     CAN1_RX1_IRQHandler               ; CAN1 RX1
+                DCD     CAN1_SCE_IRQHandler               ; CAN1 SCE
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_TIM17_IRQHandler     ; TIM1 Trigger and Commutation and TIM17
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     TIM3_IRQHandler                   ; TIM3
+                DCD     TIM4_IRQHandler                   ; TIM4
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     DFSDM1_FLT3_IRQHandler            ; DFSDM1 Filter 3 global Interrupt
+                DCD     TIM8_BRK_IRQHandler               ; TIM8 Break Interrupt
+                DCD     TIM8_UP_IRQHandler                ; TIM8 Update Interrupt
+                DCD     TIM8_TRG_COM_IRQHandler           ; TIM8 Trigger and Commutation Interrupt
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare Interrupt
+                DCD     ADC3_IRQHandler                   ; ADC3 global  Interrupt
+                DCD     FMC_IRQHandler                    ; FMC
+                DCD     SDMMC1_IRQHandler                 ; SDMMC1
+                DCD     TIM5_IRQHandler                   ; TIM5
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     UART4_IRQHandler                  ; UART4
+                DCD     UART5_IRQHandler                  ; UART5
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&2 underrun errors
+                DCD     TIM7_IRQHandler                   ; TIM7
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     DFSDM1_FLT0_IRQHandler            ; DFSDM1 Filter 0 global Interrupt
+                DCD     DFSDM1_FLT1_IRQHandler            ; DFSDM1 Filter 1 global Interrupt
+                DCD     DFSDM1_FLT2_IRQHandler            ; DFSDM1 Filter 2 global Interrupt
+                DCD     COMP_IRQHandler                   ; COMP Interrupt
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     LPTIM2_IRQHandler                 ; LP TIM2 interrupt
+                DCD     OTG_FS_IRQHandler                 ; USB OTG FS
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     LPUART1_IRQHandler                 ; LP UART1 interrupt
+                DCD     QUADSPI_IRQHandler                ; Quad SPI global interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 error
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     SAI2_IRQHandler                   ; Serial Audio Interface 2 global interrupt
+                DCD     SWPMI1_IRQHandler                 ; Serial Wire Interface 1 global interrupt
+                DCD     TSC_IRQHandler                    ; Touch Sense Controller global interrupt
+                DCD     LCD_IRQHandler                    ; LCD global interrupt
+                DCD     0                                 ; Reserved 
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     CRS_IRQHandler                    ; CRS error
+                DCD     I2C4_EV_IRQHandler                ; I2C4 event
+                DCD     I2C4_ER_IRQHandler                ; I2C4 error
+                DCD     DCMI_IRQHandler                   ; DCMI global interrupt
+                DCD     CAN2_TX_IRQHandler                ; CAN2 TX
+                DCD     CAN2_RX0_IRQHandler               ; CAN2 RX0
+                DCD     CAN2_RX1_IRQHandler               ; CAN2 RX1
+                DCD     CAN2_SCE_IRQHandler               ; CAN2 SCE
+                DCD     DMA2D_IRQHandler                  ; DMA2D global interrupt                    
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     TAMP_STAMP_IRQHandler             [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_2_IRQHandler                 [WEAK]
+        EXPORT     CAN1_TX_IRQHandler                [WEAK]
+        EXPORT     CAN1_RX0_IRQHandler               [WEAK]
+        EXPORT     CAN1_RX1_IRQHandler               [WEAK]
+        EXPORT     CAN1_SCE_IRQHandler               [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_TIM17_IRQHandler     [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     TIM3_IRQHandler                   [WEAK]
+        EXPORT     TIM4_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     DFSDM1_FLT3_IRQHandler                 [WEAK]
+        EXPORT     TIM8_BRK_IRQHandler               [WEAK]
+        EXPORT     TIM8_UP_IRQHandler                [WEAK]
+        EXPORT     TIM8_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM8_CC_IRQHandler                [WEAK]
+        EXPORT     ADC3_IRQHandler                   [WEAK]
+        EXPORT     FMC_IRQHandler                    [WEAK]
+        EXPORT     SDMMC1_IRQHandler                 [WEAK]
+        EXPORT     TIM5_IRQHandler                   [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     UART4_IRQHandler                  [WEAK]
+        EXPORT     UART5_IRQHandler                  [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_IRQHandler                   [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     DFSDM1_FLT0_IRQHandler            [WEAK]
+        EXPORT     DFSDM1_FLT1_IRQHandler            [WEAK]
+        EXPORT     DFSDM1_FLT2_IRQHandler            [WEAK]
+        EXPORT     COMP_IRQHandler                   [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     LPTIM2_IRQHandler                 [WEAK]
+        EXPORT     OTG_FS_IRQHandler                 [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     SAI2_IRQHandler                   [WEAK]
+        EXPORT     SWPMI1_IRQHandler                 [WEAK]
+        EXPORT     TSC_IRQHandler                    [WEAK]
+        EXPORT     LCD_IRQHandler                    [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+        EXPORT     I2C4_EV_IRQHandler                [WEAK]
+        EXPORT     I2C4_ER_IRQHandler                [WEAK]
+        EXPORT     DCMI_IRQHandler                   [WEAK]
+        EXPORT     CAN2_TX_IRQHandler                [WEAK]
+        EXPORT     CAN2_RX0_IRQHandler               [WEAK]
+        EXPORT     CAN2_RX1_IRQHandler               [WEAK]
+        EXPORT     CAN2_SCE_IRQHandler               [WEAK]
+        EXPORT     DMA2D_IRQHandler                  [WEAK]                  
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+TAMP_STAMP_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+CAN1_TX_IRQHandler
+CAN1_RX0_IRQHandler
+CAN1_RX1_IRQHandler
+CAN1_SCE_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+DFSDM1_FLT3_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+SDMMC1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+DFSDM1_FLT0_IRQHandler
+DFSDM1_FLT1_IRQHandler
+DFSDM1_FLT2_IRQHandler
+COMP_IRQHandler
+LPTIM1_IRQHandler
+LPTIM2_IRQHandler
+OTG_FS_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+LPUART1_IRQHandler
+QUADSPI_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+SAI1_IRQHandler
+SAI2_IRQHandler
+SWPMI1_IRQHandler
+TSC_IRQHandler
+LCD_IRQHandler
+RNG_IRQHandler
+FPU_IRQHandler     
+CRS_IRQHandler     
+I2C4_EV_IRQHandler 
+I2C4_ER_IRQHandler 
+DCMI_IRQHandler    
+CAN2_TX_IRQHandler 
+CAN2_RX0_IRQHandler
+CAN2_RX1_IRQHandler
+CAN2_SCE_IRQHandler
+DMA2D_IRQHandler   
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

board/TencentOS_tiny_EVB_G0/KEIL/mqtt_iot_explorer_e53_light/demo/mqtt_iot_explorer_e53_light.c

@@ -305,9 +305,6 @@ void application_entry(void *arg)
 {
     char *str = "TencentOS-tiny";
 
-    // 初始化tencent-os tiny定时器模块
-    timer_init();
-	
     // 初始化按键检测模块
     stm32g0xx_key_init();
 	

board/TencentOS_tiny_EVB_MX_Plus/BSP/Hardware/Modbus_Port/mod_port.h

@@ -1,54 +0,0 @@
-/*
- * FreeModbus Libary: BARE Port
- * Copyright (C) 2006 Christian Walter <wolti@sil.at>
- *
- * This library is free software; you can redistribute it and/or
- * modify it under the terms of the GNU Lesser General Public
- * License as published by the Free Software Foundation; either
- * version 2.1 of the License, or (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public
- * License along with this library; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
- *
- * File: $Id$
- */
-
-#ifndef _MOD_PORT_H
-#define _MOD_PORT_H
-
-#include <assert.h>
-#include <inttypes.h>
-
-#define	INLINE                      inline
-#define PR_BEGIN_EXTERN_C           extern "C" {
-#define	PR_END_EXTERN_C             }
-
-#define ENTER_CRITICAL_SECTION( )   __disable_irq()
-#define EXIT_CRITICAL_SECTION( )    __enable_irq()
-
-typedef uint8_t BOOL;
-
-typedef unsigned char UCHAR;
-typedef char CHAR;
-
-typedef uint16_t USHORT;
-typedef int16_t SHORT;
-
-typedef uint32_t ULONG;
-typedef int32_t LONG;
-
-#ifndef TRUE
-#define TRUE            1
-#endif
-
-#ifndef FALSE
-#define FALSE           0
-#endif
-
-#endif

board/TencentOS_tiny_EVB_MX_Plus/BSP/Hardware/Modbus_Port/portevent.c

@@ -1,58 +0,0 @@
-/*
- * FreeModbus Libary: BARE Port
- * Copyright (C) 2006 Christian Walter <wolti@sil.at>
- *
- * This library is free software; you can redistribute it and/or
- * modify it under the terms of the GNU Lesser General Public
- * License as published by the Free Software Foundation; either
- * version 2.1 of the License, or (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public
- * License along with this library; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
- *
- * File: $Id$
- */
-
-/* ----------------------- Modbus includes ----------------------------------*/
-#include "mb.h"
-#include "mbport.h"
-
-/* ----------------------- Variables ----------------------------------------*/
-static eMBEventType eQueuedEvent;
-static BOOL     xEventInQueue;
-
-/* ----------------------- Start implementation -----------------------------*/
-BOOL
-xMBPortEventInit( void )
-{
-    xEventInQueue = FALSE;
-    return TRUE;
-}
-
-BOOL
-xMBPortEventPost( eMBEventType eEvent )
-{
-    xEventInQueue = TRUE;
-    eQueuedEvent = eEvent;
-    return TRUE;
-}
-
-BOOL
-xMBPortEventGet( eMBEventType * eEvent )
-{
-    BOOL            xEventHappened = FALSE;
-
-    if( xEventInQueue )
-    {
-        *eEvent = eQueuedEvent;
-        xEventInQueue = FALSE;
-        xEventHappened = TRUE;
-    }
-    return xEventHappened;
-}

board/TencentOS_tiny_EVB_MX_Plus/BSP/Hardware/Modbus_Port/portserial.c

@@ -1,102 +0,0 @@
-/*
- * FreeModbus Libary: BARE Port
- * Copyright (C) 2006 Christian Walter <wolti@sil.at>
- *
- * This library is free software; you can redistribute it and/or
- * modify it under the terms of the GNU Lesser General Public
- * License as published by the Free Software Foundation; either
- * version 2.1 of the License, or (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public
- * License along with this library; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
- *
- * File: $Id$
- */
-
-#include "mod_port.h"
-
-/* ----------------------- Modbus includes ----------------------------------*/
-#include "mb.h"
-#include "mbport.h"
-#include "mcu_init.h"
-
-extern UART_HandleTypeDef huart3;
-/* ----------------------- static functions ---------------------------------*/
-void prvvUARTTxReadyISR( void );
-void prvvUARTRxISR( void );
-
-/* ----------------------- Start implementation -----------------------------*/
-void
-vMBPortSerialEnable( BOOL xRxEnable, BOOL xTxEnable )
-{
-  /* If xRXEnable enable serial receive interrupts. If xTxENable enable
-     * transmitter empty interrupts.
-     */
-  if (xRxEnable) {        
-    __HAL_UART_ENABLE_IT(&huart3, UART_IT_RXNE);
-  } else {    
-    __HAL_UART_DISABLE_IT(&huart3, UART_IT_RXNE);
-  }
-  
-  if (xTxEnable) {    
-    __HAL_UART_ENABLE_IT(&huart3, UART_IT_TXE);
-  } else {
-    __HAL_UART_DISABLE_IT(&huart3, UART_IT_TXE);
-  }  
-}
-
-BOOL
-xMBPortSerialInit( UCHAR ucPORT, ULONG ulBaudRate, UCHAR ucDataBits, eMBParity eParity )
-{
-  /* 
-  Do nothing, Initialization is handled by MX_USART3_UART_Init() 
-  Fixed port, baudrate, databit and parity  
-  */
-  return TRUE;
-}
-
-BOOL
-xMBPortSerialPutByte( CHAR ucByte )
-{
-  /* Put a byte in the UARTs transmit buffer. This function is called
-  * by the protocol stack if pxMBFrameCBTransmitterEmpty( ) has been
-  * called. */
-  return (HAL_OK == HAL_UART_Transmit(&huart3, (uint8_t*)&ucByte, 1, 10));
-}
-
-BOOL
-xMBPortSerialGetByte( CHAR * pucByte )
-{
-  /* Return the byte in the UARTs receive buffer. This function is called
-  * by the protocol stack after pxMBFrameCBByteReceived( ) has been called.
-  */
-  *pucByte = (uint8_t)(huart3.Instance->RDR & (uint8_t)0x00FF);  
-  return TRUE;
-}
-
-/* Create an interrupt handler for the transmit buffer empty interrupt
- * (or an equivalent) for your target processor. This function should then
- * call pxMBFrameCBTransmitterEmpty( ) which tells the protocol stack that
- * a new character can be sent. The protocol stack will then call 
- * xMBPortSerialPutByte( ) to send the character.
- */
-//void prvvUARTTxReadyISR( void )
-//{
-//    pxMBFrameCBTransmitterEmpty(  );
-//}
-
-/* Create an interrupt handler for the receive interrupt for your target
- * processor. This function should then call pxMBFrameCBByteReceived( ). The
- * protocol stack will then call xMBPortSerialGetByte( ) to retrieve the
- * character.
- */
-//void prvvUARTRxISR( void )
-//{
-//    pxMBFrameCBByteReceived( );
-//}

board/TencentOS_tiny_EVB_MX_Plus/BSP/Hardware/Modbus_Port/porttimer.c

@@ -1,88 +0,0 @@
-/*
- * FreeModbus Libary: BARE Port
- * Copyright (C) 2006 Christian Walter <wolti@sil.at>
- *
- * This library is free software; you can redistribute it and/or
- * modify it under the terms of the GNU Lesser General Public
- * License as published by the Free Software Foundation; either
- * version 2.1 of the License, or (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public
- * License along with this library; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
- *
- * File: $Id$
- */
-
-/* ----------------------- Platform includes --------------------------------*/
-#include "mod_port.h"
-#include "mcu_init.h"
-/* ----------------------- Modbus includes ----------------------------------*/
-#include "mb.h"
-#include "mbport.h"
-
-/* ----------------------- static functions ---------------------------------*/
-void prvvTIMERExpiredISR( void );
-extern TIM_HandleTypeDef htim6;
-uint16_t timeout = 0;
-uint16_t downcounter = 0;
-/* ----------------------- Start implementation -----------------------------*/
-BOOL
-xMBPortTimersInit( USHORT usTim1Timerout50us )
-{
-  TIM_MasterConfigTypeDef sMasterConfig;
-  
-  htim6.Instance = TIM6;
-  htim6.Init.Prescaler = (HAL_RCC_GetPCLK1Freq() / 1000000) - 1;
-  htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
-  htim6.Init.Period = 50 - 1;
-  
-  timeout = usTim1Timerout50us;
-  
-  if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
-  {
-    return FALSE;
-  }
-  
-  sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE;
-  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
-  if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
-  {
-    return FALSE;
-  }
-  
-  return TRUE;
-}
-
-
-inline void
-vMBPortTimersEnable(  )
-{
-  /* Enable the timer with the timeout passed to xMBPortTimersInit( ) */
-  downcounter = timeout;
-  HAL_TIM_Base_Start_IT(&htim6);
-	
-	
-}
-
-inline void
-vMBPortTimersDisable(  )
-{
-  /* Disable any pending timers. */
-  HAL_TIM_Base_Stop_IT(&htim6);
-}
-
-/* Create an ISR which is called whenever the timer has expired. This function
- * must then call pxMBPortCBTimerExpired( ) to notify the protocol stack that
- * the timer has expired.
- */
-//void prvvTIMERExpiredISR( void )
-//{
-//    ( void )pxMBPortCBTimerExpired(  );
-//}
-

board/TencentOS_tiny_STM32H750/KEIL/mqtt_client_iot_exporer/demo/mqttclient_iot_explorer.c

@@ -2,7 +2,7 @@
 #include "mcu_init.h"
 #include "tos_k.h"
 #include "mqttclient.h"
-#include "cjson.h"
+#include "cJSON.h"
 #include "sal_module_wrapper.h"
 
 #define USE_ESP8266

components/ai/nnom/LICENSE

@@ -0,0 +1,203 @@
+
+                                 Apache License
+                           Version 2.0, January 2004
+                        http://www.apache.org/licenses/
+
+   TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
+
+   1. Definitions.
+
+      "License" shall mean the terms and conditions for use, reproduction,
+      and distribution as defined by Sections 1 through 9 of this document.
+
+      "Licensor" shall mean the copyright owner or entity authorized by
+      the copyright owner that is granting the License.
+
+      "Legal Entity" shall mean the union of the acting entity and all
+      other entities that control, are controlled by, or are under common
+      control with that entity. For the purposes of this definition,
+      "control" means (i) the power, direct or indirect, to cause the
+      direction or management of such entity, whether by contract or
+      otherwise, or (ii) ownership of fifty percent (50%) or more of the
+      outstanding shares, or (iii) beneficial ownership of such entity.
+
+      "You" (or "Your") shall mean an individual or Legal Entity
+      exercising permissions granted by this License.
+
+      "Source" form shall mean the preferred form for making modifications,
+      including but not limited to software source code, documentation
+      source, and configuration files.
+
+      "Object" form shall mean any form resulting from mechanical
+      transformation or translation of a Source form, including but
+      not limited to compiled object code, generated documentation,
+      and conversions to other media types.
+
+      "Work" shall mean the work of authorship, whether in Source or
+      Object form, made available under the License, as indicated by a
+      copyright notice that is included in or attached to the work
+      (an example is provided in the Appendix below).
+
+      "Derivative Works" shall mean any work, whether in Source or Object
+      form, that is based on (or derived from) the Work and for which the
+      editorial revisions, annotations, elaborations, or other modifications
+      represent, as a whole, an original work of authorship. For the purposes
+      of this License, Derivative Works shall not include works that remain
+      separable from, or merely link (or bind by name) to the interfaces of,
+      the Work and Derivative Works thereof.
+
+      "Contribution" shall mean any work of authorship, including
+      the original version of the Work and any modifications or additions
+      to that Work or Derivative Works thereof, that is intentionally
+      submitted to Licensor for inclusion in the Work by the copyright owner
+      or by an individual or Legal Entity authorized to submit on behalf of
+      the copyright owner. For the purposes of this definition, "submitted"
+      means any form of electronic, verbal, or written communication sent
+      to the Licensor or its representatives, including but not limited to
+      communication on electronic mailing lists, source code control systems,
+      and issue tracking systems that are managed by, or on behalf of, the
+      Licensor for the purpose of discussing and improving the Work, but
+      excluding communication that is conspicuously marked or otherwise
+      designated in writing by the copyright owner as "Not a Contribution."
+
+      "Contributor" shall mean Licensor and any individual or Legal Entity
+      on behalf of whom a Contribution has been received by Licensor and
+      subsequently incorporated within the Work.
+
+   2. Grant of Copyright License. Subject to the terms and conditions of
+      this License, each Contributor hereby grants to You a perpetual,
+      worldwide, non-exclusive, no-charge, royalty-free, irrevocable
+      copyright license to reproduce, prepare Derivative Works of,
+      publicly display, publicly perform, sublicense, and distribute the
+      Work and such Derivative Works in Source or Object form.
+
+   3. Grant of Patent License. Subject to the terms and conditions of
+      this License, each Contributor hereby grants to You a perpetual,
+      worldwide, non-exclusive, no-charge, royalty-free, irrevocable
+      (except as stated in this section) patent license to make, have made,
+      use, offer to sell, sell, import, and otherwise transfer the Work,
+      where such license applies only to those patent claims licensable
+      by such Contributor that are necessarily infringed by their
+      Contribution(s) alone or by combination of their Contribution(s)
+      with the Work to which such Contribution(s) was submitted. If You
+      institute patent litigation against any entity (including a
+      cross-claim or counterclaim in a lawsuit) alleging that the Work
+      or a Contribution incorporated within the Work constitutes direct
+      or contributory patent infringement, then any patent licenses
+      granted to You under this License for that Work shall terminate
+      as of the date such litigation is filed.
+
+   4. Redistribution. You may reproduce and distribute copies of the
+      Work or Derivative Works thereof in any medium, with or without
+      modifications, and in Source or Object form, provided that You
+      meet the following conditions:
+
+      (a) You must give any other recipients of the Work or
+          Derivative Works a copy of this License; and
+
+      (b) You must cause any modified files to carry prominent notices
+          stating that You changed the files; and
+
+      (c) You must retain, in the Source form of any Derivative Works
+          that You distribute, all copyright, patent, trademark, and
+          attribution notices from the Source form of the Work,
+          excluding those notices that do not pertain to any part of
+          the Derivative Works; and
+
+      (d) If the Work includes a "NOTICE" text file as part of its
+          distribution, then any Derivative Works that You distribute must
+          include a readable copy of the attribution notices contained
+          within such NOTICE file, excluding those notices that do not
+          pertain to any part of the Derivative Works, in at least one
+          of the following places: within a NOTICE text file distributed
+          as part of the Derivative Works; within the Source form or
+          documentation, if provided along with the Derivative Works; or,
+          within a display generated by the Derivative Works, if and
+          wherever such third-party notices normally appear. The contents
+          of the NOTICE file are for informational purposes only and
+          do not modify the License. You may add Your own attribution
+          notices within Derivative Works that You distribute, alongside
+          or as an addendum to the NOTICE text from the Work, provided
+          that such additional attribution notices cannot be construed
+          as modifying the License.
+
+      You may add Your own copyright statement to Your modifications and
+      may provide additional or different license terms and conditions
+      for use, reproduction, or distribution of Your modifications, or
+      for any such Derivative Works as a whole, provided Your use,
+      reproduction, and distribution of the Work otherwise complies with
+      the conditions stated in this License.
+
+   5. Submission of Contributions. Unless You explicitly state otherwise,
+      any Contribution intentionally submitted for inclusion in the Work
+      by You to the Licensor shall be under the terms and conditions of
+      this License, without any additional terms or conditions.
+      Notwithstanding the above, nothing herein shall supersede or modify
+      the terms of any separate license agreement you may have executed
+      with Licensor regarding such Contributions.
+
+   6. Trademarks. This License does not grant permission to use the trade
+      names, trademarks, service marks, or product names of the Licensor,
+      except as required for reasonable and customary use in describing the
+      origin of the Work and reproducing the content of the NOTICE file.
+
+   7. Disclaimer of Warranty. Unless required by applicable law or
+      agreed to in writing, Licensor provides the Work (and each
+      Contributor provides its Contributions) on an "AS IS" BASIS,
+      WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+      implied, including, without limitation, any warranties or conditions
+      of TITLE, NON-INFRINGEMENT, MERCHANTABILITY, or FITNESS FOR A
+      PARTICULAR PURPOSE. You are solely responsible for determining the
+      appropriateness of using or redistributing the Work and assume any
+      risks associated with Your exercise of permissions under this License.
+
+   8. Limitation of Liability. In no event and under no legal theory,
+      whether in tort (including negligence), contract, or otherwise,
+      unless required by applicable law (such as deliberate and grossly
+      negligent acts) or agreed to in writing, shall any Contributor be
+      liable to You for damages, including any direct, indirect, special,
+      incidental, or consequential damages of any character arising as a
+      result of this License or out of the use or inability to use the
+      Work (including but not limited to damages for loss of goodwill,
+      work stoppage, computer failure or malfunction, or any and all
+      other commercial damages or losses), even if such Contributor
+      has been advised of the possibility of such damages.
+
+   9. Accepting Warranty or Additional Liability. While redistributing
+      the Work or Derivative Works thereof, You may choose to offer,
+      and charge a fee for, acceptance of support, warranty, indemnity,
+      or other liability obligations and/or rights consistent with this
+      License. However, in accepting such obligations, You may act only
+      on Your own behalf and on Your sole responsibility, not on behalf
+      of any other Contributor, and only if You agree to indemnify,
+      defend, and hold each Contributor harmless for any liability
+      incurred by, or claims asserted against, such Contributor by reason
+      of your accepting any such warranty or additional liability.
+
+   END OF TERMS AND CONDITIONS
+
+   APPENDIX: How to apply the Apache License to your work.
+
+      To apply the Apache License to your work, attach the following
+      boilerplate notice, with the fields enclosed by brackets "[]"
+      replaced with your own identifying information. (Don't include
+      the brackets!)  The text should be enclosed in the appropriate
+      comment syntax for the file format. We also recommend that a
+      file or class name and description of purpose be included on the
+      same "printed page" as the copyright notice for easier
+      identification within third-party archives.
+
+   Copyright [yyyy] [name of copyright owner]
+
+   Licensed under the Apache License, Version 2.0 (the "License");
+   you may not use this file except in compliance with the License.
+   You may obtain a copy of the License at
+
+       http://www.apache.org/licenses/LICENSE-2.0
+
+   Unless required by applicable law or agreed to in writing, software
+   distributed under the License is distributed on an "AS IS" BASIS,
+   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+   See the License for the specific language governing permissions and
+   limitations under the License.
+   

components/ai/nnom/README.md

@@ -0,0 +1,39 @@
+
+# Neural Network on Microcontroller (NNoM)
+[![Build Status](https://travis-ci.com/majianjia/nnom.svg?branch=master)](https://travis-ci.com/majianjia/nnom)
+[![License](https://img.shields.io/badge/License-Apache%202.0-blue.svg)](https://opensource.org/licenses/Apache-2.0)
+[![DOI](https://zenodo.org/badge/166869630.svg)](https://zenodo.org/badge/latestdoi/166869630)
+
+NNoM is a high-level inference Neural Network library specifically for microcontrollers. 
+
+介绍详情可以参考：https://github.com/majianjia/nnom
+
+原作者提供了基于keras的训练模型方法，以及如何配置NNoM的详细文档介绍
+
+
+
+本项目提供一个基于NNoM的软件包，方便在tos上的快捷移植（测试通过平台为stm32l496ZG）
+
+mnist示例可以参考board/NUCLEO_STM32L496ZG/KEIL/nnom_mnist
+
+## 在TencentOS-tiny上的使用说明
+
+1. 在keil工程里添加components / ai / nnom中的src文件夹下的backends、core、layers三个文件夹中的全部.c文件
+2. 在keil工程中包含inc和port文件夹中的全部头文件
+3. 在nnom_port.h指定内存使用方法（测试示例中开启了 NNOM_USING_STATIC_MEMORY宏 ），若使用非静态内存方法需要将nnom_malloc(n)和nnom_free(n)定义为os本身的内存api，对tos是tos_mmheap_alloc(n)和tos_mmheap_free(n)
+4. 若使用静态内存，则需要定义static_buf[size]并使用nnom_set_static_buf(static_buf, sizeof(static_buf))函数去指定静态内存地址与大小，并根据模型需要调整静态内存大小。
+5. 编写示例函数，参考：example/nnom_mnsit中的nnom_mnist_example写法，按照需要实现系统api，比如使用tos_systick_get()去获取系统tick，从而计算推理时间。
+
+
+
+## 注意事项
+
+在keil下确认printf已经成功实现（检查microlib选项），并注意选择ARM Compiler为Use default compiler version 5
+
+
+
+## Licenses
+
+NNoM is released under Apache License 2.0 since nnom-V0.2.0. 
+License and copyright information can be found within the code.
+

components/ai/nnom/inc/layers/nnom_activation.h

@@ -0,0 +1,96 @@
+/*
+ * Copyright (c) 2018-2020
+ * Jianjia Ma
+ * majianjia@live.com
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-05-03     Jianjia Ma   The first version
+ */
+
+#ifndef __NNOM_ACTIVATION_H__
+#define __NNOM_ACTIVATION_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <string.h>
+#include <stdbool.h>
+
+#include "nnom.h"
+#include "nnom_layers.h"
+#include "nnom_local.h"
+#include "nnom_tensor.h"
+
+
+// activation layer
+typedef struct _nnom_activation_layer_t
+{
+	nnom_layer_t super;
+	nnom_activation_t *act; 
+} nnom_activation_layer_t;
+
+
+// activation with fixed q format (tanh and sigmoid)
+typedef struct _nnom_activation_fixed_q_t
+{
+	nnom_activation_t super;
+	uint8_t dec_bit;
+} nnom_activation_fixed_q_t;
+
+// leaky relu
+typedef struct _nnom_activation_leaky_relu_t
+{
+	nnom_activation_t super;
+	q7_t alpha;					// alpha is present by q0.7 format. (-128 = -1) 
+} nnom_activation_leaky_relu_t;
+
+// advance relu (full ReLU)
+typedef struct _nnom_activation_adv_relu_t
+{
+	nnom_activation_t super;
+	q7_t negative_slope;			// negative_slope is present by q0.7 format. (-128 = -1) 
+	float max;						// cap of the max value
+	float threshold;				// threshold
+} nnom_activation_adv_relu_t;
+
+// method
+nnom_status_t activation_run(nnom_layer_t* layer);
+nnom_status_t activation_free(nnom_layer_t *layer);
+
+// activation delete
+void act_delete(nnom_activation_t* act);
+
+// a direct api on tensor
+nnom_status_t act_tensor_run(nnom_activation_t* act, nnom_tensor_t* tensor);
+
+
+// Layer API
+nnom_layer_t *Activation(nnom_activation_t *act);
+nnom_layer_t *ReLU(void);
+nnom_layer_t *LeakyReLU(float alpha);
+nnom_layer_t *AdvReLU(float alpha, float max, float threshold);
+nnom_layer_t *Sigmoid(int32_t dec_bit);
+nnom_layer_t *TanH(int32_t dec_bit);
+
+// Activation API. 
+nnom_activation_t* act_relu(void);
+nnom_activation_t* act_leaky_relu(float alpha);
+nnom_activation_t* act_adv_relu(float negative_slope, float max, float threshold);
+nnom_activation_t* act_tanh(int32_t dec_bit);
+nnom_activation_t* act_sigmoid(int32_t dec_bit);
+nnom_activation_t* act_hard_tanh(int32_t dec_bit);
+nnom_activation_t* act_hard_sigmoid(int32_t dec_bit);
+
+// utils
+int32_t act_get_dec_bit(nnom_activation_type_t type, int32_t dec_bit);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __NNOM_ACTIVATION_H__ */

components/ai/nnom/inc/layers/nnom_avgpool.h

@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2018-2020
+ * Jianjia Ma
+ * majianjia@live.com
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-05-03     Jianjia Ma   The first version
+ */
+
+#ifndef __NNOM_AVGPOOL_H__
+#define __NNOM_AVGPOOL_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <string.h>
+#include <stdbool.h>
+
+#include "nnom.h"
+#include "nnom_layers.h"
+#include "nnom_local.h"
+#include "nnom_tensor.h"
+
+#include "layers/nnom_maxpool.h"
+
+// Avg Pooling
+typedef nnom_maxpool_layer_t nnom_avgpool_layer_t;
+
+// method
+nnom_status_t avgpooling_build(nnom_layer_t *layer);
+nnom_status_t avgpool_run(nnom_layer_t *layer);
+
+// API
+nnom_layer_t *avgpool_s(const nnom_pool_config_t * config);
+nnom_layer_t *AvgPool(nnom_3d_shape_t k, nnom_3d_shape_t s, nnom_padding_t pad_type);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __NNOM_AVGPOOL_H__ */

components/ai/nnom/inc/layers/nnom_baselayer.h

@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2018-2020
+ * Jianjia Ma
+ * majianjia@live.com
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-05-03     Jianjia Ma   The first version
+ */
+
+#ifndef __NNOM_BASELAYER_H__
+#define __NNOM_BASELAYER_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <string.h>
+#include <stdbool.h>
+
+#include "nnom.h"
+#include "nnom_layers.h"
+#include "nnom_local.h"
+#include "nnom_tensor.h"
+
+#include "layers/nnom_input.h"
+
+// method
+nnom_status_t default_build(nnom_layer_t *layer);
+nnom_status_t default_run(nnom_layer_t *layer);
+
+// API
+nnom_layer_t *baselayer_s(const nnom_layer_config_t * config);
+nnom_layer_t *BaseLayer(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __NNOM_BASELAYER_H__ */

components/ai/nnom/inc/layers/nnom_concat.h

@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2018-2020
+ * Jianjia Ma
+ * majianjia@live.com
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-05-03     Jianjia Ma   The first version
+ */
+
+#ifndef __NNOM_CONCAT_H__
+#define __NNOM_CONCAT_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <string.h>
+#include <stdbool.h>
+
+#include "nnom.h"
+#include "nnom_layers.h"
+#include "nnom_local.h"
+#include "nnom_tensor.h"
+
+// concatenate layer
+typedef struct _nnom_concat_layer
+{
+	nnom_layer_t super;
+	int8_t axis;
+} nnom_concat_layer_t;
+
+typedef struct _nnom_concat_config_t
+{
+	nnom_layer_config_t super;
+	int8_t axis;
+} nnom_concat_config_t;
+
+// method
+nnom_status_t concat_build(nnom_layer_t *layer);
+nnom_status_t concat_run(nnom_layer_t *layer);
+
+// API
+nnom_layer_t *concat_s(const nnom_concat_config_t *config);
+nnom_layer_t *Concat(int8_t axis);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __NNOM_CONCAT_H__ */

components/ai/nnom/inc/layers/nnom_conv2d.h

@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2018-2020
+ * Jianjia Ma
+ * majianjia@live.com
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-05-03     Jianjia Ma   The first version
+ */
+
+#ifndef __NNOM_CONV2D_H__
+#define __NNOM_CONV2D_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+#include <stdint.h>
+#include <string.h>
+#include <stdbool.h>
+
+#include "nnom.h"
+#include "nnom_layers.h"
+#include "nnom_local.h"
+#include "nnom_tensor.h"
+
+// child layers parameters
+typedef struct _nnom_conv2d_layer_t
+{
+	nnom_layer_t super;
+	nnom_3d_shape_t kernel;
+	nnom_3d_shape_t stride;
+	nnom_3d_shape_t pad;
+	nnom_3d_shape_t dilation;
+	nnom_padding_t padding_type;
+	uint32_t filter_mult; 							// filter size (for conv) or multilplier (for depthwise)
+
+	nnom_tensor_t *weight; 
+	nnom_tensor_t *bias;
+
+	// test
+	nnom_qformat_param_t * output_rshift;			
+	nnom_qformat_param_t * bias_lshift;
+} nnom_conv2d_layer_t;
+
+// a machine interface for configuration
+typedef struct _nnom_conv2d_config_t
+{
+	nnom_layer_config_t super;
+	nnom_qtype_t qtype; 	//quantisation type(per channel or per layer)
+	nnom_tensor_t *weight;
+	nnom_tensor_t *bias;
+	nnom_qformat_param_t *output_shift;   
+	nnom_qformat_param_t *bias_shift;   
+	uint32_t filter_size;  
+	int8_t kernel_size[2];
+	int8_t stride_size[2];
+	int8_t padding_size[2];
+	int8_t dilation_size[2];
+	nnom_padding_t padding_type;
+} nnom_conv2d_config_t;
+
+// method
+nnom_status_t conv2d_run(nnom_layer_t *layer);
+nnom_status_t conv2d_build(nnom_layer_t *layer);
+nnom_status_t conv2d_free(nnom_layer_t *layer);
+
+// utils
+uint32_t conv_output_length(uint32_t input_length, uint32_t filter_size, nnom_padding_t padding, uint32_t stride, uint32_t dilation);
+
+// API
+nnom_layer_t *conv2d_s(const nnom_conv2d_config_t *config);
+nnom_layer_t *Conv2D(uint32_t filters, nnom_3d_shape_t k, nnom_3d_shape_t s, nnom_3d_shape_t d,  nnom_padding_t pad_type,
+					 const nnom_weight_t *w, const nnom_bias_t *b);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __NNOM_CONV2D_H__ */

components/ai/nnom/inc/layers/nnom_conv2d_trans.h

@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2018-2020
+ * Jianjia Ma
+ * majianjia@live.com
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-05-30     Jianjia Ma   The first version
+ */
+
+#ifndef __NNOM_DECONV2D_H__
+#define __NNOM_DECONV2D_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+#include <stdint.h>
+#include <string.h>
+#include <stdbool.h>
+
+#include "nnom.h"
+#include "nnom_layers.h"
+#include "nnom_local.h"
+#include "nnom_tensor.h"
+#include "layers/nnom_conv2d.h"
+
+// child layers parameters
+typedef nnom_conv2d_layer_t nnom_conv2d_trans_layer_t;
+
+typedef nnom_conv2d_config_t nnom_conv2d_trans_config_t;
+
+// method
+nnom_status_t conv2d_trans_run(nnom_layer_t *layer);
+nnom_status_t conv2d_trans_build(nnom_layer_t *layer);
+
+// utils
+uint32_t conv_trans_output_length(uint32_t input_length, uint32_t filter_size, nnom_padding_t padding, uint32_t stride, uint32_t dilation);
+
+// API
+nnom_layer_t *conv2d_trans_s(const nnom_conv2d_config_t *config);
+nnom_layer_t *Conv2DTrans(uint32_t filters, nnom_3d_shape_t k, nnom_3d_shape_t s, nnom_3d_shape_t d,  nnom_padding_t pad_type,
+					 const nnom_weight_t *w, const nnom_bias_t *b);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __NNOM_DECONV2D_H__ */

components/ai/nnom/inc/layers/nnom_cropping.h

@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2018-2020
+ * Jianjia Ma
+ * majianjia@live.com
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-05-03     Jianjia Ma   The first version
+ */
+
+#ifndef __NNOM_CROPPING_H__
+#define __NNOM_CROPPING_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <string.h>
+#include <stdbool.h>
+
+#include "nnom.h"
+#include "nnom_layers.h"
+#include "nnom_local.h"
+#include "nnom_tensor.h"
+
+#include "layers/nnom_zero_padding.h"
+
+// Cropping, same as zeropadding
+typedef nnom_zero_padding_layer_t nnom_cropping_layer_t;
+
+typedef nnom_zero_padding_config_t nnom_cropping_config_t;
+
+// method
+nnom_status_t cropping_build(nnom_layer_t *layer);
+nnom_status_t cropping_run(nnom_layer_t *layer);
+
+// API
+nnom_layer_t * cropping_s(const nnom_cropping_config_t *config);
+nnom_layer_t *Cropping(nnom_border_t pad);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __NNOM_CROPPING_H__ */

components/ai/nnom/inc/layers/nnom_dense.h

@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2018-2020
+ * Jianjia Ma
+ * majianjia@live.com
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-05-03     Jianjia Ma   The first version
+ */
+
+#ifndef __NNOM_DENSE_H__
+#define __NNOM_DENSE_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <string.h>
+#include <stdbool.h>
+
+#include "nnom.h"
+#include "nnom_layers.h"
+#include "nnom_local.h"
+#include "nnom_tensor.h"
+
+typedef struct _nnom_dense_layer_t
+{
+	nnom_layer_t super;
+	size_t output_unit;
+	nnom_tensor_t *weight;
+	nnom_tensor_t *bias;
+	nnom_qformat_param_t *output_rshift;			
+	nnom_qformat_param_t *bias_lshift;
+} nnom_dense_layer_t;
+
+// a machine interface for configuration
+typedef struct _nnom_dense_config_t
+{
+	nnom_layer_config_t super;
+	nnom_qtype_t qtype; 	//quantisation type(per channel or per layer)
+	nnom_tensor_t *weight;
+	nnom_tensor_t *bias;
+	nnom_qformat_param_t *output_shift;			
+	nnom_qformat_param_t *bias_shift;
+} nnom_dense_config_t;
+
+// method
+nnom_status_t dense_free(nnom_layer_t *layer);
+nnom_status_t dense_build(nnom_layer_t *layer);
+nnom_status_t dense_run(nnom_layer_t *layer);
+
+// API
+nnom_layer_t *dense_s(const nnom_dense_config_t *config);
+nnom_layer_t *Dense(size_t output_unit, const nnom_weight_t *w, const nnom_bias_t *b);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __NNOM_DENSE_H__ */

components/ai/nnom/inc/layers/nnom_dw_conv2d.h

@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2018-2020
+ * Jianjia Ma
+ * majianjia@live.com
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-05-03     Jianjia Ma   The first version
+ */
+
+#ifndef __NNOM_DW_CONV2D_H__
+#define __NNOM_DW_CONV2D_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <string.h>
+#include <stdbool.h>
+
+#include "nnom.h"
+#include "nnom_layers.h"
+#include "nnom_local.h"
+#include "nnom_tensor.h"
+
+#include "layers/nnom_conv2d.h"
+
+// method
+nnom_status_t dw_conv2d_build(nnom_layer_t *layer);
+nnom_status_t dw_conv2d_run(nnom_layer_t *layer);
+
+//API
+nnom_layer_t *dw_conv2d_s(const nnom_conv2d_config_t *config);
+nnom_layer_t *DW_Conv2D(uint32_t multiplier, nnom_3d_shape_t k, nnom_3d_shape_t s, nnom_3d_shape_t d, nnom_padding_t pad_type,
+						const nnom_weight_t *w, const nnom_bias_t *b);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __NNOM_DW_CONV2D_H__ */

components/ai/nnom/inc/layers/nnom_flatten.h

@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2018-2020
+ * Jianjia Ma
+ * majianjia@live.com
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-05-03     Jianjia Ma   The first version
+ */
+
+#ifndef __NNOM_FLATTEN_H__
+#define __NNOM_FLATTEN_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <string.h>
+#include <stdbool.h>
+
+#include "nnom.h"
+#include "nnom_layers.h"
+#include "nnom_local.h"
+#include "nnom_tensor.h"
+
+// no special parameters but we need it. 
+typedef struct _nnom_flatten_config_t{
+    nnom_layer_config_t super;
+} nnom_flatten_config_t;
+
+// method
+nnom_status_t flatten_build(nnom_layer_t *layer);
+nnom_status_t flatten_run(nnom_layer_t *layer);
+
+// API
+nnom_layer_t *flatten_s(const nnom_flatten_config_t *config);
+nnom_layer_t *Flatten(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __NNOM_FLATTEN_H__ */

components/ai/nnom/inc/layers/nnom_global_pool.h

@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2018-2020
+ * Jianjia Ma
+ * majianjia@live.com
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-05-03     Jianjia Ma   The first version
+ */
+
+#ifndef __NNOM_GLOBAL_POOL_H__
+#define __NNOM_GLOBAL_POOL_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <string.h>
+#include <stdbool.h>
+
+#include "nnom.h"
+#include "nnom_layers.h"
+#include "nnom_local.h"
+#include "nnom_tensor.h"
+
+#include "layers/nnom_maxpool.h"
+
+typedef struct _nnom_global_pool_config_t
+{
+    nnom_layer_config_t super;
+    int16_t output_shift;
+}nnom_global_pool_config_t;
+
+// method
+nnom_status_t global_pool_build(nnom_layer_t *layer);
+
+// API
+nnom_layer_t * global_maxpool_s(const nnom_global_pool_config_t *config);
+nnom_layer_t * global_avgpool_s(const nnom_global_pool_config_t *config);
+nnom_layer_t * global_sumpool_s(const nnom_global_pool_config_t *config);
+
+nnom_layer_t *GlobalMaxPool(void);
+nnom_layer_t *GlobalAvgPool(void);
+nnom_layer_t *GlobalSumPool(void);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __NNOM_GLOBAL_POOL_H__ */

components/ai/nnom/inc/layers/nnom_gru_cell.h

@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2018-2020
+ * Jianjia Ma
+ * majianjia@live.com
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-08-27     Jianjia Ma   The first version
+ */
+
+#ifndef __NNOM_GRU_CELL_H__
+#define __NNOM_GRU_CELL_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "nnom_rnn.h"
+#include "nnom_activation.h"
+
+typedef struct _nnom_gru_cell_config_t
+{
+	nnom_layer_config_t super;
+	nnom_tensor_t *weights;
+	nnom_tensor_t* recurrent_weights;
+	nnom_tensor_t *bias;
+	nnom_qformat_param_t q_dec_z, q_dec_h; // z, r, h
+	uint16_t units;
+} nnom_gru_cell_config_t;
+
+
+typedef struct _nnom_gru_cell_t
+{
+	nnom_rnn_cell_t super;
+
+	nnom_tensor_t* weights;
+	nnom_tensor_t* recurrent_weights;
+	nnom_tensor_t* bias;
+
+    // decide later. 
+    // z, r, h
+	nnom_qformat_param_t q_dec_z, q_dec_h;
+	nnom_qformat_param_t oshift_iw, oshift_hw, bias_shift;
+
+} nnom_gru_cell_t;
+
+// gru
+nnom_rnn_cell_t *gru_cell_s(const nnom_gru_cell_config_t* config);
+
+nnom_status_t gru_cell_free(nnom_rnn_cell_t* cell);
+nnom_status_t gru_cell_build(nnom_rnn_cell_t* cell);
+nnom_status_t gru_cell_run(nnom_rnn_cell_t* cell);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __NNOM_GRU_CELL_H__ */

components/ai/nnom/inc/layers/nnom_input.h

@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2018-2020
+ * Jianjia Ma
+ * majianjia@live.com
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-05-03     Jianjia Ma   The first version
+ */
+
+#ifndef __NNOM_INPUT_H__
+#define __NNOM_INPUT_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <string.h>
+#include <stdbool.h>
+
+#include "nnom.h"
+#include "nnom_layers.h"
+#include "nnom_local.h"
+#include "nnom_tensor.h"
+
+// IO layer
+typedef struct _nnom_io_layer
+{
+	nnom_layer_t super;
+	nnom_3d_shape_t shape;
+	nnom_qformat_param_t dec_bit;
+	void *buf; //input or output
+} nnom_io_layer_t;
+
+typedef struct _nnom_io_config_t
+{
+	nnom_layer_config_t super;
+	nnom_tensor_t *tensor; 
+}nnom_io_config_t;
+
+// method
+nnom_status_t input_build(nnom_layer_t *layer);
+nnom_status_t input_run(nnom_layer_t *layer);
+
+// API
+nnom_layer_t *input_s(const nnom_io_config_t* config);
+nnom_layer_t *Input(nnom_3d_shape_t input_shape, void *p_buf);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __NNOM_INPUT_H__ */

components/ai/nnom/inc/layers/nnom_lambda.h

@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2018-2020
+ * Jianjia Ma
+ * majianjia@live.com
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-05-03     Jianjia Ma   The first version
+ */
+
+#ifndef __NNOM_LAMBDA_H__
+#define __NNOM_LAMBDA_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <string.h>
+#include <stdbool.h>
+
+#include "nnom.h"
+#include "nnom_layers.h"
+#include "nnom_local.h"
+#include "nnom_tensor.h"
+
+#include "layers/nnom_input.h"
+
+// lambda layer
+typedef struct _nnom_lambda_layer_t
+{
+	nnom_layer_t super;
+	void *parameters;							  // parameters for lambda
+} nnom_lambda_layer_t;
+
+// lambda layer
+typedef struct _nnom_lambda_config_t
+{
+	nnom_layer_config_t super;
+	nnom_status_t (*run_func_name)(nnom_layer_t *layer);	// run method. required
+	nnom_status_t (*build_func_name)(nnom_layer_t *layer);// compute output buffer shape. can be left null, will call default_build()
+	nnom_status_t (*free_func_name)(nnom_layer_t *layer);	// a callback to free private resources (comp buf not included) can be left null
+	void *parameters;							// parameters for lambda
+} nnom_lambda_config_t;
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __NNOM_LAMBDA_H__ */

components/ai/nnom/inc/layers/nnom_lstm_cell.h

@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2018-2020
+ * Jianjia Ma
+ * majianjia@live.com
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-08-24     Jianjia Ma   The first version
+ */
+
+#ifndef __NNOM_LSTM_CELL_H__
+#define __NNOM_LSTM_CELL_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "nnom_rnn.h"
+#include "nnom_activation.h"
+
+// a machine interface for configuration
+typedef struct _nnom_lstm_cell_config_t
+{
+	nnom_layer_config_t super;
+	nnom_tensor_t *weights;
+	nnom_tensor_t* recurrent_weights;
+	nnom_tensor_t *bias;
+	nnom_qformat_param_t q_dec_z, q_dec_h, q_dec_c; // z = iw + hw, c = cell state; h=output and memory
+	uint16_t units;
+} nnom_lstm_cell_config_t;
+
+
+typedef struct _nnom_lstm_cell_t
+{
+	nnom_rnn_cell_t super;
+
+	nnom_tensor_t* weights;
+	nnom_tensor_t* recurrent_weights;
+	nnom_tensor_t* bias;
+
+	// experimental, 
+	// iw: input x weight
+	// hw: hidden state x recurrent weight
+	// h: hidden state (memor)
+	// c: cell state
+	nnom_qformat_param_t q_dec_z, q_dec_h, q_dec_c;
+	nnom_qformat_param_t oshift_iw, oshift_hw, oshift_zc, bias_shift;
+
+} nnom_lstm_cell_t;
+
+// LSTM
+nnom_rnn_cell_t *lstm_cell_s(const nnom_lstm_cell_config_t* config);
+
+nnom_status_t lstm_cell_free(nnom_rnn_cell_t* cell);
+nnom_status_t lstm_cell_q7_q15_build(nnom_rnn_cell_t* cell);
+nnom_status_t lstm_cell_q7_q15_run(nnom_rnn_cell_t* cell);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __NNOM_LSTM_CELL_H__ */

components/ai/nnom/inc/layers/nnom_matrix.h

@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2018-2020
+ * Jianjia Ma
+ * majianjia@live.com
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-05-03     Jianjia Ma   The first version
+ */
+
+#ifndef __NNOM_MATRIX_H__
+#define __NNOM_MATRIX_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <string.h>
+#include <stdbool.h>
+
+#include "nnom.h"
+#include "nnom_layers.h"
+#include "nnom_local.h"
+#include "nnom_tensor.h"
+
+// the maximum input layer hooked to this layer
+#define MAX_INPUT_LAYER 8
+
+// matrix layer
+typedef struct _nnom_matrix_layer_t
+{
+	nnom_layer_t super;
+	int16_t oshift;		// output right shift
+} nnom_matrix_layer_t;
+
+typedef struct _nnom_matrix_config_t
+{
+	nnom_layer_config_t super;
+	int16_t output_shift;		// output right shift
+} nnom_matrix_config_t;
+
+// methods
+nnom_layer_t* _same_shape_matrix_layer(void);
+nnom_status_t add_run(nnom_layer_t *layer);
+nnom_status_t sub_run(nnom_layer_t *layer);
+nnom_status_t mult_run(nnom_layer_t *layer);
+
+// API
+nnom_layer_t *add_s(const nnom_matrix_config_t * config);
+nnom_layer_t *sub_s(const nnom_matrix_config_t * config);
+nnom_layer_t *mult_s(const nnom_matrix_config_t * config);
+nnom_layer_t *Add(int16_t oshift);
+nnom_layer_t *Sub(int16_t oshift);
+nnom_layer_t *Mult(int16_t oshift);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __NNOM_MATRIX_H__ */

components/ai/nnom/inc/layers/nnom_maxpool.h

@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2018-2020
+ * Jianjia Ma
+ * majianjia@live.com
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-05-03     Jianjia Ma   The first version
+ */
+
+#ifndef __NNOM_MAXPOOL_H__
+#define __NNOM_MAXPOOL_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <string.h>
+#include <stdbool.h>
+
+#include "nnom.h"
+#include "nnom_layers.h"
+#include "nnom_local.h"
+#include "nnom_tensor.h"
+
+// Max Pooling
+typedef struct _nnom_maxpool_layer_t
+{
+	nnom_layer_t super;
+	nnom_3d_shape_t kernel;
+	nnom_3d_shape_t stride;
+	nnom_3d_shape_t pad;
+	nnom_padding_t padding_type;
+	int16_t output_shift;			// reserve
+} nnom_maxpool_layer_t;
+
+// a machine interface for configuration
+typedef struct _nnom_pool_config_t
+{
+	nnom_layer_config_t super;
+	nnom_padding_t padding_type;
+	int16_t output_shift;
+	int8_t kernel_size[2];
+	int8_t stride_size[2];
+	int8_t num_dim;
+} nnom_pool_config_t;
+
+// method
+nnom_status_t maxpool_build(nnom_layer_t *layer);
+nnom_status_t maxpool_run(nnom_layer_t *layer);
+
+// API
+nnom_layer_t *maxpool_s(const nnom_pool_config_t * config);
+nnom_layer_t *MaxPool(nnom_3d_shape_t k, nnom_3d_shape_t s, nnom_padding_t pad_type);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __NNOM_MATRIX_H__ */

components/ai/nnom/inc/layers/nnom_output.h

@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2018-2020
+ * Jianjia Ma
+ * majianjia@live.com
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-05-03     Jianjia Ma   The first version
+ */
+
+#ifndef __NNOM_OUTPUT_H__
+#define __NNOM_OUTPUT_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <string.h>
+#include <stdbool.h>
+
+#include "nnom.h"
+#include "nnom_layers.h"
+#include "nnom_local.h"
+#include "nnom_tensor.h"
+
+#include "layers/nnom_input.h"
+
+// method
+nnom_status_t output_build(nnom_layer_t *layer);
+nnom_status_t output_run(nnom_layer_t *layer);
+
+// API
+nnom_layer_t *output_s(const nnom_io_config_t* config);
+nnom_layer_t *Output(nnom_3d_shape_t output_shape, void *p_buf);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __NNOM_OUTPUT_H__ */

components/ai/nnom/inc/layers/nnom_rnn.h

@@ -0,0 +1,85 @@
+/*
+ * Copyright (c) 2018-2020
+ * Jianjia Ma
+ * majianjia@live.com
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-05-03     Jianjia Ma   The first version
+ */
+
+#ifndef __NNOM_RNN_H__
+#define __NNOM_RNN_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <string.h>
+#include <stdbool.h>
+
+#include "nnom.h"
+#include "nnom_layers.h"
+#include "nnom_local.h"
+#include "nnom_tensor.h"
+
+// a machine interface for configuration
+typedef struct _nnom_rnn_config_t
+{
+	nnom_layer_config_t super;
+	bool return_sequence;
+	bool stateful;
+	bool go_backwards;
+} nnom_rnn_config_t;
+
+// RNN cell base type
+typedef struct _nnom_rnn_cell_t
+{
+	nnom_status_t (*run)(struct _nnom_rnn_cell_t* cell); // cell runner
+	nnom_status_t (*build)(struct _nnom_rnn_cell_t* cell); // cell builder, calculate buffer size, output data size
+	nnom_status_t (*free)(struct _nnom_rnn_cell_t* cell); // 
+	nnom_layer_t *layer;				// pointer to its layer holder
+	nnom_layer_config_t *config;		// config for the cell event it is a layer type		
+	nnom_rnn_cell_type_t type;	
+
+	void *in_data;						// input data
+	void *out_data;						// output data
+	void *in_state;					// input state data (or hidden state)
+	void *out_state;				// output state data
+
+	size_t comp_buf_size;			// the size of temporary buffer. 
+	size_t state_size; 				// the size of hidden state
+	uint16_t units;					// the output units 
+	uint16_t feature_size;			// the input feature size (vector size)
+
+	size_t macc; // stat of MAC count. 
+} nnom_rnn_cell_t;
+
+typedef struct _nnom_rnn_layer_t
+{
+	nnom_layer_t super;
+	nnom_rnn_cell_t *cell;
+	void *state_buf;		// memory allocated to store state, size = 2 x size of state required by cell. 
+
+	uint16_t timestamp_size;// size of timestamp
+	bool return_sequence; 	// whether to return the output for each unit (sequence)
+	bool stateful;			// whether the states are kept after one inteference
+	bool go_backwards;		// whether go backwards timestamping
+} nnom_rnn_layer_t;
+
+
+// rnn layer 
+nnom_layer_t *rnn_s(nnom_rnn_cell_t *cell, const nnom_rnn_config_t* config);
+
+nnom_status_t rnn_run(nnom_layer_t* layer);
+nnom_status_t rnn_build(nnom_layer_t* layer);
+nnom_status_t rnn_free(nnom_layer_t* layer);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __NNOM_RNN_H__ */

components/ai/nnom/inc/layers/nnom_simple_cell.h

@@ -0,0 +1,86 @@
+/*
+ * Copyright (c) 2018-2020
+ * Jianjia Ma
+ * majianjia@live.com
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-08-20     Jianjia Ma   The first version
+ */
+
+#ifndef __NNOM_SIMPLE_CELL_H__
+#define __NNOM_SIMPLE_CELL_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "nnom_rnn.h"
+#include "nnom_activation.h"
+
+
+// This Simple Cell replicate the Keras's SimpleCell as blow 
+/*
+ def call(self, inputs, states, training=None):
+    prev_output = states[0] if nest.is_sequence(states) else states
+
+	h = K.dot(inputs, self.kernel)
+	h = K.bias_add(h, self.bias)
+
+    output = h + K.dot(prev_output, self.recurrent_kernel)
+    output = self.activation(output)
+
+    new_state = [output] if nest.is_sequence(states) else output
+    return output, new_state
+*/
+
+// a machine interface for configuration
+typedef struct _nnom_simple_cell_config_t
+{
+	nnom_layer_config_t super;
+	nnom_tensor_t *weights;
+	nnom_tensor_t* recurrent_weights;
+	nnom_tensor_t *bias;
+	nnom_qformat_param_t q_dec_iw, q_dec_hw, q_dec_h;
+	nnom_activation_type_t act_type;		// type of the activation
+	uint16_t units;
+} nnom_simple_cell_config_t;
+
+
+typedef struct _nnom_simple_cell_t
+{
+	nnom_rnn_cell_t super;
+	nnom_activation_type_t act_type;
+
+	nnom_tensor_t* weights;
+	nnom_tensor_t* recurrent_weights;
+	nnom_tensor_t* bias;
+
+	// experimental, 
+	// iw: input x weight
+	// hw: hidden state x recurrent weight
+	// h: hidden state
+	nnom_qformat_param_t q_dec_iw, q_dec_hw, q_dec_h;
+	nnom_qformat_param_t oshift_iw, oshift_hw, bias_shift;
+	
+} nnom_simple_cell_t;
+
+
+// RNN cells
+// The shape for RNN input is (batch, timestamp, feature), where batch is always 1. 
+//
+// SimpleCell
+nnom_rnn_cell_t *simple_cell_s(const nnom_simple_cell_config_t* config);
+
+nnom_status_t simple_cell_free(nnom_rnn_cell_t* cell);
+nnom_status_t simple_cell_build(nnom_rnn_cell_t* cell);
+nnom_status_t simple_cell_run(nnom_rnn_cell_t* cell);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __NNOM_SIMPLE_CELL_H__ */

components/ai/nnom/inc/layers/nnom_softmax.h

@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2018-2020
+ * Jianjia Ma
+ * majianjia@live.com
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-05-03     Jianjia Ma   The first version
+ */
+
+#ifndef __NNOM_SOFTMAX_H__
+#define __NNOM_SOFTMAX_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <string.h>
+#include <stdbool.h>
+
+#include "nnom.h"
+#include "nnom_layers.h"
+#include "nnom_local.h"
+#include "nnom_tensor.h"
+
+typedef struct _nnom_softmax_config_t
+{
+    nnom_layer_config_t super;
+} nnom_softmax_config_t;
+
+
+// method
+nnom_status_t softmax_run(nnom_layer_t *layer);
+nnom_status_t softmax_build(nnom_layer_t *layer);
+
+// API
+nnom_layer_t *softmax_s(const nnom_softmax_config_t * config);
+nnom_layer_t *Softmax(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __NNOM_SOFTMAX_H__ */

components/ai/nnom/inc/layers/nnom_sumpool.h

@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2018-2020
+ * Jianjia Ma
+ * majianjia@live.com
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-05-03     Jianjia Ma   The first version
+ */
+
+#ifndef __NNOM_SUMPOOL_H__
+#define __NNOM_SUMPOOL_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <string.h>
+#include <stdbool.h>
+
+#include "nnom.h"
+#include "nnom_layers.h"
+#include "nnom_local.h"
+#include "nnom_tensor.h"
+
+#include "layers/nnom_maxpool.h"
+
+// Sum Pooling
+typedef nnom_maxpool_layer_t nnom_sumpool_layer_t;
+
+// method
+nnom_status_t sumpool_build(nnom_layer_t *layer);
+nnom_status_t sumpool_run(nnom_layer_t *layer);
+
+// API
+nnom_layer_t *sumpool_s(const nnom_pool_config_t * config);
+nnom_layer_t *SumPool(nnom_3d_shape_t k, nnom_3d_shape_t s, nnom_padding_t pad_type);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __NNOM_SUMPOOL_H__ */

components/ai/nnom/inc/layers/nnom_upsample.h

@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2018-2020
+ * Jianjia Ma
+ * majianjia@live.com
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-05-03     Jianjia Ma   The first version
+ */
+
+#ifndef __NNOM_UPSAMPLE_H__
+#define __NNOM_UPSAMPLE_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <string.h>
+#include <stdbool.h>
+
+#include "nnom.h"
+#include "nnom_layers.h"
+#include "nnom_local.h"
+#include "nnom_tensor.h"
+
+// Up Sampling layer (UnPooling)
+typedef struct _nnom_upsample_layer_t
+{
+	nnom_layer_t super;
+	nnom_3d_shape_t kernel;
+} nnom_upsample_layer_t;
+
+typedef struct _nnom_upsample_config_t
+{
+	nnom_layer_config_t super;
+	nnom_shape_data_t kernel[2];
+} nnom_upsample_config_t;
+
+// API
+nnom_layer_t *upsample_s(const nnom_upsample_config_t *config);
+nnom_layer_t *UpSample(nnom_3d_shape_t kernel);
+
+// Methods
+nnom_status_t upsample_build(nnom_layer_t *layer);
+nnom_status_t upsample_run(nnom_layer_t *layer);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __NNOM_UPSAMPLE_H__ */

components/ai/nnom/inc/layers/nnom_zero_padding.h

@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2018-2020
+ * Jianjia Ma
+ * majianjia@live.com
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-05-03     Jianjia Ma   The first version
+ */
+
+#ifndef __NNOM_ZERO_PADDING_H__
+#define __NNOM_ZERO_PADDING_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <string.h>
+#include <stdbool.h>
+
+#include "nnom.h"
+#include "nnom_layers.h"
+#include "nnom_local.h"
+#include "nnom_tensor.h"
+
+typedef struct _nnom_zero_padding_config_t
+{
+	nnom_layer_config_t super;
+	nnom_border_t pad;
+} nnom_zero_padding_config_t;
+
+// zero padding
+typedef struct _nnom_zero_padding_layer_t
+{
+	nnom_layer_t super;
+	nnom_border_t pad;
+} nnom_zero_padding_layer_t;
+
+// API
+nnom_layer_t *zeropadding_s(const nnom_zero_padding_config_t* config);
+nnom_layer_t *ZeroPadding(nnom_border_t pad);
+
+// method
+nnom_status_t zero_padding_build(nnom_layer_t *layer);
+nnom_status_t zero_padding_run(nnom_layer_t *layer);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __NNOM_ZERO_PADDING_H__ */

components/ai/nnom/inc/nnom.h

@@ -0,0 +1,413 @@
+/*
+ * Copyright (c) 2018-2020
+ * Jianjia Ma
+ * majianjia@live.com
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2019-02-05     Jianjia Ma   The first version
+ * 2019-02-10     Jianjia Ma   Compiler supports dense net connection
+ */
+
+#ifndef __NNOM_H__
+#define __NNOM_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+#include <stdint.h>
+#include <string.h>
+#include <stdbool.h>
+#include <stdarg.h>
+#include <math.h>
+
+#include "nnom_port.h"
+
+#define NNOM_ALIGN  (sizeof(char*))     // alignment when doing memory ops. Equal to size of pointer in byte.
+#define q7_t 	int8_t
+#define q15_t 	int16_t
+#define q31_t 	int32_t
+#define q63_t 	int64_t
+
+/* version */
+#define NNOM_MAJORVERSION     0              /**< major version number */
+#define NNOM_SUBVERSION       4              /**< minor version number */
+#define NNOM_REVISION         3              /**< revise version number */
+#define NNOM_VERSION          ((NNOM_MAJORVERSION * 10000) + (NNOM_SUBVERSION * 100) + NNOM_REVISION)
+
+#ifdef ARM_NN_TRUNCATE
+#define NNOM_TRUNCATE
+#endif
+
+#ifndef NNOM_TRUNCATE 
+    #define NNOM_ROUND(out_shift) ((0x1 << out_shift) >> 1 )
+#else
+    #define NNOM_ROUND(out_shift) 0
+#endif
+										 
+typedef enum
+{
+	NN_SUCCESS = 0,			/**< No error */
+	NN_ARGUMENT_ERROR = -1, /**< One or more arguments are incorrect */
+	NN_LENGTH_ERROR = -2,   /**< Length of data buffer is incorrect */
+	NN_SIZE_MISMATCH = -3,  /**< Size of matrices is not compatible with the operation. */
+	NN_NANINF = -4,			/**< Not-a-number (NaN) or infinity is generated */
+	NN_SINGULAR = -5,		/**< Generated by matrix inversion if the input matrix is singular and cannot be inverted. */
+	NN_TEST_FAILURE = -6,   /**< Test Failed  */
+	NN_NO_MEMORY = -7,
+	NN_MORE_TODO = -8
+} nnom_status_t;
+
+typedef enum
+{
+	NNOM_INVALID = 0,
+	NNOM_BASE,
+	NNOM_INPUT,
+	NNOM_OUTPUT,
+	NNOM_CONV_2D,
+	NNOM_DW_CONV_2D,
+	NNOM_CONV2D_TRANS,
+	NNOM_BATCHNORM,
+	NNOM_DENSE,
+	NNOM_ZERO_PADDING,
+	NNOM_CROPPING,
+	NNOM_RNN,
+	NNOM_ACTIVATION,
+	NNOM_RELU,
+	NNOM_LEAKY_RELU,
+	NNOM_ADV_RELU,
+	NNOM_SIGMOID,
+	NNOM_TANH,
+	NNOM_SOFTMAX,
+	NNOM_MAXPOOL,
+	NNOM_GLOBAL_MAXPOOL,
+	NNOM_AVGPOOL,
+	NNOM_GLOBAL_AVGPOOL,
+	NNOM_SUMPOOL,
+	NNOM_GLOBAL_SUMPOOL,
+	NNOM_UPSAMPLE,
+	NNOM_FLATTEN,
+	NNOM_LAMBDA,
+	NNOM_CONCAT,
+	NNOM_ADD,
+	NNOM_SUB,
+	NNOM_MULT,
+	NNOM_TYPE_MAX
+
+} nnom_layer_type_t;
+
+#define DEFUALT_LAYER_NAMES \
+	{                       \
+		"Unknown",          \
+			"Base",			\
+			"Input",        \
+			"Output",       \
+			"Conv2D",       \
+			"DW_Conv2D",    \
+			"Conv2DTrsp",    \
+			"BatchNorm",	\
+			"Dense",        \
+			"ZeroPad",	    \
+			"Cropping",     \
+			"RNN",          \
+			"Activation",   \
+			"ReLU",         \
+			"Leaky_ReLU",	\
+			"Adv_ReLU",	    \
+			"Sigmoid",      \
+			"Tanh",         \
+			"Softmax",      \
+			"MaxPool",      \
+			"GL_MaxPool",	\
+			"AvgPool",      \
+			"GL_AvgPool",	\
+			"SumPool",		\
+			"GL_SumPool",	\
+			"UpSample",		\
+			"Flatten",      \
+			"Lambda",       \
+			"Concat",       \
+			"Add",          \
+			"Sub",          \
+			"Mult",         \
+	}
+extern const char default_layer_names[][12];
+
+// We dont count softmax an activation here, softmax is instanced as a layer
+typedef enum
+{
+    ACT_UNKNOWN = 0,
+	ACT_RELU,
+	ACT_LEAKY_RELU,
+	ACT_ADV_RELU,
+	ACT_TANH,
+	ACT_SIGMOID,
+    ACT_HARD_TANH,
+    ACT_HARD_SIGMOID
+} nnom_activation_type_t;
+
+#define ACTIVATION_NAMES \
+	{                    \
+        "Unknown",          \
+		"ReLU",          \
+		"LkyReLU",		 \
+		"AdvReLU",		\
+		"TanH",      \
+		"Sigmoid",   \
+        "HrdTanH",      \
+		"HrdSigd",   \
+	}
+extern const char default_activation_names[][8];
+
+// RNN cell type
+typedef enum
+{
+	NNOM_UNKOWN_CELL = 0,
+	NNOM_SIMPLE_CELL,
+	NNOM_GRU_CELL,
+	NNOM_LSTM_CELL,
+	NNOM_CELL_TYPE_MAX
+} nnom_rnn_cell_type_t;
+
+#define DEFUALT_CELL_NAMES \
+	{                    \
+		"Unknown",          \
+		"Simple",		 \
+		"GRU",		\
+		"LSTM",      \
+	}
+extern const char default_cell_names[][8];
+
+
+// parameters
+typedef enum
+{
+	PADDING_VALID = 0,
+	PADDING_SAME
+} nnom_padding_t;
+
+#define NNOM_TENSOR_BUF_NULL     (0)	// This buffer is not in used
+#define NNOM_TENSOR_BUF_TEMP     (1)  // The memory in IO is temporary occupided, can be reused by other layer once the computation is done.
+#define NNOM_TENSOR_BUF_RESERVED (2)  // the mem is reserve for this layer only (not to be reused by other layer.
+
+// currently used in compiling.
+#define NNOM_BUF_EMPTY   (0)
+#define NNOM_BUF_FILLED  (1)
+
+// basic types
+#define nnom_qformat_param_t int32_t // this should match the backend, need a better way to do it. 
+#define nnom_shape_data_t uint16_t
+
+typedef struct _nnom_3d_shape_t
+{
+	nnom_shape_data_t h, w, c;
+} nnom_3d_shape_t;
+
+typedef struct _nnom_border_t
+{
+	nnom_shape_data_t top, bottom, left, right;
+} nnom_border_t;
+
+// nnom_3d_shape_axis_t type provide the axis[] format access to nnom_3d_shape_t
+typedef union {
+	nnom_3d_shape_t s;
+	nnom_shape_data_t axis[sizeof(nnom_3d_shape_t) / sizeof(nnom_shape_data_t)];
+} nnom_3d_shape_axis_t;
+
+// tensor quantisation types
+typedef enum
+{
+	NNOM_QTYPE_PER_TENSOR = 0,
+	NNOM_QTYPE_PER_AXIS = 1
+} nnom_qtype_t;
+
+typedef struct _nnom_weights
+{
+	const void *p_value;
+	nnom_qformat_param_t shift;
+} nnom_weight_t;
+
+typedef struct _nnom_bias
+{
+	const void *p_value;
+	nnom_qformat_param_t shift;
+} nnom_bias_t;
+
+// experimental                   
+typedef struct _nnom_tensor_t
+{
+	void* p_data;			// value
+	nnom_shape_data_t *dim; // dimension of this tensor
+	nnom_qformat_param_t *q_dec;	// number of decimal bit for Q format (scale)
+	nnom_qformat_param_t *q_offset;	// offset for each channel
+	nnom_qtype_t qtype;			// the quantisation type	
+	uint8_t num_dim;			// the number of dimension
+	uint8_t bitwidth;			// the data bit width, only support 8bit now
+} nnom_tensor_t;
+
+// nn wrappers
+typedef struct _nnom_layer_t 	nnom_layer_t;
+typedef struct _nnom_layer_io_t nnom_layer_io_t;
+typedef struct _nnom_layer_hook_t nnom_layer_hook_t;
+typedef struct _nnom_mem_block_t nnom_mem_block_t;
+
+// activation wrapper
+typedef struct _nnom_activation_t nnom_activation_t;
+
+typedef struct _nnom_buf
+{
+	nnom_mem_block_t *mem;
+	size_t size;
+	uint8_t type;
+} nnom_buf_t;
+
+// a memory block to store pre-assign memories during compiling. then assigned to each tensor after.
+struct _nnom_mem_block_t
+{
+	void *blk;		// data block location
+	size_t size;	// the maximum size for this block
+	uint8_t owners; // how many layers own this block
+	uint8_t state;  // empty? filled? for static nn, currently only used in compiling
+};
+
+typedef struct _nnom_stat_t
+{
+	size_t macc; //num. of mac operation
+	uint32_t time;
+} nnom_layer_stat_t;
+
+struct _nnom_layer_hook_t
+{
+	nnom_layer_io_t *io;	 // hooked io
+	nnom_layer_hook_t *next; // next hook include secondary hooked layer
+};
+
+struct _nnom_layer_io_t
+{
+	nnom_layer_hook_t hook;		  // for example: (layer->out)--hook--(layer->in)
+	nnom_layer_io_t *aux; 			// point to auxilary I/O (multiple I/O layer)
+	nnom_tensor_t *tensor;		  // experimental 
+	nnom_mem_block_t *mem;		  // memory blocks handles for compiling only. The memory are now pass by tensor. trying to remove it. 
+	nnom_layer_t *owner;		  // which layer owns this io.
+	uint8_t type;
+};
+
+// structured configuration base type
+typedef struct _nnom_layer_config_t
+{
+	char* name;			// the name of the layer prequantiesd model (the model trained by user before converted to nnom)
+} nnom_layer_config_t;
+
+// layers base
+struct _nnom_layer_t
+{
+	nnom_layer_t *shortcut; // shortcut points to the next layer, applied on compiling
+
+	nnom_status_t (*run)(nnom_layer_t *layer);				// run method. required
+	nnom_status_t (*build)(nnom_layer_t *layer);			// compute output buffer shape. can be left null, will call default_build()
+	nnom_status_t (*free)(nnom_layer_t *layer);				// a callback to free private resources (comp buf not included) can be left null
+	nnom_buf_t *comp;		   								// computational buf
+	nnom_activation_t *actail; 								// I have an activation, I have a tail, wooo haaaa, act-tail!!!
+
+	nnom_layer_config_t *config;			// point to the configuration of the layers. for machine api only. 
+	nnom_layer_type_t type; // layer types
+	nnom_layer_io_t *in;	// IO buff, last*layer, states
+	nnom_layer_io_t *out;   // IO buff, next*layer, states
+	nnom_layer_stat_t stat; // stats, timing, ops
+};
+
+// activation base
+struct _nnom_activation_t
+{
+	nnom_status_t (*run)(struct _nnom_activation_t *act);
+	nnom_tensor_t *tensor;
+	nnom_activation_type_t type;
+};
+
+// local static functions when libc is not available
+#ifdef NNOM_USING_STATIC_MEMORY
+    void nnom_set_static_buf(void* buf, size_t size);
+    void *nnom_malloc(size_t size);
+    void nnom_free(void* p);
+#endif //NNOM_USING_STATIC_BUF
+
+typedef struct _nnom_model nnom_model_t;
+
+#include "nnom_tensor.h"
+#include "nnom_layers.h"
+#include "nnom_utils.h"
+
+// models, I dont want to make model class as a child of layer class yet
+struct _nnom_model
+{
+	nnom_layer_t *head;
+	nnom_layer_t *tail;
+
+	// model constructor
+	nnom_status_t (*add)(struct _nnom_model *m, nnom_layer_t *layer);					// has too pass a raw value
+	nnom_layer_t *(*hook)(nnom_layer_t *curr, nnom_layer_t *last);						// create hook between 2 layers' primary IO.
+	nnom_layer_t *(*merge)(nnom_layer_t *method, nnom_layer_t *in1, nnom_layer_t *in2); // an older interface of merge 2 inputs.
+	nnom_layer_t *(*mergex)(nnom_layer_t *method, int num, ...);						// merge a few layers using mutiple input method (concate, add, ...)
+	nnom_layer_t *(*active)(nnom_activation_t *act, nnom_layer_t *target_layer);		// add the activation to the existing layer's tail
+
+	// callback
+	nnom_status_t (*layer_callback)(nnom_model_t *m, nnom_layer_t *layer);				// layer callback will be called after each layer(after actail). 
+
+	// block memory for layers
+	nnom_mem_block_t blocks[NNOM_BLOCK_NUM];
+
+	size_t total_ops;
+
+	bool is_inited; 	//	is this structure initialized
+	bool is_allocated;  //	is this structure allocated by nnom (not by user)
+};
+
+#define NNOM_NULL_CHECK(p)                 \
+	if ((p) == NULL)                       \
+	{                                 	   \
+		NNOM_LOG("Error: NULL object.\n"); \
+		return NN_ARGUMENT_ERROR;          \
+	}
+
+
+// utils
+size_t nnom_alignto(size_t value, uint32_t alignment);
+size_t nnom_io_length(nnom_layer_io_t *io);
+size_t nnom_hook_length(nnom_layer_hook_t *hook);
+
+// memory (malloc + memeset 0)
+void *nnom_mem(size_t size);
+	
+// get how much memory has been taken
+size_t nnom_mem_stat(void);
+
+// Model APIs
+// create or init a model
+nnom_model_t *new_model(nnom_model_t *m);
+// compile as sequencial model
+nnom_status_t sequencial_compile(nnom_model_t *m);
+// compile as functional model
+nnom_status_t model_compile(nnom_model_t *m, nnom_layer_t *input, nnom_layer_t *output);
+// run a prediction
+nnom_status_t model_run(nnom_model_t *m);
+// delete model. 
+void model_delete(nnom_model_t *m);
+// check version
+nnom_status_t check_model_version(unsigned long model_version);
+
+// callback, called after each layer has finished the calculation. 
+// this callback must return NN_SUCCESS for continually run the model. otherwise, model will be returned with the ERROR code. 
+// this function return NN_LENGTH_ERROR if the callback is already set to other. 
+nnom_status_t model_set_callback(nnom_model_t *m, nnom_status_t (*layer_callback)(nnom_model_t *m, nnom_layer_t *layer));
+// delete callback. 
+void model_delete_callback(nnom_model_t *m);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __NNOM_H__ */

components/ai/nnom/inc/nnom_layers.h

@@ -0,0 +1,191 @@
+/*
+ * Copyright (c) 2018-2020
+ * Jianjia Ma
+ * majianjia@live.com
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2019-02-05     Jianjia Ma   The first version
+ */
+
+#ifndef __NNOM_LAYERS_H__
+#define __NNOM_LAYERS_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+#include <stdint.h>
+#include <string.h>
+#include <stdbool.h>
+
+#include "nnom.h"
+
+// properties
+nnom_3d_shape_t shape(size_t h, size_t w, size_t c);
+nnom_3d_shape_t kernel(size_t h, size_t w);
+nnom_3d_shape_t stride(size_t h, size_t w);
+nnom_3d_shape_t dilation(size_t h, size_t w);
+nnom_border_t border(size_t top, size_t bottom, size_t left, size_t right);
+//nnom_qformat_t qformat(int8_t m, int8_t n);
+size_t shape_size(nnom_3d_shape_t* s);
+
+// this function is to add a new IO to current inited IO
+// input, the targeted IO that the new IO will be added to
+// output , the new IO
+nnom_layer_io_t* io_add_aux(nnom_layer_io_t* targeted_io);
+nnom_layer_io_t *io_init(void *owner_layer, nnom_layer_io_t *io);
+
+#define NN_CEILIF(x,y) ((x+y-1)/y)
+
+#include "layers/nnom_activation.h"
+#include "layers/nnom_concat.h"
+#include "layers/nnom_conv2d.h"
+#include "layers/nnom_cropping.h"
+#include "layers/nnom_conv2d_trans.h"
+#include "layers/nnom_dense.h"
+#include "layers/nnom_dw_conv2d.h"
+#include "layers/nnom_flatten.h"
+#include "layers/nnom_global_pool.h"
+#include "layers/nnom_input.h"
+#include "layers/nnom_lambda.h"
+#include "layers/nnom_matrix.h"
+#include "layers/nnom_maxpool.h"
+#include "layers/nnom_avgpool.h"
+#include "layers/nnom_output.h"
+#include "layers/nnom_rnn.h"
+#include "layers/nnom_softmax.h"
+#include "layers/nnom_sumpool.h"
+#include "layers/nnom_upsample.h"
+#include "layers/nnom_zero_padding.h"
+#include "layers/nnom_rnn.h"
+#include "layers/nnom_simple_cell.h"
+#include "layers/nnom_lstm_cell.h"
+#include "layers/nnom_gru_cell.h"
+
+// Layer APIs ******
+// (a summary for each individual layer's files)
+
+// input/output
+nnom_layer_t *Input(nnom_3d_shape_t input_shape, void *p_buf);
+nnom_layer_t *Output(nnom_3d_shape_t output_shape, void *p_buf);
+
+// Pooling
+nnom_layer_t *MaxPool(nnom_3d_shape_t k, nnom_3d_shape_t s, nnom_padding_t pad);
+nnom_layer_t *AvgPool(nnom_3d_shape_t k, nnom_3d_shape_t s, nnom_padding_t pad);
+nnom_layer_t *SumPool(nnom_3d_shape_t k, nnom_3d_shape_t s, nnom_padding_t pad);
+nnom_layer_t *GlobalMaxPool(void);
+nnom_layer_t *GlobalAvgPool(void);
+nnom_layer_t *GlobalSumPool(void);
+
+// padding, cropping, upsample
+nnom_layer_t *UpSample(nnom_3d_shape_t kernel);	
+nnom_layer_t *ZeroPadding(nnom_border_t pad);
+nnom_layer_t *Cropping(nnom_border_t pad);
+
+// Activation
+nnom_layer_t *Activation(nnom_activation_t *act);
+nnom_layer_t *ReLU(void);
+nnom_layer_t *LeakyReLU(float alpha);
+nnom_layer_t *Softmax(void);
+nnom_layer_t *Sigmoid(int32_t dec_bit);  // input dec bit
+nnom_layer_t *TanH(int32_t dec_bit);     // input dec bit 
+
+// Matrix
+nnom_layer_t *Add(int16_t oshift);       // output shift
+nnom_layer_t *Sub(int16_t oshift);       // output shift			
+nnom_layer_t *Mult(int16_t oshift);      // output shift
+
+nnom_layer_t *Flatten(void);
+nnom_layer_t *Concat(int8_t axis);
+// -- NN Constructers --
+// conv2d
+nnom_layer_t *Conv2D(uint32_t filters, nnom_3d_shape_t k, nnom_3d_shape_t s, nnom_3d_shape_t d, nnom_padding_t pad,
+					 const nnom_weight_t *w, const nnom_bias_t *b);
+
+// deconv2d
+nnom_layer_t *Conv2DTrans(uint32_t filters, nnom_3d_shape_t k, nnom_3d_shape_t s, nnom_3d_shape_t d, nnom_padding_t pad,
+					 const nnom_weight_t *w, const nnom_bias_t *b);
+
+// depthwise_convolution
+nnom_layer_t *DW_Conv2D(uint32_t multiplier, nnom_3d_shape_t k, nnom_3d_shape_t s, nnom_3d_shape_t d, nnom_padding_t pad,
+						const nnom_weight_t *w, const nnom_bias_t *b);
+
+// fully connected, dense
+nnom_layer_t *Dense(size_t output_unit, const nnom_weight_t *w, const nnom_bias_t *b);
+
+
+// Lambda Layers
+nnom_layer_t *Lambda(nnom_status_t (*run)(nnom_layer_t *),	// run method, required
+					 nnom_status_t (*build)(nnom_layer_t *), // optional, call default_build() if left null
+					 nnom_status_t (*free)(nnom_layer_t *),   // not required if no resources needs to be deleted, can be left null.
+					 void *parameters);						  // user private parameters for run method, left null if not needed.
+
+// building methods
+nnom_status_t default_build(nnom_layer_t* layer);
+nnom_status_t input_build(nnom_layer_t* layer);
+
+nnom_status_t conv2d_build(nnom_layer_t* layer);
+nnom_status_t dw_conv2d_build(nnom_layer_t* layer);
+nnom_status_t conv2d_trans_build(nnom_layer_t* layer);
+nnom_status_t dense_build(nnom_layer_t* layer);
+nnom_status_t rnn_build(nnom_layer_t* layer);
+
+nnom_status_t upsample_build(nnom_layer_t* layer);
+nnom_status_t zero_padding_build(nnom_layer_t* layer);
+nnom_status_t cropping_build(nnom_layer_t* layer);
+
+nnom_status_t maxpool_build(nnom_layer_t* layer);
+nnom_status_t avgpool_build(nnom_layer_t* layer);
+nnom_status_t sumpool_build(nnom_layer_t* layer);
+nnom_status_t global_pool_build(nnom_layer_t* layer);
+
+nnom_status_t flatten_build(nnom_layer_t* layer);
+nnom_status_t concat_build(nnom_layer_t* layer);
+
+// run
+nnom_status_t input_run(nnom_layer_t* layer);
+nnom_status_t output_run(nnom_layer_t* layer);
+nnom_status_t flatten_run(nnom_layer_t* layer);
+nnom_status_t default_run(nnom_layer_t* layer);  // simply copy data from input to output
+
+nnom_status_t dw_conv2d_run(nnom_layer_t* layer);
+nnom_status_t conv2d_run(nnom_layer_t* layer);
+nnom_status_t conv2d_trans_run(nnom_layer_t* layer);
+nnom_status_t dense_run(nnom_layer_t* layer);
+nnom_status_t rnn_run(nnom_layer_t* layer);
+
+nnom_status_t upsample_run(nnom_layer_t* layer);
+nnom_status_t zero_padding_run(nnom_layer_t* layer);
+nnom_status_t cropping_run(nnom_layer_t* layer);
+
+nnom_status_t activation_run(nnom_layer_t* layer);
+nnom_status_t softmax_run(nnom_layer_t* layer);
+
+nnom_status_t maxpool_run(nnom_layer_t* layer);
+nnom_status_t avgpool_run(nnom_layer_t* layer);
+nnom_status_t sumpool_run(nnom_layer_t* layer);
+
+nnom_status_t concat_run(nnom_layer_t* layer);
+nnom_status_t add_run(nnom_layer_t* layer);
+nnom_status_t sub_run(nnom_layer_t* layer);
+nnom_status_t mult_run(nnom_layer_t* layer);
+
+// Activation APIs
+// Softmax is not considered as activation in NNoM, Softmax is in layer API.
+nnom_activation_t* act_relu(void);
+nnom_activation_t* act_leaky_relu(float alpha);
+nnom_activation_t* act_sigmoid(int32_t dec_bit);
+nnom_activation_t* act_tanh(int32_t dec_bit);
+
+// direct API
+nnom_status_t act_tensor_run(nnom_activation_t* act, nnom_tensor_t* tensor);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __NNOM_LAYERS_H__ */

components/ai/nnom/inc/nnom_local.h

@@ -0,0 +1,974 @@
+/*
+ * Copyright (c) 2018-2020
+ * Jianjia Ma
+ * majianjia@live.com
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ * 
+ * Notice: 
+ * Code in this file inlcudes derivative works from CMSIS, which is released under alternative license.
+ * Please check the LICENSE file for detial.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2019-02-05     Jianjia Ma   The first version
+ * 2019-03-19     Jianjia Ma   Local C implementation partly from CMSIS-NN
+ */
+
+#ifndef __NNOM_LOCAL_H__
+#define __NNOM_LOCAL_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+#include "stdint.h"
+#include "nnom_port.h"
+
+#ifdef ARM_NN_TRUNCATE
+#define NNOM_TRUNCATE
+#endif
+
+// SSAT implementation with C code
+#ifndef __NNOM_SSAT
+static inline int __NNOM_SSAT(int32_t value, int32_t bit) {
+    int32_t min = -(1<<(bit-1));
+    int32_t max = (1<<(bit-1)) - 1;
+    if (value < min)
+        return min;
+    else if (value > max)
+        return max;
+    else
+        return value;
+}
+#endif
+
+// USAT implementation with C code
+#ifndef __NNOM_USAT
+static inline int __NNOM_USAT(int32_t value, int32_t bit) {
+    int32_t max = (1<<(bit-1)) - 1;
+    if (value < 0)
+        return 0;
+    else if (value > max)
+        return max;
+    else
+        return value;
+}
+#endif
+
+#define MAX(A, B) ((A) > (B) ? (A) : (B))
+#define MIN(A, B) ((A) < (B) ? (A) : (B))
+
+
+// Those functions/tables below are partially modifed from CMSIS-NN lib
+// https://github.com/ARM-software/CMSIS_5
+//
+void local_avepool_q7_HWC(const q7_t *Im_in,           // input image
+	const uint16_t dim_im_in_x,  // input image dimension x or W
+	const uint16_t dim_im_in_y,  // input image dimension y or H
+	const uint16_t ch_im_in,     // number of input image channels
+	const uint16_t dim_kernel_x, // window kernel size
+	const uint16_t dim_kernel_y, // window kernel size
+	const uint16_t padding_x,    // padding sizes
+	const uint16_t padding_y,    // padding sizes
+	const uint16_t stride_x,     // stride
+	const uint16_t stride_y,     // stride
+	const uint16_t dim_im_out_x, // output image dimension x or W
+	const uint16_t dim_im_out_y, // output image dimension y or H
+	const uint16_t output_shift, // output right shift
+	q7_t *bufferA,               // a buffer for local storage, NULL by now
+	q7_t *Im_out);
+
+void local_avepool_q7_CHW(const q7_t *Im_in,           // input image
+	const uint16_t dim_im_in_x,  // input image dimension x or W
+	const uint16_t dim_im_in_y,  // input image dimension y or H
+	const uint16_t ch_im_in,     // number of input image channels
+	const uint16_t dim_kernel_x, // window kernel size
+	const uint16_t dim_kernel_y, // window kernel size
+	const uint16_t padding_x,    // padding sizes
+	const uint16_t padding_y,    // padding sizes
+	const uint16_t stride_x,     // stride
+	const uint16_t stride_y,     // stride
+	const uint16_t dim_im_out_x, // output image dimension x or W
+	const uint16_t dim_im_out_y, // output image dimension y or H
+	const uint16_t output_shift, // output right shift
+	q7_t *bufferA,               // a buffer for local storage, NULL by now
+	q7_t *Im_out);
+
+// modified from CMSIS-NN test_ref                            
+void local_maxpool_q7_HWC(const q7_t * Im_in, 				// input image
+	const uint16_t dim_im_in_x,   	// input image dimension x or W
+	const uint16_t dim_im_in_y,   	// input image dimension y or H
+	const uint16_t ch_im_in,    	// number of input image channels
+	const uint16_t dim_kernel_x,  	// window kernel size
+	const uint16_t dim_kernel_y,  	// window kernel size
+	const uint16_t padding_x, 		// padding sizes
+	const uint16_t padding_y, 		// padding sizes
+	const uint16_t stride_x,  		// stride
+	const uint16_t stride_y,  		// stride
+	const uint16_t dim_im_out_x,  	// output image dimension x or W
+	const uint16_t dim_im_out_y,  	// output image dimension y or H
+	q7_t * bufferA, 				// a buffer for local storage, NULL by now
+	q7_t * Im_out);
+
+void local_maxpool_q7_CHW(const q7_t * Im_in, 				// input image
+	const uint16_t dim_im_in_x,   	// input image dimension x or W
+	const uint16_t dim_im_in_y,   	// input image dimension y or H
+	const uint16_t ch_im_in,    	// number of input image channels
+	const uint16_t dim_kernel_x,  	// window kernel size
+	const uint16_t dim_kernel_y,  	// window kernel size
+	const uint16_t padding_x, 		// padding sizes
+	const uint16_t padding_y, 		// padding sizes
+	const uint16_t stride_x,  		// stride
+	const uint16_t stride_y,  		// stride
+	const uint16_t dim_im_out_x,  	// output image dimension x or W
+	const uint16_t dim_im_out_y,  	// output image dimension y or H
+	q7_t * bufferA, 				// a buffer for local storage, NULL by now
+	q7_t * Im_out);
+							
+void local_sumpool_q7_HWC(const q7_t * Im_in, // input image
+	const uint16_t dim_im_in_x,   	// input image dimension x or W
+	const uint16_t dim_im_in_y,   	// input image dimension y or H
+	const uint16_t ch_im_in,    	// number of input image channels
+	const uint16_t dim_kernel_x,  	// window kernel size
+	const uint16_t dim_kernel_y,  	// window kernel size
+	const uint16_t padding_x, 		// padding sizes
+	const uint16_t padding_y, 		// padding sizes
+	const uint16_t stride_x,  		// stride
+	const uint16_t stride_y,  		// stride
+	const uint16_t dim_im_out_x,  	// output image dimension x or W
+	const uint16_t dim_im_out_y,  	// output image dimension y or H
+	q7_t * bufferA, 				// a buffer for local storage, size = 4*output_size
+	q7_t * Im_out);
+							
+void local_sumpool_q7_CHW(const q7_t * Im_in, // input image
+	const uint16_t dim_im_in_x,   	// input image dimension x or W
+	const uint16_t dim_im_in_y,   	// input image dimension y or H
+	const uint16_t ch_im_in,    	// number of input image channels
+	const uint16_t dim_kernel_x,  	// window kernel size
+	const uint16_t dim_kernel_y,  	// window kernel size
+	const uint16_t padding_x, 		// padding sizes
+	const uint16_t padding_y, 		// padding sizes
+	const uint16_t stride_x,  		// stride
+	const uint16_t stride_y,  		// stride
+	const uint16_t dim_im_out_x,  	// output image dimension x or W
+	const uint16_t dim_im_out_y,  	// output image dimension y or H
+	q7_t * bufferA, 				// a buffer for local storage, size = 4*output_size
+	q7_t * Im_out);
+
+// customised up sample pooling
+void local_up_sampling_q7_HWC(const q7_t *Im_in,       // input image
+	const uint16_t dim_im_in_x,  // input image dimension x or W
+	const uint16_t dim_im_in_y,  // input image dimension y or H
+	const uint16_t ch_im_in,     // number of input image channels
+	const uint16_t dim_kernel_x, // window kernel size
+	const uint16_t dim_kernel_y, // window kernel size
+	const uint16_t dim_im_out_x, // output image dimension x or W
+	const uint16_t dim_im_out_y, // output image dimension y or H
+	q7_t *bufferA,               // NULL
+	q7_t *Im_out);
+						  
+void local_up_sampling_q7_CHW(const q7_t *Im_in,       // input image
+	const uint16_t dim_im_in_x,  // input image dimension x or W
+	const uint16_t dim_im_in_y,  // input image dimension y or H
+	const uint16_t ch_im_in,     // number of input image channels
+	const uint16_t dim_kernel_x, // window kernel size
+	const uint16_t dim_kernel_y, // window kernel size
+	const uint16_t dim_im_out_x, // output image dimension x or W
+	const uint16_t dim_im_out_y, // output image dimension y or H
+	q7_t *bufferA,               // NULL
+	q7_t *Im_out);
+
+void local_convolve_HWC_q7_nonsquare(const q7_t *Im_in,                // input image
+	const uint16_t dim_im_in_x,     // input image dimention x
+	const uint16_t dim_im_in_y,     // input image dimention y
+	const uint16_t ch_im_in,        // number of input image channels
+	const q7_t *wt,                 // kernel weights
+	const uint16_t ch_im_out,       // number of filters, i.e., output image channels
+	const uint16_t dim_kernel_x,    // filter kernel size x
+	const uint16_t dim_kernel_y,    // filter kernel size y
+	const uint16_t padding_x,       // padding sizes x
+	const uint16_t padding_y,       // padding sizes y
+	const uint16_t stride_x,        // stride x
+	const uint16_t stride_y,        // stride y
+    const uint16_t dilation_x,      // dilation x
+	const uint16_t dilation_y,      // dilation y
+	const q7_t *bias,               // bias
+	const nnom_qformat_param_t *bias_shift,                            // bias shifts
+    const nnom_qformat_param_t *out_shift,                             // output shift
+    const nnom_qtype_t q_type,      // per channel or per tensor
+    q7_t *Im_out,                   // output image
+	const uint16_t dim_im_out_x,    // output image dimension x
+	const uint16_t dim_im_out_y,    // output image dimension y
+	q15_t *bufferA,                 //buffer space for input
+	q7_t *bufferB                   //buffer space for output
+);
+					   
+void local_convolve_CHW_q7_nonsquare(const q7_t *Im_in,                // input image
+	const uint16_t dim_im_in_x,     // input image dimention x
+	const uint16_t dim_im_in_y,     // input image dimention y
+	const uint16_t ch_im_in,        // number of input image channels
+	const q7_t *wt,                 // kernel weights
+	const uint16_t ch_im_out,       // number of filters, i.e., output image channels
+	const uint16_t dim_kernel_x,    // filter kernel size x
+	const uint16_t dim_kernel_y,    // filter kernel size y
+	const uint16_t padding_x,       // padding sizes x
+	const uint16_t padding_y,       // padding sizes y
+	const uint16_t stride_x,        // stride x
+	const uint16_t stride_y,        // stride y
+    const uint16_t dilation_x,      // dilation x
+	const uint16_t dilation_y,      // dilation y
+	const q7_t *bias,               // bias
+	const nnom_qformat_param_t *bias_shift,                            // bias shifts
+    const nnom_qformat_param_t *out_shift,                             // output shift
+    const nnom_qtype_t q_type,      // per channel or per tensor
+    q7_t *Im_out,                   // output image
+	const uint16_t dim_im_out_x,    // output image dimension x
+	const uint16_t dim_im_out_y,    // output image dimension y
+	q15_t *bufferA,                 //buffer space for input
+	q7_t *bufferB                   //buffer space for output
+);
+
+void local_conv_trans_HWC_q7_nonsquare(const int8_t * Im_in,
+	const uint16_t dim_im_in_x,     // input image dimention x
+	const uint16_t dim_im_in_y,     // input image dimention y
+	const uint16_t ch_im_in,        // number of input image channels
+	const q7_t *wt,                 // kernel weights
+	const uint16_t ch_im_out,       // number of filters, i.e., output image channels
+	const uint16_t dim_kernel_x,    // filter kernel size x
+	const uint16_t dim_kernel_y,    // filter kernel size y
+	const uint16_t padding_x,       // padding sizes x
+	const uint16_t padding_y,       // padding sizes y
+	const uint16_t stride_x,        // stride x
+	const uint16_t stride_y,        // stride y
+    const uint16_t dilation_x,      // dilation x
+	const uint16_t dilation_y,      // dilation y
+	const q7_t *bias,               // bias
+	const uint16_t bias_shift, const uint16_t out_shift, q7_t *Im_out, // output image
+	const uint16_t dim_im_out_x,    // output image dimension x
+	const uint16_t dim_im_out_y,    // output image dimension y
+	q15_t *bufferA,                 //buffer space for input
+	q7_t *bufferB                   //buffer space for output
+);
+
+void local_depthwise_separable_conv_HWC_q7_nonsquare(const q7_t *Im_in,// input image
+	const uint16_t dim_im_in_x,     // input image dimention x
+	const uint16_t dim_im_in_y,     // input image dimention y
+	const uint16_t ch_im_in,        // number of input image channels
+	const q7_t *wt,                 // kernel weights
+	const uint16_t ch_im_out,       // number of filters, i.e., output image channels
+	const uint16_t dim_kernel_x,    // filter kernel size x
+	const uint16_t dim_kernel_y,    // filter kernel size y
+	const uint16_t padding_x,       // padding sizes x
+	const uint16_t padding_y,       // padding sizes y
+	const uint16_t stride_x,        // stride x
+	const uint16_t stride_y,        // stride y
+    const uint16_t dilation_x,      // dilation x
+	const uint16_t dilation_y,      // dilation y
+	const q7_t *bias,               // bias
+	const nnom_qformat_param_t *bias_shift,                            // bias shifts
+    const nnom_qformat_param_t *out_shift,                             // output shift
+    const nnom_qtype_t q_type,      // per channel or per tensor
+    q7_t *Im_out,                   // output image
+	const uint16_t dim_im_out_x,    // output image dimension x
+	const uint16_t dim_im_out_y,    // output image dimension y
+	q15_t *bufferA,                 //buffer space for input
+	q7_t *bufferB                   //buffer space for output
+);
+
+void local_depthwise_separable_conv_CHW_q7_nonsquare(const q7_t *Im_in,// input image
+	const uint16_t dim_im_in_x,     // input image dimention x
+	const uint16_t dim_im_in_y,     // input image dimention y
+	const uint16_t ch_im_in,        // number of input image channels
+	const q7_t *wt,                 // kernel weights
+	const uint16_t ch_im_out,       // number of filters, i.e., output image channels
+	const uint16_t dim_kernel_x,    // filter kernel size x
+	const uint16_t dim_kernel_y,    // filter kernel size y
+	const uint16_t padding_x,       // padding sizes x
+	const uint16_t padding_y,       // padding sizes y
+	const uint16_t stride_x,        // stride x
+	const uint16_t stride_y,        // stride y
+    const uint16_t dilation_x,      // dilation x
+	const uint16_t dilation_y,      // dilation y
+	const q7_t *bias,               // bias
+	const nnom_qformat_param_t *bias_shift,                            // bias shifts
+    const nnom_qformat_param_t *out_shift,                             // output shift
+    const nnom_qtype_t q_type,      // per channel or per tensor
+    q7_t *Im_out,                   // output image
+	const uint16_t dim_im_out_x,    // output image dimension x
+	const uint16_t dim_im_out_y,    // output image dimension y
+	q15_t *bufferA,                 //buffer space for input
+	q7_t *bufferB                   //buffer space for output
+);
+
+void local_zero_padding_HWC_q7(const q7_t *Im_in,           // input image
+	const uint16_t dim_im_in_x,    // input image dimention x
+	const uint16_t dim_im_in_y,    // input image dimention y
+	const uint16_t ch_im_in,       // number of input image channels
+	const uint16_t padding_top,    // padding sizes y
+	const uint16_t padding_bottom, // padding sizes y
+	const uint16_t padding_left,   // padding sizes x
+	const uint16_t padding_right,  // padding sizes x
+	q7_t *Im_out,                  // output image
+	const uint16_t dim_im_out_x,   // output image dimension x
+	const uint16_t dim_im_out_y);  // output image dimension y 
+						 
+void local_zero_padding_CHW_q7(const q7_t *Im_in,           // input image
+	const uint16_t dim_im_in_x,    // input image dimention x
+	const uint16_t dim_im_in_y,    // input image dimention y
+	const uint16_t ch_im_in,       // number of input image channels
+	const uint16_t padding_top,    // padding sizes y
+	const uint16_t padding_bottom, // padding sizes y
+	const uint16_t padding_left,   // padding sizes x
+	const uint16_t padding_right,  // padding sizes x
+	q7_t *Im_out,                  // output image
+	const uint16_t dim_im_out_x,   // output image dimension x
+	const uint16_t dim_im_out_y);  // output image dimension y 
+						 
+void local_cropping_HWC_q7(const q7_t *Im_in,           // input image
+	const uint16_t dim_im_in_x,    // input image dimention x
+	const uint16_t dim_im_in_y,    // input image dimention y
+	const uint16_t ch_im_in,       // number of input image channels
+	const uint16_t padding_top,    // padding sizes y
+	const uint16_t padding_bottom, // padding sizes y
+	const uint16_t padding_left,   // padding sizes x
+	const uint16_t padding_right,  // padding sizes x
+	q7_t *Im_out,                  // output image
+	const uint16_t dim_im_out_x,   // output image dimension x
+	const uint16_t dim_im_out_y);  // output image dimension y 
+						 
+void local_cropping_CHW_q7(const q7_t *Im_in,           // input image
+	const uint16_t dim_im_in_x,    // input image dimention x
+	const uint16_t dim_im_in_y,    // input image dimention y
+	const uint16_t ch_im_in,       // number of input image channels
+	const uint16_t padding_top,    // padding sizes y
+	const uint16_t padding_bottom, // padding sizes y
+	const uint16_t padding_left,   // padding sizes x
+	const uint16_t padding_right,  // padding sizes x
+	q7_t *Im_out,                  // output image
+	const uint16_t dim_im_out_x,   // output image dimension x
+	const uint16_t dim_im_out_y);  // output image dimension y 
+
+void local_fully_connected_q7_opt(const q7_t * pV,    // pointer to vector
+	const q7_t * pM,    // pointer to matrix
+	const uint16_t dim_vec, // length of the vector
+	const uint16_t num_of_rows, // numCol of A
+	const uint16_t bias_shift,  // amount of left-shift for bias
+	const uint16_t out_shift,   // amount of right-shift for output
+	const q7_t * bias, q7_t * pOut, // output operand
+	q15_t * vec_buffer);
+
+
+void local_fully_connected_q7(const q7_t * pV,    // pointer to vector
+	const q7_t * pM,    		// pointer to matrix
+	const uint16_t dim_vec, 	// length of the vector
+	const uint16_t num_of_rows, // numCol of A
+	const uint16_t bias_shift,  // amount of left-shift for bias
+	const uint16_t out_shift,   // amount of right-shift for output
+	const q7_t * bias, q7_t * pOut, // output operand
+	q15_t * vec_buffer);
+
+// matrix dot, 
+// it takes reorderd weight as input, (see dense layer for detail. this is basiclly a dense opt without bias)
+void local_dot_q7_opt(const q7_t *pV, // pointer to vector
+	const q7_t *pM,               // pointer to matrix
+	const uint16_t dim_vec,       // length of the vector
+	const uint16_t num_of_rows,   // numCol of A
+	const uint16_t out_shift,   // amount of right-shift for output
+	q7_t *pOut);				// result buffer  
+
+void local_dot_q7(const q7_t *pV, // pointer to vector
+	const q7_t *pM,               // pointer to matrix
+	const uint16_t dim_vec,       // length of the vector
+	const uint16_t num_of_rows,   // numCol of A
+	const uint16_t out_shift,     // amount of right-shift for output
+	 q7_t *pOut);                   // output operand)
+
+
+
+// softmax
+void local_softmax_q7(const q7_t * vec_in, const uint32_t dim_vec, q7_t * p_out);
+
+// sigmoid
+void local_sigmoid_q7(q7_t * data, uint32_t size, int16_t int_width);
+
+// tanh
+void local_tanh_q7(q7_t * data, uint32_t size, int16_t int_width);
+
+// relu
+void local_relu_q7(q7_t * data, uint32_t size);
+
+// leaky relu
+void local_leaky_relu_q7(q7_t *data, q7_t alpha, uint32_t size);
+
+// alpha in q7 format with dec_bit=7
+// max and threshold has the same Q format with the activation
+void local_adv_relu_q7(q7_t *data, q7_t alpha, q7_t max, q7_t threshold, uint32_t size);
+
+// hard sigmoid, 
+// y=-1 if x < -2.5
+// y=1  if x > 2.5
+// otherwise y = 0.2 * x + 0.5 (y=0.20315 * x + 0.5)
+void local_hard_sigmoid_q7(q7_t *data, uint32_t size, int16_t dec_bit);
+
+// hard tanh
+// y=-1 if x < -1
+// y=1  if x > 1
+// otherwise y = x
+void local_hard_tanh_q7(q7_t *data, uint32_t size, int16_t dec_bit);
+
+// matrix ops
+void local_mult_q7(q7_t * pSrcA, q7_t * pSrcB, q7_t * pDst, const uint16_t out_shift, uint32_t blockSize);
+
+// add 
+void local_add_q7(q7_t * pSrcA, q7_t * pSrcB, q7_t * pDst, const uint16_t out_shift,  uint32_t blockSize);
+
+// sub 
+void local_sub_q7(q7_t * pSrcA, q7_t * pSrcB, q7_t * pDst, const uint16_t out_shift, uint32_t blockSize);
+
+// take multiple blocks (>2) as input
+void local_multiple_add_q7( q7_t *p_dst,
+                  const int16_t out_shift,
+                  uint32_t block_size,
+                  uint32_t num_block,
+                  q7_t **p_src);
+
+void local_multiple_mult_q7( q7_t *p_dst,
+                  const int16_t out_shift,
+                  uint32_t block_size,
+                  uint32_t num_block,
+                  q7_t **p_src);
+
+void local_multiple_sub_q7( q7_t *p_dst,
+                  const int16_t out_shift,
+                  uint32_t block_size,
+                  uint32_t num_block,
+                  q7_t **p_src);
+
+
+// Below tables credit to CMSIS
+// For more info. check CMSIS-NN lib
+// https://github.com/ARM-software/CMSIS_5/blob/develop/CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c
+static const q7_t nnom_sigmoid_table_q7[256] = {
+    0x40, 0x42, 0x44, 0x46, 0x48, 0x4a, 0x4c, 0x4e,
+    0x50, 0x52, 0x53, 0x55, 0x57, 0x59, 0x5a, 0x5c,
+    0x5e, 0x5f, 0x61, 0x62, 0x63, 0x65, 0x66, 0x67,
+    0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f, 0x70,
+    0x71, 0x72, 0x72, 0x73, 0x74, 0x74, 0x75, 0x76,
+    0x76, 0x77, 0x77, 0x78, 0x78, 0x79, 0x79, 0x7a,
+    0x7a, 0x7a, 0x7b, 0x7b, 0x7b, 0x7c, 0x7c, 0x7c,
+    0x7c, 0x7c, 0x7d, 0x7d, 0x7d, 0x7d, 0x7d, 0x7e,
+    0x7e, 0x7e, 0x7e, 0x7e, 0x7e, 0x7e, 0x7e, 0x7f,
+    0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
+    0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
+    0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
+    0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
+    0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
+    0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
+    0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+    0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+    0x01, 0x01, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02,
+    0x02, 0x02, 0x03, 0x03, 0x03, 0x03, 0x03, 0x04,
+    0x04, 0x04, 0x04, 0x04, 0x05, 0x05, 0x05, 0x06,
+    0x06, 0x06, 0x07, 0x07, 0x08, 0x08, 0x09, 0x09,
+    0x0a, 0x0a, 0x0b, 0x0c, 0x0c, 0x0d, 0x0e, 0x0e,
+    0x0f, 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16,
+    0x17, 0x19, 0x1a, 0x1b, 0x1d, 0x1e, 0x1f, 0x21,
+    0x22, 0x24, 0x26, 0x27, 0x29, 0x2b, 0x2d, 0x2e,
+    0x30, 0x32, 0x34, 0x36, 0x38, 0x3a, 0x3c, 0x3e,
+};
+
+
+static const q7_t nnom_tanh_table_q7[256] = {
+    0x00, 0x08, 0x10, 0x18, 0x1f, 0x27, 0x2e, 0x35,
+    0x3b, 0x41, 0x47, 0x4c, 0x51, 0x56, 0x5a, 0x5e,
+    0x61, 0x65, 0x68, 0x6a, 0x6d, 0x6f, 0x71, 0x72,
+    0x74, 0x75, 0x76, 0x78, 0x78, 0x79, 0x7a, 0x7b,
+    0x7b, 0x7c, 0x7c, 0x7d, 0x7d, 0x7e, 0x7e, 0x7e,
+    0x7e, 0x7e, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
+    0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
+    0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
+    0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
+    0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
+    0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
+    0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
+    0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
+    0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
+    0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
+    0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
+    0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
+    0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
+    0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
+    0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
+    0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
+    0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
+    0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
+    0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
+    0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
+    0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x81,
+    0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x82,
+    0x82, 0x82, 0x82, 0x82, 0x83, 0x83, 0x84, 0x84,
+    0x85, 0x85, 0x86, 0x87, 0x88, 0x88, 0x8a, 0x8b,
+    0x8c, 0x8e, 0x8f, 0x91, 0x93, 0x96, 0x98, 0x9b,
+    0x9f, 0xa2, 0xa6, 0xaa, 0xaf, 0xb4, 0xb9, 0xbf,
+    0xc5, 0xcb, 0xd2, 0xd9, 0xe1, 0xe8, 0xf0, 0xf8,
+};
+
+
+// ------------ 16bit ops --------------------
+
+void local_avepool_q15_HWC(const q15_t *Im_in,           // input image
+	const uint16_t dim_im_in_x,  // input image dimension x or W
+	const uint16_t dim_im_in_y,  // input image dimension y or H
+	const uint16_t ch_im_in,     // number of input image channels
+	const uint16_t dim_kernel_x, // window kernel size
+	const uint16_t dim_kernel_y, // window kernel size
+	const uint16_t padding_x,    // padding sizes
+	const uint16_t padding_y,    // padding sizes
+	const uint16_t stride_x,     // stride
+	const uint16_t stride_y,     // stride
+	const uint16_t dim_im_out_x, // output image dimension x or W
+	const uint16_t dim_im_out_y, // output image dimension y or H
+	const uint16_t output_shift, // output right shift
+	q7_t *bufferA,               // a buffer for local storage, NULL by now
+	q15_t *Im_out);
+
+void local_avepool_q15_CHW(const q15_t *Im_in,           // input image
+	const uint16_t dim_im_in_x,  // input image dimension x or W
+	const uint16_t dim_im_in_y,  // input image dimension y or H
+	const uint16_t ch_im_in,     // number of input image channels
+	const uint16_t dim_kernel_x, // window kernel size
+	const uint16_t dim_kernel_y, // window kernel size
+	const uint16_t padding_x,    // padding sizes
+	const uint16_t padding_y,    // padding sizes
+	const uint16_t stride_x,     // stride
+	const uint16_t stride_y,     // stride
+	const uint16_t dim_im_out_x, // output image dimension x or W
+	const uint16_t dim_im_out_y, // output image dimension y or H
+	const uint16_t output_shift, // output right shift
+	q7_t *bufferA,               // a buffer for local storage, NULL by now
+	q15_t *Im_out);
+
+void local_maxpool_q15_HWC(const q15_t *Im_in,           // input image
+	const uint16_t dim_im_in_x,  // input image dimension x or W
+	const uint16_t dim_im_in_y,  // input image dimension y or H
+	const uint16_t ch_im_in,     // number of input image channels
+	const uint16_t dim_kernel_x, // window kernel size
+	const uint16_t dim_kernel_y, // window kernel size
+	const uint16_t padding_x,    // padding sizes
+	const uint16_t padding_y,    // padding sizes
+	const uint16_t stride_x,     // stride
+	const uint16_t stride_y,     // stride
+	const uint16_t dim_im_out_x, // output image dimension x or W
+	const uint16_t dim_im_out_y, // output image dimension y or H
+	q7_t *bufferA,               // a buffer for local storage, NULL by now
+	q15_t *Im_out);
+
+void local_maxpool_q15_CHW(const q15_t *Im_in,           // input image
+	const uint16_t dim_im_in_x,  // input image dimension x or W
+	const uint16_t dim_im_in_y,  // input image dimension y or H
+	const uint16_t ch_im_in,     // number of input image channels
+	const uint16_t dim_kernel_x, // window kernel size
+	const uint16_t dim_kernel_y, // window kernel size
+	const uint16_t padding_x,    // padding sizes
+	const uint16_t padding_y,    // padding sizes
+	const uint16_t stride_x,     // stride
+	const uint16_t stride_y,     // stride
+	const uint16_t dim_im_out_x, // output image dimension x or W
+	const uint16_t dim_im_out_y, // output image dimension y or H
+	q7_t *bufferA,               // a buffer for local storage, NULL by now
+	q15_t *Im_out);
+
+void local_sumpool_q15_HWC(const q15_t *Im_in,           // input image
+	const uint16_t dim_im_in_x,  // input image dimension x or W
+	const uint16_t dim_im_in_y,  // input image dimension y or H
+	const uint16_t ch_im_in,     // number of input image channels
+	const uint16_t dim_kernel_x, // window kernel size
+	const uint16_t dim_kernel_y, // window kernel size
+	const uint16_t padding_x,    // padding sizes
+	const uint16_t padding_y,    // padding sizes
+	const uint16_t stride_x,     // stride
+	const uint16_t stride_y,     // stride
+	const uint16_t dim_im_out_x, // output image dimension x or W
+	const uint16_t dim_im_out_y, // output image dimension y or H
+    const uint16_t output_shift, // output right shift
+	q7_t *bufferA,               // a buffer for local storage, size = 4*output_size
+	q15_t *Im_out);
+
+void local_sumpool_q15_CHW(const q15_t *Im_in,           // input image
+	const uint16_t dim_im_in_x,  // input image dimension x or W
+	const uint16_t dim_im_in_y,  // input image dimension y or H
+	const uint16_t ch_im_in,     // number of input image channels
+	const uint16_t dim_kernel_x, // window kernel size
+	const uint16_t dim_kernel_y, // window kernel size
+	const uint16_t padding_x,    // padding sizes
+	const uint16_t padding_y,    // padding sizes
+	const uint16_t stride_x,     // stride
+	const uint16_t stride_y,     // stride
+	const uint16_t dim_im_out_x, // output image dimension x or W
+	const uint16_t dim_im_out_y, // output image dimension y or H
+	const uint16_t output_shift, // output right shift
+	q7_t *bufferA,               // a buffer for local storage, size = 4*output_size
+	q15_t *Im_out);  
+
+void local_up_sampling_q15_HWC(const q15_t *Im_in,       // input image
+	const uint16_t dim_im_in_x,  // input image dimension x or W
+	const uint16_t dim_im_in_y,  // input image dimension y or H
+	const uint16_t ch_im_in,     // number of input image channels
+	const uint16_t dim_kernel_x, // window kernel size
+	const uint16_t dim_kernel_y, // window kernel size
+	const uint16_t dim_im_out_x, // output image dimension x or W
+	const uint16_t dim_im_out_y, // output image dimension y or H
+	q7_t *bufferA,               // a buffer for local storage, NULL by now
+	q15_t *Im_out);
+
+ void local_up_sampling_q15_CHW(const q15_t *Im_in,       // input image
+	const uint16_t dim_im_in_x,  // input image dimension x or W
+	const uint16_t dim_im_in_y,  // input image dimension y or H
+	const uint16_t ch_im_in,     // number of input image channels
+	const uint16_t dim_kernel_x, // window kernel size
+	const uint16_t dim_kernel_y, // window kernel size
+	const uint16_t dim_im_out_x, // output image dimension x or W
+	const uint16_t dim_im_out_y, // output image dimension y or H
+	q7_t *bufferA,               // a buffer for local storage, NULL by now
+	q15_t *Im_out);
+
+void local_convolve_HWC_q15_nonsquare(const q15_t *Im_in,   // input image
+	const uint16_t dim_im_in_x,   // input image dimention x
+	const uint16_t dim_im_in_y,   // input image dimention y
+	const uint16_t ch_im_in,      // number of input image channels
+	const q7_t *wt,               // kernel weights
+	const uint16_t ch_im_out,     // number of filters, i.e., output image channels
+	const uint16_t dim_kernel_x,  // filter kernel size x
+	const uint16_t dim_kernel_y,  // filter kernel size y
+	const uint16_t padding_x,     // padding sizes x
+	const uint16_t padding_y,     // padding sizes y
+	const uint16_t stride_x,      // stride x
+	const uint16_t stride_y,      // stride y
+    const uint16_t dilation_x,    // dilation x
+	const uint16_t dilation_y,    // dilation y
+	const q7_t *bias,             // bias
+	const nnom_qformat_param_t *bias_shift, // bias shifts
+    const nnom_qformat_param_t *out_shift, // output shift
+    const nnom_qtype_t q_type,      // per channel or per tensor
+    q15_t *Im_out,                  // output image
+	const uint16_t dim_im_out_x,    // output image dimension x
+	const uint16_t dim_im_out_y,    // output image dimension y
+	q15_t *bufferA,                 //buffer space for input
+	q7_t *bufferB                   //buffer space for output
+);
+void local_convolve_CHW_q15_nonsquare(const q15_t *Im_in,                // input image
+	const uint16_t dim_im_in_x,     // input image dimention x
+	const uint16_t dim_im_in_y,     // input image dimention y
+	const uint16_t ch_im_in,        // number of input image channels
+	const q7_t *wt,                 // kernel weights
+	const uint16_t ch_im_out,       // number of filters, i.e., output image channels
+	const uint16_t dim_kernel_x,    // filter kernel size x
+	const uint16_t dim_kernel_y,    // filter kernel size y
+	const uint16_t padding_x,       // padding sizes x
+	const uint16_t padding_y,       // padding sizes y
+	const uint16_t stride_x,        // stride x
+	const uint16_t stride_y,        // stride y
+    const uint16_t dilation_x,      // dilation x
+	const uint16_t dilation_y,      // dilation y
+	const q7_t *bias,               // bias
+	const nnom_qformat_param_t *bias_shift,     // bias shifts
+    const nnom_qformat_param_t *out_shift,      // output shift
+    const nnom_qtype_t q_type,      // per channel or per tensor
+    q15_t *Im_out,                   // output image
+	const uint16_t dim_im_out_x,    // output image dimension x
+	const uint16_t dim_im_out_y,    // output image dimension y
+	q15_t *bufferA,                 //buffer space for input
+	q7_t *bufferB                   //buffer space for output
+);
+
+void local_conv_trans_HWC_q15_nonsquare(const int8_t * Im_in,
+	const uint16_t dim_im_in_x,     // input image dimention x
+	const uint16_t dim_im_in_y,     // input image dimention y
+	const uint16_t ch_im_in,        // number of input image channels
+	const q7_t *wt,                 // kernel weights
+	const uint16_t ch_im_out,       // number of filters, i.e., output image channels
+	const uint16_t dim_kernel_x,    // filter kernel size x
+	const uint16_t dim_kernel_y,    // filter kernel size y
+	const uint16_t padding_x,       // padding sizes x
+	const uint16_t padding_y,       // padding sizes y
+	const uint16_t stride_x,        // stride x
+	const uint16_t stride_y,        // stride y
+    const uint16_t dilation_x,      // dilation x
+	const uint16_t dilation_y,      // dilation y
+	const q7_t *bias,               // bias
+	const uint16_t bias_shift, const uint16_t out_shift, q15_t *Im_out, // output image
+	const uint16_t dim_im_out_x,    // output image dimension x
+	const uint16_t dim_im_out_y,    // output image dimension y
+	q15_t *bufferA,                 //buffer space for input
+	q7_t *bufferB                   //buffer space for output
+);
+
+void local_depthwise_separable_conv_HWC_q15_nonsquare(const q15_t *Im_in,// input image
+	const uint16_t dim_im_in_x,     // input image dimention x
+	const uint16_t dim_im_in_y,     // input image dimention y
+	const uint16_t ch_im_in,        // number of input image channels
+	const q7_t *wt,                 // kernel weights
+	const uint16_t ch_im_out,       // number of filters, i.e., output image channels
+	const uint16_t dim_kernel_x,    // filter kernel size x
+	const uint16_t dim_kernel_y,    // filter kernel size y
+	const uint16_t padding_x,       // padding sizes x
+	const uint16_t padding_y,       // padding sizes y
+	const uint16_t stride_x,        // stride x
+	const uint16_t stride_y,        // stride y
+    const uint16_t dilation_x,      // dilation x
+	const uint16_t dilation_y,      // dilation y
+	const q7_t *bias,               // bias
+	const nnom_qformat_param_t *bias_shift,                            // bias shifts
+    const nnom_qformat_param_t *out_shift,                             // output shift
+    const nnom_qtype_t q_type,      // per channel or per tensor
+    q15_t *Im_out,                   // output image
+	const uint16_t dim_im_out_x,    // output image dimension x
+	const uint16_t dim_im_out_y,    // output image dimension y
+	q15_t *bufferA,                 //buffer space for input
+	q7_t *bufferB                   //buffer space for output
+);
+
+void local_depthwise_separable_conv_CHW_q15_nonsquare(const q15_t *Im_in,// input image
+	const uint16_t dim_im_in_x,     // input image dimention x
+	const uint16_t dim_im_in_y,     // input image dimention y
+	const uint16_t ch_im_in,        // number of input image channels
+	const q7_t *wt,                 // kernel weights
+	const uint16_t ch_im_out,       // number of filters, i.e., output image channels
+	const uint16_t dim_kernel_x,    // filter kernel size x
+	const uint16_t dim_kernel_y,    // filter kernel size y
+	const uint16_t padding_x,       // padding sizes x
+	const uint16_t padding_y,       // padding sizes y
+	const uint16_t stride_x,        // stride x
+	const uint16_t stride_y,        // stride y
+    const uint16_t dilation_x,      // dilation x
+	const uint16_t dilation_y,      // dilation y
+	const q7_t *bias,               // bias
+	const nnom_qformat_param_t *bias_shift,                            // bias shifts
+    const nnom_qformat_param_t *out_shift,                             // output shift
+    const nnom_qtype_t q_type,      // per channel or per tensor
+    q15_t *Im_out,                   // output image
+	const uint16_t dim_im_out_x,    // output image dimension x
+	const uint16_t dim_im_out_y,    // output image dimension y
+	q15_t *bufferA,                 //buffer space for input
+	q7_t *bufferB                   //buffer space for output
+);
+
+void local_zero_padding_HWC_q15(const q15_t *Im_in,           // input image
+	const uint16_t dim_im_in_x,    // input image dimention x
+	const uint16_t dim_im_in_y,    // input image dimention y
+	const uint16_t ch_im_in,       // number of input image channels
+	const uint16_t padding_top,    // padding sizes y
+	const uint16_t padding_bottom, // padding sizes y
+	const uint16_t padding_left,   // padding sizes x
+	const uint16_t padding_right,  // padding sizes x
+	q15_t *Im_out,                  // output image
+	const uint16_t dim_im_out_x,   // output image dimension x
+	const uint16_t dim_im_out_y);   // output image dimension y 
+
+void local_zero_padding_CHW_q15(const q15_t *Im_in,           // input image
+	const uint16_t dim_im_in_x,    // input image dimention x
+	const uint16_t dim_im_in_y,    // input image dimention y
+	const uint16_t ch_im_in,       // number of input image channels
+	const uint16_t padding_top,    // padding sizes y
+	const uint16_t padding_bottom, // padding sizes y
+	const uint16_t padding_left,   // padding sizes x
+	const uint16_t padding_right,  // padding sizes x
+	q15_t *Im_out,                  // output image
+	const uint16_t dim_im_out_x,   // output image dimension x
+	const uint16_t dim_im_out_y);   // output image dimension y 
+
+void local_cropping_HWC_q15(const q15_t *Im_in,           // input image
+	const uint16_t dim_im_in_x,    // input image dimention x
+	const uint16_t dim_im_in_y,    // input image dimention y
+	const uint16_t ch_im_in,       // number of input image channels
+	const uint16_t padding_top,    // padding sizes y
+	const uint16_t padding_bottom, // padding sizes y
+	const uint16_t padding_left,   // padding sizes x
+	const uint16_t padding_right,  // padding sizes x
+	q15_t *Im_out,                  // output image
+	const uint16_t dim_im_out_x,   // output image dimension x
+	const uint16_t dim_im_out_y);   // output image dimension y 
+
+void local_cropping_CHW_q15(const q15_t *Im_in,           // input image
+	const uint16_t dim_im_in_x,    // input image dimention x
+	const uint16_t dim_im_in_y,    // input image dimention y
+	const uint16_t ch_im_in,       // number of input image channels
+	const uint16_t padding_top,    // padding sizes y
+	const uint16_t padding_bottom, // padding sizes y
+	const uint16_t padding_left,   // padding sizes x
+	const uint16_t padding_right,  // padding sizes x
+	q15_t *Im_out,                  // output image
+	const uint16_t dim_im_out_x,   // output image dimension x
+	const uint16_t dim_im_out_y);   // output image dimension y 
+
+
+void local_dot_q15(const q15_t *pV, // pointer to vector
+	const q15_t *pM,               // pointer to matrix
+	const uint16_t dim_vec,       // length of the vector
+	const uint16_t num_of_rows,   // numCol of A
+	const uint16_t out_shift,     // amount of right-shift for output
+	 q15_t *pOut);                   // output operand)
+
+void local_dot_q15_opt(const q15_t * pV,
+	const q15_t * pM,
+	const uint16_t dim_vec,
+	const uint16_t num_of_rows,
+	const uint16_t out_shift, 
+	q15_t * pOut);
+
+// original implementation
+// this support none bias, the it will perform like a dot. 
+// set the `bias=NULL` to work
+void local_fully_connected_mat_q7_vec_q15(const q15_t * pV, // pointer to vector
+	const q7_t * pM,			// pointer to matrix
+	const uint16_t dim_vec,  	// length of the vector
+	const uint16_t num_of_rows, // numCol of A
+	const uint16_t bias_shift, 	// amount of left-shift for bias
+	const uint16_t out_shift, 	// amount of right-shift for output
+	const q7_t * bias,			// bias
+	q15_t * pOut,				// output
+	q15_t * vec_buffer);     	// not used but to keep the interface same as the ARM's version
+
+// work on recorder matrix
+// this support none bias, set the bias=NULL to work								   
+void local_fully_connected_mat_q7_vec_q15_opt(const q15_t * pV,
+	const q7_t * pM,
+	const uint16_t dim_vec,
+	const uint16_t num_of_rows,
+	const uint16_t bias_shift,
+	const uint16_t out_shift, 
+	const q7_t * bias, 
+	q15_t * pOut, 
+	q15_t * vec_buffer);
+
+// matrix operation Q15
+void local_multiple_add_q15( q15_t *p_dst,
+                  const int16_t out_shift,
+                  uint32_t block_size,
+                  uint32_t num_block,
+                  q15_t **p_src);
+                  
+void local_multiple_mult_q15( q15_t *p_dst,
+                  const int16_t out_shift,
+                  uint32_t block_size,
+                  uint32_t num_block,
+                  q15_t **p_src);
+
+void local_multiple_sub_q15( q15_t *p_dst,
+                  const int16_t out_shift,
+                  uint32_t block_size,
+                  uint32_t num_block,
+                  q15_t **p_src);
+
+void local_mult_q15(q15_t * pSrcA, q15_t * pSrcB, q15_t * pDst, const uint16_t out_shift, uint32_t blockSize);
+
+// add 
+void local_add_q15(q15_t * pSrcA, q15_t * pSrcB, q15_t * pDst, const uint16_t out_shift,  uint32_t blockSize);
+
+// sub 
+void local_sub_q15(q15_t * pSrcA, q15_t * pSrcB, q15_t * pDst, const uint16_t out_shift, uint32_t blockSize);
+
+// Convert Q7 to Q15
+void local_q7_to_q15_no_shift(const q7_t *src, q15_t *des, uint32_t size);
+void local_q7_to_q15(const q7_t *src, q15_t *des, uint32_t size);
+
+// q15 shift to q7
+void local_q15_to_q7(const q15_t *src, q7_t *des,  uint32_t shift, uint32_t size);
+
+// y = 1 - x
+void local_1_minor_z_q15(q15_t *src, q15_t *des, uint16_t dec_bit, uint32_t size);
+
+void local_softmax_q15(const q15_t * vec_in, const uint16_t dim_vec, q15_t * p_out);
+void local_hard_sigmoid_q15(q15_t *data, uint32_t size, int16_t dec_bit);
+void local_hard_tanh_q15(q15_t *data, uint32_t size, int16_t dec_bit);
+void local_relu_q15(q15_t *data, uint32_t size);
+void local_leaky_relu_q15(q15_t *data, q7_t alpha, uint32_t size);
+void local_adv_relu_q15(q15_t *data, q7_t negative_slope, q15_t max, q15_t threshold, uint32_t size);
+void local_sigmoid_q15(q15_t * data, uint32_t size, uint16_t int_width);
+void local_tanh_q15(q15_t * data, uint32_t size, uint16_t int_width);
+
+
+static const q15_t nnom_sigmoid_table_q15[256] = {
+    0x4000, 0x4200, 0x43ff, 0x45fc, 0x47f5, 0x49eb, 0x4bdc, 0x4dc8,
+    0x4fad, 0x518a, 0x5360, 0x552c, 0x56ef, 0x58a8, 0x5a57, 0x5bfb,
+    0x5d93, 0x5f20, 0x60a1, 0x6216, 0x637f, 0x64db, 0x662b, 0x676f,
+    0x68a6, 0x69d2, 0x6af1, 0x6c05, 0x6d0d, 0x6e09, 0x6efb, 0x6fe2,
+    0x70be, 0x7190, 0x7258, 0x7316, 0x73cc, 0x7478, 0x751b, 0x75b7,
+    0x764a, 0x76d6, 0x775b, 0x77d8, 0x784f, 0x78c0, 0x792a, 0x798f,
+    0x79ee, 0x7a48, 0x7a9d, 0x7aed, 0x7b39, 0x7b80, 0x7bc4, 0x7c03,
+    0x7c3f, 0x7c78, 0x7cad, 0x7ce0, 0x7d0f, 0x7d3c, 0x7d66, 0x7d8d,
+    0x7db3, 0x7dd6, 0x7df7, 0x7e16, 0x7e33, 0x7e4f, 0x7e69, 0x7e81,
+    0x7e98, 0x7eae, 0x7ec2, 0x7ed5, 0x7ee7, 0x7ef8, 0x7f08, 0x7f17,
+    0x7f25, 0x7f32, 0x7f3e, 0x7f4a, 0x7f55, 0x7f5f, 0x7f69, 0x7f72,
+    0x7f7b, 0x7f83, 0x7f8a, 0x7f91, 0x7f98, 0x7f9e, 0x7fa4, 0x7faa,
+    0x7faf, 0x7fb4, 0x7fb8, 0x7fbd, 0x7fc1, 0x7fc5, 0x7fc8, 0x7fcc,
+    0x7fcf, 0x7fd2, 0x7fd5, 0x7fd7, 0x7fda, 0x7fdc, 0x7fde, 0x7fe0,
+    0x7fe2, 0x7fe4, 0x7fe6, 0x7fe7, 0x7fe9, 0x7fea, 0x7feb, 0x7fed,
+    0x7fee, 0x7fef, 0x7ff0, 0x7ff1, 0x7ff2, 0x7ff3, 0x7ff4, 0x7ff4,
+    0x000b, 0x000c, 0x000c, 0x000d, 0x000e, 0x000f, 0x0010, 0x0011,
+    0x0012, 0x0013, 0x0015, 0x0016, 0x0017, 0x0019, 0x001a, 0x001c,
+    0x001e, 0x0020, 0x0022, 0x0024, 0x0026, 0x0029, 0x002b, 0x002e,
+    0x0031, 0x0034, 0x0038, 0x003b, 0x003f, 0x0043, 0x0048, 0x004c,
+    0x0051, 0x0056, 0x005c, 0x0062, 0x0068, 0x006f, 0x0076, 0x007d,
+    0x0085, 0x008e, 0x0097, 0x00a1, 0x00ab, 0x00b6, 0x00c2, 0x00ce,
+    0x00db, 0x00e9, 0x00f8, 0x0108, 0x0119, 0x012b, 0x013e, 0x0152,
+    0x0168, 0x017f, 0x0197, 0x01b1, 0x01cd, 0x01ea, 0x0209, 0x022a,
+    0x024d, 0x0273, 0x029a, 0x02c4, 0x02f1, 0x0320, 0x0353, 0x0388,
+    0x03c1, 0x03fd, 0x043c, 0x0480, 0x04c7, 0x0513, 0x0563, 0x05b8,
+    0x0612, 0x0671, 0x06d6, 0x0740, 0x07b1, 0x0828, 0x08a5, 0x092a,
+    0x09b6, 0x0a49, 0x0ae5, 0x0b88, 0x0c34, 0x0cea, 0x0da8, 0x0e70,
+    0x0f42, 0x101e, 0x1105, 0x11f7, 0x12f3, 0x13fb, 0x150f, 0x162e,
+    0x175a, 0x1891, 0x19d5, 0x1b25, 0x1c81, 0x1dea, 0x1f5f, 0x20e0,
+    0x226d, 0x2405, 0x25a9, 0x2758, 0x2911, 0x2ad4, 0x2ca0, 0x2e76,
+    0x3053, 0x3238, 0x3424, 0x3615, 0x380b, 0x3a04, 0x3c01, 0x3e00,
+};
+
+
+static const q15_t nnom_tanh_table_q15[256] = {
+    0x0000, 0x07fd, 0x0feb, 0x17b9, 0x1f59, 0x26bf, 0x2ddf, 0x34ae,
+    0x3b27, 0x4142, 0x46fd, 0x4c56, 0x514d, 0x55e2, 0x5a1a, 0x5df6,
+    0x617c, 0x64b0, 0x6797, 0x6a37, 0x6c95, 0x6eb5, 0x709e, 0x7254,
+    0x73dc, 0x753a, 0x7672, 0x7788, 0x787f, 0x795b, 0x7a1e, 0x7acb,
+    0x7b65, 0x7bee, 0x7c66, 0x7cd1, 0x7d30, 0x7d84, 0x7dce, 0x7e0f,
+    0x7e49, 0x7e7d, 0x7eaa, 0x7ed2, 0x7ef5, 0x7f14, 0x7f30, 0x7f48,
+    0x7f5e, 0x7f71, 0x7f82, 0x7f91, 0x7f9e, 0x7fa9, 0x7fb3, 0x7fbc,
+    0x7fc4, 0x7fcb, 0x7fd1, 0x7fd7, 0x7fdc, 0x7fe0, 0x7fe4, 0x7fe7,
+    0x7fea, 0x7fed, 0x7fef, 0x7ff1, 0x7ff3, 0x7ff4, 0x7ff6, 0x7ff7,
+    0x7ff8, 0x7ff9, 0x7ffa, 0x7ffa, 0x7ffb, 0x7ffc, 0x7ffc, 0x7ffd,
+    0x7ffd, 0x7ffd, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe, 0x7fff, 0x7fff,
+    0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
+    0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
+    0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
+    0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
+    0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
+    0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000,
+    0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000,
+    0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000,
+    0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000,
+    0x8000, 0x8000, 0x8001, 0x8001, 0x8001, 0x8001, 0x8001, 0x8001,
+    0x8001, 0x8001, 0x8001, 0x8002, 0x8002, 0x8002, 0x8002, 0x8003,
+    0x8003, 0x8003, 0x8004, 0x8004, 0x8005, 0x8006, 0x8006, 0x8007,
+    0x8008, 0x8009, 0x800a, 0x800c, 0x800d, 0x800f, 0x8011, 0x8013,
+    0x8016, 0x8019, 0x801c, 0x8020, 0x8024, 0x8029, 0x802f, 0x8035,
+    0x803c, 0x8044, 0x804d, 0x8057, 0x8062, 0x806f, 0x807e, 0x808f,
+    0x80a2, 0x80b8, 0x80d0, 0x80ec, 0x810b, 0x812e, 0x8156, 0x8183,
+    0x81b7, 0x81f1, 0x8232, 0x827c, 0x82d0, 0x832f, 0x839a, 0x8412,
+    0x849b, 0x8535, 0x85e2, 0x86a5, 0x8781, 0x8878, 0x898e, 0x8ac6,
+    0x8c24, 0x8dac, 0x8f62, 0x914b, 0x936b, 0x95c9, 0x9869, 0x9b50,
+    0x9e84, 0xa20a, 0xa5e6, 0xaa1e, 0xaeb3, 0xb3aa, 0xb903, 0xbebe,
+    0xc4d9, 0xcb52, 0xd221, 0xd941, 0xe0a7, 0xe847, 0xf015, 0xf803,
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif  /* __NNOM_LOCAL_H__ */

components/ai/nnom/inc/nnom_tensor.h

@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2018-2020
+ * Jianjia Ma
+ * majianjia@live.com
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2019-02-05     Jianjia Ma   The first version
+ * 2019-02-10     Jianjia Ma   Compiler supports dense net connection
+ */
+
+#ifndef __NNOM_TENSOR_H__
+#define __NNOM_TENSOR_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "nnom.h"
+
+
+void delete_tensor(nnom_tensor_t* t);
+nnom_tensor_t* new_tensor(nnom_qtype_t type, uint32_t num_dim, uint32_t num_channel);
+// set tensor by value
+// for tensor with quantized type NNOM_QTYPE_PER_TENSOR
+nnom_tensor_t* tensor_set_attr_v(nnom_tensor_t* t, 
+		nnom_qformat_param_t dec_bit, nnom_qformat_param_t offset, nnom_shape_data_t* dim, uint32_t num_dim, uint8_t bitwidth);
+nnom_tensor_t* tensor_set_attr(nnom_tensor_t* t, 
+		nnom_qformat_param_t*dec_bit, nnom_qformat_param_t *offset, nnom_shape_data_t* dim, uint32_t num_dim, uint8_t bitwidth);
+nnom_tensor_t* tensor_cpy_attr(nnom_tensor_t* des, nnom_tensor_t* src);
+size_t tensor_get_num_channel(nnom_tensor_t* t);
+size_t tensor_size(nnom_tensor_t* t);
+size_t tensor_size_byte(nnom_tensor_t* t);
+
+// only support 3d tensor
+// change format from CHW to HWC
+// the shape of the data, input data, output data
+void tensor_hwc2chw_q7(nnom_tensor_t* des, nnom_tensor_t* src);
+
+// change format from CHW to HWC
+// the shape of the data, input data, output data
+void tensor_chw2hwc_q7(nnom_tensor_t* des, nnom_tensor_t* src);
+
+// deprecated. 
+void hwc2chw_q7(nnom_3d_shape_t shape, q7_t* p_in, q7_t* p_out);
+void chw2hwc_q7(nnom_3d_shape_t shape, q7_t* p_in, q7_t* p_out);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*__NNOM_TENSOR_H__ */

components/ai/nnom/inc/nnom_utils.h

@@ -0,0 +1,91 @@
+/*
+ * Copyright (c) 2018-2020
+ * Jianjia Ma
+ * majianjia@live.com
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2019-02-05     Jianjia Ma   The first version
+ */
+
+#ifndef __NNOM_UTILS_H__
+#define __NNOM_UTILS_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+#include <stdint.h>
+#include <string.h>
+#include <stdbool.h>
+
+#include "nnom.h"
+
+typedef struct _nnom_predict_t
+{
+	uint16_t *confusion_mat; // confusiong matrix
+	uint32_t *top_k;		 // which stored the num of prediction in rank_k, example: Top-2 = top_k[0]+top_k[1]
+	nnom_model_t *model;	 // the model to run
+	int8_t *buf_prediction;  // the pointer to the output of softmax layer(normally the end of classifier).
+
+	// setting
+	uint32_t label_num;  // number of types in classification
+	uint32_t top_k_size; // number of k that wants to know.
+
+	// running
+	uint32_t predict_count; // how many prediction is done
+
+	//timing
+	uint32_t t_run_total;	// total running time
+	uint32_t t_predict_start; // when it is initial
+	uint32_t t_predict_total; // total time of the whole test
+} nnom_predict_t;
+
+// create a prediction
+// input model, the buf pointer to the softwmax output (Temporary, this can be extract from model)
+// the size of softmax output (the num of lable)
+// the top k that wants to record.
+nnom_predict_t *prediction_create(nnom_model_t *m, int8_t *buf_prediction, size_t label_num, size_t top_k_size); // currently int8_t
+
+// after a new data is set in input
+// feed data to prediction
+// input the current label, (range from 0 to total number of label -1)
+// (the current input data should be set by user manully to the input buffer of the model.)
+// return NN_ARGUMENT_ERROR if parameter error
+nnom_status_t prediction_run(nnom_predict_t *pre, uint32_t true_label, uint32_t* predict_label, float* prob);
+
+// to mark prediction finished
+void prediction_end(nnom_predict_t *pre);
+
+// free all resources
+void prediction_delete(nnom_predict_t *pre);
+
+// print matrix
+void prediction_matrix(nnom_predict_t *pre);
+
+// print top-k
+void prediction_top_k(nnom_predict_t *pre);
+
+// this function is to print sumarry
+void prediction_summary(nnom_predict_t *pre);
+
+// -------------------------------
+
+// stand alone prediction API
+// this api test one set of data, return the prediction
+// return the predicted label
+// return NN_ARGUMENT_ERROR if parameter error
+nnom_status_t nnom_predict(nnom_model_t *m, uint32_t *label, float *prob);
+
+void model_stat(nnom_model_t *m);
+
+void model_io_format(nnom_model_t *m);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*__NNOM_UTILS_H__ */

components/ai/nnom/port/nnom_port.h

@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2018-2020
+ * Jianjia Ma
+ * majianjia@live.com
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2019-02-05     Jianjia Ma   The first version
+ * 2021-09-08     derekduke    add tos support
+ */
+
+#ifndef __NNOM_PORT_H__
+#define __NNOM_PORT_H__
+
+#include <stdlib.h>
+#include <stdio.h>
+
+/* use static memory */
+#define NNOM_USING_STATIC_MEMORY    // enable to use built in memory allocation on a large static memory block
+                                     // must set buf using "nnom_set_static_buf()" before creating a model. 
+
+/* dynamic memory interfaces */
+/* when libc is not available, you shall implement the below memory interfaces (libc equivalents). */
+#ifndef NNOM_USING_STATIC_MEMORY    
+    //#define nnom_malloc(n)      malloc(n)       
+    //#define nnom_free(p)        free(p)
+		#define nnom_malloc(n)       tos_mmheap_alloc(n)     
+		#define nnom_free(n)         tos_mmheap_free(n)
+#endif
+
+/* memory interface */
+/* when libc is not available, you shall implement your equivalent functions here */
+#define nnom_memset(p,v,s)        memset(p,v,s)        
+#define nnom_memcpy(dst,src,len)  memcpy(dst,src,len)  
+
+/* runtime & debug */
+#define nnom_us_get()       0       // return a microsecond timestamp
+#define nnom_ms_get()       0       // return a millisecond timestamp
+#define NNOM_LOG(...)       printf(__VA_ARGS__)
+
+/* NNoM configuration */
+#define NNOM_BLOCK_NUM  	(16)		// maximum number of memory blocks, increase it when log request.   
+#define DENSE_WEIGHT_OPT 	(1)		// if used fully connected layer optimized weights. 
+
+//#define NNOM_TRUNCATE             // disable: backend ops use round to the nearest int (default). enable: floor 
+
+/* Backend format configuration */
+//#define NNOM_USING_CHW            // uncomment if using CHW format. otherwise using default HWC format.
+                                    // Notes, CHW is incompatible with CMSIS-NN. 
+                                    // CHW must be used when using hardware accelerator such as KPU in K210 chip
+
+/* Backend selection */
+//#define NNOM_USING_CMSIS_NN       // uncomment if use CMSIS-NN for optimation 
+
+
+#endif
+
+
+