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8275809bfb Update operator-migration.zh-CN.md summer-camp-2026 Beckylu 2026-07-27 11:18:52 +0800
ac03f10db0 Update CONTRIBUTING.md Beckylu 2026-07-27 11:09:56 +0800
c8d0fdd8d7 Update REVIEW.md Beckylu 2026-07-27 11:09:28 +0800
4438494e3e Update ROOFLINE.md Beckylu 2026-07-27 11:09:09 +0800
18d23927bd Update README.en.md Beckylu 2026-07-27 11:08:28 +0800
c80c740136 Update README.zh-CN.md Beckylu 2026-07-27 11:07:24 +0800
ee5791abcf Update README.zh-CN.md Beckylu 2026-07-27 11:06:42 +0800
28b7f9c883 Update README.md Beckylu 2026-07-27 11:06:13 +0800
e08f4a1425 Update README.zh-CN.md Beckylu 2026-07-27 11:04:38 +0800
2ebd036e55 Update README.en.md Beckylu 2026-07-27 11:04:15 +0800
e379b48f38 Update README.zh-CN.md Beckylu 2026-07-27 11:03:00 +0800
446b325aa4 Update README.md Beckylu 2026-07-27 10:53:30 +0800
45685793ef Update README.md Beckylu 2026-07-27 10:51:31 +0800
8808171a94 docs: tailor PR template for camp projects daihongda2023-glitch 2026-07-26 21:46:07 +0800
ac2578c256 docs: add bilingual summer camp guides and PR templates daihongda2023-glitch 2026-07-26 21:40:38 +0800
390e41b19d docs: add MetaX summer camp contribution guide daihongda2023-glitch 2026-07-25 22:57:48 +0800
251646d77b

Merge 18f8d44b92 into d39accf3d7 #1745 Cao Ying 2026-07-25 21:01:56 +0800
18f8d44b92 [Fix][Benchmark] gate bench_kernel contract tests on CUDA; align R21 scope #1745 lcy-seso 2026-07-25 21:01:47 +0800
c3a9a9ae1f [Doc][Manifest] state R21 once, tersely lcy-seso 2026-07-25 20:52:44 +0800
bfccfd0af5 [Test][Benchmark] drop two redundant workloads_to_params tests lcy-seso 2026-07-25 20:52:13 +0800
90332ce41c [Test][Benchmark] fold BenchmarkReport.record tests into test_benchmark_base lcy-seso 2026-07-25 20:43:15 +0800
e1fec21e07 [Test][Benchmark] fold benchmark_base tests into one file lcy-seso 2026-07-25 20:41:01 +0800
7217db7cfd [Test][Benchmark] cover bench_kernel fallback and error propagation lcy-seso 2026-07-25 20:37:18 +0800
941280461b [Chore][Benchmark] condense comments in bench_kernel and helpers lcy-seso 2026-07-25 20:33:38 +0800
d4f18b62b4

Merge 38390bf8ed into d39accf3d7 #1749 Cao Ying 2026-07-25 20:27:32 +0800
7444e1e354 [Fix][Benchmark] render bools verbatim in reports; tighten two docstrings lcy-seso 2026-07-25 20:22:16 +0800
ae6a24f641 [Chore] replace harness jargon with plain terms repo-wide lcy-seso 2026-07-25 20:16:24 +0800
b6691501b1 [Chore][Benchmark] drop harness wording; compress contract tests lcy-seso 2026-07-25 20:12:46 +0800
38390bf8ed [Feat][MANIFEST] Add torch_compile_fullgraph L0 check and compile-contract registry #1749 feat/manifest/issue-1748 lcy-seso 2026-07-25 20:06:49 +0800
fee55b7e36 [Fix][Benchmark] make bench_kernel fallbacks explicit and error-transparent lcy-seso 2026-07-25 20:04:46 +0800
08856e58db [Fix][Benchmark] forbid param collisions with harness keys; drop compat wording lcy-seso 2026-07-25 20:00:24 +0800
67433ac2db

Merge 55b1797d19 into d39accf3d7 #1737 Maybe_Jayden 2026-07-25 19:27:13 +0800
2ad71a1064 [Fix][Benchmark] reject non-string workload keys; assert dim propagation lcy-seso 2026-07-25 18:50:07 +0800
fff3bcf722 [Fix][Benchmark] capture-safe suppression; derive workload keys from signature lcy-seso 2026-07-25 17:46:30 +0800
c1b6ceb5e9 chore(bench): nightly benchmark data from d39accf3d7 d39accf3d7 nightly-bench github-actions[bot] 2026-07-25 09:26:28 +0000
52b582112b [Refactor][Benchmark] derive workload shape keys from manifest signature #1747 lcy-seso 2026-07-25 17:17:59 +0800
e043dbff91 chore(stats): refresh manifest stats from d39accf3d7 d39accf3d7 stats github-actions[bot] 2026-07-25 08:24:35 +0000
d39accf3d7

[Fix][CI] Isolate dynamo state in torch.compile tests (#1743) main Cao Ying 2026-07-25 15:49:19 +0800
cdd8aabc30 [Fix][Benchmark] make bench_kernel output suppression capture-safe and accept input_shape workloads lcy-seso 2026-07-25 14:24:16 +0800
6bed545e43 [Fix][CI] Yield explicitly in _reset_dynamo autouse fixture #1743 fix/ci/issue-1741 lcy-seso 2026-07-25 13:35:05 +0800
8de7df1eb8 [Fix][CI] Isolate dynamo state in torch.compile tests lcy-seso 2026-07-25 12:56:12 +0800
410fe30338

Merge f73202b2d8 into daace1e68b #1718 stelladuyx 2026-07-25 12:07:40 +0800
daace1e68b

[Refactor][Ops] Infer static metadata from forward inputs (#1734) Ang Gao 2026-07-25 12:05:17 +0800
ed3816049d

Merge ddaa14ac67 into 76f35fdf0d #1739 Ang Gao 2026-07-24 14:58:26 +0800
ddaa14ac67 Add W4A16 GEMM op and decode benchmarks #1739 SuperAngGao 2026-07-24 14:57:36 +0800
a8209cfe08

Merge d96faa8a8a into 76f35fdf0d #1738 Maybe_Jayden 2026-07-23 15:16:07 +0000
d96faa8a8a [Fix][MoE] Harden dynamic capacity benchmarks #1738 jienengyu 2026-07-23 23:15:57 +0800
a751776a58 [Feat][MoE] Support dynamic dispatched capacity jienengyu 2026-07-23 22:48:38 +0800
4edf0fe01d [Refactor][MoE] Separate dispatched expert compute jienengyu 2026-07-23 22:14:40 +0800
55b1797d19 [Perf] Remove host padding from LayerNorm kernels #1737 jienengyu 2026-07-22 23:26:05 +0800
f73202b2d8 [Style][Cumsum] satisfy pre-commit formatting #1718 stelladuyx 2026-07-22 13:36:03 +0800
4917424a78 [Fix][Cumsum] assign carry rows to unique threads stelladuyx 2026-07-22 12:08:27 +0800
76f35fdf0d

[Fix][Manifest] Retarget ClampMax source test (#1736) WJFeng 2026-07-21 23:53:21 +0800
27cfb2d8ea

[Fix][Benchmark] Skip FlashInfer FP8 per-tensor baseline (#1735) Zheng QiHang 2026-07-21 23:24:24 +0800
b7f1320829 [Fix][Manifest] Retarget ClampMax source test #1736 wim 2026-07-21 19:53:01 +0800
6ce2b5dc84 Fix fp8 indexer scale and rope rotary inference #1734 SuperAngGao 2026-07-21 17:32:52 +0800
0e4f89f2c3 [Fix][Benchmark] Gate FlashInfer low latency by GPU arch #1735 ZhengQiHang 2026-07-21 17:22:08 +0800
7efb40799e [Fix][Benchmark] Scope FlashInfer skip to failing shape ZhengQiHang 2026-07-21 16:57:49 +0800
eede74569a [Fix][Benchmark] Skip FlashInfer FP8 per-tensor baseline ZhengQiHang 2026-07-21 16:18:23 +0800
ce29287cf4 Address Gemini validation feedback SuperAngGao 2026-07-21 16:00:18 +0800
86e947c774 Add active signatures to recurrence hot paths SuperAngGao 2026-07-21 15:48:26 +0800
3084fe9fec Fix input-inferred PR validation blockers SuperAngGao 2026-07-21 15:25:18 +0800
29c92536c6 Refactor ops to infer static metadata from inputs SuperAngGao 2026-07-21 14:59:30 +0800
c9229cabf0

[Feat][Pool] Implement MaxPool1d and MaxPool3d forward operators (#1731) ChongLi 2026-07-21 13:59:45 +0800
2455e2624f fix: remove @torch.compiler.disable to support fullgraph=True stelladuyx 2026-07-20 18:26:40 +0800
94d2e9c859 [Fix][Pool] Use conditional NaN tracking in max pooling #1731 RMLYC 2026-07-20 18:15:24 +0800
b019fae0bc [Feat][Pool] Implement MaxPool1d and MaxPool3d forward operators RMLYC 2026-07-20 17:24:41 +0800
33a92c271d

[Fix][Engram] Fix inter-block global memory write-read data race in `EngramGateConvBwdKernel` (#1730) Ganxiang Yang 2026-07-20 01:58:03 -0700
8b6446e332 [Fix][Engram] Fix inter-block global memory write-read data race in `EngramGateConvBwdKernel` #1730 ganxiang.yang 2026-07-20 07:44:12 +0000
f4f33791c3 fix(cumsum): disable dynamo tracing of kernel construction for torch.compile stelladuyx 2026-07-20 14:28:40 +0800
8c61e48cc7 fix(cumsum): wrap parallel scan in custom_op for torch.compile compatibility stelladuyx 2026-07-20 14:17:44 +0800
23be83dfa2

[Fix][NORM] Fix global memory write-read data race in `BatchNormFwdTrainKernel` (#1728) Ganxiang Yang 2026-07-19 19:33:59 -0700
ecca42e2d6 [Fix][NORM] Serialize batch-norm running-stat update to one thread #1728 ganxiang.yang 2026-07-19 22:47:19 +0000
48782d50e6

[CI][Nightly] Restore benchmark and op test coverage (#1712) Ang Gao 2026-07-19 08:10:10 +0800
f69895e0a6

[Feat][Pool] Implement MaxPool2d forward operators (#1722) ChongLi 2026-07-17 16:59:41 +0800
0a7b10c825

[Fix][Bench] Isolate L2 flush from profiler kernel timing (#1725) ChongLi 2026-07-17 16:39:05 +0800
66492b862a [Fix][Bench] Isolate L2 flush from profiler kernel timing #1725 RMLYC 2026-07-17 15:19:36 +0800
ae88448753 [Refactor][Pool] Share MaxPool2d dtype validation #1722 RMLYC 2026-07-16 20:46:37 +0800
4143e1fe66 [Fix][Pool] Align MaxPool2d benchmarks and edge semantics RMLYC 2026-07-16 20:28:51 +0800
4a1628849e

[Maintain][GEMM] Add mid-m band (m=16/32/64/96) NT bf16 workloads (#1720) Diao Han 2026-07-16 18:51:03 +0800
252f2a9ae7 fix: address all code review issues - n_tiles mismatch, immutable var, test coverage stelladuyx 2026-07-16 16:56:52 +0800
d3e26f7455

[Perf][Elementwise] vectorize bool bitwise storage path (#1719) Ang Gao 2026-07-16 16:44:27 +0800
41340a886f [Chore] Retrigger preflight with refreshed PR title #1720 bigSheep123 2026-07-16 16:10:30 +0800
cac380b19b fix: implement TileLang carry scan kernel and explicit autotuning warning stelladuyx 2026-07-16 15:54:13 +0800
dfb09f2480

[Fix][GatedDeltaNet] Enable bf16 prefill blocksolve path (#1717) Ang Gao 2026-07-16 15:49:29 +0800
a7d9f6c9cd

[Fix][NORM] Stop default_config from selecting a replicated fragment layout (#1716) Maybe_Jayden 2026-07-16 15:49:03 +0800
1dea728f94 test(elementwise): avoid bool randint in bitwise tests #1719 SuperAngGao 2026-07-16 15:24:03 +0800
ccbff68ebf [Bench][GEMM] Add mid-m band (m=16/32/64/96) NT bf16 workloads bigSheep123 2026-07-16 15:04:25 +0800
fc00897349 chore: retrigger PR preflight #1717 SuperAngGao 2026-07-16 15:04:21 +0800
c22d3be33b perf(elementwise): vectorize bool bitwise storage path SuperAngGao 2026-07-16 14:53:20 +0800
ee6f5eb65c fix: address code review feedback stelladuyx 2026-07-16 14:34:56 +0800
a80101a23e [CI] Reject legacy MHA backward overrides #1712 SuperAngGao 2026-07-16 14:29:29 +0800
2758815909 perf(cumsum): add adaptive parallel scan for small-M large-N workloads stelladuyx 2026-07-16 14:28:33 +0800
fa9f6418fc Fix GDN prefill bf16 blocksolve dispatch SuperAngGao 2026-07-16 13:57:53 +0800
b7534a6879 [Fix][NORM] Harden the autotune config space #1716 jieneng.yu 2026-07-16 12:02:17 +0800
756903d786 [Fix][NORM] Simplify _config: dtype.itemsize and drop the dead threads guard jieneng.yu 2026-07-16 11:47:33 +0800
82cec0d02e [Fix][NORM] Make the autotune thread-count floor dtype-aware jieneng.yu 2026-07-16 11:42:08 +0800
1a76dacabf [Fix][NORM] Stop default_config from selecting a replicated fragment layout jieneng.yu 2026-07-15 22:51:51 +0800
1a3866c791

[Perf][Linear-Attn] Add DeltaNet decode raw fast path (#1684) Ang Gao 2026-07-16 11:22:03 +0800
805768ea43

[Perf][Cumsum] Eliminate 32-way bank conflicts with shared memory padding (#1713) stelladuyx 2026-07-16 11:01:01 +0800